genirq: fix devres.o build for GENERIC_HARDIRQS=n
[linux-2.6.git] / include / linux / irq.h
1 #ifndef _LINUX_IRQ_H
2 #define _LINUX_IRQ_H
3
4 /*
5  * Please do not include this file in generic code.  There is currently
6  * no requirement for any architecture to implement anything held
7  * within this file.
8  *
9  * Thanks. --rmk
10  */
11
12 #include <linux/smp.h>
13
14 #ifndef CONFIG_S390
15
16 #include <linux/linkage.h>
17 #include <linux/cache.h>
18 #include <linux/spinlock.h>
19 #include <linux/cpumask.h>
20 #include <linux/irqreturn.h>
21 #include <linux/irqnr.h>
22 #include <linux/errno.h>
23 #include <linux/wait.h>
24
25 #include <asm/irq.h>
26 #include <asm/ptrace.h>
27 #include <asm/irq_regs.h>
28
29 struct irq_desc;
30 typedef void (*irq_flow_handler_t)(unsigned int irq,
31                                             struct irq_desc *desc);
32
33
34 /*
35  * IRQ line status.
36  *
37  * Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h
38  *
39  * IRQ types
40  */
41 #define IRQ_TYPE_NONE           0x00000000      /* Default, unspecified type */
42 #define IRQ_TYPE_EDGE_RISING    0x00000001      /* Edge rising type */
43 #define IRQ_TYPE_EDGE_FALLING   0x00000002      /* Edge falling type */
44 #define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
45 #define IRQ_TYPE_LEVEL_HIGH     0x00000004      /* Level high type */
46 #define IRQ_TYPE_LEVEL_LOW      0x00000008      /* Level low type */
47 #define IRQ_TYPE_SENSE_MASK     0x0000000f      /* Mask of the above */
48 #define IRQ_TYPE_PROBE          0x00000010      /* Probing in progress */
49
50 /* Internal flags */
51 #define IRQ_INPROGRESS          0x00000100      /* IRQ handler active - do not enter! */
52 #define IRQ_DISABLED            0x00000200      /* IRQ disabled - do not enter! */
53 #define IRQ_PENDING             0x00000400      /* IRQ pending - replay on enable */
54 #define IRQ_REPLAY              0x00000800      /* IRQ has been replayed but not acked yet */
55 #define IRQ_AUTODETECT          0x00001000      /* IRQ is being autodetected */
56 #define IRQ_WAITING             0x00002000      /* IRQ not yet seen - for autodetection */
57 #define IRQ_LEVEL               0x00004000      /* IRQ level triggered */
58 #define IRQ_MASKED              0x00008000      /* IRQ masked - shouldn't be seen again */
59 #define IRQ_PER_CPU             0x00010000      /* IRQ is per CPU */
60 #define IRQ_NOPROBE             0x00020000      /* IRQ is not valid for probing */
61 #define IRQ_NOREQUEST           0x00040000      /* IRQ cannot be requested */
62 #define IRQ_NOAUTOEN            0x00080000      /* IRQ will not be enabled on request irq */
63 #define IRQ_WAKEUP              0x00100000      /* IRQ triggers system wakeup */
64 #define IRQ_MOVE_PENDING        0x00200000      /* need to re-target IRQ destination */
65 #define IRQ_NO_BALANCING        0x00400000      /* IRQ is excluded from balancing */
66 #define IRQ_SPURIOUS_DISABLED   0x00800000      /* IRQ was disabled by the spurious trap */
67 #define IRQ_MOVE_PCNTXT         0x01000000      /* IRQ migration from process context */
68 #define IRQ_AFFINITY_SET        0x02000000      /* IRQ affinity was set from userspace*/
69
70 #ifdef CONFIG_IRQ_PER_CPU
71 # define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
72 # define IRQ_NO_BALANCING_MASK  (IRQ_PER_CPU | IRQ_NO_BALANCING)
73 #else
74 # define CHECK_IRQ_PER_CPU(var) 0
75 # define IRQ_NO_BALANCING_MASK  IRQ_NO_BALANCING
76 #endif
77
78 struct proc_dir_entry;
79 struct msi_desc;
80
81 /**
82  * struct irq_chip - hardware interrupt chip descriptor
83  *
84  * @name:               name for /proc/interrupts
85  * @startup:            start up the interrupt (defaults to ->enable if NULL)
86  * @shutdown:           shut down the interrupt (defaults to ->disable if NULL)
87  * @enable:             enable the interrupt (defaults to chip->unmask if NULL)
88  * @disable:            disable the interrupt (defaults to chip->mask if NULL)
89  * @ack:                start of a new interrupt
90  * @mask:               mask an interrupt source
91  * @mask_ack:           ack and mask an interrupt source
92  * @unmask:             unmask an interrupt source
93  * @eoi:                end of interrupt - chip level
94  * @end:                end of interrupt - flow level
95  * @set_affinity:       set the CPU affinity on SMP machines
96  * @retrigger:          resend an IRQ to the CPU
97  * @set_type:           set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
98  * @set_wake:           enable/disable power-management wake-on of an IRQ
99  *
100  * @release:            release function solely used by UML
101  * @typename:           obsoleted by name, kept as migration helper
102  */
103 struct irq_chip {
104         const char      *name;
105         unsigned int    (*startup)(unsigned int irq);
106         void            (*shutdown)(unsigned int irq);
107         void            (*enable)(unsigned int irq);
108         void            (*disable)(unsigned int irq);
109
110         void            (*ack)(unsigned int irq);
111         void            (*mask)(unsigned int irq);
112         void            (*mask_ack)(unsigned int irq);
113         void            (*unmask)(unsigned int irq);
114         void            (*eoi)(unsigned int irq);
115
116         void            (*end)(unsigned int irq);
117         void            (*set_affinity)(unsigned int irq,
118                                         const struct cpumask *dest);
119         int             (*retrigger)(unsigned int irq);
120         int             (*set_type)(unsigned int irq, unsigned int flow_type);
121         int             (*set_wake)(unsigned int irq, unsigned int on);
122
123         /* Currently used only by UML, might disappear one day.*/
124 #ifdef CONFIG_IRQ_RELEASE_METHOD
125         void            (*release)(unsigned int irq, void *dev_id);
126 #endif
127         /*
128          * For compatibility, ->typename is copied into ->name.
129          * Will disappear.
130          */
131         const char      *typename;
132 };
133
134 struct timer_rand_state;
135 struct irq_2_iommu;
136 /**
137  * struct irq_desc - interrupt descriptor
138  * @irq:                interrupt number for this descriptor
139  * @timer_rand_state:   pointer to timer rand state struct
140  * @kstat_irqs:         irq stats per cpu
141  * @irq_2_iommu:        iommu with this irq
142  * @handle_irq:         highlevel irq-events handler [if NULL, __do_IRQ()]
143  * @chip:               low level interrupt hardware access
144  * @msi_desc:           MSI descriptor
145  * @handler_data:       per-IRQ data for the irq_chip methods
146  * @chip_data:          platform-specific per-chip private data for the chip
147  *                      methods, to allow shared chip implementations
148  * @action:             the irq action chain
149  * @status:             status information
150  * @depth:              disable-depth, for nested irq_disable() calls
151  * @wake_depth:         enable depth, for multiple set_irq_wake() callers
152  * @irq_count:          stats field to detect stalled irqs
153  * @last_unhandled:     aging timer for unhandled count
154  * @irqs_unhandled:     stats field for spurious unhandled interrupts
155  * @lock:               locking for SMP
156  * @affinity:           IRQ affinity on SMP
157  * @cpu:                cpu index useful for balancing
158  * @pending_mask:       pending rebalanced interrupts
159  * @threads_active:     number of irqaction threads currently running
160  * @wait_for_threads:   wait queue for sync_irq to wait for threaded handlers
161  * @dir:                /proc/irq/ procfs entry
162  * @name:               flow handler name for /proc/interrupts output
163  */
164 struct irq_desc {
165         unsigned int            irq;
166         struct timer_rand_state *timer_rand_state;
167         unsigned int            *kstat_irqs;
168 #ifdef CONFIG_INTR_REMAP
169         struct irq_2_iommu      *irq_2_iommu;
170 #endif
171         irq_flow_handler_t      handle_irq;
172         struct irq_chip         *chip;
173         struct msi_desc         *msi_desc;
174         void                    *handler_data;
175         void                    *chip_data;
176         struct irqaction        *action;        /* IRQ action list */
177         unsigned int            status;         /* IRQ status */
178
179         unsigned int            depth;          /* nested irq disables */
180         unsigned int            wake_depth;     /* nested wake enables */
181         unsigned int            irq_count;      /* For detecting broken IRQs */
182         unsigned long           last_unhandled; /* Aging timer for unhandled count */
183         unsigned int            irqs_unhandled;
184         spinlock_t              lock;
185 #ifdef CONFIG_SMP
186         cpumask_var_t           affinity;
187         unsigned int            cpu;
188 #ifdef CONFIG_GENERIC_PENDING_IRQ
189         cpumask_var_t           pending_mask;
190 #endif
191 #endif
192         atomic_t                threads_active;
193         wait_queue_head_t       wait_for_threads;
194 #ifdef CONFIG_PROC_FS
195         struct proc_dir_entry   *dir;
196 #endif
197         const char              *name;
198 } ____cacheline_internodealigned_in_smp;
199
200 extern void arch_init_copy_chip_data(struct irq_desc *old_desc,
201                                         struct irq_desc *desc, int cpu);
202 extern void arch_free_chip_data(struct irq_desc *old_desc, struct irq_desc *desc);
203
204 #ifndef CONFIG_SPARSE_IRQ
205 extern struct irq_desc irq_desc[NR_IRQS];
206 #else /* CONFIG_SPARSE_IRQ */
207 extern struct irq_desc *move_irq_desc(struct irq_desc *old_desc, int cpu);
208 #endif /* CONFIG_SPARSE_IRQ */
209
210 extern struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu);
211
212 static inline struct irq_desc *
213 irq_remap_to_desc(unsigned int irq, struct irq_desc *desc)
214 {
215 #ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC
216         return irq_to_desc(irq);
217 #else
218         return desc;
219 #endif
220 }
221
222 /*
223  * Migration helpers for obsolete names, they will go away:
224  */
225 #define hw_interrupt_type       irq_chip
226 #define no_irq_type             no_irq_chip
227 typedef struct irq_desc         irq_desc_t;
228
229 /*
230  * Pick up the arch-dependent methods:
231  */
232 #include <asm/hw_irq.h>
233
234 extern int setup_irq(unsigned int irq, struct irqaction *new);
235 extern void remove_irq(unsigned int irq, struct irqaction *act);
236
237 #ifdef CONFIG_GENERIC_HARDIRQS
238
239 #ifdef CONFIG_SMP
240
241 #ifdef CONFIG_GENERIC_PENDING_IRQ
242
243 void move_native_irq(int irq);
244 void move_masked_irq(int irq);
245
246 #else /* CONFIG_GENERIC_PENDING_IRQ */
247
248 static inline void move_irq(int irq)
249 {
250 }
251
252 static inline void move_native_irq(int irq)
253 {
254 }
255
256 static inline void move_masked_irq(int irq)
257 {
258 }
259
260 #endif /* CONFIG_GENERIC_PENDING_IRQ */
261
262 #else /* CONFIG_SMP */
263
264 #define move_native_irq(x)
265 #define move_masked_irq(x)
266
267 #endif /* CONFIG_SMP */
268
269 extern int no_irq_affinity;
270
271 static inline int irq_balancing_disabled(unsigned int irq)
272 {
273         struct irq_desc *desc;
274
275         desc = irq_to_desc(irq);
276         return desc->status & IRQ_NO_BALANCING_MASK;
277 }
278
279 /* Handle irq action chains: */
280 extern irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action);
281
282 /*
283  * Built-in IRQ handlers for various IRQ types,
284  * callable via desc->chip->handle_irq()
285  */
286 extern void handle_level_irq(unsigned int irq, struct irq_desc *desc);
287 extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc);
288 extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc);
289 extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc);
290 extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
291 extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc);
292
293 /*
294  * Monolithic do_IRQ implementation.
295  */
296 #ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
297 extern unsigned int __do_IRQ(unsigned int irq);
298 #endif
299
300 /*
301  * Architectures call this to let the generic IRQ layer
302  * handle an interrupt. If the descriptor is attached to an
303  * irqchip-style controller then we call the ->handle_irq() handler,
304  * and it calls __do_IRQ() if it's attached to an irqtype-style controller.
305  */
306 static inline void generic_handle_irq_desc(unsigned int irq, struct irq_desc *desc)
307 {
308 #ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
309         desc->handle_irq(irq, desc);
310 #else
311         if (likely(desc->handle_irq))
312                 desc->handle_irq(irq, desc);
313         else
314                 __do_IRQ(irq);
315 #endif
316 }
317
318 static inline void generic_handle_irq(unsigned int irq)
319 {
320         generic_handle_irq_desc(irq, irq_to_desc(irq));
321 }
322
323 /* Handling of unhandled and spurious interrupts: */
324 extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
325                            irqreturn_t action_ret);
326
327 /* Resending of interrupts :*/
328 void check_irq_resend(struct irq_desc *desc, unsigned int irq);
329
330 /* Enable/disable irq debugging output: */
331 extern int noirqdebug_setup(char *str);
332
333 /* Checks whether the interrupt can be requested by request_irq(): */
334 extern int can_request_irq(unsigned int irq, unsigned long irqflags);
335
336 /* Dummy irq-chip implementations: */
337 extern struct irq_chip no_irq_chip;
338 extern struct irq_chip dummy_irq_chip;
339
340 extern void
341 set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
342                          irq_flow_handler_t handle);
343 extern void
344 set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
345                               irq_flow_handler_t handle, const char *name);
346
347 extern void
348 __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
349                   const char *name);
350
351 /* caller has locked the irq_desc and both params are valid */
352 static inline void __set_irq_handler_unlocked(int irq,
353                                               irq_flow_handler_t handler)
354 {
355         struct irq_desc *desc;
356
357         desc = irq_to_desc(irq);
358         desc->handle_irq = handler;
359 }
360
361 /*
362  * Set a highlevel flow handler for a given IRQ:
363  */
364 static inline void
365 set_irq_handler(unsigned int irq, irq_flow_handler_t handle)
366 {
367         __set_irq_handler(irq, handle, 0, NULL);
368 }
369
370 /*
371  * Set a highlevel chained flow handler for a given IRQ.
372  * (a chained handler is automatically enabled and set to
373  *  IRQ_NOREQUEST and IRQ_NOPROBE)
374  */
375 static inline void
376 set_irq_chained_handler(unsigned int irq,
377                         irq_flow_handler_t handle)
378 {
379         __set_irq_handler(irq, handle, 1, NULL);
380 }
381
382 extern void set_irq_noprobe(unsigned int irq);
383 extern void set_irq_probe(unsigned int irq);
384
385 /* Handle dynamic irq creation and destruction */
386 extern unsigned int create_irq_nr(unsigned int irq_want);
387 extern int create_irq(void);
388 extern void destroy_irq(unsigned int irq);
389
390 /* Test to see if a driver has successfully requested an irq */
391 static inline int irq_has_action(unsigned int irq)
392 {
393         struct irq_desc *desc = irq_to_desc(irq);
394         return desc->action != NULL;
395 }
396
397 /* Dynamic irq helper functions */
398 extern void dynamic_irq_init(unsigned int irq);
399 extern void dynamic_irq_cleanup(unsigned int irq);
400
401 /* Set/get chip/data for an IRQ: */
402 extern int set_irq_chip(unsigned int irq, struct irq_chip *chip);
403 extern int set_irq_data(unsigned int irq, void *data);
404 extern int set_irq_chip_data(unsigned int irq, void *data);
405 extern int set_irq_type(unsigned int irq, unsigned int type);
406 extern int set_irq_msi(unsigned int irq, struct msi_desc *entry);
407
408 #define get_irq_chip(irq)       (irq_to_desc(irq)->chip)
409 #define get_irq_chip_data(irq)  (irq_to_desc(irq)->chip_data)
410 #define get_irq_data(irq)       (irq_to_desc(irq)->handler_data)
411 #define get_irq_msi(irq)        (irq_to_desc(irq)->msi_desc)
412
413 #define get_irq_desc_chip(desc)         ((desc)->chip)
414 #define get_irq_desc_chip_data(desc)    ((desc)->chip_data)
415 #define get_irq_desc_data(desc)         ((desc)->handler_data)
416 #define get_irq_desc_msi(desc)          ((desc)->msi_desc)
417
418 #endif /* CONFIG_GENERIC_HARDIRQS */
419
420 #endif /* !CONFIG_S390 */
421
422 #ifdef CONFIG_SMP
423 /**
424  * init_alloc_desc_masks - allocate cpumasks for irq_desc
425  * @desc:       pointer to irq_desc struct
426  * @cpu:        cpu which will be handling the cpumasks
427  * @boot:       true if need bootmem
428  *
429  * Allocates affinity and pending_mask cpumask if required.
430  * Returns true if successful (or not required).
431  * Side effect: affinity has all bits set, pending_mask has all bits clear.
432  */
433 static inline bool init_alloc_desc_masks(struct irq_desc *desc, int cpu,
434                                                                 bool boot)
435 {
436         int node;
437
438         if (boot) {
439                 alloc_bootmem_cpumask_var(&desc->affinity);
440                 cpumask_setall(desc->affinity);
441
442 #ifdef CONFIG_GENERIC_PENDING_IRQ
443                 alloc_bootmem_cpumask_var(&desc->pending_mask);
444                 cpumask_clear(desc->pending_mask);
445 #endif
446                 return true;
447         }
448
449         node = cpu_to_node(cpu);
450
451         if (!alloc_cpumask_var_node(&desc->affinity, GFP_ATOMIC, node))
452                 return false;
453         cpumask_setall(desc->affinity);
454
455 #ifdef CONFIG_GENERIC_PENDING_IRQ
456         if (!alloc_cpumask_var_node(&desc->pending_mask, GFP_ATOMIC, node)) {
457                 free_cpumask_var(desc->affinity);
458                 return false;
459         }
460         cpumask_clear(desc->pending_mask);
461 #endif
462         return true;
463 }
464
465 /**
466  * init_copy_desc_masks - copy cpumasks for irq_desc
467  * @old_desc:   pointer to old irq_desc struct
468  * @new_desc:   pointer to new irq_desc struct
469  *
470  * Insures affinity and pending_masks are copied to new irq_desc.
471  * If !CONFIG_CPUMASKS_OFFSTACK the cpumasks are embedded in the
472  * irq_desc struct so the copy is redundant.
473  */
474
475 static inline void init_copy_desc_masks(struct irq_desc *old_desc,
476                                         struct irq_desc *new_desc)
477 {
478 #ifdef CONFIG_CPUMASKS_OFFSTACK
479         cpumask_copy(new_desc->affinity, old_desc->affinity);
480
481 #ifdef CONFIG_GENERIC_PENDING_IRQ
482         cpumask_copy(new_desc->pending_mask, old_desc->pending_mask);
483 #endif
484 #endif
485 }
486
487 #else /* !CONFIG_SMP */
488
489 static inline bool init_alloc_desc_masks(struct irq_desc *desc, int cpu,
490                                                                 bool boot)
491 {
492         return true;
493 }
494
495 static inline void init_copy_desc_masks(struct irq_desc *old_desc,
496                                         struct irq_desc *new_desc)
497 {
498 }
499
500 #endif  /* CONFIG_SMP */
501
502 #endif /* _LINUX_IRQ_H */