mmc: core: SDXC speed class support
[linux-2.6.git] / include / linux / cper.h
1 /*
2  * UEFI Common Platform Error Record
3  *
4  * Copyright (C) 2010, Intel Corp.
5  *      Author: Huang Ying <ying.huang@intel.com>
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License version
9  * 2 as published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19  */
20
21 #ifndef LINUX_CPER_H
22 #define LINUX_CPER_H
23
24 #include <linux/uuid.h>
25
26 /* CPER record signature and the size */
27 #define CPER_SIG_RECORD                         "CPER"
28 #define CPER_SIG_SIZE                           4
29 /* Used in signature_end field in struct cper_record_header */
30 #define CPER_SIG_END                            0xffffffff
31
32 /*
33  * CPER record header revision, used in revision field in struct
34  * cper_record_header
35  */
36 #define CPER_RECORD_REV                         0x0100
37
38 /*
39  * Severity difinition for error_severity in struct cper_record_header
40  * and section_severity in struct cper_section_descriptor
41  */
42 enum {
43         CPER_SEV_RECOVERABLE,
44         CPER_SEV_FATAL,
45         CPER_SEV_CORRECTED,
46         CPER_SEV_INFORMATIONAL,
47 };
48
49 /*
50  * Validation bits difinition for validation_bits in struct
51  * cper_record_header. If set, corresponding fields in struct
52  * cper_record_header contain valid information.
53  *
54  * corresponds platform_id
55  */
56 #define CPER_VALID_PLATFORM_ID                  0x0001
57 /* corresponds timestamp */
58 #define CPER_VALID_TIMESTAMP                    0x0002
59 /* corresponds partition_id */
60 #define CPER_VALID_PARTITION_ID                 0x0004
61
62 /*
63  * Notification type used to generate error record, used in
64  * notification_type in struct cper_record_header
65  *
66  * Corrected Machine Check
67  */
68 #define CPER_NOTIFY_CMC                                                 \
69         UUID_LE(0x2DCE8BB1, 0xBDD7, 0x450e, 0xB9, 0xAD, 0x9C, 0xF4,     \
70                 0xEB, 0xD4, 0xF8, 0x90)
71 /* Corrected Platform Error */
72 #define CPER_NOTIFY_CPE                                                 \
73         UUID_LE(0x4E292F96, 0xD843, 0x4a55, 0xA8, 0xC2, 0xD4, 0x81,     \
74                 0xF2, 0x7E, 0xBE, 0xEE)
75 /* Machine Check Exception */
76 #define CPER_NOTIFY_MCE                                                 \
77         UUID_LE(0xE8F56FFE, 0x919C, 0x4cc5, 0xBA, 0x88, 0x65, 0xAB,     \
78                 0xE1, 0x49, 0x13, 0xBB)
79 /* PCI Express Error */
80 #define CPER_NOTIFY_PCIE                                                \
81         UUID_LE(0xCF93C01F, 0x1A16, 0x4dfc, 0xB8, 0xBC, 0x9C, 0x4D,     \
82                 0xAF, 0x67, 0xC1, 0x04)
83 /* INIT Record (for IPF) */
84 #define CPER_NOTIFY_INIT                                                \
85         UUID_LE(0xCC5263E8, 0x9308, 0x454a, 0x89, 0xD0, 0x34, 0x0B,     \
86                 0xD3, 0x9B, 0xC9, 0x8E)
87 /* Non-Maskable Interrupt */
88 #define CPER_NOTIFY_NMI                                                 \
89         UUID_LE(0x5BAD89FF, 0xB7E6, 0x42c9, 0x81, 0x4A, 0xCF, 0x24,     \
90                 0x85, 0xD6, 0xE9, 0x8A)
91 /* BOOT Error Record */
92 #define CPER_NOTIFY_BOOT                                                \
93         UUID_LE(0x3D61A466, 0xAB40, 0x409a, 0xA6, 0x98, 0xF3, 0x62,     \
94                 0xD4, 0x64, 0xB3, 0x8F)
95 /* DMA Remapping Error */
96 #define CPER_NOTIFY_DMAR                                                \
97         UUID_LE(0x667DD791, 0xC6B3, 0x4c27, 0x8A, 0x6B, 0x0F, 0x8E,     \
98                 0x72, 0x2D, 0xEB, 0x41)
99
100 /*
101  * Flags bits definitions for flags in struct cper_record_header
102  * If set, the error has been recovered
103  */
104 #define CPER_HW_ERROR_FLAGS_RECOVERED           0x1
105 /* If set, the error is for previous boot */
106 #define CPER_HW_ERROR_FLAGS_PREVERR             0x2
107 /* If set, the error is injected for testing */
108 #define CPER_HW_ERROR_FLAGS_SIMULATED           0x4
109
110 /*
111  * CPER section header revision, used in revision field in struct
112  * cper_section_descriptor
113  */
114 #define CPER_SEC_REV                            0x0100
115
116 /*
117  * Validation bits difinition for validation_bits in struct
118  * cper_section_descriptor. If set, corresponding fields in struct
119  * cper_section_descriptor contain valid information.
120  *
121  * corresponds fru_id
122  */
123 #define CPER_SEC_VALID_FRU_ID                   0x1
124 /* corresponds fru_text */
125 #define CPER_SEC_VALID_FRU_TEXT                 0x2
126
127 /*
128  * Flags bits definitions for flags in struct cper_section_descriptor
129  *
130  * If set, the section is associated with the error condition
131  * directly, and should be focused on
132  */
133 #define CPER_SEC_PRIMARY                        0x0001
134 /*
135  * If set, the error was not contained within the processor or memory
136  * hierarchy and the error may have propagated to persistent storage
137  * or network
138  */
139 #define CPER_SEC_CONTAINMENT_WARNING            0x0002
140 /* If set, the component must be re-initialized or re-enabled prior to use */
141 #define CPER_SEC_RESET                          0x0004
142 /* If set, Linux may choose to discontinue use of the resource */
143 #define CPER_SEC_ERROR_THRESHOLD_EXCEEDED       0x0008
144 /*
145  * If set, resource could not be queried for error information due to
146  * conflicts with other system software or resources. Some fields of
147  * the section will be invalid
148  */
149 #define CPER_SEC_RESOURCE_NOT_ACCESSIBLE        0x0010
150 /*
151  * If set, action has been taken to ensure error containment (such as
152  * poisoning data), but the error has not been fully corrected and the
153  * data has not been consumed. Linux may choose to take further
154  * corrective action before the data is consumed
155  */
156 #define CPER_SEC_LATENT_ERROR                   0x0020
157
158 /*
159  * Section type definitions, used in section_type field in struct
160  * cper_section_descriptor
161  *
162  * Processor Generic
163  */
164 #define CPER_SEC_PROC_GENERIC                                           \
165         UUID_LE(0x9876CCAD, 0x47B4, 0x4bdb, 0xB6, 0x5E, 0x16, 0xF1,     \
166                 0x93, 0xC4, 0xF3, 0xDB)
167 /* Processor Specific: X86/X86_64 */
168 #define CPER_SEC_PROC_IA                                                \
169         UUID_LE(0xDC3EA0B0, 0xA144, 0x4797, 0xB9, 0x5B, 0x53, 0xFA,     \
170                 0x24, 0x2B, 0x6E, 0x1D)
171 /* Processor Specific: IA64 */
172 #define CPER_SEC_PROC_IPF                                               \
173         UUID_LE(0xE429FAF1, 0x3CB7, 0x11D4, 0x0B, 0xCA, 0x07, 0x00,     \
174                 0x80, 0xC7, 0x3C, 0x88, 0x81)
175 /* Platform Memory */
176 #define CPER_SEC_PLATFORM_MEM                                           \
177         UUID_LE(0xA5BC1114, 0x6F64, 0x4EDE, 0xB8, 0x63, 0x3E, 0x83,     \
178                 0xED, 0x7C, 0x83, 0xB1)
179 #define CPER_SEC_PCIE                                                   \
180         UUID_LE(0xD995E954, 0xBBC1, 0x430F, 0xAD, 0x91, 0xB4, 0x4D,     \
181                 0xCB, 0x3C, 0x6F, 0x35)
182 /* Firmware Error Record Reference */
183 #define CPER_SEC_FW_ERR_REC_REF                                         \
184         UUID_LE(0x81212A96, 0x09ED, 0x4996, 0x94, 0x71, 0x8D, 0x72,     \
185                 0x9C, 0x8E, 0x69, 0xED)
186 /* PCI/PCI-X Bus */
187 #define CPER_SEC_PCI_X_BUS                                              \
188         UUID_LE(0xC5753963, 0x3B84, 0x4095, 0xBF, 0x78, 0xED, 0xDA,     \
189                 0xD3, 0xF9, 0xC9, 0xDD)
190 /* PCI Component/Device */
191 #define CPER_SEC_PCI_DEV                                                \
192         UUID_LE(0xEB5E4685, 0xCA66, 0x4769, 0xB6, 0xA2, 0x26, 0x06,     \
193                 0x8B, 0x00, 0x13, 0x26)
194 #define CPER_SEC_DMAR_GENERIC                                           \
195         UUID_LE(0x5B51FEF7, 0xC79D, 0x4434, 0x8F, 0x1B, 0xAA, 0x62,     \
196                 0xDE, 0x3E, 0x2C, 0x64)
197 /* Intel VT for Directed I/O specific DMAr */
198 #define CPER_SEC_DMAR_VT                                                \
199         UUID_LE(0x71761D37, 0x32B2, 0x45cd, 0xA7, 0xD0, 0xB0, 0xFE,     \
200                 0xDD, 0x93, 0xE8, 0xCF)
201 /* IOMMU specific DMAr */
202 #define CPER_SEC_DMAR_IOMMU                                             \
203         UUID_LE(0x036F84E1, 0x7F37, 0x428c, 0xA7, 0x9E, 0x57, 0x5F,     \
204                 0xDF, 0xAA, 0x84, 0xEC)
205
206 #define CPER_PROC_VALID_TYPE                    0x0001
207 #define CPER_PROC_VALID_ISA                     0x0002
208 #define CPER_PROC_VALID_ERROR_TYPE              0x0004
209 #define CPER_PROC_VALID_OPERATION               0x0008
210 #define CPER_PROC_VALID_FLAGS                   0x0010
211 #define CPER_PROC_VALID_LEVEL                   0x0020
212 #define CPER_PROC_VALID_VERSION                 0x0040
213 #define CPER_PROC_VALID_BRAND_INFO              0x0080
214 #define CPER_PROC_VALID_ID                      0x0100
215 #define CPER_PROC_VALID_TARGET_ADDRESS          0x0200
216 #define CPER_PROC_VALID_REQUESTOR_ID            0x0400
217 #define CPER_PROC_VALID_RESPONDER_ID            0x0800
218 #define CPER_PROC_VALID_IP                      0x1000
219
220 #define CPER_MEM_VALID_ERROR_STATUS             0x0001
221 #define CPER_MEM_VALID_PHYSICAL_ADDRESS         0x0002
222 #define CPER_MEM_VALID_PHYSICAL_ADDRESS_MASK    0x0004
223 #define CPER_MEM_VALID_NODE                     0x0008
224 #define CPER_MEM_VALID_CARD                     0x0010
225 #define CPER_MEM_VALID_MODULE                   0x0020
226 #define CPER_MEM_VALID_BANK                     0x0040
227 #define CPER_MEM_VALID_DEVICE                   0x0080
228 #define CPER_MEM_VALID_ROW                      0x0100
229 #define CPER_MEM_VALID_COLUMN                   0x0200
230 #define CPER_MEM_VALID_BIT_POSITION             0x0400
231 #define CPER_MEM_VALID_REQUESTOR_ID             0x0800
232 #define CPER_MEM_VALID_RESPONDER_ID             0x1000
233 #define CPER_MEM_VALID_TARGET_ID                0x2000
234 #define CPER_MEM_VALID_ERROR_TYPE               0x4000
235
236 #define CPER_PCIE_VALID_PORT_TYPE               0x0001
237 #define CPER_PCIE_VALID_VERSION                 0x0002
238 #define CPER_PCIE_VALID_COMMAND_STATUS          0x0004
239 #define CPER_PCIE_VALID_DEVICE_ID               0x0008
240 #define CPER_PCIE_VALID_SERIAL_NUMBER           0x0010
241 #define CPER_PCIE_VALID_BRIDGE_CONTROL_STATUS   0x0020
242 #define CPER_PCIE_VALID_CAPABILITY              0x0040
243 #define CPER_PCIE_VALID_AER_INFO                0x0080
244
245 #define CPER_PCIE_SLOT_SHIFT                    3
246
247 /*
248  * All tables and structs must be byte-packed to match CPER
249  * specification, since the tables are provided by the system BIOS
250  */
251 #pragma pack(1)
252
253 struct cper_record_header {
254         char    signature[CPER_SIG_SIZE];       /* must be CPER_SIG_RECORD */
255         __u16   revision;                       /* must be CPER_RECORD_REV */
256         __u32   signature_end;                  /* must be CPER_SIG_END */
257         __u16   section_count;
258         __u32   error_severity;
259         __u32   validation_bits;
260         __u32   record_length;
261         __u64   timestamp;
262         uuid_le platform_id;
263         uuid_le partition_id;
264         uuid_le creator_id;
265         uuid_le notification_type;
266         __u64   record_id;
267         __u32   flags;
268         __u64   persistence_information;
269         __u8    reserved[12];                   /* must be zero */
270 };
271
272 struct cper_section_descriptor {
273         __u32   section_offset;         /* Offset in bytes of the
274                                          *  section body from the base
275                                          *  of the record header */
276         __u32   section_length;
277         __u16   revision;               /* must be CPER_RECORD_REV */
278         __u8    validation_bits;
279         __u8    reserved;               /* must be zero */
280         __u32   flags;
281         uuid_le section_type;
282         uuid_le fru_id;
283         __u32   section_severity;
284         __u8    fru_text[20];
285 };
286
287 /* Generic Processor Error Section */
288 struct cper_sec_proc_generic {
289         __u64   validation_bits;
290         __u8    proc_type;
291         __u8    proc_isa;
292         __u8    proc_error_type;
293         __u8    operation;
294         __u8    flags;
295         __u8    level;
296         __u16   reserved;
297         __u64   cpu_version;
298         char    cpu_brand[128];
299         __u64   proc_id;
300         __u64   target_addr;
301         __u64   requestor_id;
302         __u64   responder_id;
303         __u64   ip;
304 };
305
306 /* IA32/X64 Processor Error Section */
307 struct cper_sec_proc_ia {
308         __u64   validation_bits;
309         __u8    lapic_id;
310         __u8    cpuid[48];
311 };
312
313 /* IA32/X64 Processor Error Information Structure */
314 struct cper_ia_err_info {
315         uuid_le err_type;
316         __u64   validation_bits;
317         __u64   check_info;
318         __u64   target_id;
319         __u64   requestor_id;
320         __u64   responder_id;
321         __u64   ip;
322 };
323
324 /* IA32/X64 Processor Context Information Structure */
325 struct cper_ia_proc_ctx {
326         __u16   reg_ctx_type;
327         __u16   reg_arr_size;
328         __u32   msr_addr;
329         __u64   mm_reg_addr;
330 };
331
332 /* Memory Error Section */
333 struct cper_sec_mem_err {
334         __u64   validation_bits;
335         __u64   error_status;
336         __u64   physical_addr;
337         __u64   physical_addr_mask;
338         __u16   node;
339         __u16   card;
340         __u16   module;
341         __u16   bank;
342         __u16   device;
343         __u16   row;
344         __u16   column;
345         __u16   bit_pos;
346         __u64   requestor_id;
347         __u64   responder_id;
348         __u64   target_id;
349         __u8    error_type;
350 };
351
352 struct cper_sec_pcie {
353         __u64           validation_bits;
354         __u32           port_type;
355         struct {
356                 __u8    minor;
357                 __u8    major;
358                 __u8    reserved[2];
359         }               version;
360         __u16           command;
361         __u16           status;
362         __u32           reserved;
363         struct {
364                 __u16   vendor_id;
365                 __u16   device_id;
366                 __u8    class_code[3];
367                 __u8    function;
368                 __u8    device;
369                 __u16   segment;
370                 __u8    bus;
371                 __u8    secondary_bus;
372                 __u16   slot;
373                 __u8    reserved;
374         }               device_id;
375         struct {
376                 __u32   lower;
377                 __u32   upper;
378         }               serial_number;
379         struct {
380                 __u16   secondary_status;
381                 __u16   control;
382         }               bridge;
383         __u8    capability[60];
384         __u8    aer_info[96];
385 };
386
387 /* Reset to default packing */
388 #pragma pack()
389
390 u64 cper_next_record_id(void);
391 void cper_print_bits(const char *prefix, unsigned int bits,
392                      const char *strs[], unsigned int strs_size);
393
394 #endif