e16d56f8dfe1dd01864c3993c60a2f0a43757799
[linux-2.6.git] / include / asm-s390 / sigp.h
1 /*
2  *  include/asm-s390/sigp.h
3  *
4  *  S390 version
5  *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6  *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
7  *               Martin Schwidefsky (schwidefsky@de.ibm.com)
8  *               Heiko Carstens (heiko.carstens@de.ibm.com)
9  *
10  *  sigp.h by D.J. Barrow (c) IBM 1999
11  *  contains routines / structures for signalling other S/390 processors in an
12  *  SMP configuration.
13  */
14
15 #ifndef __SIGP__
16 #define __SIGP__
17
18 #include <asm/ptrace.h>
19 #include <asm/atomic.h>
20
21 /* get real cpu address from logical cpu number */
22 extern volatile int __cpu_logical_map[];
23
24 typedef enum
25 {
26         sigp_unassigned=0x0,
27         sigp_sense,
28         sigp_external_call,
29         sigp_emergency_signal,
30         sigp_start,
31         sigp_stop,
32         sigp_restart,
33         sigp_unassigned1,
34         sigp_unassigned2,
35         sigp_stop_and_store_status,
36         sigp_unassigned3,
37         sigp_initial_cpu_reset,
38         sigp_cpu_reset,
39         sigp_set_prefix,
40         sigp_store_status_at_address,
41         sigp_store_extended_status_at_address
42 } sigp_order_code;
43
44 typedef __u32 sigp_status_word;
45
46 typedef enum
47 {
48         sigp_order_code_accepted=0,
49         sigp_status_stored,
50         sigp_busy,
51         sigp_not_operational
52 } sigp_ccode;
53
54
55 /*
56  * Definitions for the external call
57  */
58
59 /* 'Bit' signals, asynchronous */
60 typedef enum
61 {
62         ec_schedule=0,
63         ec_call_function,
64         ec_bit_last
65 } ec_bit_sig;
66
67 /*
68  * Signal processor
69  */
70 static inline sigp_ccode
71 signal_processor(__u16 cpu_addr, sigp_order_code order_code)
72 {
73         register unsigned long reg1 asm ("1") = 0;
74         sigp_ccode ccode;
75
76         asm volatile(
77                 "       sigp    %1,%2,0(%3)\n"
78                 "       ipm     %0\n"
79                 "       srl     %0,28\n"
80                 :       "=d"    (ccode)
81                 : "d" (reg1), "d" (__cpu_logical_map[cpu_addr]),
82                   "a" (order_code) : "cc" , "memory");
83         return ccode;
84 }
85
86 /*
87  * Signal processor with parameter
88  */
89 static inline sigp_ccode
90 signal_processor_p(__u32 parameter, __u16 cpu_addr, sigp_order_code order_code)
91 {
92         register unsigned int reg1 asm ("1") = parameter;
93         sigp_ccode ccode;
94
95         asm volatile(
96                 "       sigp    %1,%2,0(%3)\n"
97                 "       ipm     %0\n"
98                 "       srl     %0,28\n"
99                 : "=d" (ccode)
100                 : "d" (reg1), "d" (__cpu_logical_map[cpu_addr]),
101                   "a" (order_code) : "cc" , "memory");
102         return ccode;
103 }
104
105 /*
106  * Signal processor with parameter and return status
107  */
108 static inline sigp_ccode
109 signal_processor_ps(__u32 *statusptr, __u32 parameter, __u16 cpu_addr,
110                     sigp_order_code order_code)
111 {
112         register unsigned int reg1 asm ("1") = parameter;
113         sigp_ccode ccode;
114
115         asm volatile(
116                 "       sigp    %1,%2,0(%3)\n"
117                 "       ipm     %0\n"
118                 "       srl     %0,28\n"
119                 : "=d" (ccode), "+d" (reg1)
120                 : "d" (__cpu_logical_map[cpu_addr]), "a" (order_code)
121                 : "cc" , "memory");
122         *statusptr = reg1;
123         return ccode;
124 }
125
126 #endif /* __SIGP__ */