445727ae2baa91e92383044fbcaf25fd45fd231b
[linux-2.6.git] / include / asm-ppc64 / cputable.h
1 /*
2  *  include/asm-ppc64/cputable.h
3  *
4  *  Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
5  *
6  *  Modifications for ppc64:
7  *      Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
8  * 
9  *  This program is free software; you can redistribute it and/or
10  *  modify it under the terms of the GNU General Public License
11  *  as published by the Free Software Foundation; either version
12  *  2 of the License, or (at your option) any later version.
13  */
14
15 #ifndef __ASM_PPC_CPUTABLE_H
16 #define __ASM_PPC_CPUTABLE_H
17
18 #include <linux/config.h>
19 #include <asm/page.h> /* for ASM_CONST */
20
21 /* Exposed to userland CPU features - Must match ppc32 definitions */
22 #define PPC_FEATURE_32                  0x80000000
23 #define PPC_FEATURE_64                  0x40000000
24 #define PPC_FEATURE_601_INSTR           0x20000000
25 #define PPC_FEATURE_HAS_ALTIVEC         0x10000000
26 #define PPC_FEATURE_HAS_FPU             0x08000000
27 #define PPC_FEATURE_HAS_MMU             0x04000000
28 #define PPC_FEATURE_HAS_4xxMAC          0x02000000
29 #define PPC_FEATURE_UNIFIED_CACHE       0x01000000
30
31 #ifdef __KERNEL__
32
33 #ifndef __ASSEMBLY__
34
35 /* This structure can grow, it's real size is used by head.S code
36  * via the mkdefs mechanism.
37  */
38 struct cpu_spec;
39
40 typedef void (*cpu_setup_t)(unsigned long offset, struct cpu_spec* spec);
41
42 struct cpu_spec {
43         /* CPU is matched via (PVR & pvr_mask) == pvr_value */
44         unsigned int    pvr_mask;
45         unsigned int    pvr_value;
46
47         char            *cpu_name;
48         unsigned long   cpu_features;           /* Kernel features */
49         unsigned int    cpu_user_features;      /* Userland features */
50
51         /* cache line sizes */
52         unsigned int    icache_bsize;
53         unsigned int    dcache_bsize;
54
55         /* number of performance monitor counters */
56         unsigned int    num_pmcs;
57
58         /* this is called to initialize various CPU bits like L1 cache,
59          * BHT, SPD, etc... from head.S before branching to identify_machine
60          */
61         cpu_setup_t     cpu_setup;
62
63         /* Used by oprofile userspace to select the right counters */
64         char            *oprofile_cpu_type;
65 };
66
67 extern struct cpu_spec          cpu_specs[];
68 extern struct cpu_spec          *cur_cpu_spec;
69
70 static inline unsigned long cpu_has_feature(unsigned long feature)
71 {
72         return cur_cpu_spec->cpu_features & feature;
73 }
74
75 #endif /* __ASSEMBLY__ */
76
77 /* CPU kernel features */
78
79 /* Retain the 32b definitions for the time being - use bottom half of word */
80 #define CPU_FTR_SPLIT_ID_CACHE          ASM_CONST(0x0000000000000001)
81 #define CPU_FTR_L2CR                    ASM_CONST(0x0000000000000002)
82 #define CPU_FTR_SPEC7450                ASM_CONST(0x0000000000000004)
83 #define CPU_FTR_ALTIVEC                 ASM_CONST(0x0000000000000008)
84 #define CPU_FTR_TAU                     ASM_CONST(0x0000000000000010)
85 #define CPU_FTR_CAN_DOZE                ASM_CONST(0x0000000000000020)
86 #define CPU_FTR_USE_TB                  ASM_CONST(0x0000000000000040)
87 #define CPU_FTR_604_PERF_MON            ASM_CONST(0x0000000000000080)
88 #define CPU_FTR_601                     ASM_CONST(0x0000000000000100)
89 #define CPU_FTR_HPTE_TABLE              ASM_CONST(0x0000000000000200)
90 #define CPU_FTR_CAN_NAP                 ASM_CONST(0x0000000000000400)
91 #define CPU_FTR_L3CR                    ASM_CONST(0x0000000000000800)
92 #define CPU_FTR_L3_DISABLE_NAP          ASM_CONST(0x0000000000001000)
93 #define CPU_FTR_NAP_DISABLE_L2_PR       ASM_CONST(0x0000000000002000)
94 #define CPU_FTR_DUAL_PLL_750FX          ASM_CONST(0x0000000000004000)
95
96 /* Add the 64b processor unique features in the top half of the word */
97 #define CPU_FTR_SLB                     ASM_CONST(0x0000000100000000)
98 #define CPU_FTR_16M_PAGE                ASM_CONST(0x0000000200000000)
99 #define CPU_FTR_TLBIEL                  ASM_CONST(0x0000000400000000)
100 #define CPU_FTR_NOEXECUTE               ASM_CONST(0x0000000800000000)
101 #define CPU_FTR_NODSISRALIGN            ASM_CONST(0x0000001000000000)
102 #define CPU_FTR_IABR                    ASM_CONST(0x0000002000000000)
103 #define CPU_FTR_MMCRA                   ASM_CONST(0x0000004000000000)
104 /* unused                               ASM_CONST(0x0000008000000000) */
105 #define CPU_FTR_SMT                     ASM_CONST(0x0000010000000000)
106 #define CPU_FTR_COHERENT_ICACHE         ASM_CONST(0x0000020000000000)
107 #define CPU_FTR_LOCKLESS_TLBIE          ASM_CONST(0x0000040000000000)
108 #define CPU_FTR_MMCRA_SIHV              ASM_CONST(0x0000080000000000)
109 #define CPU_FTR_CTRL                    ASM_CONST(0x0000100000000000)
110
111 #ifndef __ASSEMBLY__
112
113 #define COMMON_USER_PPC64       (PPC_FEATURE_32 | PPC_FEATURE_64 | \
114                                  PPC_FEATURE_HAS_FPU | PPC_FEATURE_HAS_MMU)
115
116 #define CPU_FTR_PPCAS_ARCH_V2_BASE (CPU_FTR_SLB | \
117                                  CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \
118                                  CPU_FTR_NODSISRALIGN | CPU_FTR_CTRL)
119
120 /* iSeries doesn't support large pages */
121 #ifdef CONFIG_PPC_ISERIES
122 #define CPU_FTR_PPCAS_ARCH_V2   (CPU_FTR_PPCAS_ARCH_V2_BASE)
123 #else
124 #define CPU_FTR_PPCAS_ARCH_V2   (CPU_FTR_PPCAS_ARCH_V2_BASE | CPU_FTR_16M_PAGE)
125 #endif /* CONFIG_PPC_ISERIES */
126
127 #endif /* __ASSEMBLY */
128
129 #ifdef __ASSEMBLY__
130
131 #define BEGIN_FTR_SECTION               98:
132
133 #define END_FTR_SECTION(msk, val)               \
134 99:                                             \
135         .section __ftr_fixup,"a";               \
136         .align 3;                               \
137         .llong msk;                             \
138         .llong val;                             \
139         .llong 98b;                             \
140         .llong 99b;                             \
141         .previous
142
143 #else
144
145 #define BEGIN_FTR_SECTION               "98:\n"
146 #define END_FTR_SECTION(msk, val)               \
147 "99:\n"                                         \
148 "       .section __ftr_fixup,\"a\";\n"          \
149 "       .align 3;\n"                            \
150 "       .llong "#msk";\n"                       \
151 "       .llong "#val";\n"                       \
152 "       .llong 98b;\n"                          \
153 "       .llong 99b;\n"                          \
154 "       .previous\n"
155
156 #endif /* __ASSEMBLY__ */
157
158 #define END_FTR_SECTION_IFSET(msk)      END_FTR_SECTION((msk), (msk))
159 #define END_FTR_SECTION_IFCLR(msk)      END_FTR_SECTION((msk), 0)
160
161 #endif /* __ASM_PPC_CPUTABLE_H */
162 #endif /* __KERNEL__ */
163