[PATCH] USB: Fix warning in drivers/usb/media/ov511.c
[linux-2.6.git] / include / asm-ia64 / mca_asm.h
1 /*
2  * File:        mca_asm.h
3  *
4  * Copyright (C) 1999 Silicon Graphics, Inc.
5  * Copyright (C) Vijay Chander (vijay@engr.sgi.com)
6  * Copyright (C) Srinivasa Thirumalachar <sprasad@engr.sgi.com>
7  * Copyright (C) 2000 Hewlett-Packard Co.
8  * Copyright (C) 2000 David Mosberger-Tang <davidm@hpl.hp.com>
9  * Copyright (C) 2002 Intel Corp.
10  * Copyright (C) 2002 Jenna Hall <jenna.s.hall@intel.com>
11  * Copyright (C) 2005 Silicon Graphics, Inc
12  * Copyright (C) 2005 Keith Owens <kaos@sgi.com>
13  */
14 #ifndef _ASM_IA64_MCA_ASM_H
15 #define _ASM_IA64_MCA_ASM_H
16
17 #define PSR_IC          13
18 #define PSR_I           14
19 #define PSR_DT          17
20 #define PSR_RT          27
21 #define PSR_MC          35
22 #define PSR_IT          36
23 #define PSR_BN          44
24
25 /*
26  * This macro converts a instruction virtual address to a physical address
27  * Right now for simulation purposes the virtual addresses are
28  * direct mapped to physical addresses.
29  *      1. Lop off bits 61 thru 63 in the virtual address
30  */
31 #define INST_VA_TO_PA(addr)                                                     \
32         dep     addr    = 0, addr, 61, 3
33 /*
34  * This macro converts a data virtual address to a physical address
35  * Right now for simulation purposes the virtual addresses are
36  * direct mapped to physical addresses.
37  *      1. Lop off bits 61 thru 63 in the virtual address
38  */
39 #define DATA_VA_TO_PA(addr)                                                     \
40         tpa     addr    = addr
41 /*
42  * This macro converts a data physical address to a virtual address
43  * Right now for simulation purposes the virtual addresses are
44  * direct mapped to physical addresses.
45  *      1. Put 0x7 in bits 61 thru 63.
46  */
47 #define DATA_PA_TO_VA(addr,temp)                                                        \
48         mov     temp    = 0x7   ;;                                                      \
49         dep     addr    = temp, addr, 61, 3
50
51 #define GET_THIS_PADDR(reg, var)                \
52         mov     reg = IA64_KR(PER_CPU_DATA);;   \
53         addl    reg = THIS_CPU(var), reg
54
55 /*
56  * This macro jumps to the instruction at the given virtual address
57  * and starts execution in physical mode with all the address
58  * translations turned off.
59  *      1.      Save the current psr
60  *      2.      Make sure that all the upper 32 bits are off
61  *
62  *      3.      Clear the interrupt enable and interrupt state collection bits
63  *              in the psr before updating the ipsr and iip.
64  *
65  *      4.      Turn off the instruction, data and rse translation bits of the psr
66  *              and store the new value into ipsr
67  *              Also make sure that the interrupts are disabled.
68  *              Ensure that we are in little endian mode.
69  *              [psr.{rt, it, dt, i, be} = 0]
70  *
71  *      5.      Get the physical address corresponding to the virtual address
72  *              of the next instruction bundle and put it in iip.
73  *              (Using magic numbers 24 and 40 in the deposint instruction since
74  *               the IA64_SDK code directly maps to lower 24bits as physical address
75  *               from a virtual address).
76  *
77  *      6.      Do an rfi to move the values from ipsr to psr and iip to ip.
78  */
79 #define  PHYSICAL_MODE_ENTER(temp1, temp2, start_addr, old_psr)                         \
80         mov     old_psr = psr;                                                          \
81         ;;                                                                              \
82         dep     old_psr = 0, old_psr, 32, 32;                                           \
83                                                                                         \
84         mov     ar.rsc = 0 ;                                                            \
85         ;;                                                                              \
86         srlz.d;                                                                         \
87         mov     temp2 = ar.bspstore;                                                    \
88         ;;                                                                              \
89         DATA_VA_TO_PA(temp2);                                                           \
90         ;;                                                                              \
91         mov     temp1 = ar.rnat;                                                        \
92         ;;                                                                              \
93         mov     ar.bspstore = temp2;                                                    \
94         ;;                                                                              \
95         mov     ar.rnat = temp1;                                                        \
96         mov     temp1 = psr;                                                            \
97         mov     temp2 = psr;                                                            \
98         ;;                                                                              \
99                                                                                         \
100         dep     temp2 = 0, temp2, PSR_IC, 2;                                            \
101         ;;                                                                              \
102         mov     psr.l = temp2;                                                          \
103         ;;                                                                              \
104         srlz.d;                                                                         \
105         dep     temp1 = 0, temp1, 32, 32;                                               \
106         ;;                                                                              \
107         dep     temp1 = 0, temp1, PSR_IT, 1;                                            \
108         ;;                                                                              \
109         dep     temp1 = 0, temp1, PSR_DT, 1;                                            \
110         ;;                                                                              \
111         dep     temp1 = 0, temp1, PSR_RT, 1;                                            \
112         ;;                                                                              \
113         dep     temp1 = 0, temp1, PSR_I, 1;                                             \
114         ;;                                                                              \
115         dep     temp1 = 0, temp1, PSR_IC, 1;                                            \
116         ;;                                                                              \
117         dep     temp1 = -1, temp1, PSR_MC, 1;                                           \
118         ;;                                                                              \
119         mov     cr.ipsr = temp1;                                                        \
120         ;;                                                                              \
121         LOAD_PHYSICAL(p0, temp2, start_addr);                                           \
122         ;;                                                                              \
123         mov     cr.iip = temp2;                                                         \
124         mov     cr.ifs = r0;                                                            \
125         DATA_VA_TO_PA(sp);                                                              \
126         DATA_VA_TO_PA(gp);                                                              \
127         ;;                                                                              \
128         srlz.i;                                                                         \
129         ;;                                                                              \
130         nop     1;                                                                      \
131         nop     2;                                                                      \
132         nop     1;                                                                      \
133         nop     2;                                                                      \
134         rfi;                                                                            \
135         ;;
136
137 /*
138  * This macro jumps to the instruction at the given virtual address
139  * and starts execution in virtual mode with all the address
140  * translations turned on.
141  *      1.      Get the old saved psr
142  *
143  *      2.      Clear the interrupt state collection bit in the current psr.
144  *
145  *      3.      Set the instruction translation bit back in the old psr
146  *              Note we have to do this since we are right now saving only the
147  *              lower 32-bits of old psr.(Also the old psr has the data and
148  *              rse translation bits on)
149  *
150  *      4.      Set ipsr to this old_psr with "it" bit set and "bn" = 1.
151  *
152  *      5.      Reset the current thread pointer (r13).
153  *
154  *      6.      Set iip to the virtual address of the next instruction bundle.
155  *
156  *      7.      Do an rfi to move ipsr to psr and iip to ip.
157  */
158
159 #define VIRTUAL_MODE_ENTER(temp1, temp2, start_addr, old_psr)   \
160         mov     temp2 = psr;                                    \
161         ;;                                                      \
162         mov     old_psr = temp2;                                \
163         ;;                                                      \
164         dep     temp2 = 0, temp2, PSR_IC, 2;                    \
165         ;;                                                      \
166         mov     psr.l = temp2;                                  \
167         mov     ar.rsc = 0;                                     \
168         ;;                                                      \
169         srlz.d;                                                 \
170         mov     r13 = ar.k6;                                    \
171         mov     temp2 = ar.bspstore;                            \
172         ;;                                                      \
173         DATA_PA_TO_VA(temp2,temp1);                             \
174         ;;                                                      \
175         mov     temp1 = ar.rnat;                                \
176         ;;                                                      \
177         mov     ar.bspstore = temp2;                            \
178         ;;                                                      \
179         mov     ar.rnat = temp1;                                \
180         ;;                                                      \
181         mov     temp1 = old_psr;                                \
182         ;;                                                      \
183         mov     temp2 = 1;                                      \
184         ;;                                                      \
185         dep     temp1 = temp2, temp1, PSR_IC, 1;                \
186         ;;                                                      \
187         dep     temp1 = temp2, temp1, PSR_IT, 1;                \
188         ;;                                                      \
189         dep     temp1 = temp2, temp1, PSR_DT, 1;                \
190         ;;                                                      \
191         dep     temp1 = temp2, temp1, PSR_RT, 1;                \
192         ;;                                                      \
193         dep     temp1 = temp2, temp1, PSR_BN, 1;                \
194         ;;                                                      \
195                                                                 \
196         mov     cr.ipsr = temp1;                                \
197         movl    temp2 = start_addr;                             \
198         ;;                                                      \
199         mov     cr.iip = temp2;                                 \
200         ;;                                                      \
201         DATA_PA_TO_VA(sp, temp1);                               \
202         DATA_PA_TO_VA(gp, temp2);                               \
203         srlz.i;                                                 \
204         ;;                                                      \
205         nop     1;                                              \
206         nop     2;                                              \
207         nop     1;                                              \
208         rfi                                                     \
209         ;;
210
211 /*
212  * The MCA and INIT stacks in struct ia64_mca_cpu look like normal kernel
213  * stacks, except that the SAL/OS state and a switch_stack are stored near the
214  * top of the MCA/INIT stack.  To support concurrent entry to MCA or INIT, as
215  * well as MCA over INIT, each event needs its own SAL/OS state.  All entries
216  * are 16 byte aligned.
217  *
218  *      +---------------------------+
219  *      |          pt_regs          |
220  *      +---------------------------+
221  *      |        switch_stack       |
222  *      +---------------------------+
223  *      |        SAL/OS state       |
224  *      +---------------------------+
225  *      |    16 byte scratch area   |
226  *      +---------------------------+ <-------- SP at start of C MCA handler
227  *      |           .....           |
228  *      +---------------------------+
229  *      | RBS for MCA/INIT handler  |
230  *      +---------------------------+
231  *      | struct task for MCA/INIT  |
232  *      +---------------------------+ <-------- Bottom of MCA/INIT stack
233  */
234
235 #define ALIGN16(x)                      ((x)&~15)
236 #define MCA_PT_REGS_OFFSET              ALIGN16(KERNEL_STACK_SIZE-IA64_PT_REGS_SIZE)
237 #define MCA_SWITCH_STACK_OFFSET         ALIGN16(MCA_PT_REGS_OFFSET-IA64_SWITCH_STACK_SIZE)
238 #define MCA_SOS_OFFSET                  ALIGN16(MCA_SWITCH_STACK_OFFSET-IA64_SAL_OS_STATE_SIZE)
239 #define MCA_SP_OFFSET                   ALIGN16(MCA_SOS_OFFSET-16)
240
241 #endif /* _ASM_IA64_MCA_ASM_H */