[PATCH] powerpc: Fix kdump copy regs and dynamic allocate per-cpu crash notes
[linux-2.6.git] / include / asm-i386 / io_apic.h
1 #ifndef __ASM_IO_APIC_H
2 #define __ASM_IO_APIC_H
3
4 #include <linux/config.h>
5 #include <asm/types.h>
6 #include <asm/mpspec.h>
7
8 /*
9  * Intel IO-APIC support for SMP and UP systems.
10  *
11  * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
12  */
13
14 #ifdef CONFIG_X86_IO_APIC
15
16 #ifdef CONFIG_PCI_MSI
17 static inline int use_pci_vector(void)  {return 1;}
18 static inline void disable_edge_ioapic_vector(unsigned int vector) { }
19 static inline void mask_and_ack_level_ioapic_vector(unsigned int vector) { }
20 static inline void end_edge_ioapic_vector (unsigned int vector) { }
21 #define startup_level_ioapic    startup_level_ioapic_vector
22 #define shutdown_level_ioapic   mask_IO_APIC_vector
23 #define enable_level_ioapic     unmask_IO_APIC_vector
24 #define disable_level_ioapic    mask_IO_APIC_vector
25 #define mask_and_ack_level_ioapic mask_and_ack_level_ioapic_vector
26 #define end_level_ioapic        end_level_ioapic_vector
27 #define set_ioapic_affinity     set_ioapic_affinity_vector
28
29 #define startup_edge_ioapic     startup_edge_ioapic_vector
30 #define shutdown_edge_ioapic    disable_edge_ioapic_vector
31 #define enable_edge_ioapic      unmask_IO_APIC_vector
32 #define disable_edge_ioapic     disable_edge_ioapic_vector
33 #define ack_edge_ioapic         ack_edge_ioapic_vector
34 #define end_edge_ioapic         end_edge_ioapic_vector
35 #else
36 static inline int use_pci_vector(void)  {return 0;}
37 static inline void disable_edge_ioapic_irq(unsigned int irq) { }
38 static inline void mask_and_ack_level_ioapic_irq(unsigned int irq) { }
39 static inline void end_edge_ioapic_irq (unsigned int irq) { }
40 #define startup_level_ioapic    startup_level_ioapic_irq
41 #define shutdown_level_ioapic   mask_IO_APIC_irq
42 #define enable_level_ioapic     unmask_IO_APIC_irq
43 #define disable_level_ioapic    mask_IO_APIC_irq
44 #define mask_and_ack_level_ioapic mask_and_ack_level_ioapic_irq
45 #define end_level_ioapic        end_level_ioapic_irq
46 #define set_ioapic_affinity     set_ioapic_affinity_irq
47
48 #define startup_edge_ioapic     startup_edge_ioapic_irq
49 #define shutdown_edge_ioapic    disable_edge_ioapic_irq
50 #define enable_edge_ioapic      unmask_IO_APIC_irq
51 #define disable_edge_ioapic     disable_edge_ioapic_irq
52 #define ack_edge_ioapic         ack_edge_ioapic_irq
53 #define end_edge_ioapic         end_edge_ioapic_irq
54 #endif
55
56 #define IO_APIC_BASE(idx) \
57                 ((volatile int *)(__fix_to_virt(FIX_IO_APIC_BASE_0 + idx) \
58                 + (mp_ioapics[idx].mpc_apicaddr & ~PAGE_MASK)))
59
60 /*
61  * The structure of the IO-APIC:
62  */
63 union IO_APIC_reg_00 {
64         u32     raw;
65         struct {
66                 u32     __reserved_2    : 14,
67                         LTS             :  1,
68                         delivery_type   :  1,
69                         __reserved_1    :  8,
70                         ID              :  8;
71         } __attribute__ ((packed)) bits;
72 };
73
74 union IO_APIC_reg_01 {
75         u32     raw;
76         struct {
77                 u32     version         :  8,
78                         __reserved_2    :  7,
79                         PRQ             :  1,
80                         entries         :  8,
81                         __reserved_1    :  8;
82         } __attribute__ ((packed)) bits;
83 };
84
85 union IO_APIC_reg_02 {
86         u32     raw;
87         struct {
88                 u32     __reserved_2    : 24,
89                         arbitration     :  4,
90                         __reserved_1    :  4;
91         } __attribute__ ((packed)) bits;
92 };
93
94 union IO_APIC_reg_03 {
95         u32     raw;
96         struct {
97                 u32     boot_DT         :  1,
98                         __reserved_1    : 31;
99         } __attribute__ ((packed)) bits;
100 };
101
102 /*
103  * # of IO-APICs and # of IRQ routing registers
104  */
105 extern int nr_ioapics;
106 extern int nr_ioapic_registers[MAX_IO_APICS];
107
108 enum ioapic_irq_destination_types {
109         dest_Fixed = 0,
110         dest_LowestPrio = 1,
111         dest_SMI = 2,
112         dest__reserved_1 = 3,
113         dest_NMI = 4,
114         dest_INIT = 5,
115         dest__reserved_2 = 6,
116         dest_ExtINT = 7
117 };
118
119 struct IO_APIC_route_entry {
120         __u32   vector          :  8,
121                 delivery_mode   :  3,   /* 000: FIXED
122                                          * 001: lowest prio
123                                          * 111: ExtINT
124                                          */
125                 dest_mode       :  1,   /* 0: physical, 1: logical */
126                 delivery_status :  1,
127                 polarity        :  1,
128                 irr             :  1,
129                 trigger         :  1,   /* 0: edge, 1: level */
130                 mask            :  1,   /* 0: enabled, 1: disabled */
131                 __reserved_2    : 15;
132
133         union {         struct { __u32
134                                         __reserved_1    : 24,
135                                         physical_dest   :  4,
136                                         __reserved_2    :  4;
137                         } physical;
138
139                         struct { __u32
140                                         __reserved_1    : 24,
141                                         logical_dest    :  8;
142                         } logical;
143         } dest;
144
145 } __attribute__ ((packed));
146
147 /*
148  * MP-BIOS irq configuration table structures:
149  */
150
151 /* I/O APIC entries */
152 extern struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS];
153
154 /* # of MP IRQ source entries */
155 extern int mp_irq_entries;
156
157 /* MP IRQ source entries */
158 extern struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
159
160 /* non-0 if default (table-less) MP configuration */
161 extern int mpc_default_type;
162
163 static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
164 {
165         *IO_APIC_BASE(apic) = reg;
166         return *(IO_APIC_BASE(apic)+4);
167 }
168
169 static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)
170 {
171         *IO_APIC_BASE(apic) = reg;
172         *(IO_APIC_BASE(apic)+4) = value;
173 }
174
175 /*
176  * Re-write a value: to be used for read-modify-write
177  * cycles where the read already set up the index register.
178  *
179  * Older SiS APIC requires we rewrite the index regiser
180  */
181 extern int sis_apic_bug;
182 static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)
183 {
184         if (sis_apic_bug)
185                 *IO_APIC_BASE(apic) = reg;
186         *(IO_APIC_BASE(apic)+4) = value;
187 }
188
189 /* 1 if "noapic" boot option passed */
190 extern int skip_ioapic_setup;
191
192 /*
193  * If we use the IO-APIC for IRQ routing, disable automatic
194  * assignment of PCI IRQ's.
195  */
196 #define io_apic_assign_pci_irqs (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
197
198 #ifdef CONFIG_ACPI
199 extern int io_apic_get_unique_id (int ioapic, int apic_id);
200 extern int io_apic_get_version (int ioapic);
201 extern int io_apic_get_redir_entries (int ioapic);
202 extern int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int active_high_low);
203 #endif /* CONFIG_ACPI */
204
205 extern int (*ioapic_renumber_irq)(int ioapic, int irq);
206
207 #else  /* !CONFIG_X86_IO_APIC */
208 #define io_apic_assign_pci_irqs 0
209 #endif
210
211 extern int assign_irq_vector(int irq);
212
213 #endif