[ARM] 4576/1: CM-X270 machine support
[linux-2.6.git] / include / asm-arm / arch-pxa / hardware.h
1 /*
2  *  linux/include/asm-arm/arch-pxa/hardware.h
3  *
4  *  Author:     Nicolas Pitre
5  *  Created:    Jun 15, 2001
6  *  Copyright:  MontaVista Software Inc.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12
13 #ifndef __ASM_ARCH_HARDWARE_H
14 #define __ASM_ARCH_HARDWARE_H
15
16 /*
17  * We requires absolute addresses.
18  */
19 #define PCIO_BASE               0
20
21 /*
22  * Workarounds for at least 2 errata so far require this.
23  * The mapping is set in mach-pxa/generic.c.
24  */
25 #define UNCACHED_PHYS_0         0xff000000
26 #define UNCACHED_ADDR           UNCACHED_PHYS_0
27
28 /*
29  * Intel PXA2xx internal register mapping:
30  *
31  * 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff
32  * 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff
33  * 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff
34  * 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff
35  * 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff
36  * 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff
37  * 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff
38  *
39  * Note that not all PXA2xx chips implement all those addresses, and the
40  * kernel only maps the minimum needed range of this mapping.
41  */
42 #define io_p2v(x) (0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1))
43 #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1))
44
45 #ifndef __ASSEMBLY__
46
47 # define __REG(x)       (*((volatile u32 *)io_p2v(x)))
48
49 /* With indexed regs we don't want to feed the index through io_p2v()
50    especially if it is a variable, otherwise horrible code will result. */
51 # define __REG2(x,y)    \
52         (*(volatile u32 *)((u32)&__REG(x) + (y)))
53
54 # define __PREG(x)      (io_v2p((u32)&(x)))
55
56 #else
57
58 # define __REG(x)       io_p2v(x)
59 # define __PREG(x)      io_v2p(x)
60
61 #endif
62
63 #ifndef __ASSEMBLY__
64
65 #ifdef CONFIG_PXA25x
66 #define __cpu_is_pxa21x(id)                             \
67         ({                                              \
68                 unsigned int _id = (id) >> 4 & 0xf3f;   \
69                 _id == 0x212;                           \
70         })
71
72 #define __cpu_is_pxa25x(id)                             \
73         ({                                              \
74                 unsigned int _id = (id) >> 4 & 0xfff;   \
75                 _id == 0x2d0 || _id == 0x290;           \
76         })
77 #else
78 #define __cpu_is_pxa21x(id)     (0)
79 #define __cpu_is_pxa25x(id)     (0)
80 #endif
81
82 #ifdef CONFIG_PXA27x
83 #define __cpu_is_pxa27x(id)                             \
84         ({                                              \
85                 unsigned int _id = (id) >> 4 & 0xfff;   \
86                 _id == 0x411;                           \
87         })
88 #else
89 #define __cpu_is_pxa27x(id)     (0)
90 #endif
91
92 #ifdef CONFIG_CPU_PXA300
93 #define __cpu_is_pxa300(id)                             \
94         ({                                              \
95                 unsigned int _id = (id) >> 4 & 0xfff;   \
96                 _id == 0x688;                           \
97          })
98 #else
99 #define __cpu_is_pxa300(id)     (0)
100 #endif
101
102 #ifdef CONFIG_CPU_PXA310
103 #define __cpu_is_pxa310(id)                             \
104         ({                                              \
105                 unsigned int _id = (id) >> 4 & 0xfff;   \
106                 _id == 0x689;                           \
107          })
108 #else
109 #define __cpu_is_pxa310(id)     (0)
110 #endif
111
112 #ifdef CONFIG_CPU_PXA320
113 #define __cpu_is_pxa320(id)                             \
114         ({                                              \
115                 unsigned int _id = (id) >> 4 & 0xfff;   \
116                 _id == 0x603 || _id == 0x682;           \
117          })
118 #else
119 #define __cpu_is_pxa320(id)     (0)
120 #endif
121
122 #define cpu_is_pxa21x()                                 \
123         ({                                              \
124                 unsigned int id = read_cpuid(CPUID_ID); \
125                 __cpu_is_pxa21x(id);                    \
126         })
127
128 #define cpu_is_pxa25x()                                 \
129         ({                                              \
130                 unsigned int id = read_cpuid(CPUID_ID); \
131                 __cpu_is_pxa25x(id);                    \
132         })
133
134 #define cpu_is_pxa27x()                                 \
135         ({                                              \
136                 unsigned int id = read_cpuid(CPUID_ID); \
137                 __cpu_is_pxa27x(id);                    \
138         })
139
140 #define cpu_is_pxa300()                                 \
141         ({                                              \
142                 unsigned int id = read_cpuid(CPUID_ID); \
143                 __cpu_is_pxa300(id);                    \
144          })
145
146 #define cpu_is_pxa310()                                 \
147         ({                                              \
148                 unsigned int id = read_cpuid(CPUID_ID); \
149                 __cpu_is_pxa310(id);                    \
150          })
151
152 #define cpu_is_pxa320()                                 \
153         ({                                              \
154                 unsigned int id = read_cpuid(CPUID_ID); \
155                 __cpu_is_pxa320(id);                    \
156          })
157
158 /*
159  * CPUID Core Generation Bit
160  * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x
161  * == 0x3 for pxa300/pxa310/pxa320
162  */
163 #define __cpu_is_pxa2xx(id)                             \
164         ({                                              \
165                 unsigned int _id = (id) >> 13 & 0x7;    \
166                 _id <= 0x2;                             \
167          })
168
169 #define __cpu_is_pxa3xx(id)                             \
170         ({                                              \
171                 unsigned int _id = (id) >> 13 & 0x7;    \
172                 _id == 0x3;                             \
173          })
174
175 #define cpu_is_pxa2xx()                                 \
176         ({                                              \
177                 unsigned int id = read_cpuid(CPUID_ID); \
178                 __cpu_is_pxa2xx(id);                    \
179          })
180
181 #define cpu_is_pxa3xx()                                 \
182         ({                                              \
183                 unsigned int id = read_cpuid(CPUID_ID); \
184                 __cpu_is_pxa3xx(id);                    \
185          })
186
187 /*
188  * Handy routine to set GPIO alternate functions
189  */
190 extern int pxa_gpio_mode( int gpio_mode );
191
192 /*
193  * Return GPIO level, nonzero means high, zero is low
194  */
195 extern int pxa_gpio_get_value(unsigned gpio);
196
197 /*
198  * Set output GPIO level
199  */
200 extern void pxa_gpio_set_value(unsigned gpio, int value);
201
202 /*
203  * Routine to enable or disable CKEN
204  */
205 static inline void __deprecated pxa_set_cken(int clock, int enable)
206 {
207         extern void __pxa_set_cken(int clock, int enable);
208         __pxa_set_cken(clock, enable);
209 }
210
211 /*
212  * return current memory and LCD clock frequency in units of 10kHz
213  */
214 extern unsigned int get_memclk_frequency_10khz(void);
215
216 #endif
217
218 #if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
219 #define PCIBIOS_MIN_IO          0
220 #define PCIBIOS_MIN_MEM         0
221 #define pcibios_assign_all_busses()     1
222 #endif
223
224 #endif  /* _ASM_ARCH_HARDWARE_H */