nvhost: Fix tegra_host/status debug output
[linux-2.6.git] / drivers / video / tegra / host / chip_support.h
1 /*
2  * drivers/video/tegra/host/chip_support.h
3  *
4  * Tegra Graphics Host Chip Support
5  *
6  * Copyright (c) 2011, NVIDIA Corporation.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful, but WITHOUT
14  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
16  * more details.
17  *
18  * You should have received a copy of the GNU General Public License along
19  * with this program; if not, write to the Free Software Foundation, Inc.,
20  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
21  */
22 #ifndef _NVHOST_CHIP_SUPPORT_H_
23 #define _NVHOST_CHIP_SUPPORT_H_
24
25 struct output;
26 struct nvhost_waitchk;
27
28 struct nvhost_chip_support {
29         struct {
30                 int (*init)(struct nvhost_channel *,
31                             struct nvhost_master *,
32                             int chid);
33                 int (*submit)(struct nvhost_channel *,
34                               struct nvhost_hwctx *,
35                               struct nvmap_client *,
36                               u32 *gather,
37                               u32 *gather_end,
38                               struct nvhost_waitchk *waitchk,
39                               struct nvhost_waitchk *waitchk_end,
40                               u32 waitchk_mask,
41                               struct nvmap_handle **unpins,
42                               int nr_unpins,
43                               u32 syncpt_id,
44                               u32 syncpt_incrs,
45                               u32 *syncpt_value,
46                               bool null_kickoff);
47                 int (*read3dreg)(struct nvhost_channel *channel,
48                                 struct nvhost_hwctx *hwctx,
49                                 u32 offset,
50                                 u32 *value);
51         } channel;
52
53         struct {
54                 void (*start)(struct nvhost_cdma *);
55                 void (*stop)(struct nvhost_cdma *);
56                 void (*kick)(struct  nvhost_cdma *);
57         } cdma;
58
59         struct {
60                 void (*reset)(struct push_buffer *);
61                 int (*init)(struct push_buffer *);
62                 void (*destroy)(struct push_buffer *);
63                 void (*push_to)(struct push_buffer *,
64                                 struct nvmap_handle *,
65                                 u32 op1, u32 op2);
66                 void (*pop_from)(struct push_buffer *,
67                                  unsigned int slots);
68                 u32 (*space)(struct push_buffer *);
69                 u32 (*putptr)(struct push_buffer *);
70         } push_buffer;
71
72         struct {
73                 void (*show_channel_cdma)(struct nvhost_master *,
74                                           struct output *,
75                                           int chid);
76                 void (*show_channel_fifo)(struct nvhost_master *,
77                                           struct output *,
78                                           int chid);
79                 void (*show_mlocks)(struct nvhost_master *m,
80                                     struct output *o);
81
82         } debug;
83
84         struct {
85                 void (*reset)(struct nvhost_syncpt *, u32 id);
86                 void (*reset_wait_base)(struct nvhost_syncpt *, u32 id);
87                 void (*read_wait_base)(struct nvhost_syncpt *, u32 id);
88                 u32 (*update_min)(struct nvhost_syncpt *, u32 id);
89                 void (*cpu_incr)(struct nvhost_syncpt *, u32 id);
90                 int (*wait_check)(struct nvhost_syncpt *sp,
91                                   struct nvmap_client *nvmap,
92                                   u32 waitchk_mask,
93                                   struct nvhost_waitchk *wait,
94                                   struct nvhost_waitchk *waitend);
95                 void (*debug)(struct nvhost_syncpt *);
96                 const char * (*name)(struct nvhost_syncpt *, u32 id);
97         } syncpt;
98
99         struct {
100                 void (*init_host_sync)(struct nvhost_intr *);
101                 void (*set_host_clocks_per_usec)(
102                         struct nvhost_intr *, u32 clocks);
103                 void (*set_syncpt_threshold)(
104                         struct nvhost_intr *, u32 id, u32 thresh);
105                 void (*enable_syncpt_intr)(struct nvhost_intr *, u32 id);
106                 void (*disable_all_syncpt_intrs)(struct nvhost_intr *);
107                 int  (*request_host_general_irq)(struct nvhost_intr *);
108                 void (*free_host_general_irq)(struct nvhost_intr *);
109         } intr;
110
111         struct {
112                 int (*mutex_try_lock)(struct nvhost_cpuaccess *,
113                                       unsigned int idx);
114                 void (*mutex_unlock)(struct nvhost_cpuaccess *,
115                                      unsigned int idx);
116         } cpuaccess;
117 };
118
119
120 int nvhost_init_t20_support(struct nvhost_master *host);
121 int nvhost_init_t30_support(struct nvhost_master *host);
122
123
124 /* place holder for chip id assumed to live in kernel/arch/arm/mach-tegra */
125 struct tegra_chip_info {
126 #define TEGRA_SOC_CHIP_ARCH_T20 0
127 #define TEGRA_SOC_CHIP_IMPL_T20 0
128         u16 arch;
129 #define TEGRA_SOC_CHIP_ARCH_T30 1
130 #define TEGRA_SOC_CHIP_IMPL_T30 0
131         u16 impl;
132 };
133
134 #if 0
135 extern int tegra_get_chip_info(struct tegra_chip_info *);
136 #else
137 static inline int tegra_get_chip_info(struct tegra_chip_info *ci)
138 {
139 #if defined(CONFIG_ARCH_TEGRA_3x_SOC)
140         ci->arch = TEGRA_SOC_CHIP_ARCH_T30;
141         ci->impl = TEGRA_SOC_CHIP_IMPL_T30;
142
143 #elif defined(CONFIG_ARCH_TEGRA_2x_SOC)
144         ci->arch = TEGRA_SOC_CHIP_ARCH_T20;
145         ci->impl = TEGRA_SOC_CHIP_IMPL_T20;
146
147 #else
148         return -ENODEV;
149 #endif
150
151         return 0;
152 }
153 #endif
154
155 #endif /* _NVHOST_CHIP_SUPPORT_H_ */