sm501fb: set transp.offset to 0 in 8bpp and 16bpp modes
[linux-2.6.git] / drivers / video / sm501fb.c
1 /* linux/drivers/video/sm501fb.c
2  *
3  * Copyright (c) 2006 Simtec Electronics
4  *      Vincent Sanders <vince@simtec.co.uk>
5  *      Ben Dooks <ben@simtec.co.uk>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  *
11  * Framebuffer driver for the Silicon Motion SM501
12  */
13
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/errno.h>
17 #include <linux/string.h>
18 #include <linux/mm.h>
19 #include <linux/tty.h>
20 #include <linux/slab.h>
21 #include <linux/delay.h>
22 #include <linux/fb.h>
23 #include <linux/init.h>
24 #include <linux/vmalloc.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/interrupt.h>
27 #include <linux/workqueue.h>
28 #include <linux/wait.h>
29 #include <linux/platform_device.h>
30 #include <linux/clk.h>
31 #include <linux/console.h>
32
33 #include <asm/io.h>
34 #include <asm/uaccess.h>
35 #include <asm/div64.h>
36
37 #ifdef CONFIG_PM
38 #include <linux/pm.h>
39 #endif
40
41 #include <linux/sm501.h>
42 #include <linux/sm501-regs.h>
43
44 #define NR_PALETTE      256
45
46 enum sm501_controller {
47         HEAD_CRT        = 0,
48         HEAD_PANEL      = 1,
49 };
50
51 /* SM501 memory address */
52 struct sm501_mem {
53         unsigned long    size;
54         unsigned long    sm_addr;
55         void __iomem    *k_addr;
56 };
57
58 /* private data that is shared between all frambuffers* */
59 struct sm501fb_info {
60         struct device           *dev;
61         struct fb_info          *fb[2];         /* fb info for both heads */
62         struct resource         *fbmem_res;     /* framebuffer resource */
63         struct resource         *regs_res;      /* registers resource */
64         struct sm501_platdata_fb *pdata;        /* our platform data */
65
66         unsigned long            pm_crt_ctrl;   /* pm: crt ctrl save */
67
68         int                      irq;
69         int                      swap_endian;   /* set to swap rgb=>bgr */
70         void __iomem            *regs;          /* remapped registers */
71         void __iomem            *fbmem;         /* remapped framebuffer */
72         size_t                   fbmem_len;     /* length of remapped region */
73 };
74
75 /* per-framebuffer private data */
76 struct sm501fb_par {
77         u32                      pseudo_palette[16];
78
79         enum sm501_controller    head;
80         struct sm501_mem         cursor;
81         struct sm501_mem         screen;
82         struct fb_ops            ops;
83
84         void                    *store_fb;
85         void                    *store_cursor;
86         void __iomem            *cursor_regs;
87         struct sm501fb_info     *info;
88 };
89
90 /* Helper functions */
91
92 static inline int h_total(struct fb_var_screeninfo *var)
93 {
94         return var->xres + var->left_margin +
95                 var->right_margin + var->hsync_len;
96 }
97
98 static inline int v_total(struct fb_var_screeninfo *var)
99 {
100         return var->yres + var->upper_margin +
101                 var->lower_margin + var->vsync_len;
102 }
103
104 /* sm501fb_sync_regs()
105  *
106  * This call is mainly for PCI bus systems where we need to
107  * ensure that any writes to the bus are completed before the
108  * next phase, or after completing a function.
109 */
110
111 static inline void sm501fb_sync_regs(struct sm501fb_info *info)
112 {
113         readl(info->regs);
114 }
115
116 /* sm501_alloc_mem
117  *
118  * This is an attempt to lay out memory for the two framebuffers and
119  * everything else
120  *
121  * |fbmem_res->start                                           fbmem_res->end|
122  * |                                                                         |
123  * |fb[0].fix.smem_start    |         |fb[1].fix.smem_start    |     2K      |
124  * |-> fb[0].fix.smem_len <-| spare   |-> fb[1].fix.smem_len <-|-> cursors <-|
125  *
126  * The "spare" space is for the 2d engine data
127  * the fixed is space for the cursors (2x1Kbyte)
128  *
129  * we need to allocate memory for the 2D acceleration engine
130  * command list and the data for the engine to deal with.
131  *
132  * - all allocations must be 128bit aligned
133  * - cursors are 64x64x2 bits (1Kbyte)
134  *
135  */
136
137 #define SM501_MEMF_CURSOR               (1)
138 #define SM501_MEMF_PANEL                (2)
139 #define SM501_MEMF_CRT                  (4)
140 #define SM501_MEMF_ACCEL                (8)
141
142 static int sm501_alloc_mem(struct sm501fb_info *inf, struct sm501_mem *mem,
143                            unsigned int why, size_t size)
144 {
145         unsigned int ptr = 0;
146
147         switch (why) {
148         case SM501_MEMF_CURSOR:
149                 ptr = inf->fbmem_len - size;
150                 inf->fbmem_len = ptr;
151                 break;
152
153         case SM501_MEMF_PANEL:
154                 ptr = inf->fbmem_len - size;
155                 if (ptr < inf->fb[0]->fix.smem_len)
156                         return -ENOMEM;
157
158                 break;
159
160         case SM501_MEMF_CRT:
161                 ptr = 0;
162                 break;
163
164         case SM501_MEMF_ACCEL:
165                 ptr = inf->fb[0]->fix.smem_len;
166
167                 if ((ptr + size) >
168                     (inf->fb[1]->fix.smem_start - inf->fbmem_res->start))
169                         return -ENOMEM;
170                 break;
171
172         default:
173                 return -EINVAL;
174         }
175
176         mem->size    = size;
177         mem->sm_addr = ptr;
178         mem->k_addr  = inf->fbmem + ptr;
179
180         dev_dbg(inf->dev, "%s: result %08lx, %p - %u, %zd\n",
181                 __func__, mem->sm_addr, mem->k_addr, why, size);
182
183         return 0;
184 }
185
186 /* sm501fb_ps_to_hz
187  *
188  * Converts a period in picoseconds to Hz.
189  *
190  * Note, we try to keep this in Hz to minimise rounding with
191  * the limited PLL settings on the SM501.
192 */
193
194 static unsigned long sm501fb_ps_to_hz(unsigned long psvalue)
195 {
196         unsigned long long numerator=1000000000000ULL;
197
198         /* 10^12 / picosecond period gives frequency in Hz */
199         do_div(numerator, psvalue);
200         return (unsigned long)numerator;
201 }
202
203 /* sm501fb_hz_to_ps is identical to the oposite transform */
204
205 #define sm501fb_hz_to_ps(x) sm501fb_ps_to_hz(x)
206
207 /* sm501fb_setup_gamma
208  *
209  * Programs a linear 1.0 gamma ramp in case the gamma
210  * correction is enabled without programming anything else.
211 */
212
213 static void sm501fb_setup_gamma(struct sm501fb_info *fbi,
214                                 unsigned long palette)
215 {
216         unsigned long value = 0;
217         int offset;
218
219         /* set gamma values */
220         for (offset = 0; offset < 256 * 4; offset += 4) {
221                 writel(value, fbi->regs + palette + offset);
222                 value += 0x010101;      /* Advance RGB by 1,1,1.*/
223         }
224 }
225
226 /* sm501fb_check_var
227  *
228  * check common variables for both panel and crt
229 */
230
231 static int sm501fb_check_var(struct fb_var_screeninfo *var,
232                              struct fb_info *info)
233 {
234         struct sm501fb_par  *par = info->par;
235         struct sm501fb_info *sm  = par->info;
236         unsigned long tmp;
237
238         /* check we can fit these values into the registers */
239
240         if (var->hsync_len > 255 || var->vsync_len > 255)
241                 return -EINVAL;
242
243         if ((var->xres + var->right_margin) >= 4096)
244                 return -EINVAL;
245
246         if ((var->yres + var->lower_margin) > 2048)
247                 return -EINVAL;
248
249         /* hard limits of device */
250
251         if (h_total(var) > 4096 || v_total(var) > 2048)
252                 return -EINVAL;
253
254         /* check our line length is going to be 128 bit aligned */
255
256         tmp = (var->xres * var->bits_per_pixel) / 8;
257         if ((tmp & 15) != 0)
258                 return -EINVAL;
259
260         /* check the virtual size */
261
262         if (var->xres_virtual > 4096 || var->yres_virtual > 2048)
263                 return -EINVAL;
264
265         /* can cope with 8,16 or 32bpp */
266
267         if (var->bits_per_pixel <= 8)
268                 var->bits_per_pixel = 8;
269         else if (var->bits_per_pixel <= 16)
270                 var->bits_per_pixel = 16;
271         else if (var->bits_per_pixel == 24)
272                 var->bits_per_pixel = 32;
273
274         /* set r/g/b positions and validate bpp */
275         switch(var->bits_per_pixel) {
276         case 8:
277                 var->red.length         = var->bits_per_pixel;
278                 var->red.offset         = 0;
279                 var->green.length       = var->bits_per_pixel;
280                 var->green.offset       = 0;
281                 var->blue.length        = var->bits_per_pixel;
282                 var->blue.offset        = 0;
283                 var->transp.length      = 0;
284                 var->transp.offset      = 0;
285
286                 break;
287
288         case 16:
289                 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
290                         var->blue.offset        = 11;
291                         var->green.offset       = 5;
292                         var->red.offset         = 0;
293                 } else {
294                         var->red.offset         = 11;
295                         var->green.offset       = 5;
296                         var->blue.offset        = 0;
297                 }
298                 var->transp.offset      = 0;
299
300                 var->red.length         = 5;
301                 var->green.length       = 6;
302                 var->blue.length        = 5;
303                 var->transp.length      = 0;
304                 break;
305
306         case 32:
307                 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
308                         var->transp.offset      = 0;
309                         var->red.offset         = 8;
310                         var->green.offset       = 16;
311                         var->blue.offset        = 24;
312                 } else {
313                         var->transp.offset      = 24;
314                         var->red.offset         = 16;
315                         var->green.offset       = 8;
316                         var->blue.offset        = 0;
317                 }
318
319                 var->red.length         = 8;
320                 var->green.length       = 8;
321                 var->blue.length        = 8;
322                 var->transp.length      = 0;
323                 break;
324
325         default:
326                 return -EINVAL;
327         }
328
329         return 0;
330 }
331
332 /*
333  * sm501fb_check_var_crt():
334  *
335  * check the parameters for the CRT head, and either bring them
336  * back into range, or return -EINVAL.
337 */
338
339 static int sm501fb_check_var_crt(struct fb_var_screeninfo *var,
340                                  struct fb_info *info)
341 {
342         return sm501fb_check_var(var, info);
343 }
344
345 /* sm501fb_check_var_pnl():
346  *
347  * check the parameters for the CRT head, and either bring them
348  * back into range, or return -EINVAL.
349 */
350
351 static int sm501fb_check_var_pnl(struct fb_var_screeninfo *var,
352                                  struct fb_info *info)
353 {
354         return sm501fb_check_var(var, info);
355 }
356
357 /* sm501fb_set_par_common
358  *
359  * set common registers for framebuffers
360 */
361
362 static int sm501fb_set_par_common(struct fb_info *info,
363                                   struct fb_var_screeninfo *var)
364 {
365         struct sm501fb_par  *par = info->par;
366         struct sm501fb_info *fbi = par->info;
367         unsigned long pixclock;      /* pixelclock in Hz */
368         unsigned long sm501pixclock; /* pixelclock the 501 can achive in Hz */
369         unsigned int mem_type;
370         unsigned int clock_type;
371         unsigned int head_addr;
372
373         dev_dbg(fbi->dev, "%s: %dx%d, bpp = %d, virtual %dx%d\n",
374                 __func__, var->xres, var->yres, var->bits_per_pixel,
375                 var->xres_virtual, var->yres_virtual);
376
377         switch (par->head) {
378         case HEAD_CRT:
379                 mem_type = SM501_MEMF_CRT;
380                 clock_type = SM501_CLOCK_V2XCLK;
381                 head_addr = SM501_DC_CRT_FB_ADDR;
382                 break;
383
384         case HEAD_PANEL:
385                 mem_type = SM501_MEMF_PANEL;
386                 clock_type = SM501_CLOCK_P2XCLK;
387                 head_addr = SM501_DC_PANEL_FB_ADDR;
388                 break;
389
390         default:
391                 mem_type = 0;           /* stop compiler warnings */
392                 head_addr = 0;
393                 clock_type = 0;
394         }
395
396         switch (var->bits_per_pixel) {
397         case 8:
398                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
399                 break;
400
401         case 16:
402                 info->fix.visual = FB_VISUAL_TRUECOLOR;
403                 break;
404
405         case 32:
406                 info->fix.visual = FB_VISUAL_TRUECOLOR;
407                 break;
408         }
409
410         /* allocate fb memory within 501 */
411         info->fix.line_length = (var->xres_virtual * var->bits_per_pixel)/8;
412         info->fix.smem_len    = info->fix.line_length * var->yres_virtual;
413
414         dev_dbg(fbi->dev, "%s: line length = %u\n", __func__,
415                 info->fix.line_length);
416
417         if (sm501_alloc_mem(fbi, &par->screen, mem_type,
418                             info->fix.smem_len)) {
419                 dev_err(fbi->dev, "no memory available\n");
420                 return -ENOMEM;
421         }
422
423         info->fix.smem_start = fbi->fbmem_res->start + par->screen.sm_addr;
424
425         info->screen_base = fbi->fbmem + par->screen.sm_addr;
426         info->screen_size = info->fix.smem_len;
427
428         /* set start of framebuffer to the screen */
429
430         writel(par->screen.sm_addr | SM501_ADDR_FLIP, fbi->regs + head_addr);
431
432         /* program CRT clock  */
433
434         pixclock = sm501fb_ps_to_hz(var->pixclock);
435
436         sm501pixclock = sm501_set_clock(fbi->dev->parent, clock_type,
437                                         pixclock);
438
439         /* update fb layer with actual clock used */
440         var->pixclock = sm501fb_hz_to_ps(sm501pixclock);
441
442         dev_dbg(fbi->dev, "%s: pixclock(ps) = %u, pixclock(Hz)  = %lu, "
443                "sm501pixclock = %lu,  error = %ld%%\n",
444                __func__, var->pixclock, pixclock, sm501pixclock,
445                ((pixclock - sm501pixclock)*100)/pixclock);
446
447         return 0;
448 }
449
450 /* sm501fb_set_par_geometry
451  *
452  * set the geometry registers for specified framebuffer.
453 */
454
455 static void sm501fb_set_par_geometry(struct fb_info *info,
456                                      struct fb_var_screeninfo *var)
457 {
458         struct sm501fb_par  *par = info->par;
459         struct sm501fb_info *fbi = par->info;
460         void __iomem *base = fbi->regs;
461         unsigned long reg;
462
463         if (par->head == HEAD_CRT)
464                 base += SM501_DC_CRT_H_TOT;
465         else
466                 base += SM501_DC_PANEL_H_TOT;
467
468         /* set framebuffer width and display width */
469
470         reg = info->fix.line_length;
471         reg |= ((var->xres * var->bits_per_pixel)/8) << 16;
472
473         writel(reg, fbi->regs + (par->head == HEAD_CRT ?
474                     SM501_DC_CRT_FB_OFFSET :  SM501_DC_PANEL_FB_OFFSET));
475
476         /* program horizontal total */
477
478         reg  = (h_total(var) - 1) << 16;
479         reg |= (var->xres - 1);
480
481         writel(reg, base + SM501_OFF_DC_H_TOT);
482
483         /* program horizontal sync */
484
485         reg  = var->hsync_len << 16;
486         reg |= var->xres + var->right_margin - 1;
487
488         writel(reg, base + SM501_OFF_DC_H_SYNC);
489
490         /* program vertical total */
491
492         reg  = (v_total(var) - 1) << 16;
493         reg |= (var->yres - 1);
494
495         writel(reg, base + SM501_OFF_DC_V_TOT);
496
497         /* program vertical sync */
498         reg  = var->vsync_len << 16;
499         reg |= var->yres + var->lower_margin - 1;
500
501         writel(reg, base + SM501_OFF_DC_V_SYNC);
502 }
503
504 /* sm501fb_pan_crt
505  *
506  * pan the CRT display output within an virtual framebuffer
507 */
508
509 static int sm501fb_pan_crt(struct fb_var_screeninfo *var,
510                            struct fb_info *info)
511 {
512         struct sm501fb_par  *par = info->par;
513         struct sm501fb_info *fbi = par->info;
514         unsigned int bytes_pixel = var->bits_per_pixel / 8;
515         unsigned long reg;
516         unsigned long xoffs;
517
518         xoffs = var->xoffset * bytes_pixel;
519
520         reg = readl(fbi->regs + SM501_DC_CRT_CONTROL);
521
522         reg &= ~SM501_DC_CRT_CONTROL_PIXEL_MASK;
523         reg |= ((xoffs & 15) / bytes_pixel) << 4;
524         writel(reg, fbi->regs + SM501_DC_CRT_CONTROL);
525
526         reg = (par->screen.sm_addr + xoffs +
527                var->yoffset * info->fix.line_length);
528         writel(reg | SM501_ADDR_FLIP, fbi->regs + SM501_DC_CRT_FB_ADDR);
529
530         sm501fb_sync_regs(fbi);
531         return 0;
532 }
533
534 /* sm501fb_pan_pnl
535  *
536  * pan the panel display output within an virtual framebuffer
537 */
538
539 static int sm501fb_pan_pnl(struct fb_var_screeninfo *var,
540                            struct fb_info *info)
541 {
542         struct sm501fb_par  *par = info->par;
543         struct sm501fb_info *fbi = par->info;
544         unsigned long reg;
545
546         reg = var->xoffset | (var->xres_virtual << 16);
547         writel(reg, fbi->regs + SM501_DC_PANEL_FB_WIDTH);
548
549         reg = var->yoffset | (var->yres_virtual << 16);
550         writel(reg, fbi->regs + SM501_DC_PANEL_FB_HEIGHT);
551
552         sm501fb_sync_regs(fbi);
553         return 0;
554 }
555
556 /* sm501fb_set_par_crt
557  *
558  * Set the CRT video mode from the fb_info structure
559 */
560
561 static int sm501fb_set_par_crt(struct fb_info *info)
562 {
563         struct sm501fb_par  *par = info->par;
564         struct sm501fb_info *fbi = par->info;
565         struct fb_var_screeninfo *var = &info->var;
566         unsigned long control;       /* control register */
567         int ret;
568
569         /* activate new configuration */
570
571         dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
572
573         /* enable CRT DAC - note 0 is on!*/
574         sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
575
576         control = readl(fbi->regs + SM501_DC_CRT_CONTROL);
577
578         control &= (SM501_DC_CRT_CONTROL_PIXEL_MASK |
579                     SM501_DC_CRT_CONTROL_GAMMA |
580                     SM501_DC_CRT_CONTROL_BLANK |
581                     SM501_DC_CRT_CONTROL_SEL |
582                     SM501_DC_CRT_CONTROL_CP |
583                     SM501_DC_CRT_CONTROL_TVP);
584
585         /* set the sync polarities before we check data source  */
586
587         if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
588                 control |= SM501_DC_CRT_CONTROL_HSP;
589
590         if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
591                 control |= SM501_DC_CRT_CONTROL_VSP;
592
593         if ((control & SM501_DC_CRT_CONTROL_SEL) == 0) {
594                 /* the head is displaying panel data... */
595
596                 sm501_alloc_mem(fbi, &par->screen, SM501_MEMF_CRT, 0);
597                 goto out_update;
598         }
599
600         ret = sm501fb_set_par_common(info, var);
601         if (ret) {
602                 dev_err(fbi->dev, "failed to set common parameters\n");
603                 return ret;
604         }
605
606         sm501fb_pan_crt(var, info);
607         sm501fb_set_par_geometry(info, var);
608
609         control |= SM501_FIFO_3;        /* fill if >3 free slots */
610
611         switch(var->bits_per_pixel) {
612         case 8:
613                 control |= SM501_DC_CRT_CONTROL_8BPP;
614                 break;
615
616         case 16:
617                 control |= SM501_DC_CRT_CONTROL_16BPP;
618                 sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
619                 break;
620
621         case 32:
622                 control |= SM501_DC_CRT_CONTROL_32BPP;
623                 sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
624                 break;
625
626         default:
627                 BUG();
628         }
629
630         control |= SM501_DC_CRT_CONTROL_SEL;    /* CRT displays CRT data */
631         control |= SM501_DC_CRT_CONTROL_TE;     /* enable CRT timing */
632         control |= SM501_DC_CRT_CONTROL_ENABLE; /* enable CRT plane */
633
634  out_update:
635         dev_dbg(fbi->dev, "new control is %08lx\n", control);
636
637         writel(control, fbi->regs + SM501_DC_CRT_CONTROL);
638         sm501fb_sync_regs(fbi);
639
640         return 0;
641 }
642
643 static void sm501fb_panel_power(struct sm501fb_info *fbi, int to)
644 {
645         unsigned long control;
646         void __iomem *ctrl_reg = fbi->regs + SM501_DC_PANEL_CONTROL;
647         struct sm501_platdata_fbsub *pd = fbi->pdata->fb_pnl;
648
649         control = readl(ctrl_reg);
650
651         if (to && (control & SM501_DC_PANEL_CONTROL_VDD) == 0) {
652                 /* enable panel power */
653
654                 control |= SM501_DC_PANEL_CONTROL_VDD;  /* FPVDDEN */
655                 writel(control, ctrl_reg);
656                 sm501fb_sync_regs(fbi);
657                 mdelay(10);
658
659                 control |= SM501_DC_PANEL_CONTROL_DATA; /* DATA */
660                 writel(control, ctrl_reg);
661                 sm501fb_sync_regs(fbi);
662                 mdelay(10);
663
664                 if (pd->flags & SM501FB_FLAG_PANEL_USE_VBIASEN) {
665                         control |= SM501_DC_PANEL_CONTROL_BIAS; /* VBIASEN */
666                         writel(control, ctrl_reg);
667                         sm501fb_sync_regs(fbi);
668                         mdelay(10);
669                 }
670
671                 if (pd->flags & SM501FB_FLAG_PANEL_USE_FPEN) {
672                         control |= SM501_DC_PANEL_CONTROL_FPEN;
673                         writel(control, ctrl_reg);
674                         sm501fb_sync_regs(fbi);
675                         mdelay(10);
676                 }
677         } else if (!to && (control & SM501_DC_PANEL_CONTROL_VDD) != 0) {
678                 /* disable panel power */
679                 if (pd->flags & SM501FB_FLAG_PANEL_USE_FPEN) {
680                         control &= ~SM501_DC_PANEL_CONTROL_FPEN;
681                         writel(control, ctrl_reg);
682                         sm501fb_sync_regs(fbi);
683                         mdelay(10);
684                 }
685
686                 if (pd->flags & SM501FB_FLAG_PANEL_USE_VBIASEN) {
687                         control &= ~SM501_DC_PANEL_CONTROL_BIAS;
688                         writel(control, ctrl_reg);
689                         sm501fb_sync_regs(fbi);
690                         mdelay(10);
691                 }
692
693                 control &= ~SM501_DC_PANEL_CONTROL_DATA;
694                 writel(control, ctrl_reg);
695                 sm501fb_sync_regs(fbi);
696                 mdelay(10);
697
698                 control &= ~SM501_DC_PANEL_CONTROL_VDD;
699                 writel(control, ctrl_reg);
700                 sm501fb_sync_regs(fbi);
701                 mdelay(10);
702         }
703
704         sm501fb_sync_regs(fbi);
705 }
706
707 /* sm501fb_set_par_pnl
708  *
709  * Set the panel video mode from the fb_info structure
710 */
711
712 static int sm501fb_set_par_pnl(struct fb_info *info)
713 {
714         struct sm501fb_par  *par = info->par;
715         struct sm501fb_info *fbi = par->info;
716         struct fb_var_screeninfo *var = &info->var;
717         unsigned long control;
718         unsigned long reg;
719         int ret;
720
721         dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
722
723         /* activate this new configuration */
724
725         ret = sm501fb_set_par_common(info, var);
726         if (ret)
727                 return ret;
728
729         sm501fb_pan_pnl(var, info);
730         sm501fb_set_par_geometry(info, var);
731
732         /* update control register */
733
734         control = readl(fbi->regs + SM501_DC_PANEL_CONTROL);
735         control &= (SM501_DC_PANEL_CONTROL_GAMMA |
736                     SM501_DC_PANEL_CONTROL_VDD  |
737                     SM501_DC_PANEL_CONTROL_DATA |
738                     SM501_DC_PANEL_CONTROL_BIAS |
739                     SM501_DC_PANEL_CONTROL_FPEN |
740                     SM501_DC_PANEL_CONTROL_CP |
741                     SM501_DC_PANEL_CONTROL_CK |
742                     SM501_DC_PANEL_CONTROL_HP |
743                     SM501_DC_PANEL_CONTROL_VP |
744                     SM501_DC_PANEL_CONTROL_HPD |
745                     SM501_DC_PANEL_CONTROL_VPD);
746
747         control |= SM501_FIFO_3;        /* fill if >3 free slots */
748
749         switch(var->bits_per_pixel) {
750         case 8:
751                 control |= SM501_DC_PANEL_CONTROL_8BPP;
752                 break;
753
754         case 16:
755                 control |= SM501_DC_PANEL_CONTROL_16BPP;
756                 sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
757                 break;
758
759         case 32:
760                 control |= SM501_DC_PANEL_CONTROL_32BPP;
761                 sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
762                 break;
763
764         default:
765                 BUG();
766         }
767
768         writel(0x0, fbi->regs + SM501_DC_PANEL_PANNING_CONTROL);
769
770         /* panel plane top left and bottom right location */
771
772         writel(0x00, fbi->regs + SM501_DC_PANEL_TL_LOC);
773
774         reg  = var->xres - 1;
775         reg |= (var->yres - 1) << 16;
776
777         writel(reg, fbi->regs + SM501_DC_PANEL_BR_LOC);
778
779         /* program panel control register */
780
781         control |= SM501_DC_PANEL_CONTROL_TE;   /* enable PANEL timing */
782         control |= SM501_DC_PANEL_CONTROL_EN;   /* enable PANEL gfx plane */
783
784         if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
785                 control |= SM501_DC_PANEL_CONTROL_HSP;
786
787         if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
788                 control |= SM501_DC_PANEL_CONTROL_VSP;
789
790         writel(control, fbi->regs + SM501_DC_PANEL_CONTROL);
791         sm501fb_sync_regs(fbi);
792
793         /* ensure the panel interface is not tristated at this point */
794
795         sm501_modify_reg(fbi->dev->parent, SM501_SYSTEM_CONTROL,
796                          0, SM501_SYSCTRL_PANEL_TRISTATE);
797
798         /* power the panel up */
799         sm501fb_panel_power(fbi, 1);
800         return 0;
801 }
802
803
804 /* chan_to_field
805  *
806  * convert a colour value into a field position
807  *
808  * from pxafb.c
809 */
810
811 static inline unsigned int chan_to_field(unsigned int chan,
812                                          struct fb_bitfield *bf)
813 {
814         chan &= 0xffff;
815         chan >>= 16 - bf->length;
816         return chan << bf->offset;
817 }
818
819 /* sm501fb_setcolreg
820  *
821  * set the colour mapping for modes that support palettised data
822 */
823
824 static int sm501fb_setcolreg(unsigned regno,
825                              unsigned red, unsigned green, unsigned blue,
826                              unsigned transp, struct fb_info *info)
827 {
828         struct sm501fb_par  *par = info->par;
829         struct sm501fb_info *fbi = par->info;
830         void __iomem *base = fbi->regs;
831         unsigned int val;
832
833         if (par->head == HEAD_CRT)
834                 base += SM501_DC_CRT_PALETTE;
835         else
836                 base += SM501_DC_PANEL_PALETTE;
837
838         switch (info->fix.visual) {
839         case FB_VISUAL_TRUECOLOR:
840                 /* true-colour, use pseuo-palette */
841
842                 if (regno < 16) {
843                         u32 *pal = par->pseudo_palette;
844
845                         val  = chan_to_field(red,   &info->var.red);
846                         val |= chan_to_field(green, &info->var.green);
847                         val |= chan_to_field(blue,  &info->var.blue);
848
849                         pal[regno] = val;
850                 }
851                 break;
852
853         case FB_VISUAL_PSEUDOCOLOR:
854                 if (regno < 256) {
855                         val = (red >> 8) << 16;
856                         val |= (green >> 8) << 8;
857                         val |= blue >> 8;
858
859                         writel(val, base + (regno * 4));
860                 }
861
862                 break;
863
864         default:
865                 return 1;   /* unknown type */
866         }
867
868         return 0;
869 }
870
871 /* sm501fb_blank_pnl
872  *
873  * Blank or un-blank the panel interface
874 */
875
876 static int sm501fb_blank_pnl(int blank_mode, struct fb_info *info)
877 {
878         struct sm501fb_par  *par = info->par;
879         struct sm501fb_info *fbi = par->info;
880
881         dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
882
883         switch (blank_mode) {
884         case FB_BLANK_POWERDOWN:
885                 sm501fb_panel_power(fbi, 0);
886                 break;
887
888         case FB_BLANK_UNBLANK:
889                 sm501fb_panel_power(fbi, 1);
890                 break;
891
892         case FB_BLANK_NORMAL:
893         case FB_BLANK_VSYNC_SUSPEND:
894         case FB_BLANK_HSYNC_SUSPEND:
895         default:
896                 return 1;
897         }
898
899         return 0;
900 }
901
902 /* sm501fb_blank_crt
903  *
904  * Blank or un-blank the crt interface
905 */
906
907 static int sm501fb_blank_crt(int blank_mode, struct fb_info *info)
908 {
909         struct sm501fb_par  *par = info->par;
910         struct sm501fb_info *fbi = par->info;
911         unsigned long ctrl;
912
913         dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
914
915         ctrl = readl(fbi->regs + SM501_DC_CRT_CONTROL);
916
917         switch (blank_mode) {
918         case FB_BLANK_POWERDOWN:
919                 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
920                 sm501_misc_control(fbi->dev->parent, SM501_MISC_DAC_POWER, 0);
921
922         case FB_BLANK_NORMAL:
923                 ctrl |= SM501_DC_CRT_CONTROL_BLANK;
924                 break;
925
926         case FB_BLANK_UNBLANK:
927                 ctrl &= ~SM501_DC_CRT_CONTROL_BLANK;
928                 ctrl |=  SM501_DC_CRT_CONTROL_ENABLE;
929                 sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
930                 break;
931
932         case FB_BLANK_VSYNC_SUSPEND:
933         case FB_BLANK_HSYNC_SUSPEND:
934         default:
935                 return 1;
936
937         }
938
939         writel(ctrl, fbi->regs + SM501_DC_CRT_CONTROL);
940         sm501fb_sync_regs(fbi);
941
942         return 0;
943 }
944
945 /* sm501fb_cursor
946  *
947  * set or change the hardware cursor parameters
948 */
949
950 static int sm501fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
951 {
952         struct sm501fb_par  *par = info->par;
953         struct sm501fb_info *fbi = par->info;
954         void __iomem *base = fbi->regs;
955         unsigned long hwc_addr;
956         unsigned long fg, bg;
957
958         dev_dbg(fbi->dev, "%s(%p,%p)\n", __func__, info, cursor);
959
960         if (par->head == HEAD_CRT)
961                 base += SM501_DC_CRT_HWC_BASE;
962         else
963                 base += SM501_DC_PANEL_HWC_BASE;
964
965         /* check not being asked to exceed capabilities */
966
967         if (cursor->image.width > 64)
968                 return -EINVAL;
969
970         if (cursor->image.height > 64)
971                 return -EINVAL;
972
973         if (cursor->image.depth > 1)
974                 return -EINVAL;
975
976         hwc_addr = readl(base + SM501_OFF_HWC_ADDR);
977
978         if (cursor->enable)
979                 writel(hwc_addr | SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
980         else
981                 writel(hwc_addr & ~SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
982
983         /* set data */
984         if (cursor->set & FB_CUR_SETPOS) {
985                 unsigned int x = cursor->image.dx;
986                 unsigned int y = cursor->image.dy;
987
988                 if (x >= 2048 || y >= 2048 )
989                         return -EINVAL;
990
991                 dev_dbg(fbi->dev, "set position %d,%d\n", x, y);
992
993                 //y += cursor->image.height;
994
995                 writel(x | (y << 16), base + SM501_OFF_HWC_LOC);
996         }
997
998         if (cursor->set & FB_CUR_SETCMAP) {
999                 unsigned int bg_col = cursor->image.bg_color;
1000                 unsigned int fg_col = cursor->image.fg_color;
1001
1002                 dev_dbg(fbi->dev, "%s: update cmap (%08x,%08x)\n",
1003                         __func__, bg_col, fg_col);
1004
1005                 bg = ((info->cmap.red[bg_col] & 0xF8) << 8) |
1006                         ((info->cmap.green[bg_col] & 0xFC) << 3) |
1007                         ((info->cmap.blue[bg_col] & 0xF8) >> 3);
1008
1009                 fg = ((info->cmap.red[fg_col] & 0xF8) << 8) |
1010                         ((info->cmap.green[fg_col] & 0xFC) << 3) |
1011                         ((info->cmap.blue[fg_col] & 0xF8) >> 3);
1012
1013                 dev_dbg(fbi->dev, "fgcol %08lx, bgcol %08lx\n", fg, bg);
1014
1015                 writel(bg, base + SM501_OFF_HWC_COLOR_1_2);
1016                 writel(fg, base + SM501_OFF_HWC_COLOR_3);
1017         }
1018
1019         if (cursor->set & FB_CUR_SETSIZE ||
1020             cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) {
1021                 /* SM501 cursor is a two bpp 64x64 bitmap this routine
1022                  * clears it to transparent then combines the cursor
1023                  * shape plane with the colour plane to set the
1024                  * cursor */
1025                 int x, y;
1026                 const unsigned char *pcol = cursor->image.data;
1027                 const unsigned char *pmsk = cursor->mask;
1028                 void __iomem   *dst = par->cursor.k_addr;
1029                 unsigned char  dcol = 0;
1030                 unsigned char  dmsk = 0;
1031                 unsigned int   op;
1032
1033                 dev_dbg(fbi->dev, "%s: setting shape (%d,%d)\n",
1034                         __func__, cursor->image.width, cursor->image.height);
1035
1036                 for (op = 0; op < (64*64*2)/8; op+=4)
1037                         writel(0x0, dst + op);
1038
1039                 for (y = 0; y < cursor->image.height; y++) {
1040                         for (x = 0; x < cursor->image.width; x++) {
1041                                 if ((x % 8) == 0) {
1042                                         dcol = *pcol++;
1043                                         dmsk = *pmsk++;
1044                                 } else {
1045                                         dcol >>= 1;
1046                                         dmsk >>= 1;
1047                                 }
1048
1049                                 if (dmsk & 1) {
1050                                         op = (dcol & 1) ? 1 : 3;
1051                                         op <<= ((x % 4) * 2);
1052
1053                                         op |= readb(dst + (x / 4));
1054                                         writeb(op, dst + (x / 4));
1055                                 }
1056                         }
1057                         dst += (64*2)/8;
1058                 }
1059         }
1060
1061         sm501fb_sync_regs(fbi); /* ensure cursor data flushed */
1062         return 0;
1063 }
1064
1065 /* sm501fb_crtsrc_show
1066  *
1067  * device attribute code to show where the crt output is sourced from
1068 */
1069
1070 static ssize_t sm501fb_crtsrc_show(struct device *dev,
1071                                struct device_attribute *attr, char *buf)
1072 {
1073         struct sm501fb_info *info = dev_get_drvdata(dev);
1074         unsigned long ctrl;
1075
1076         ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1077         ctrl &= SM501_DC_CRT_CONTROL_SEL;
1078
1079         return snprintf(buf, PAGE_SIZE, "%s\n", ctrl ? "crt" : "panel");
1080 }
1081
1082 /* sm501fb_crtsrc_show
1083  *
1084  * device attribute code to set where the crt output is sourced from
1085 */
1086
1087 static ssize_t sm501fb_crtsrc_store(struct device *dev,
1088                                 struct device_attribute *attr,
1089                                 const char *buf, size_t len)
1090 {
1091         struct sm501fb_info *info = dev_get_drvdata(dev);
1092         enum sm501_controller head;
1093         unsigned long ctrl;
1094
1095         if (len < 1)
1096                 return -EINVAL;
1097
1098         if (strnicmp(buf, "crt", 3) == 0)
1099                 head = HEAD_CRT;
1100         else if (strnicmp(buf, "panel", 5) == 0)
1101                 head = HEAD_PANEL;
1102         else
1103                 return -EINVAL;
1104
1105         dev_info(dev, "setting crt source to head %d\n", head);
1106
1107         ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1108
1109         if (head == HEAD_CRT) {
1110                 ctrl |= SM501_DC_CRT_CONTROL_SEL;
1111                 ctrl |= SM501_DC_CRT_CONTROL_ENABLE;
1112                 ctrl |= SM501_DC_CRT_CONTROL_TE;
1113         } else {
1114                 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1115                 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
1116                 ctrl &= ~SM501_DC_CRT_CONTROL_TE;
1117         }
1118
1119         writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1120         sm501fb_sync_regs(info);
1121
1122         return len;
1123 }
1124
1125 /* Prepare the device_attr for registration with sysfs later */
1126 static DEVICE_ATTR(crt_src, 0666, sm501fb_crtsrc_show, sm501fb_crtsrc_store);
1127
1128 /* sm501fb_show_regs
1129  *
1130  * show the primary sm501 registers
1131 */
1132 static int sm501fb_show_regs(struct sm501fb_info *info, char *ptr,
1133                              unsigned int start, unsigned int len)
1134 {
1135         void __iomem *mem = info->regs;
1136         char *buf = ptr;
1137         unsigned int reg;
1138
1139         for (reg = start; reg < (len + start); reg += 4)
1140                 ptr += sprintf(ptr, "%08x = %08x\n", reg, readl(mem + reg));
1141
1142         return ptr - buf;
1143 }
1144
1145 /* sm501fb_debug_show_crt
1146  *
1147  * show the crt control and cursor registers
1148 */
1149
1150 static ssize_t sm501fb_debug_show_crt(struct device *dev,
1151                                   struct device_attribute *attr, char *buf)
1152 {
1153         struct sm501fb_info *info = dev_get_drvdata(dev);
1154         char *ptr = buf;
1155
1156         ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_CONTROL, 0x40);
1157         ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_HWC_BASE, 0x10);
1158
1159         return ptr - buf;
1160 }
1161
1162 static DEVICE_ATTR(fbregs_crt, 0444, sm501fb_debug_show_crt, NULL);
1163
1164 /* sm501fb_debug_show_pnl
1165  *
1166  * show the panel control and cursor registers
1167 */
1168
1169 static ssize_t sm501fb_debug_show_pnl(struct device *dev,
1170                                   struct device_attribute *attr, char *buf)
1171 {
1172         struct sm501fb_info *info = dev_get_drvdata(dev);
1173         char *ptr = buf;
1174
1175         ptr += sm501fb_show_regs(info, ptr, 0x0, 0x40);
1176         ptr += sm501fb_show_regs(info, ptr, SM501_DC_PANEL_HWC_BASE, 0x10);
1177
1178         return ptr - buf;
1179 }
1180
1181 static DEVICE_ATTR(fbregs_pnl, 0444, sm501fb_debug_show_pnl, NULL);
1182
1183 /* framebuffer ops */
1184
1185 static struct fb_ops sm501fb_ops_crt = {
1186         .owner          = THIS_MODULE,
1187         .fb_check_var   = sm501fb_check_var_crt,
1188         .fb_set_par     = sm501fb_set_par_crt,
1189         .fb_blank       = sm501fb_blank_crt,
1190         .fb_setcolreg   = sm501fb_setcolreg,
1191         .fb_pan_display = sm501fb_pan_crt,
1192         .fb_cursor      = sm501fb_cursor,
1193         .fb_fillrect    = cfb_fillrect,
1194         .fb_copyarea    = cfb_copyarea,
1195         .fb_imageblit   = cfb_imageblit,
1196 };
1197
1198 static struct fb_ops sm501fb_ops_pnl = {
1199         .owner          = THIS_MODULE,
1200         .fb_check_var   = sm501fb_check_var_pnl,
1201         .fb_set_par     = sm501fb_set_par_pnl,
1202         .fb_pan_display = sm501fb_pan_pnl,
1203         .fb_blank       = sm501fb_blank_pnl,
1204         .fb_setcolreg   = sm501fb_setcolreg,
1205         .fb_cursor      = sm501fb_cursor,
1206         .fb_fillrect    = cfb_fillrect,
1207         .fb_copyarea    = cfb_copyarea,
1208         .fb_imageblit   = cfb_imageblit,
1209 };
1210
1211 /* sm501fb_info_alloc
1212  *
1213  * creates and initialises an sm501fb_info structure
1214 */
1215
1216 static struct sm501fb_info *sm501fb_info_alloc(struct fb_info *fbinfo_crt,
1217                                                struct fb_info *fbinfo_pnl)
1218 {
1219         struct sm501fb_info *info;
1220         struct sm501fb_par  *par;
1221
1222         info = kzalloc(sizeof(struct sm501fb_info), GFP_KERNEL);
1223         if (info) {
1224                 /* set the references back */
1225
1226                 par = fbinfo_crt->par;
1227                 par->info = info;
1228                 par->head = HEAD_CRT;
1229                 fbinfo_crt->pseudo_palette = &par->pseudo_palette;
1230
1231                 par = fbinfo_pnl->par;
1232                 par->info = info;
1233                 par->head = HEAD_PANEL;
1234                 fbinfo_pnl->pseudo_palette = &par->pseudo_palette;
1235
1236                 /* store the two fbs into our info */
1237                 info->fb[HEAD_CRT] = fbinfo_crt;
1238                 info->fb[HEAD_PANEL] = fbinfo_pnl;
1239         }
1240
1241         return info;
1242 }
1243
1244 /* sm501_init_cursor
1245  *
1246  * initialise hw cursor parameters
1247 */
1248
1249 static int sm501_init_cursor(struct fb_info *fbi, unsigned int reg_base)
1250 {
1251         struct sm501fb_par *par = fbi->par;
1252         struct sm501fb_info *info = par->info;
1253         int ret;
1254
1255         par->cursor_regs = info->regs + reg_base;
1256
1257         ret = sm501_alloc_mem(info, &par->cursor, SM501_MEMF_CURSOR, 1024);
1258         if (ret < 0)
1259                 return ret;
1260
1261         /* initialise the colour registers */
1262
1263         writel(par->cursor.sm_addr, par->cursor_regs + SM501_OFF_HWC_ADDR);
1264
1265         writel(0x00, par->cursor_regs + SM501_OFF_HWC_LOC);
1266         writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_1_2);
1267         writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_3);
1268         sm501fb_sync_regs(info);
1269
1270         return 0;
1271 }
1272
1273 /* sm501fb_info_start
1274  *
1275  * fills the par structure claiming resources and remapping etc.
1276 */
1277
1278 static int sm501fb_start(struct sm501fb_info *info,
1279                          struct platform_device *pdev)
1280 {
1281         struct resource *res;
1282         struct device *dev;
1283         int k;
1284         int ret;
1285
1286         info->dev = dev = &pdev->dev;
1287         platform_set_drvdata(pdev, info);
1288
1289         info->irq = ret = platform_get_irq(pdev, 0);
1290         if (ret < 0) {
1291                 /* we currently do not use the IRQ */
1292                 dev_warn(dev, "no irq for device\n");
1293         }
1294
1295         /* allocate, reserve and remap resources for registers */
1296         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1297         if (res == NULL) {
1298                 dev_err(dev, "no resource definition for registers\n");
1299                 ret = -ENOENT;
1300                 goto err_release;
1301         }
1302
1303         info->regs_res = request_mem_region(res->start,
1304                                             res->end - res->start,
1305                                             pdev->name);
1306
1307         if (info->regs_res == NULL) {
1308                 dev_err(dev, "cannot claim registers\n");
1309                 ret = -ENXIO;
1310                 goto err_release;
1311         }
1312
1313         info->regs = ioremap(res->start, (res->end - res->start)+1);
1314         if (info->regs == NULL) {
1315                 dev_err(dev, "cannot remap registers\n");
1316                 ret = -ENXIO;
1317                 goto err_regs_res;
1318         }
1319
1320         /* allocate, reserve resources for framebuffer */
1321         res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
1322         if (res == NULL) {
1323                 dev_err(dev, "no memory resource defined\n");
1324                 ret = -ENXIO;
1325                 goto err_regs_map;
1326         }
1327
1328         info->fbmem_res = request_mem_region(res->start,
1329                                              (res->end - res->start)+1,
1330                                              pdev->name);
1331         if (info->fbmem_res == NULL) {
1332                 dev_err(dev, "cannot claim framebuffer\n");
1333                 ret = -ENXIO;
1334                 goto err_regs_map;
1335         }
1336
1337         info->fbmem = ioremap(res->start, (res->end - res->start)+1);
1338         if (info->fbmem == NULL) {
1339                 dev_err(dev, "cannot remap framebuffer\n");
1340                 goto err_mem_res;
1341         }
1342
1343         info->fbmem_len = (res->end - res->start)+1;
1344
1345         /* clear framebuffer memory - avoids garbage data on unused fb */
1346         memset(info->fbmem, 0, info->fbmem_len);
1347
1348         /* clear palette ram - undefined at power on */
1349         for (k = 0; k < (256 * 3); k++)
1350                 writel(0, info->regs + SM501_DC_PANEL_PALETTE + (k * 4));
1351
1352         /* enable display controller */
1353         sm501_unit_power(dev->parent, SM501_GATE_DISPLAY, 1);
1354
1355         /* setup cursors */
1356
1357         sm501_init_cursor(info->fb[HEAD_CRT], SM501_DC_CRT_HWC_ADDR);
1358         sm501_init_cursor(info->fb[HEAD_PANEL], SM501_DC_PANEL_HWC_ADDR);
1359
1360         return 0; /* everything is setup */
1361
1362  err_mem_res:
1363         release_resource(info->fbmem_res);
1364         kfree(info->fbmem_res);
1365
1366  err_regs_map:
1367         iounmap(info->regs);
1368
1369  err_regs_res:
1370         release_resource(info->regs_res);
1371         kfree(info->regs_res);
1372
1373  err_release:
1374         return ret;
1375 }
1376
1377 static void sm501fb_stop(struct sm501fb_info *info)
1378 {
1379         /* disable display controller */
1380         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1381
1382         iounmap(info->fbmem);
1383         release_resource(info->fbmem_res);
1384         kfree(info->fbmem_res);
1385
1386         iounmap(info->regs);
1387         release_resource(info->regs_res);
1388         kfree(info->regs_res);
1389 }
1390
1391 static void sm501fb_info_release(struct sm501fb_info *info)
1392 {
1393         kfree(info);
1394 }
1395
1396 static int sm501fb_init_fb(struct fb_info *fb,
1397                            enum sm501_controller head,
1398                            const char *fbname)
1399 {
1400         struct sm501_platdata_fbsub *pd;
1401         struct sm501fb_par *par = fb->par;
1402         struct sm501fb_info *info = par->info;
1403         unsigned long ctrl;
1404         unsigned int enable;
1405         int ret;
1406
1407         switch (head) {
1408         case HEAD_CRT:
1409                 pd = info->pdata->fb_crt;
1410                 ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1411                 enable = (ctrl & SM501_DC_CRT_CONTROL_ENABLE) ? 1 : 0;
1412
1413                 /* ensure we set the correct source register */
1414                 if (info->pdata->fb_route != SM501_FB_CRT_PANEL) {
1415                         ctrl |= SM501_DC_CRT_CONTROL_SEL;
1416                         writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1417                 }
1418
1419                 break;
1420
1421         case HEAD_PANEL:
1422                 pd = info->pdata->fb_pnl;
1423                 ctrl = readl(info->regs + SM501_DC_PANEL_CONTROL);
1424                 enable = (ctrl & SM501_DC_PANEL_CONTROL_EN) ? 1 : 0;
1425                 break;
1426
1427         default:
1428                 pd = NULL;              /* stop compiler warnings */
1429                 ctrl = 0;
1430                 enable = 0;
1431                 BUG();
1432         }
1433
1434         dev_info(info->dev, "fb %s %sabled at start\n",
1435                  fbname, enable ? "en" : "dis");
1436
1437         /* check to see if our routing allows this */
1438
1439         if (head == HEAD_CRT && info->pdata->fb_route == SM501_FB_CRT_PANEL) {
1440                 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1441                 writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1442                 enable = 0;
1443         }
1444
1445         strlcpy(fb->fix.id, fbname, sizeof(fb->fix.id));
1446
1447         memcpy(&par->ops,
1448                (head == HEAD_CRT) ? &sm501fb_ops_crt : &sm501fb_ops_pnl,
1449                sizeof(struct fb_ops));
1450
1451         /* update ops dependant on what we've been passed */
1452
1453         if ((pd->flags & SM501FB_FLAG_USE_HWCURSOR) == 0)
1454                 par->ops.fb_cursor = NULL;
1455
1456         fb->fbops = &par->ops;
1457         fb->flags = FBINFO_FLAG_DEFAULT |
1458                 FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
1459
1460         /* fixed data */
1461
1462         fb->fix.type            = FB_TYPE_PACKED_PIXELS;
1463         fb->fix.type_aux        = 0;
1464         fb->fix.xpanstep        = 1;
1465         fb->fix.ypanstep        = 1;
1466         fb->fix.ywrapstep       = 0;
1467         fb->fix.accel           = FB_ACCEL_NONE;
1468
1469         /* screenmode */
1470
1471         fb->var.nonstd          = 0;
1472         fb->var.activate        = FB_ACTIVATE_NOW;
1473         fb->var.accel_flags     = 0;
1474         fb->var.vmode           = FB_VMODE_NONINTERLACED;
1475         fb->var.bits_per_pixel  = 16;
1476
1477         if (enable && (pd->flags & SM501FB_FLAG_USE_INIT_MODE) && 0) {
1478                 /* TODO read the mode from the current display */
1479
1480         } else {
1481                 if (pd->def_mode) {
1482                         dev_info(info->dev, "using supplied mode\n");
1483                         fb_videomode_to_var(&fb->var, pd->def_mode);
1484
1485                         fb->var.bits_per_pixel = pd->def_bpp ? pd->def_bpp : 8;
1486                         fb->var.xres_virtual = fb->var.xres;
1487                         fb->var.yres_virtual = fb->var.yres;
1488                 } else {
1489                         ret = fb_find_mode(&fb->var, fb,
1490                                            NULL, NULL, 0, NULL, 8);
1491
1492                         if (ret == 0 || ret == 4) {
1493                                 dev_err(info->dev,
1494                                         "failed to get initial mode\n");
1495                                 return -EINVAL;
1496                         }
1497                 }
1498         }
1499
1500         /* initialise and set the palette */
1501         fb_alloc_cmap(&fb->cmap, NR_PALETTE, 0);
1502         fb_set_cmap(&fb->cmap, fb);
1503
1504         ret = (fb->fbops->fb_check_var)(&fb->var, fb);
1505         if (ret)
1506                 dev_err(info->dev, "check_var() failed on initial setup?\n");
1507
1508         /* ensure we've activated our new configuration */
1509         (fb->fbops->fb_set_par)(fb);
1510
1511         return 0;
1512 }
1513
1514 /* default platform data if none is supplied (ie, PCI device) */
1515
1516 static struct sm501_platdata_fbsub sm501fb_pdata_crt = {
1517         .flags          = (SM501FB_FLAG_USE_INIT_MODE |
1518                            SM501FB_FLAG_USE_HWCURSOR |
1519                            SM501FB_FLAG_USE_HWACCEL |
1520                            SM501FB_FLAG_DISABLE_AT_EXIT),
1521
1522 };
1523
1524 static struct sm501_platdata_fbsub sm501fb_pdata_pnl = {
1525         .flags          = (SM501FB_FLAG_USE_INIT_MODE |
1526                            SM501FB_FLAG_USE_HWCURSOR |
1527                            SM501FB_FLAG_USE_HWACCEL |
1528                            SM501FB_FLAG_DISABLE_AT_EXIT),
1529 };
1530
1531 static struct sm501_platdata_fb sm501fb_def_pdata = {
1532         .fb_route               = SM501_FB_OWN,
1533         .fb_crt                 = &sm501fb_pdata_crt,
1534         .fb_pnl                 = &sm501fb_pdata_pnl,
1535 };
1536
1537 static char driver_name_crt[] = "sm501fb-crt";
1538 static char driver_name_pnl[] = "sm501fb-panel";
1539
1540 static int __init sm501fb_probe(struct platform_device *pdev)
1541 {
1542         struct sm501fb_info *info;
1543         struct device       *dev = &pdev->dev;
1544         struct fb_info      *fbinfo_crt;
1545         struct fb_info      *fbinfo_pnl;
1546         int                  ret;
1547
1548         /* allocate our framebuffers */
1549
1550         fbinfo_crt = framebuffer_alloc(sizeof(struct sm501fb_par), dev);
1551         if (fbinfo_crt == NULL) {
1552                 dev_err(dev, "cannot allocate crt framebuffer\n");
1553                 return -ENOMEM;
1554         }
1555
1556         fbinfo_pnl = framebuffer_alloc(sizeof(struct sm501fb_par), dev);
1557         if (fbinfo_pnl == NULL) {
1558                 dev_err(dev, "cannot allocate panel framebuffer\n");
1559                 ret = -ENOMEM;
1560                 goto fbinfo_crt_alloc_fail;
1561         }
1562
1563         info = sm501fb_info_alloc(fbinfo_crt, fbinfo_pnl);
1564         if (info == NULL) {
1565                 dev_err(dev, "cannot allocate par\n");
1566                 ret = -ENOMEM;
1567                 goto sm501fb_alloc_fail;
1568         }
1569
1570         if (dev->parent->platform_data) {
1571                 struct sm501_platdata *pd = dev->parent->platform_data;
1572                 info->pdata = pd->fb;
1573         }
1574
1575         if (info->pdata == NULL) {
1576                 dev_info(dev, "using default configuration data\n");
1577                 info->pdata = &sm501fb_def_pdata;
1578         }
1579
1580         /* start the framebuffers */
1581
1582         ret = sm501fb_start(info, pdev);
1583         if (ret) {
1584                 dev_err(dev, "cannot initialise SM501\n");
1585                 goto sm501fb_start_fail;
1586         }
1587
1588         /* CRT framebuffer setup */
1589
1590         ret = sm501fb_init_fb(fbinfo_crt, HEAD_CRT, driver_name_crt);
1591         if (ret) {
1592                 dev_err(dev, "cannot initialise CRT fb\n");
1593                 goto sm501fb_start_fail;
1594         }
1595
1596         /* Panel framebuffer setup */
1597
1598         ret = sm501fb_init_fb(fbinfo_pnl, HEAD_PANEL, driver_name_pnl);
1599         if (ret) {
1600                 dev_err(dev, "cannot initialise Panel fb\n");
1601                 goto sm501fb_start_fail;
1602         }
1603
1604         /* register framebuffers */
1605
1606         ret = register_framebuffer(fbinfo_crt);
1607         if (ret < 0) {
1608                 dev_err(dev, "failed to register CRT fb (%d)\n", ret);
1609                 goto register_crt_fail;
1610         }
1611
1612         ret = register_framebuffer(fbinfo_pnl);
1613         if (ret < 0) {
1614                 dev_err(dev, "failed to register panel fb (%d)\n", ret);
1615                 goto register_pnl_fail;
1616         }
1617
1618         dev_info(dev, "fb%d: %s frame buffer device\n",
1619                  fbinfo_crt->node, fbinfo_crt->fix.id);
1620
1621         dev_info(dev, "fb%d: %s frame buffer device\n",
1622                fbinfo_pnl->node, fbinfo_pnl->fix.id);
1623
1624         /* create device files */
1625
1626         ret = device_create_file(dev, &dev_attr_crt_src);
1627         if (ret)
1628                 goto crtsrc_fail;
1629
1630         ret = device_create_file(dev, &dev_attr_fbregs_pnl);
1631         if (ret)
1632                 goto fbregs_pnl_fail;
1633
1634         ret = device_create_file(dev, &dev_attr_fbregs_crt);
1635         if (ret)
1636                 goto fbregs_crt_fail;
1637
1638         /* we registered, return ok */
1639         return 0;
1640
1641  fbregs_crt_fail:
1642         device_remove_file(dev, &dev_attr_fbregs_pnl);
1643
1644  fbregs_pnl_fail:
1645         device_remove_file(dev, &dev_attr_crt_src);
1646
1647  crtsrc_fail:
1648         unregister_framebuffer(fbinfo_pnl);
1649
1650  register_pnl_fail:
1651         unregister_framebuffer(fbinfo_crt);
1652
1653  register_crt_fail:
1654         sm501fb_stop(info);
1655
1656  sm501fb_start_fail:
1657         sm501fb_info_release(info);
1658
1659  sm501fb_alloc_fail:
1660         framebuffer_release(fbinfo_pnl);
1661
1662  fbinfo_crt_alloc_fail:
1663         framebuffer_release(fbinfo_crt);
1664
1665         return ret;
1666 }
1667
1668
1669 /*
1670  *  Cleanup
1671  */
1672 static int sm501fb_remove(struct platform_device *pdev)
1673 {
1674         struct sm501fb_info *info = platform_get_drvdata(pdev);
1675         struct fb_info     *fbinfo_crt = info->fb[0];
1676         struct fb_info     *fbinfo_pnl = info->fb[1];
1677
1678         device_remove_file(&pdev->dev, &dev_attr_fbregs_crt);
1679         device_remove_file(&pdev->dev, &dev_attr_fbregs_pnl);
1680         device_remove_file(&pdev->dev, &dev_attr_crt_src);
1681
1682         unregister_framebuffer(fbinfo_crt);
1683         unregister_framebuffer(fbinfo_pnl);
1684
1685         sm501fb_stop(info);
1686         sm501fb_info_release(info);
1687
1688         framebuffer_release(fbinfo_pnl);
1689         framebuffer_release(fbinfo_crt);
1690
1691         return 0;
1692 }
1693
1694 #ifdef CONFIG_PM
1695
1696 static int sm501fb_suspend_fb(struct sm501fb_info *info,
1697                               enum sm501_controller head)
1698 {
1699         struct fb_info *fbi = info->fb[head];
1700         struct sm501fb_par *par = fbi->par;
1701
1702         if (par->screen.size == 0)
1703                 return 0;
1704
1705         /* blank the relevant interface to ensure unit power minimised */
1706         (par->ops.fb_blank)(FB_BLANK_POWERDOWN, fbi);
1707
1708         /* tell console/fb driver we are suspending */
1709
1710         acquire_console_sem();
1711         fb_set_suspend(fbi, 1);
1712         release_console_sem();
1713
1714         /* backup copies in case chip is powered down over suspend */
1715
1716         par->store_fb = vmalloc(par->screen.size);
1717         if (par->store_fb == NULL) {
1718                 dev_err(info->dev, "no memory to store screen\n");
1719                 return -ENOMEM;
1720         }
1721
1722         par->store_cursor = vmalloc(par->cursor.size);
1723         if (par->store_cursor == NULL) {
1724                 dev_err(info->dev, "no memory to store cursor\n");
1725                 goto err_nocursor;
1726         }
1727
1728         dev_dbg(info->dev, "suspending screen to %p\n", par->store_fb);
1729         dev_dbg(info->dev, "suspending cursor to %p\n", par->store_cursor);
1730
1731         memcpy_fromio(par->store_fb, par->screen.k_addr, par->screen.size);
1732         memcpy_fromio(par->store_cursor, par->cursor.k_addr, par->cursor.size);
1733
1734         return 0;
1735
1736  err_nocursor:
1737         vfree(par->store_fb);
1738         par->store_fb = NULL;
1739
1740         return -ENOMEM;
1741 }
1742
1743 static void sm501fb_resume_fb(struct sm501fb_info *info,
1744                               enum sm501_controller head)
1745 {
1746         struct fb_info *fbi = info->fb[head];
1747         struct sm501fb_par *par = fbi->par;
1748
1749         if (par->screen.size == 0)
1750                 return;
1751
1752         /* re-activate the configuration */
1753
1754         (par->ops.fb_set_par)(fbi);
1755
1756         /* restore the data */
1757
1758         dev_dbg(info->dev, "restoring screen from %p\n", par->store_fb);
1759         dev_dbg(info->dev, "restoring cursor from %p\n", par->store_cursor);
1760
1761         if (par->store_fb)
1762                 memcpy_toio(par->screen.k_addr, par->store_fb,
1763                             par->screen.size);
1764
1765         if (par->store_cursor)
1766                 memcpy_toio(par->cursor.k_addr, par->store_cursor,
1767                             par->cursor.size);
1768
1769         acquire_console_sem();
1770         fb_set_suspend(fbi, 0);
1771         release_console_sem();
1772
1773         vfree(par->store_fb);
1774         vfree(par->store_cursor);
1775 }
1776
1777
1778 /* suspend and resume support */
1779
1780 static int sm501fb_suspend(struct platform_device *pdev, pm_message_t state)
1781 {
1782         struct sm501fb_info *info = platform_get_drvdata(pdev);
1783
1784         /* store crt control to resume with */
1785         info->pm_crt_ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1786
1787         sm501fb_suspend_fb(info, HEAD_CRT);
1788         sm501fb_suspend_fb(info, HEAD_PANEL);
1789
1790         /* turn off the clocks, in case the device is not powered down */
1791         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1792
1793         return 0;
1794 }
1795
1796 #define SM501_CRT_CTRL_SAVE (SM501_DC_CRT_CONTROL_TVP |        \
1797                              SM501_DC_CRT_CONTROL_SEL)
1798
1799
1800 static int sm501fb_resume(struct platform_device *pdev)
1801 {
1802         struct sm501fb_info *info = platform_get_drvdata(pdev);
1803         unsigned long crt_ctrl;
1804
1805         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 1);
1806
1807         /* restore the items we want to be saved for crt control */
1808
1809         crt_ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1810         crt_ctrl &= ~SM501_CRT_CTRL_SAVE;
1811         crt_ctrl |= info->pm_crt_ctrl & SM501_CRT_CTRL_SAVE;
1812         writel(crt_ctrl, info->regs + SM501_DC_CRT_CONTROL);
1813
1814         sm501fb_resume_fb(info, HEAD_CRT);
1815         sm501fb_resume_fb(info, HEAD_PANEL);
1816
1817         return 0;
1818 }
1819
1820 #else
1821 #define sm501fb_suspend NULL
1822 #define sm501fb_resume  NULL
1823 #endif
1824
1825 static struct platform_driver sm501fb_driver = {
1826         .probe          = sm501fb_probe,
1827         .remove         = sm501fb_remove,
1828         .suspend        = sm501fb_suspend,
1829         .resume         = sm501fb_resume,
1830         .driver         = {
1831                 .name   = "sm501-fb",
1832                 .owner  = THIS_MODULE,
1833         },
1834 };
1835
1836 static int __devinit sm501fb_init(void)
1837 {
1838         return platform_driver_register(&sm501fb_driver);
1839 }
1840
1841 static void __exit sm501fb_cleanup(void)
1842 {
1843         platform_driver_unregister(&sm501fb_driver);
1844 }
1845
1846 module_init(sm501fb_init);
1847 module_exit(sm501fb_cleanup);
1848
1849 MODULE_AUTHOR("Ben Dooks, Vincent Sanders");
1850 MODULE_DESCRIPTION("SM501 Framebuffer driver");
1851 MODULE_LICENSE("GPL v2");