media: ov5640: Add Omnivision OV5640 support
[linux-2.6.git] / drivers / video / sa1100fb.c
1 /*
2  *  linux/drivers/video/sa1100fb.c
3  *
4  *  Copyright (C) 1999 Eric A. Thomas
5  *   Based on acornfb.c Copyright (C) Russell King.
6  *
7  * This file is subject to the terms and conditions of the GNU General Public
8  * License.  See the file COPYING in the main directory of this archive for
9  * more details.
10  *
11  *              StrongARM 1100 LCD Controller Frame Buffer Driver
12  *
13  * Please direct your questions and comments on this driver to the following
14  * email address:
15  *
16  *      linux-arm-kernel@lists.arm.linux.org.uk
17  *
18  * Clean patches should be sent to the ARM Linux Patch System.  Please see the
19  * following web page for more information:
20  *
21  *      http://www.arm.linux.org.uk/developer/patches/info.shtml
22  *
23  * Thank you.
24  *
25  * Known problems:
26  *      - With the Neponset plugged into an Assabet, LCD powerdown
27  *        doesn't work (LCD stays powered up).  Therefore we shouldn't
28  *        blank the screen.
29  *      - We don't limit the CPU clock rate nor the mode selection
30  *        according to the available SDRAM bandwidth.
31  *
32  * Other notes:
33  *      - Linear grayscale palettes and the kernel.
34  *        Such code does not belong in the kernel.  The kernel frame buffer
35  *        drivers do not expect a linear colourmap, but a colourmap based on
36  *        the VT100 standard mapping.
37  *
38  *        If your _userspace_ requires a linear colourmap, then the setup of
39  *        such a colourmap belongs _in userspace_, not in the kernel.  Code
40  *        to set the colourmap correctly from user space has been sent to
41  *        David Neuer.  It's around 8 lines of C code, plus another 4 to
42  *        detect if we are using grayscale.
43  *
44  *      - The following must never be specified in a panel definition:
45  *           LCCR0_LtlEnd, LCCR3_PixClkDiv, LCCR3_VrtSnchL, LCCR3_HorSnchL
46  *
47  *      - The following should be specified:
48  *           either LCCR0_Color or LCCR0_Mono
49  *           either LCCR0_Sngl or LCCR0_Dual
50  *           either LCCR0_Act or LCCR0_Pas
51  *           either LCCR3_OutEnH or LCCD3_OutEnL
52  *           either LCCR3_PixRsEdg or LCCR3_PixFlEdg
53  *           either LCCR3_ACBsDiv or LCCR3_ACBsCntOff
54  *
55  * Code Status:
56  * 1999/04/01:
57  *      - Driver appears to be working for Brutus 320x200x8bpp mode.  Other
58  *        resolutions are working, but only the 8bpp mode is supported.
59  *        Changes need to be made to the palette encode and decode routines
60  *        to support 4 and 16 bpp modes.  
61  *        Driver is not designed to be a module.  The FrameBuffer is statically
62  *        allocated since dynamic allocation of a 300k buffer cannot be 
63  *        guaranteed. 
64  *
65  * 1999/06/17:
66  *      - FrameBuffer memory is now allocated at run-time when the
67  *        driver is initialized.    
68  *
69  * 2000/04/10: Nicolas Pitre <nico@fluxnic.net>
70  *      - Big cleanup for dynamic selection of machine type at run time.
71  *
72  * 2000/07/19: Jamey Hicks <jamey@crl.dec.com>
73  *      - Support for Bitsy aka Compaq iPAQ H3600 added.
74  *
75  * 2000/08/07: Tak-Shing Chan <tchan.rd@idthk.com>
76  *             Jeff Sutherland <jsutherland@accelent.com>
77  *      - Resolved an issue caused by a change made to the Assabet's PLD 
78  *        earlier this year which broke the framebuffer driver for newer 
79  *        Phase 4 Assabets.  Some other parameters were changed to optimize
80  *        for the Sharp display.
81  *
82  * 2000/08/09: Kunihiko IMAI <imai@vasara.co.jp>
83  *      - XP860 support added
84  *
85  * 2000/08/19: Mark Huang <mhuang@livetoy.com>
86  *      - Allows standard options to be passed on the kernel command line
87  *        for most common passive displays.
88  *
89  * 2000/08/29:
90  *      - s/save_flags_cli/local_irq_save/
91  *      - remove unneeded extra save_flags_cli in sa1100fb_enable_lcd_controller
92  *
93  * 2000/10/10: Erik Mouw <J.A.K.Mouw@its.tudelft.nl>
94  *      - Updated LART stuff. Fixed some minor bugs.
95  *
96  * 2000/10/30: Murphy Chen <murphy@mail.dialogue.com.tw>
97  *      - Pangolin support added
98  *
99  * 2000/10/31: Roman Jordan <jor@hoeft-wessel.de>
100  *      - Huw Webpanel support added
101  *
102  * 2000/11/23: Eric Peng <ericpeng@coventive.com>
103  *      - Freebird add
104  *
105  * 2001/02/07: Jamey Hicks <jamey.hicks@compaq.com> 
106  *             Cliff Brake <cbrake@accelent.com>
107  *      - Added PM callback
108  *
109  * 2001/05/26: <rmk@arm.linux.org.uk>
110  *      - Fix 16bpp so that (a) we use the right colours rather than some
111  *        totally random colour depending on what was in page 0, and (b)
112  *        we don't de-reference a NULL pointer.
113  *      - remove duplicated implementation of consistent_alloc()
114  *      - convert dma address types to dma_addr_t
115  *      - remove unused 'montype' stuff
116  *      - remove redundant zero inits of init_var after the initial
117  *        memset.
118  *      - remove allow_modeset (acornfb idea does not belong here)
119  *
120  * 2001/05/28: <rmk@arm.linux.org.uk>
121  *      - massive cleanup - move machine dependent data into structures
122  *      - I've left various #warnings in - if you see one, and know
123  *        the hardware concerned, please get in contact with me.
124  *
125  * 2001/05/31: <rmk@arm.linux.org.uk>
126  *      - Fix LCCR1 HSW value, fix all machine type specifications to
127  *        keep values in line.  (Please check your machine type specs)
128  *
129  * 2001/06/10: <rmk@arm.linux.org.uk>
130  *      - Fiddle with the LCD controller from task context only; mainly
131  *        so that we can run with interrupts on, and sleep.
132  *      - Convert #warnings into #errors.  No pain, no gain. ;)
133  *
134  * 2001/06/14: <rmk@arm.linux.org.uk>
135  *      - Make the palette BPS value for 12bpp come out correctly.
136  *      - Take notice of "greyscale" on any colour depth.
137  *      - Make truecolor visuals use the RGB channel encoding information.
138  *
139  * 2001/07/02: <rmk@arm.linux.org.uk>
140  *      - Fix colourmap problems.
141  *
142  * 2001/07/13: <abraham@2d3d.co.za>
143  *      - Added support for the ICP LCD-Kit01 on LART. This LCD is
144  *        manufactured by Prime View, model no V16C6448AB
145  *
146  * 2001/07/23: <rmk@arm.linux.org.uk>
147  *      - Hand merge version from handhelds.org CVS tree.  See patch
148  *        notes for 595/1 for more information.
149  *      - Drop 12bpp (it's 16bpp with different colour register mappings).
150  *      - This hardware can not do direct colour.  Therefore we don't
151  *        support it.
152  *
153  * 2001/07/27: <rmk@arm.linux.org.uk>
154  *      - Halve YRES on dual scan LCDs.
155  *
156  * 2001/08/22: <rmk@arm.linux.org.uk>
157  *      - Add b/w iPAQ pixclock value.
158  *
159  * 2001/10/12: <rmk@arm.linux.org.uk>
160  *      - Add patch 681/1 and clean up stork definitions.
161  */
162
163 #include <linux/module.h>
164 #include <linux/kernel.h>
165 #include <linux/sched.h>
166 #include <linux/errno.h>
167 #include <linux/string.h>
168 #include <linux/interrupt.h>
169 #include <linux/slab.h>
170 #include <linux/mm.h>
171 #include <linux/fb.h>
172 #include <linux/delay.h>
173 #include <linux/init.h>
174 #include <linux/ioport.h>
175 #include <linux/cpufreq.h>
176 #include <linux/platform_device.h>
177 #include <linux/dma-mapping.h>
178 #include <linux/mutex.h>
179 #include <linux/io.h>
180
181 #include <mach/hardware.h>
182 #include <asm/mach-types.h>
183 #include <mach/assabet.h>
184 #include <mach/shannon.h>
185
186 /*
187  * debugging?
188  */
189 #define DEBUG 0
190 /*
191  * Complain if VAR is out of range.
192  */
193 #define DEBUG_VAR 1
194
195 #undef ASSABET_PAL_VIDEO
196
197 #include "sa1100fb.h"
198
199 extern void (*sa1100fb_backlight_power)(int on);
200 extern void (*sa1100fb_lcd_power)(int on);
201
202 static struct sa1100fb_rgb rgb_4 = {
203         .red    = { .offset = 0,  .length = 4, },
204         .green  = { .offset = 0,  .length = 4, },
205         .blue   = { .offset = 0,  .length = 4, },
206         .transp = { .offset = 0,  .length = 0, },
207 };
208
209 static struct sa1100fb_rgb rgb_8 = {
210         .red    = { .offset = 0,  .length = 8, },
211         .green  = { .offset = 0,  .length = 8, },
212         .blue   = { .offset = 0,  .length = 8, },
213         .transp = { .offset = 0,  .length = 0, },
214 };
215
216 static struct sa1100fb_rgb def_rgb_16 = {
217         .red    = { .offset = 11, .length = 5, },
218         .green  = { .offset = 5,  .length = 6, },
219         .blue   = { .offset = 0,  .length = 5, },
220         .transp = { .offset = 0,  .length = 0, },
221 };
222
223 #ifdef CONFIG_SA1100_ASSABET
224 #ifndef ASSABET_PAL_VIDEO
225 /*
226  * The assabet uses a sharp LQ039Q2DS54 LCD module.  It is actually
227  * takes an RGB666 signal, but we provide it with an RGB565 signal
228  * instead (def_rgb_16).
229  */
230 static struct sa1100fb_mach_info lq039q2ds54_info __initdata = {
231         .pixclock       = 171521,       .bpp            = 16,
232         .xres           = 320,          .yres           = 240,
233
234         .hsync_len      = 5,            .vsync_len      = 1,
235         .left_margin    = 61,           .upper_margin   = 3,
236         .right_margin   = 9,            .lower_margin   = 0,
237
238         .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
239
240         .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
241         .lccr3          = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
242 };
243 #else
244 static struct sa1100fb_mach_info pal_info __initdata = {
245         .pixclock       = 67797,        .bpp            = 16,
246         .xres           = 640,          .yres           = 512,
247
248         .hsync_len      = 64,           .vsync_len      = 6,
249         .left_margin    = 125,          .upper_margin   = 70,
250         .right_margin   = 115,          .lower_margin   = 36,
251
252         .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
253         .lccr3          = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
254 };
255 #endif
256 #endif
257
258 #ifdef CONFIG_SA1100_H3600
259 static struct sa1100fb_mach_info h3600_info __initdata = {
260         .pixclock       = 174757,       .bpp            = 16,
261         .xres           = 320,          .yres           = 240,
262
263         .hsync_len      = 3,            .vsync_len      = 3,
264         .left_margin    = 12,           .upper_margin   = 10,
265         .right_margin   = 17,           .lower_margin   = 1,
266
267         .cmap_static    = 1,
268
269         .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
270         .lccr3          = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
271 };
272
273 static struct sa1100fb_rgb h3600_rgb_16 = {
274         .red    = { .offset = 12, .length = 4, },
275         .green  = { .offset = 7,  .length = 4, },
276         .blue   = { .offset = 1,  .length = 4, },
277         .transp = { .offset = 0,  .length = 0, },
278 };
279 #endif
280
281 #ifdef CONFIG_SA1100_H3100
282 static struct sa1100fb_mach_info h3100_info __initdata = {
283         .pixclock       = 406977,       .bpp            = 4,
284         .xres           = 320,          .yres           = 240,
285
286         .hsync_len      = 26,           .vsync_len      = 41,
287         .left_margin    = 4,            .upper_margin   = 0,
288         .right_margin   = 4,            .lower_margin   = 0,
289
290         .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
291         .cmap_greyscale = 1,
292         .cmap_inverse   = 1,
293
294         .lccr0          = LCCR0_Mono | LCCR0_4PixMono | LCCR0_Sngl | LCCR0_Pas,
295         .lccr3          = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
296 };
297 #endif
298
299 #ifdef CONFIG_SA1100_COLLIE
300 static struct sa1100fb_mach_info collie_info __initdata = {
301         .pixclock       = 171521,       .bpp            = 16,
302         .xres           = 320,          .yres           = 240,
303
304         .hsync_len      = 5,            .vsync_len      = 1,
305         .left_margin    = 11,           .upper_margin   = 2,
306         .right_margin   = 30,           .lower_margin   = 0,
307
308         .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
309
310         .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
311         .lccr3          = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
312 };
313 #endif
314
315 #ifdef LART_GREY_LCD
316 static struct sa1100fb_mach_info lart_grey_info __initdata = {
317         .pixclock       = 150000,       .bpp            = 4,
318         .xres           = 320,          .yres           = 240,
319
320         .hsync_len      = 1,            .vsync_len      = 1,
321         .left_margin    = 4,            .upper_margin   = 0,
322         .right_margin   = 2,            .lower_margin   = 0,
323
324         .cmap_greyscale = 1,
325         .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
326
327         .lccr0          = LCCR0_Mono | LCCR0_Sngl | LCCR0_Pas | LCCR0_4PixMono,
328         .lccr3          = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
329 };
330 #endif
331 #ifdef LART_COLOR_LCD
332 static struct sa1100fb_mach_info lart_color_info __initdata = {
333         .pixclock       = 150000,       .bpp            = 16,
334         .xres           = 320,          .yres           = 240,
335
336         .hsync_len      = 2,            .vsync_len      = 3,
337         .left_margin    = 69,           .upper_margin   = 14,
338         .right_margin   = 8,            .lower_margin   = 4,
339
340         .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
341         .lccr3          = LCCR3_OutEnH | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512),
342 };
343 #endif
344 #ifdef LART_VIDEO_OUT
345 static struct sa1100fb_mach_info lart_video_info __initdata = {
346         .pixclock       = 39721,        .bpp            = 16,
347         .xres           = 640,          .yres           = 480,
348
349         .hsync_len      = 95,           .vsync_len      = 2,
350         .left_margin    = 40,           .upper_margin   = 32,
351         .right_margin   = 24,           .lower_margin   = 11,
352
353         .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
354
355         .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
356         .lccr3          = LCCR3_OutEnL | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512),
357 };
358 #endif
359
360 #ifdef LART_KIT01_LCD
361 static struct sa1100fb_mach_info lart_kit01_info __initdata = {
362         .pixclock       = 63291,        .bpp            = 16,
363         .xres           = 640,          .yres           = 480,
364
365         .hsync_len      = 64,           .vsync_len      = 3,
366         .left_margin    = 122,          .upper_margin   = 45,
367         .right_margin   = 10,           .lower_margin   = 10,
368
369         .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
370         .lccr3          = LCCR3_OutEnH | LCCR3_PixFlEdg
371 };
372 #endif
373
374 #ifdef CONFIG_SA1100_SHANNON
375 static struct sa1100fb_mach_info shannon_info __initdata = {
376         .pixclock       = 152500,       .bpp            = 8,
377         .xres           = 640,          .yres           = 480,
378
379         .hsync_len      = 4,            .vsync_len      = 3,
380         .left_margin    = 2,            .upper_margin   = 0,
381         .right_margin   = 1,            .lower_margin   = 0,
382
383         .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
384
385         .lccr0          = LCCR0_Color | LCCR0_Dual | LCCR0_Pas,
386         .lccr3          = LCCR3_ACBsDiv(512),
387 };
388 #endif
389
390
391
392 static struct sa1100fb_mach_info * __init
393 sa1100fb_get_machine_info(struct sa1100fb_info *fbi)
394 {
395         struct sa1100fb_mach_info *inf = NULL;
396
397         /*
398          *            R        G       B       T
399          * default  {11,5}, { 5,6}, { 0,5}, { 0,0}
400          * h3600    {12,4}, { 7,4}, { 1,4}, { 0,0}
401          * freebird { 8,4}, { 4,4}, { 0,4}, {12,4}
402          */
403 #ifdef CONFIG_SA1100_ASSABET
404         if (machine_is_assabet()) {
405 #ifndef ASSABET_PAL_VIDEO
406                 inf = &lq039q2ds54_info;
407 #else
408                 inf = &pal_info;
409 #endif
410         }
411 #endif
412 #ifdef CONFIG_SA1100_H3100
413         if (machine_is_h3100()) {
414                 inf = &h3100_info;
415         }
416 #endif
417 #ifdef CONFIG_SA1100_H3600
418         if (machine_is_h3600()) {
419                 inf = &h3600_info;
420                 fbi->rgb[RGB_16] = &h3600_rgb_16;
421         }
422 #endif
423 #ifdef CONFIG_SA1100_COLLIE
424         if (machine_is_collie()) {
425                 inf = &collie_info;
426         }
427 #endif
428 #ifdef CONFIG_SA1100_LART
429         if (machine_is_lart()) {
430 #ifdef LART_GREY_LCD
431                 inf = &lart_grey_info;
432 #endif
433 #ifdef LART_COLOR_LCD
434                 inf = &lart_color_info;
435 #endif
436 #ifdef LART_VIDEO_OUT
437                 inf = &lart_video_info;
438 #endif
439 #ifdef LART_KIT01_LCD
440                 inf = &lart_kit01_info;
441 #endif
442         }
443 #endif
444 #ifdef CONFIG_SA1100_SHANNON
445         if (machine_is_shannon()) {
446                 inf = &shannon_info;
447         }
448 #endif
449         return inf;
450 }
451
452 static int sa1100fb_activate_var(struct fb_var_screeninfo *var, struct sa1100fb_info *);
453 static void set_ctrlr_state(struct sa1100fb_info *fbi, u_int state);
454
455 static inline void sa1100fb_schedule_work(struct sa1100fb_info *fbi, u_int state)
456 {
457         unsigned long flags;
458
459         local_irq_save(flags);
460         /*
461          * We need to handle two requests being made at the same time.
462          * There are two important cases:
463          *  1. When we are changing VT (C_REENABLE) while unblanking (C_ENABLE)
464          *     We must perform the unblanking, which will do our REENABLE for us.
465          *  2. When we are blanking, but immediately unblank before we have
466          *     blanked.  We do the "REENABLE" thing here as well, just to be sure.
467          */
468         if (fbi->task_state == C_ENABLE && state == C_REENABLE)
469                 state = (u_int) -1;
470         if (fbi->task_state == C_DISABLE && state == C_ENABLE)
471                 state = C_REENABLE;
472
473         if (state != (u_int)-1) {
474                 fbi->task_state = state;
475                 schedule_work(&fbi->task);
476         }
477         local_irq_restore(flags);
478 }
479
480 static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
481 {
482         chan &= 0xffff;
483         chan >>= 16 - bf->length;
484         return chan << bf->offset;
485 }
486
487 /*
488  * Convert bits-per-pixel to a hardware palette PBS value.
489  */
490 static inline u_int palette_pbs(struct fb_var_screeninfo *var)
491 {
492         int ret = 0;
493         switch (var->bits_per_pixel) {
494         case 4:  ret = 0 << 12; break;
495         case 8:  ret = 1 << 12; break;
496         case 16: ret = 2 << 12; break;
497         }
498         return ret;
499 }
500
501 static int
502 sa1100fb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
503                        u_int trans, struct fb_info *info)
504 {
505         struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
506         u_int val, ret = 1;
507
508         if (regno < fbi->palette_size) {
509                 val = ((red >> 4) & 0xf00);
510                 val |= ((green >> 8) & 0x0f0);
511                 val |= ((blue >> 12) & 0x00f);
512
513                 if (regno == 0)
514                         val |= palette_pbs(&fbi->fb.var);
515
516                 fbi->palette_cpu[regno] = val;
517                 ret = 0;
518         }
519         return ret;
520 }
521
522 static int
523 sa1100fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
524                    u_int trans, struct fb_info *info)
525 {
526         struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
527         unsigned int val;
528         int ret = 1;
529
530         /*
531          * If inverse mode was selected, invert all the colours
532          * rather than the register number.  The register number
533          * is what you poke into the framebuffer to produce the
534          * colour you requested.
535          */
536         if (fbi->cmap_inverse) {
537                 red   = 0xffff - red;
538                 green = 0xffff - green;
539                 blue  = 0xffff - blue;
540         }
541
542         /*
543          * If greyscale is true, then we convert the RGB value
544          * to greyscale no mater what visual we are using.
545          */
546         if (fbi->fb.var.grayscale)
547                 red = green = blue = (19595 * red + 38470 * green +
548                                         7471 * blue) >> 16;
549
550         switch (fbi->fb.fix.visual) {
551         case FB_VISUAL_TRUECOLOR:
552                 /*
553                  * 12 or 16-bit True Colour.  We encode the RGB value
554                  * according to the RGB bitfield information.
555                  */
556                 if (regno < 16) {
557                         u32 *pal = fbi->fb.pseudo_palette;
558
559                         val  = chan_to_field(red, &fbi->fb.var.red);
560                         val |= chan_to_field(green, &fbi->fb.var.green);
561                         val |= chan_to_field(blue, &fbi->fb.var.blue);
562
563                         pal[regno] = val;
564                         ret = 0;
565                 }
566                 break;
567
568         case FB_VISUAL_STATIC_PSEUDOCOLOR:
569         case FB_VISUAL_PSEUDOCOLOR:
570                 ret = sa1100fb_setpalettereg(regno, red, green, blue, trans, info);
571                 break;
572         }
573
574         return ret;
575 }
576
577 #ifdef CONFIG_CPU_FREQ
578 /*
579  *  sa1100fb_display_dma_period()
580  *    Calculate the minimum period (in picoseconds) between two DMA
581  *    requests for the LCD controller.  If we hit this, it means we're
582  *    doing nothing but LCD DMA.
583  */
584 static inline unsigned int sa1100fb_display_dma_period(struct fb_var_screeninfo *var)
585 {
586         /*
587          * Period = pixclock * bits_per_byte * bytes_per_transfer
588          *              / memory_bits_per_pixel;
589          */
590         return var->pixclock * 8 * 16 / var->bits_per_pixel;
591 }
592 #endif
593
594 /*
595  *  sa1100fb_check_var():
596  *    Round up in the following order: bits_per_pixel, xres,
597  *    yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale,
598  *    bitfields, horizontal timing, vertical timing.
599  */
600 static int
601 sa1100fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
602 {
603         struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
604         int rgbidx;
605
606         if (var->xres < MIN_XRES)
607                 var->xres = MIN_XRES;
608         if (var->yres < MIN_YRES)
609                 var->yres = MIN_YRES;
610         if (var->xres > fbi->max_xres)
611                 var->xres = fbi->max_xres;
612         if (var->yres > fbi->max_yres)
613                 var->yres = fbi->max_yres;
614         var->xres_virtual = max(var->xres_virtual, var->xres);
615         var->yres_virtual = max(var->yres_virtual, var->yres);
616
617         DPRINTK("var->bits_per_pixel=%d\n", var->bits_per_pixel);
618         switch (var->bits_per_pixel) {
619         case 4:
620                 rgbidx = RGB_4;
621                 break;
622         case 8:
623                 rgbidx = RGB_8;
624                 break;
625         case 16:
626                 rgbidx = RGB_16;
627                 break;
628         default:
629                 return -EINVAL;
630         }
631
632         /*
633          * Copy the RGB parameters for this display
634          * from the machine specific parameters.
635          */
636         var->red    = fbi->rgb[rgbidx]->red;
637         var->green  = fbi->rgb[rgbidx]->green;
638         var->blue   = fbi->rgb[rgbidx]->blue;
639         var->transp = fbi->rgb[rgbidx]->transp;
640
641         DPRINTK("RGBT length = %d:%d:%d:%d\n",
642                 var->red.length, var->green.length, var->blue.length,
643                 var->transp.length);
644
645         DPRINTK("RGBT offset = %d:%d:%d:%d\n",
646                 var->red.offset, var->green.offset, var->blue.offset,
647                 var->transp.offset);
648
649 #ifdef CONFIG_CPU_FREQ
650         printk(KERN_DEBUG "dma period = %d ps, clock = %d kHz\n",
651                 sa1100fb_display_dma_period(var),
652                 cpufreq_get(smp_processor_id()));
653 #endif
654
655         return 0;
656 }
657
658 static inline void sa1100fb_set_truecolor(u_int is_true_color)
659 {
660         if (machine_is_assabet()) {
661 #if 1           // phase 4 or newer Assabet's
662                 if (is_true_color)
663                         ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
664                 else
665                         ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
666 #else
667                 // older Assabet's
668                 if (is_true_color)
669                         ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
670                 else
671                         ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
672 #endif
673         }
674 }
675
676 /*
677  * sa1100fb_set_par():
678  *      Set the user defined part of the display for the specified console
679  */
680 static int sa1100fb_set_par(struct fb_info *info)
681 {
682         struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
683         struct fb_var_screeninfo *var = &info->var;
684         unsigned long palette_mem_size;
685
686         DPRINTK("set_par\n");
687
688         if (var->bits_per_pixel == 16)
689                 fbi->fb.fix.visual = FB_VISUAL_TRUECOLOR;
690         else if (!fbi->cmap_static)
691                 fbi->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
692         else {
693                 /*
694                  * Some people have weird ideas about wanting static
695                  * pseudocolor maps.  I suspect their user space
696                  * applications are broken.
697                  */
698                 fbi->fb.fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
699         }
700
701         fbi->fb.fix.line_length = var->xres_virtual *
702                                   var->bits_per_pixel / 8;
703         fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16;
704
705         palette_mem_size = fbi->palette_size * sizeof(u16);
706
707         DPRINTK("palette_mem_size = 0x%08lx\n", (u_long) palette_mem_size);
708
709         fbi->palette_cpu = (u16 *)(fbi->map_cpu + PAGE_SIZE - palette_mem_size);
710         fbi->palette_dma = fbi->map_dma + PAGE_SIZE - palette_mem_size;
711
712         /*
713          * Set (any) board control register to handle new color depth
714          */
715         sa1100fb_set_truecolor(fbi->fb.fix.visual == FB_VISUAL_TRUECOLOR);
716         sa1100fb_activate_var(var, fbi);
717
718         return 0;
719 }
720
721 #if 0
722 static int
723 sa1100fb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
724                   struct fb_info *info)
725 {
726         struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
727
728         /*
729          * Make sure the user isn't doing something stupid.
730          */
731         if (!kspc && (fbi->fb.var.bits_per_pixel == 16 || fbi->cmap_static))
732                 return -EINVAL;
733
734         return gen_set_cmap(cmap, kspc, con, info);
735 }
736 #endif
737
738 /*
739  * Formal definition of the VESA spec:
740  *  On
741  *      This refers to the state of the display when it is in full operation
742  *  Stand-By
743  *      This defines an optional operating state of minimal power reduction with
744  *      the shortest recovery time
745  *  Suspend
746  *      This refers to a level of power management in which substantial power
747  *      reduction is achieved by the display.  The display can have a longer 
748  *      recovery time from this state than from the Stand-by state
749  *  Off
750  *      This indicates that the display is consuming the lowest level of power
751  *      and is non-operational. Recovery from this state may optionally require
752  *      the user to manually power on the monitor
753  *
754  *  Now, the fbdev driver adds an additional state, (blank), where they
755  *  turn off the video (maybe by colormap tricks), but don't mess with the
756  *  video itself: think of it semantically between on and Stand-By.
757  *
758  *  So here's what we should do in our fbdev blank routine:
759  *
760  *      VESA_NO_BLANKING (mode 0)       Video on,  front/back light on
761  *      VESA_VSYNC_SUSPEND (mode 1)     Video on,  front/back light off
762  *      VESA_HSYNC_SUSPEND (mode 2)     Video on,  front/back light off
763  *      VESA_POWERDOWN (mode 3)         Video off, front/back light off
764  *
765  *  This will match the matrox implementation.
766  */
767 /*
768  * sa1100fb_blank():
769  *      Blank the display by setting all palette values to zero.  Note, the 
770  *      12 and 16 bpp modes don't really use the palette, so this will not
771  *      blank the display in all modes.  
772  */
773 static int sa1100fb_blank(int blank, struct fb_info *info)
774 {
775         struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
776         int i;
777
778         DPRINTK("sa1100fb_blank: blank=%d\n", blank);
779
780         switch (blank) {
781         case FB_BLANK_POWERDOWN:
782         case FB_BLANK_VSYNC_SUSPEND:
783         case FB_BLANK_HSYNC_SUSPEND:
784         case FB_BLANK_NORMAL:
785                 if (fbi->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR ||
786                     fbi->fb.fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR)
787                         for (i = 0; i < fbi->palette_size; i++)
788                                 sa1100fb_setpalettereg(i, 0, 0, 0, 0, info);
789                 sa1100fb_schedule_work(fbi, C_DISABLE);
790                 break;
791
792         case FB_BLANK_UNBLANK:
793                 if (fbi->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR ||
794                     fbi->fb.fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR)
795                         fb_set_cmap(&fbi->fb.cmap, info);
796                 sa1100fb_schedule_work(fbi, C_ENABLE);
797         }
798         return 0;
799 }
800
801 static int sa1100fb_mmap(struct fb_info *info,
802                          struct vm_area_struct *vma)
803 {
804         struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
805         unsigned long start, len, off = vma->vm_pgoff << PAGE_SHIFT;
806
807         if (off < info->fix.smem_len) {
808                 vma->vm_pgoff += 1; /* skip over the palette */
809                 return dma_mmap_writecombine(fbi->dev, vma, fbi->map_cpu,
810                                              fbi->map_dma, fbi->map_size);
811         }
812
813         start = info->fix.mmio_start;
814         len = PAGE_ALIGN((start & ~PAGE_MASK) + info->fix.mmio_len);
815
816         if ((vma->vm_end - vma->vm_start + off) > len)
817                 return -EINVAL;
818
819         off += start & PAGE_MASK;
820         vma->vm_pgoff = off >> PAGE_SHIFT;
821         vma->vm_flags |= VM_IO;
822         vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
823         return io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT,
824                                    vma->vm_end - vma->vm_start,
825                                    vma->vm_page_prot);
826 }
827
828 static struct fb_ops sa1100fb_ops = {
829         .owner          = THIS_MODULE,
830         .fb_check_var   = sa1100fb_check_var,
831         .fb_set_par     = sa1100fb_set_par,
832 //      .fb_set_cmap    = sa1100fb_set_cmap,
833         .fb_setcolreg   = sa1100fb_setcolreg,
834         .fb_fillrect    = cfb_fillrect,
835         .fb_copyarea    = cfb_copyarea,
836         .fb_imageblit   = cfb_imageblit,
837         .fb_blank       = sa1100fb_blank,
838         .fb_mmap        = sa1100fb_mmap,
839 };
840
841 /*
842  * Calculate the PCD value from the clock rate (in picoseconds).
843  * We take account of the PPCR clock setting.
844  */
845 static inline unsigned int get_pcd(unsigned int pixclock, unsigned int cpuclock)
846 {
847         unsigned int pcd = cpuclock / 100;
848
849         pcd *= pixclock;
850         pcd /= 10000000;
851
852         return pcd + 1; /* make up for integer math truncations */
853 }
854
855 /*
856  * sa1100fb_activate_var():
857  *      Configures LCD Controller based on entries in var parameter.  Settings are      
858  *      only written to the controller if changes were made.  
859  */
860 static int sa1100fb_activate_var(struct fb_var_screeninfo *var, struct sa1100fb_info *fbi)
861 {
862         struct sa1100fb_lcd_reg new_regs;
863         u_int half_screen_size, yres, pcd;
864         u_long flags;
865
866         DPRINTK("Configuring SA1100 LCD\n");
867
868         DPRINTK("var: xres=%d hslen=%d lm=%d rm=%d\n",
869                 var->xres, var->hsync_len,
870                 var->left_margin, var->right_margin);
871         DPRINTK("var: yres=%d vslen=%d um=%d bm=%d\n",
872                 var->yres, var->vsync_len,
873                 var->upper_margin, var->lower_margin);
874
875 #if DEBUG_VAR
876         if (var->xres < 16        || var->xres > 1024)
877                 printk(KERN_ERR "%s: invalid xres %d\n",
878                         fbi->fb.fix.id, var->xres);
879         if (var->hsync_len < 1    || var->hsync_len > 64)
880                 printk(KERN_ERR "%s: invalid hsync_len %d\n",
881                         fbi->fb.fix.id, var->hsync_len);
882         if (var->left_margin < 1  || var->left_margin > 255)
883                 printk(KERN_ERR "%s: invalid left_margin %d\n",
884                         fbi->fb.fix.id, var->left_margin);
885         if (var->right_margin < 1 || var->right_margin > 255)
886                 printk(KERN_ERR "%s: invalid right_margin %d\n",
887                         fbi->fb.fix.id, var->right_margin);
888         if (var->yres < 1         || var->yres > 1024)
889                 printk(KERN_ERR "%s: invalid yres %d\n",
890                         fbi->fb.fix.id, var->yres);
891         if (var->vsync_len < 1    || var->vsync_len > 64)
892                 printk(KERN_ERR "%s: invalid vsync_len %d\n",
893                         fbi->fb.fix.id, var->vsync_len);
894         if (var->upper_margin < 0 || var->upper_margin > 255)
895                 printk(KERN_ERR "%s: invalid upper_margin %d\n",
896                         fbi->fb.fix.id, var->upper_margin);
897         if (var->lower_margin < 0 || var->lower_margin > 255)
898                 printk(KERN_ERR "%s: invalid lower_margin %d\n",
899                         fbi->fb.fix.id, var->lower_margin);
900 #endif
901
902         new_regs.lccr0 = fbi->lccr0 |
903                 LCCR0_LEN | LCCR0_LDM | LCCR0_BAM |
904                 LCCR0_ERM | LCCR0_LtlEnd | LCCR0_DMADel(0);
905
906         new_regs.lccr1 =
907                 LCCR1_DisWdth(var->xres) +
908                 LCCR1_HorSnchWdth(var->hsync_len) +
909                 LCCR1_BegLnDel(var->left_margin) +
910                 LCCR1_EndLnDel(var->right_margin);
911
912         /*
913          * If we have a dual scan LCD, then we need to halve
914          * the YRES parameter.
915          */
916         yres = var->yres;
917         if (fbi->lccr0 & LCCR0_Dual)
918                 yres /= 2;
919
920         new_regs.lccr2 =
921                 LCCR2_DisHght(yres) +
922                 LCCR2_VrtSnchWdth(var->vsync_len) +
923                 LCCR2_BegFrmDel(var->upper_margin) +
924                 LCCR2_EndFrmDel(var->lower_margin);
925
926         pcd = get_pcd(var->pixclock, cpufreq_get(0));
927         new_regs.lccr3 = LCCR3_PixClkDiv(pcd) | fbi->lccr3 |
928                 (var->sync & FB_SYNC_HOR_HIGH_ACT ? LCCR3_HorSnchH : LCCR3_HorSnchL) |
929                 (var->sync & FB_SYNC_VERT_HIGH_ACT ? LCCR3_VrtSnchH : LCCR3_VrtSnchL);
930
931         DPRINTK("nlccr0 = 0x%08lx\n", new_regs.lccr0);
932         DPRINTK("nlccr1 = 0x%08lx\n", new_regs.lccr1);
933         DPRINTK("nlccr2 = 0x%08lx\n", new_regs.lccr2);
934         DPRINTK("nlccr3 = 0x%08lx\n", new_regs.lccr3);
935
936         half_screen_size = var->bits_per_pixel;
937         half_screen_size = half_screen_size * var->xres * var->yres / 16;
938
939         /* Update shadow copy atomically */
940         local_irq_save(flags);
941         fbi->dbar1 = fbi->palette_dma;
942         fbi->dbar2 = fbi->screen_dma + half_screen_size;
943
944         fbi->reg_lccr0 = new_regs.lccr0;
945         fbi->reg_lccr1 = new_regs.lccr1;
946         fbi->reg_lccr2 = new_regs.lccr2;
947         fbi->reg_lccr3 = new_regs.lccr3;
948         local_irq_restore(flags);
949
950         /*
951          * Only update the registers if the controller is enabled
952          * and something has changed.
953          */
954         if ((LCCR0 != fbi->reg_lccr0)       || (LCCR1 != fbi->reg_lccr1) ||
955             (LCCR2 != fbi->reg_lccr2)       || (LCCR3 != fbi->reg_lccr3) ||
956             (DBAR1 != fbi->dbar1) || (DBAR2 != fbi->dbar2))
957                 sa1100fb_schedule_work(fbi, C_REENABLE);
958
959         return 0;
960 }
961
962 /*
963  * NOTE!  The following functions are purely helpers for set_ctrlr_state.
964  * Do not call them directly; set_ctrlr_state does the correct serialisation
965  * to ensure that things happen in the right way 100% of time time.
966  *      -- rmk
967  */
968 static inline void __sa1100fb_backlight_power(struct sa1100fb_info *fbi, int on)
969 {
970         DPRINTK("backlight o%s\n", on ? "n" : "ff");
971
972         if (sa1100fb_backlight_power)
973                 sa1100fb_backlight_power(on);
974 }
975
976 static inline void __sa1100fb_lcd_power(struct sa1100fb_info *fbi, int on)
977 {
978         DPRINTK("LCD power o%s\n", on ? "n" : "ff");
979
980         if (sa1100fb_lcd_power)
981                 sa1100fb_lcd_power(on);
982 }
983
984 static void sa1100fb_setup_gpio(struct sa1100fb_info *fbi)
985 {
986         u_int mask = 0;
987
988         /*
989          * Enable GPIO<9:2> for LCD use if:
990          *  1. Active display, or
991          *  2. Color Dual Passive display
992          *
993          * see table 11.8 on page 11-27 in the SA1100 manual
994          *   -- Erik.
995          *
996          * SA1110 spec update nr. 25 says we can and should
997          * clear LDD15 to 12 for 4 or 8bpp modes with active
998          * panels.  
999          */
1000         if ((fbi->reg_lccr0 & LCCR0_CMS) == LCCR0_Color &&
1001             (fbi->reg_lccr0 & (LCCR0_Dual|LCCR0_Act)) != 0) {
1002                 mask = GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9  | GPIO_LDD8;
1003
1004                 if (fbi->fb.var.bits_per_pixel > 8 ||
1005                     (fbi->reg_lccr0 & (LCCR0_Dual|LCCR0_Act)) == LCCR0_Dual)
1006                         mask |= GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12;
1007
1008         }
1009
1010         if (mask) {
1011                 GPDR |= mask;
1012                 GAFR |= mask;
1013         }
1014 }
1015
1016 static void sa1100fb_enable_controller(struct sa1100fb_info *fbi)
1017 {
1018         DPRINTK("Enabling LCD controller\n");
1019
1020         /*
1021          * Make sure the mode bits are present in the first palette entry
1022          */
1023         fbi->palette_cpu[0] &= 0xcfff;
1024         fbi->palette_cpu[0] |= palette_pbs(&fbi->fb.var);
1025
1026         /* Sequence from 11.7.10 */
1027         LCCR3 = fbi->reg_lccr3;
1028         LCCR2 = fbi->reg_lccr2;
1029         LCCR1 = fbi->reg_lccr1;
1030         LCCR0 = fbi->reg_lccr0 & ~LCCR0_LEN;
1031         DBAR1 = fbi->dbar1;
1032         DBAR2 = fbi->dbar2;
1033         LCCR0 |= LCCR0_LEN;
1034
1035         if (machine_is_shannon()) {
1036                 GPDR |= SHANNON_GPIO_DISP_EN;
1037                 GPSR |= SHANNON_GPIO_DISP_EN;
1038         }
1039
1040         DPRINTK("DBAR1 = 0x%08x\n", DBAR1);
1041         DPRINTK("DBAR2 = 0x%08x\n", DBAR2);
1042         DPRINTK("LCCR0 = 0x%08x\n", LCCR0);
1043         DPRINTK("LCCR1 = 0x%08x\n", LCCR1);
1044         DPRINTK("LCCR2 = 0x%08x\n", LCCR2);
1045         DPRINTK("LCCR3 = 0x%08x\n", LCCR3);
1046 }
1047
1048 static void sa1100fb_disable_controller(struct sa1100fb_info *fbi)
1049 {
1050         DECLARE_WAITQUEUE(wait, current);
1051
1052         DPRINTK("Disabling LCD controller\n");
1053
1054         if (machine_is_shannon()) {
1055                 GPCR |= SHANNON_GPIO_DISP_EN;
1056         }       
1057
1058         set_current_state(TASK_UNINTERRUPTIBLE);
1059         add_wait_queue(&fbi->ctrlr_wait, &wait);
1060
1061         LCSR = 0xffffffff;      /* Clear LCD Status Register */
1062         LCCR0 &= ~LCCR0_LDM;    /* Enable LCD Disable Done Interrupt */
1063         LCCR0 &= ~LCCR0_LEN;    /* Disable LCD Controller */
1064
1065         schedule_timeout(20 * HZ / 1000);
1066         remove_wait_queue(&fbi->ctrlr_wait, &wait);
1067 }
1068
1069 /*
1070  *  sa1100fb_handle_irq: Handle 'LCD DONE' interrupts.
1071  */
1072 static irqreturn_t sa1100fb_handle_irq(int irq, void *dev_id)
1073 {
1074         struct sa1100fb_info *fbi = dev_id;
1075         unsigned int lcsr = LCSR;
1076
1077         if (lcsr & LCSR_LDD) {
1078                 LCCR0 |= LCCR0_LDM;
1079                 wake_up(&fbi->ctrlr_wait);
1080         }
1081
1082         LCSR = lcsr;
1083         return IRQ_HANDLED;
1084 }
1085
1086 /*
1087  * This function must be called from task context only, since it will
1088  * sleep when disabling the LCD controller, or if we get two contending
1089  * processes trying to alter state.
1090  */
1091 static void set_ctrlr_state(struct sa1100fb_info *fbi, u_int state)
1092 {
1093         u_int old_state;
1094
1095         mutex_lock(&fbi->ctrlr_lock);
1096
1097         old_state = fbi->state;
1098
1099         /*
1100          * Hack around fbcon initialisation.
1101          */
1102         if (old_state == C_STARTUP && state == C_REENABLE)
1103                 state = C_ENABLE;
1104
1105         switch (state) {
1106         case C_DISABLE_CLKCHANGE:
1107                 /*
1108                  * Disable controller for clock change.  If the
1109                  * controller is already disabled, then do nothing.
1110                  */
1111                 if (old_state != C_DISABLE && old_state != C_DISABLE_PM) {
1112                         fbi->state = state;
1113                         sa1100fb_disable_controller(fbi);
1114                 }
1115                 break;
1116
1117         case C_DISABLE_PM:
1118         case C_DISABLE:
1119                 /*
1120                  * Disable controller
1121                  */
1122                 if (old_state != C_DISABLE) {
1123                         fbi->state = state;
1124
1125                         __sa1100fb_backlight_power(fbi, 0);
1126                         if (old_state != C_DISABLE_CLKCHANGE)
1127                                 sa1100fb_disable_controller(fbi);
1128                         __sa1100fb_lcd_power(fbi, 0);
1129                 }
1130                 break;
1131
1132         case C_ENABLE_CLKCHANGE:
1133                 /*
1134                  * Enable the controller after clock change.  Only
1135                  * do this if we were disabled for the clock change.
1136                  */
1137                 if (old_state == C_DISABLE_CLKCHANGE) {
1138                         fbi->state = C_ENABLE;
1139                         sa1100fb_enable_controller(fbi);
1140                 }
1141                 break;
1142
1143         case C_REENABLE:
1144                 /*
1145                  * Re-enable the controller only if it was already
1146                  * enabled.  This is so we reprogram the control
1147                  * registers.
1148                  */
1149                 if (old_state == C_ENABLE) {
1150                         sa1100fb_disable_controller(fbi);
1151                         sa1100fb_setup_gpio(fbi);
1152                         sa1100fb_enable_controller(fbi);
1153                 }
1154                 break;
1155
1156         case C_ENABLE_PM:
1157                 /*
1158                  * Re-enable the controller after PM.  This is not
1159                  * perfect - think about the case where we were doing
1160                  * a clock change, and we suspended half-way through.
1161                  */
1162                 if (old_state != C_DISABLE_PM)
1163                         break;
1164                 /* fall through */
1165
1166         case C_ENABLE:
1167                 /*
1168                  * Power up the LCD screen, enable controller, and
1169                  * turn on the backlight.
1170                  */
1171                 if (old_state != C_ENABLE) {
1172                         fbi->state = C_ENABLE;
1173                         sa1100fb_setup_gpio(fbi);
1174                         __sa1100fb_lcd_power(fbi, 1);
1175                         sa1100fb_enable_controller(fbi);
1176                         __sa1100fb_backlight_power(fbi, 1);
1177                 }
1178                 break;
1179         }
1180         mutex_unlock(&fbi->ctrlr_lock);
1181 }
1182
1183 /*
1184  * Our LCD controller task (which is called when we blank or unblank)
1185  * via keventd.
1186  */
1187 static void sa1100fb_task(struct work_struct *w)
1188 {
1189         struct sa1100fb_info *fbi = container_of(w, struct sa1100fb_info, task);
1190         u_int state = xchg(&fbi->task_state, -1);
1191
1192         set_ctrlr_state(fbi, state);
1193 }
1194
1195 #ifdef CONFIG_CPU_FREQ
1196 /*
1197  * Calculate the minimum DMA period over all displays that we own.
1198  * This, together with the SDRAM bandwidth defines the slowest CPU
1199  * frequency that can be selected.
1200  */
1201 static unsigned int sa1100fb_min_dma_period(struct sa1100fb_info *fbi)
1202 {
1203 #if 0
1204         unsigned int min_period = (unsigned int)-1;
1205         int i;
1206
1207         for (i = 0; i < MAX_NR_CONSOLES; i++) {
1208                 struct display *disp = &fb_display[i];
1209                 unsigned int period;
1210
1211                 /*
1212                  * Do we own this display?
1213                  */
1214                 if (disp->fb_info != &fbi->fb)
1215                         continue;
1216
1217                 /*
1218                  * Ok, calculate its DMA period
1219                  */
1220                 period = sa1100fb_display_dma_period(&disp->var);
1221                 if (period < min_period)
1222                         min_period = period;
1223         }
1224
1225         return min_period;
1226 #else
1227         /*
1228          * FIXME: we need to verify _all_ consoles.
1229          */
1230         return sa1100fb_display_dma_period(&fbi->fb.var);
1231 #endif
1232 }
1233
1234 /*
1235  * CPU clock speed change handler.  We need to adjust the LCD timing
1236  * parameters when the CPU clock is adjusted by the power management
1237  * subsystem.
1238  */
1239 static int
1240 sa1100fb_freq_transition(struct notifier_block *nb, unsigned long val,
1241                          void *data)
1242 {
1243         struct sa1100fb_info *fbi = TO_INF(nb, freq_transition);
1244         struct cpufreq_freqs *f = data;
1245         u_int pcd;
1246
1247         switch (val) {
1248         case CPUFREQ_PRECHANGE:
1249                 set_ctrlr_state(fbi, C_DISABLE_CLKCHANGE);
1250                 break;
1251
1252         case CPUFREQ_POSTCHANGE:
1253                 pcd = get_pcd(fbi->fb.var.pixclock, f->new);
1254                 fbi->reg_lccr3 = (fbi->reg_lccr3 & ~0xff) | LCCR3_PixClkDiv(pcd);
1255                 set_ctrlr_state(fbi, C_ENABLE_CLKCHANGE);
1256                 break;
1257         }
1258         return 0;
1259 }
1260
1261 static int
1262 sa1100fb_freq_policy(struct notifier_block *nb, unsigned long val,
1263                      void *data)
1264 {
1265         struct sa1100fb_info *fbi = TO_INF(nb, freq_policy);
1266         struct cpufreq_policy *policy = data;
1267
1268         switch (val) {
1269         case CPUFREQ_ADJUST:
1270         case CPUFREQ_INCOMPATIBLE:
1271                 printk(KERN_DEBUG "min dma period: %d ps, "
1272                         "new clock %d kHz\n", sa1100fb_min_dma_period(fbi),
1273                         policy->max);
1274                 /* todo: fill in min/max values */
1275                 break;
1276         case CPUFREQ_NOTIFY:
1277                 do {} while(0);
1278                 /* todo: panic if min/max values aren't fulfilled 
1279                  * [can't really happen unless there's a bug in the
1280                  * CPU policy verififcation process *
1281                  */
1282                 break;
1283         }
1284         return 0;
1285 }
1286 #endif
1287
1288 #ifdef CONFIG_PM
1289 /*
1290  * Power management hooks.  Note that we won't be called from IRQ context,
1291  * unlike the blank functions above, so we may sleep.
1292  */
1293 static int sa1100fb_suspend(struct platform_device *dev, pm_message_t state)
1294 {
1295         struct sa1100fb_info *fbi = platform_get_drvdata(dev);
1296
1297         set_ctrlr_state(fbi, C_DISABLE_PM);
1298         return 0;
1299 }
1300
1301 static int sa1100fb_resume(struct platform_device *dev)
1302 {
1303         struct sa1100fb_info *fbi = platform_get_drvdata(dev);
1304
1305         set_ctrlr_state(fbi, C_ENABLE_PM);
1306         return 0;
1307 }
1308 #else
1309 #define sa1100fb_suspend        NULL
1310 #define sa1100fb_resume         NULL
1311 #endif
1312
1313 /*
1314  * sa1100fb_map_video_memory():
1315  *      Allocates the DRAM memory for the frame buffer.  This buffer is  
1316  *      remapped into a non-cached, non-buffered, memory region to  
1317  *      allow palette and pixel writes to occur without flushing the 
1318  *      cache.  Once this area is remapped, all virtual memory
1319  *      access to the video memory should occur at the new region.
1320  */
1321 static int __init sa1100fb_map_video_memory(struct sa1100fb_info *fbi)
1322 {
1323         /*
1324          * We reserve one page for the palette, plus the size
1325          * of the framebuffer.
1326          */
1327         fbi->map_size = PAGE_ALIGN(fbi->fb.fix.smem_len + PAGE_SIZE);
1328         fbi->map_cpu = dma_alloc_writecombine(fbi->dev, fbi->map_size,
1329                                               &fbi->map_dma, GFP_KERNEL);
1330
1331         if (fbi->map_cpu) {
1332                 fbi->fb.screen_base = fbi->map_cpu + PAGE_SIZE;
1333                 fbi->screen_dma = fbi->map_dma + PAGE_SIZE;
1334                 /*
1335                  * FIXME: this is actually the wrong thing to place in
1336                  * smem_start.  But fbdev suffers from the problem that
1337                  * it needs an API which doesn't exist (in this case,
1338                  * dma_writecombine_mmap)
1339                  */
1340                 fbi->fb.fix.smem_start = fbi->screen_dma;
1341         }
1342
1343         return fbi->map_cpu ? 0 : -ENOMEM;
1344 }
1345
1346 /* Fake monspecs to fill in fbinfo structure */
1347 static struct fb_monspecs monspecs __initdata = {
1348         .hfmin  = 30000,
1349         .hfmax  = 70000,
1350         .vfmin  = 50,
1351         .vfmax  = 65,
1352 };
1353
1354
1355 static struct sa1100fb_info * __init sa1100fb_init_fbinfo(struct device *dev)
1356 {
1357         struct sa1100fb_mach_info *inf;
1358         struct sa1100fb_info *fbi;
1359
1360         fbi = kmalloc(sizeof(struct sa1100fb_info) + sizeof(u32) * 16,
1361                       GFP_KERNEL);
1362         if (!fbi)
1363                 return NULL;
1364
1365         memset(fbi, 0, sizeof(struct sa1100fb_info));
1366         fbi->dev = dev;
1367
1368         strcpy(fbi->fb.fix.id, SA1100_NAME);
1369
1370         fbi->fb.fix.type        = FB_TYPE_PACKED_PIXELS;
1371         fbi->fb.fix.type_aux    = 0;
1372         fbi->fb.fix.xpanstep    = 0;
1373         fbi->fb.fix.ypanstep    = 0;
1374         fbi->fb.fix.ywrapstep   = 0;
1375         fbi->fb.fix.accel       = FB_ACCEL_NONE;
1376
1377         fbi->fb.var.nonstd      = 0;
1378         fbi->fb.var.activate    = FB_ACTIVATE_NOW;
1379         fbi->fb.var.height      = -1;
1380         fbi->fb.var.width       = -1;
1381         fbi->fb.var.accel_flags = 0;
1382         fbi->fb.var.vmode       = FB_VMODE_NONINTERLACED;
1383
1384         fbi->fb.fbops           = &sa1100fb_ops;
1385         fbi->fb.flags           = FBINFO_DEFAULT;
1386         fbi->fb.monspecs        = monspecs;
1387         fbi->fb.pseudo_palette  = (fbi + 1);
1388
1389         fbi->rgb[RGB_4]         = &rgb_4;
1390         fbi->rgb[RGB_8]         = &rgb_8;
1391         fbi->rgb[RGB_16]        = &def_rgb_16;
1392
1393         inf = sa1100fb_get_machine_info(fbi);
1394
1395         /*
1396          * People just don't seem to get this.  We don't support
1397          * anything but correct entries now, so panic if someone
1398          * does something stupid.
1399          */
1400         if (inf->lccr3 & (LCCR3_VrtSnchL|LCCR3_HorSnchL|0xff) ||
1401             inf->pixclock == 0)
1402                 panic("sa1100fb error: invalid LCCR3 fields set or zero "
1403                         "pixclock.");
1404
1405         fbi->max_xres                   = inf->xres;
1406         fbi->fb.var.xres                = inf->xres;
1407         fbi->fb.var.xres_virtual        = inf->xres;
1408         fbi->max_yres                   = inf->yres;
1409         fbi->fb.var.yres                = inf->yres;
1410         fbi->fb.var.yres_virtual        = inf->yres;
1411         fbi->max_bpp                    = inf->bpp;
1412         fbi->fb.var.bits_per_pixel      = inf->bpp;
1413         fbi->fb.var.pixclock            = inf->pixclock;
1414         fbi->fb.var.hsync_len           = inf->hsync_len;
1415         fbi->fb.var.left_margin         = inf->left_margin;
1416         fbi->fb.var.right_margin        = inf->right_margin;
1417         fbi->fb.var.vsync_len           = inf->vsync_len;
1418         fbi->fb.var.upper_margin        = inf->upper_margin;
1419         fbi->fb.var.lower_margin        = inf->lower_margin;
1420         fbi->fb.var.sync                = inf->sync;
1421         fbi->fb.var.grayscale           = inf->cmap_greyscale;
1422         fbi->cmap_inverse               = inf->cmap_inverse;
1423         fbi->cmap_static                = inf->cmap_static;
1424         fbi->lccr0                      = inf->lccr0;
1425         fbi->lccr3                      = inf->lccr3;
1426         fbi->state                      = C_STARTUP;
1427         fbi->task_state                 = (u_char)-1;
1428         fbi->fb.fix.smem_len            = fbi->max_xres * fbi->max_yres *
1429                                           fbi->max_bpp / 8;
1430
1431         init_waitqueue_head(&fbi->ctrlr_wait);
1432         INIT_WORK(&fbi->task, sa1100fb_task);
1433         mutex_init(&fbi->ctrlr_lock);
1434
1435         return fbi;
1436 }
1437
1438 static int __devinit sa1100fb_probe(struct platform_device *pdev)
1439 {
1440         struct sa1100fb_info *fbi;
1441         int ret, irq;
1442
1443         irq = platform_get_irq(pdev, 0);
1444         if (irq < 0)
1445                 return -EINVAL;
1446
1447         if (!request_mem_region(0xb0100000, 0x10000, "LCD"))
1448                 return -EBUSY;
1449
1450         fbi = sa1100fb_init_fbinfo(&pdev->dev);
1451         ret = -ENOMEM;
1452         if (!fbi)
1453                 goto failed;
1454
1455         /* Initialize video memory */
1456         ret = sa1100fb_map_video_memory(fbi);
1457         if (ret)
1458                 goto failed;
1459
1460         ret = request_irq(irq, sa1100fb_handle_irq, IRQF_DISABLED,
1461                           "LCD", fbi);
1462         if (ret) {
1463                 printk(KERN_ERR "sa1100fb: request_irq failed: %d\n", ret);
1464                 goto failed;
1465         }
1466
1467 #ifdef ASSABET_PAL_VIDEO
1468         if (machine_is_assabet())
1469                 ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
1470 #endif
1471
1472         /*
1473          * This makes sure that our colour bitfield
1474          * descriptors are correctly initialised.
1475          */
1476         sa1100fb_check_var(&fbi->fb.var, &fbi->fb);
1477
1478         platform_set_drvdata(pdev, fbi);
1479
1480         ret = register_framebuffer(&fbi->fb);
1481         if (ret < 0)
1482                 goto err_free_irq;
1483
1484 #ifdef CONFIG_CPU_FREQ
1485         fbi->freq_transition.notifier_call = sa1100fb_freq_transition;
1486         fbi->freq_policy.notifier_call = sa1100fb_freq_policy;
1487         cpufreq_register_notifier(&fbi->freq_transition, CPUFREQ_TRANSITION_NOTIFIER);
1488         cpufreq_register_notifier(&fbi->freq_policy, CPUFREQ_POLICY_NOTIFIER);
1489 #endif
1490
1491         /* This driver cannot be unloaded at the moment */
1492         return 0;
1493
1494  err_free_irq:
1495         free_irq(irq, fbi);
1496  failed:
1497         platform_set_drvdata(pdev, NULL);
1498         kfree(fbi);
1499         release_mem_region(0xb0100000, 0x10000);
1500         return ret;
1501 }
1502
1503 static struct platform_driver sa1100fb_driver = {
1504         .probe          = sa1100fb_probe,
1505         .suspend        = sa1100fb_suspend,
1506         .resume         = sa1100fb_resume,
1507         .driver         = {
1508                 .name   = "sa11x0-fb",
1509         },
1510 };
1511
1512 int __init sa1100fb_init(void)
1513 {
1514         if (fb_get_options("sa1100fb", NULL))
1515                 return -ENODEV;
1516
1517         return platform_driver_register(&sa1100fb_driver);
1518 }
1519
1520 int __init sa1100fb_setup(char *options)
1521 {
1522 #if 0
1523         char *this_opt;
1524
1525         if (!options || !*options)
1526                 return 0;
1527
1528         while ((this_opt = strsep(&options, ",")) != NULL) {
1529
1530                 if (!strncmp(this_opt, "bpp:", 4))
1531                         current_par.max_bpp =
1532                             simple_strtoul(this_opt + 4, NULL, 0);
1533
1534                 if (!strncmp(this_opt, "lccr0:", 6))
1535                         lcd_shadow.lccr0 =
1536                             simple_strtoul(this_opt + 6, NULL, 0);
1537                 if (!strncmp(this_opt, "lccr1:", 6)) {
1538                         lcd_shadow.lccr1 =
1539                             simple_strtoul(this_opt + 6, NULL, 0);
1540                         current_par.max_xres =
1541                             (lcd_shadow.lccr1 & 0x3ff) + 16;
1542                 }
1543                 if (!strncmp(this_opt, "lccr2:", 6)) {
1544                         lcd_shadow.lccr2 =
1545                             simple_strtoul(this_opt + 6, NULL, 0);
1546                         current_par.max_yres =
1547                             (lcd_shadow.
1548                              lccr0 & LCCR0_SDS) ? ((lcd_shadow.
1549                                                     lccr2 & 0x3ff) +
1550                                                    1) *
1551                             2 : ((lcd_shadow.lccr2 & 0x3ff) + 1);
1552                 }
1553                 if (!strncmp(this_opt, "lccr3:", 6))
1554                         lcd_shadow.lccr3 =
1555                             simple_strtoul(this_opt + 6, NULL, 0);
1556         }
1557 #endif
1558         return 0;
1559 }
1560
1561 module_init(sa1100fb_init);
1562 MODULE_DESCRIPTION("StrongARM-1100/1110 framebuffer driver");
1563 MODULE_LICENSE("GPL");