video: s3c-fb: fix checkpatch errors and warning
[linux-2.6.git] / drivers / video / s3c-fb.c
1 /* linux/drivers/video/s3c-fb.c
2  *
3  * Copyright 2008 Openmoko Inc.
4  * Copyright 2008-2010 Simtec Electronics
5  *      Ben Dooks <ben@simtec.co.uk>
6  *      http://armlinux.simtec.co.uk/
7  *
8  * Samsung SoC Framebuffer driver
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software FoundatIon.
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/slab.h>
20 #include <linux/init.h>
21 #include <linux/clk.h>
22 #include <linux/fb.h>
23 #include <linux/io.h>
24 #include <linux/uaccess.h>
25 #include <linux/interrupt.h>
26 #include <linux/pm_runtime.h>
27
28 #include <mach/map.h>
29 #include <plat/regs-fb-v4.h>
30 #include <plat/fb.h>
31
32 /* This driver will export a number of framebuffer interfaces depending
33  * on the configuration passed in via the platform data. Each fb instance
34  * maps to a hardware window. Currently there is no support for runtime
35  * setting of the alpha-blending functions that each window has, so only
36  * window 0 is actually useful.
37  *
38  * Window 0 is treated specially, it is used for the basis of the LCD
39  * output timings and as the control for the output power-down state.
40 */
41
42 /* note, the previous use of <mach/regs-fb.h> to get platform specific data
43  * has been replaced by using the platform device name to pick the correct
44  * configuration data for the system.
45 */
46
47 #ifdef CONFIG_FB_S3C_DEBUG_REGWRITE
48 #undef writel
49 #define writel(v, r) do { \
50         printk(KERN_DEBUG "%s: %08x => %p\n", __func__, (unsigned int)v, r); \
51         __raw_writel(v, r); } while (0)
52 #endif /* FB_S3C_DEBUG_REGWRITE */
53
54 /* irq_flags bits */
55 #define S3C_FB_VSYNC_IRQ_EN     0
56
57 #define VSYNC_TIMEOUT_MSEC 50
58
59 struct s3c_fb;
60
61 #define VALID_BPP(x) (1 << ((x) - 1))
62
63 #define OSD_BASE(win, variant) ((variant).osd + ((win) * (variant).osd_stride))
64 #define VIDOSD_A(win, variant) (OSD_BASE(win, variant) + 0x00)
65 #define VIDOSD_B(win, variant) (OSD_BASE(win, variant) + 0x04)
66 #define VIDOSD_C(win, variant) (OSD_BASE(win, variant) + 0x08)
67 #define VIDOSD_D(win, variant) (OSD_BASE(win, variant) + 0x0C)
68
69 /**
70  * struct s3c_fb_variant - fb variant information
71  * @is_2443: Set if S3C2443/S3C2416 style hardware.
72  * @nr_windows: The number of windows.
73  * @vidtcon: The base for the VIDTCONx registers
74  * @wincon: The base for the WINxCON registers.
75  * @winmap: The base for the WINxMAP registers.
76  * @keycon: The abse for the WxKEYCON registers.
77  * @buf_start: Offset of buffer start registers.
78  * @buf_size: Offset of buffer size registers.
79  * @buf_end: Offset of buffer end registers.
80  * @osd: The base for the OSD registers.
81  * @palette: Address of palette memory, or 0 if none.
82  * @has_prtcon: Set if has PRTCON register.
83  * @has_shadowcon: Set if has SHADOWCON register.
84  */
85 struct s3c_fb_variant {
86         unsigned int    is_2443:1;
87         unsigned short  nr_windows;
88         unsigned short  vidtcon;
89         unsigned short  wincon;
90         unsigned short  winmap;
91         unsigned short  keycon;
92         unsigned short  buf_start;
93         unsigned short  buf_end;
94         unsigned short  buf_size;
95         unsigned short  osd;
96         unsigned short  osd_stride;
97         unsigned short  palette[S3C_FB_MAX_WIN];
98
99         unsigned int    has_prtcon:1;
100         unsigned int    has_shadowcon:1;
101 };
102
103 /**
104  * struct s3c_fb_win_variant
105  * @has_osd_c: Set if has OSD C register.
106  * @has_osd_d: Set if has OSD D register.
107  * @has_osd_alpha: Set if can change alpha transparency for a window.
108  * @palette_sz: Size of palette in entries.
109  * @palette_16bpp: Set if palette is 16bits wide.
110  * @osd_size_off: If != 0, supports setting up OSD for a window; the appropriate
111  *                register is located at the given offset from OSD_BASE.
112  * @valid_bpp: 1 bit per BPP setting to show valid bits-per-pixel.
113  *
114  * valid_bpp bit x is set if (x+1)BPP is supported.
115  */
116 struct s3c_fb_win_variant {
117         unsigned int    has_osd_c:1;
118         unsigned int    has_osd_d:1;
119         unsigned int    has_osd_alpha:1;
120         unsigned int    palette_16bpp:1;
121         unsigned short  osd_size_off;
122         unsigned short  palette_sz;
123         u32             valid_bpp;
124 };
125
126 /**
127  * struct s3c_fb_driverdata - per-device type driver data for init time.
128  * @variant: The variant information for this driver.
129  * @win: The window information for each window.
130  */
131 struct s3c_fb_driverdata {
132         struct s3c_fb_variant   variant;
133         struct s3c_fb_win_variant *win[S3C_FB_MAX_WIN];
134 };
135
136 /**
137  * struct s3c_fb_palette - palette information
138  * @r: Red bitfield.
139  * @g: Green bitfield.
140  * @b: Blue bitfield.
141  * @a: Alpha bitfield.
142  */
143 struct s3c_fb_palette {
144         struct fb_bitfield      r;
145         struct fb_bitfield      g;
146         struct fb_bitfield      b;
147         struct fb_bitfield      a;
148 };
149
150 /**
151  * struct s3c_fb_win - per window private data for each framebuffer.
152  * @windata: The platform data supplied for the window configuration.
153  * @parent: The hardware that this window is part of.
154  * @fbinfo: Pointer pack to the framebuffer info for this window.
155  * @varint: The variant information for this window.
156  * @palette_buffer: Buffer/cache to hold palette entries.
157  * @pseudo_palette: For use in TRUECOLOUR modes for entries 0..15/
158  * @index: The window number of this window.
159  * @palette: The bitfields for changing r/g/b into a hardware palette entry.
160  */
161 struct s3c_fb_win {
162         struct s3c_fb_pd_win    *windata;
163         struct s3c_fb           *parent;
164         struct fb_info          *fbinfo;
165         struct s3c_fb_palette    palette;
166         struct s3c_fb_win_variant variant;
167
168         u32                     *palette_buffer;
169         u32                      pseudo_palette[16];
170         unsigned int             index;
171 };
172
173 /**
174  * struct s3c_fb_vsync - vsync information
175  * @wait:       a queue for processes waiting for vsync
176  * @count:      vsync interrupt count
177  */
178 struct s3c_fb_vsync {
179         wait_queue_head_t       wait;
180         unsigned int            count;
181 };
182
183 /**
184  * struct s3c_fb - overall hardware state of the hardware
185  * @dev: The device that we bound to, for printing, etc.
186  * @regs_res: The resource we claimed for the IO registers.
187  * @bus_clk: The clk (hclk) feeding our interface and possibly pixclk.
188  * @regs: The mapped hardware registers.
189  * @variant: Variant information for this hardware.
190  * @enabled: A bitmask of enabled hardware windows.
191  * @pdata: The platform configuration data passed with the device.
192  * @windows: The hardware windows that have been claimed.
193  * @irq_no: IRQ line number
194  * @irq_flags: irq flags
195  * @vsync_info: VSYNC-related information (count, queues...)
196  */
197 struct s3c_fb {
198         struct device           *dev;
199         struct resource         *regs_res;
200         struct clk              *bus_clk;
201         void __iomem            *regs;
202         struct s3c_fb_variant    variant;
203
204         unsigned char            enabled;
205
206         struct s3c_fb_platdata  *pdata;
207         struct s3c_fb_win       *windows[S3C_FB_MAX_WIN];
208
209         int                      irq_no;
210         unsigned long            irq_flags;
211         struct s3c_fb_vsync      vsync_info;
212 };
213
214 /**
215  * s3c_fb_validate_win_bpp - validate the bits-per-pixel for this mode.
216  * @win: The device window.
217  * @bpp: The bit depth.
218  */
219 static bool s3c_fb_validate_win_bpp(struct s3c_fb_win *win, unsigned int bpp)
220 {
221         return win->variant.valid_bpp & VALID_BPP(bpp);
222 }
223
224 /**
225  * s3c_fb_check_var() - framebuffer layer request to verify a given mode.
226  * @var: The screen information to verify.
227  * @info: The framebuffer device.
228  *
229  * Framebuffer layer call to verify the given information and allow us to
230  * update various information depending on the hardware capabilities.
231  */
232 static int s3c_fb_check_var(struct fb_var_screeninfo *var,
233                             struct fb_info *info)
234 {
235         struct s3c_fb_win *win = info->par;
236         struct s3c_fb_pd_win *windata = win->windata;
237         struct s3c_fb *sfb = win->parent;
238
239         dev_dbg(sfb->dev, "checking parameters\n");
240
241         var->xres_virtual = max((unsigned int)windata->virtual_x, var->xres);
242         var->yres_virtual = max((unsigned int)windata->virtual_y, var->yres);
243
244         if (!s3c_fb_validate_win_bpp(win, var->bits_per_pixel)) {
245                 dev_dbg(sfb->dev, "win %d: unsupported bpp %d\n",
246                         win->index, var->bits_per_pixel);
247                 return -EINVAL;
248         }
249
250         /* always ensure these are zero, for drop through cases below */
251         var->transp.offset = 0;
252         var->transp.length = 0;
253
254         switch (var->bits_per_pixel) {
255         case 1:
256         case 2:
257         case 4:
258         case 8:
259                 if (sfb->variant.palette[win->index] != 0) {
260                         /* non palletised, A:1,R:2,G:3,B:2 mode */
261                         var->red.offset         = 4;
262                         var->green.offset       = 2;
263                         var->blue.offset        = 0;
264                         var->red.length         = 5;
265                         var->green.length       = 3;
266                         var->blue.length        = 2;
267                         var->transp.offset      = 7;
268                         var->transp.length      = 1;
269                 } else {
270                         var->red.offset = 0;
271                         var->red.length = var->bits_per_pixel;
272                         var->green      = var->red;
273                         var->blue       = var->red;
274                 }
275                 break;
276
277         case 19:
278                 /* 666 with one bit alpha/transparency */
279                 var->transp.offset      = 18;
280                 var->transp.length      = 1;
281         case 18:
282                 var->bits_per_pixel     = 32;
283
284                 /* 666 format */
285                 var->red.offset         = 12;
286                 var->green.offset       = 6;
287                 var->blue.offset        = 0;
288                 var->red.length         = 6;
289                 var->green.length       = 6;
290                 var->blue.length        = 6;
291                 break;
292
293         case 16:
294                 /* 16 bpp, 565 format */
295                 var->red.offset         = 11;
296                 var->green.offset       = 5;
297                 var->blue.offset        = 0;
298                 var->red.length         = 5;
299                 var->green.length       = 6;
300                 var->blue.length        = 5;
301                 break;
302
303         case 28:
304         case 25:
305                 var->transp.length      = var->bits_per_pixel - 24;
306                 var->transp.offset      = 24;
307                 /* drop through */
308         case 24:
309                 /* our 24bpp is unpacked, so 32bpp */
310                 var->bits_per_pixel     = 32;
311         case 32:
312                 var->red.offset         = 16;
313                 var->red.length         = 8;
314                 var->green.offset       = 8;
315                 var->green.length       = 8;
316                 var->blue.offset        = 0;
317                 var->blue.length        = 8;
318                 break;
319
320         default:
321                 dev_err(sfb->dev, "invalid bpp\n");
322         }
323
324         dev_dbg(sfb->dev, "%s: verified parameters\n", __func__);
325         return 0;
326 }
327
328 /**
329  * s3c_fb_calc_pixclk() - calculate the divider to create the pixel clock.
330  * @sfb: The hardware state.
331  * @pixclock: The pixel clock wanted, in picoseconds.
332  *
333  * Given the specified pixel clock, work out the necessary divider to get
334  * close to the output frequency.
335  */
336 static int s3c_fb_calc_pixclk(struct s3c_fb *sfb, unsigned int pixclk)
337 {
338         unsigned long clk = clk_get_rate(sfb->bus_clk);
339         unsigned long long tmp;
340         unsigned int result;
341
342         tmp = (unsigned long long)clk;
343         tmp *= pixclk;
344
345         do_div(tmp, 1000000000UL);
346         result = (unsigned int)tmp / 1000;
347
348         dev_dbg(sfb->dev, "pixclk=%u, clk=%lu, div=%d (%lu)\n",
349                 pixclk, clk, result, clk / result);
350
351         return result;
352 }
353
354 /**
355  * s3c_fb_align_word() - align pixel count to word boundary
356  * @bpp: The number of bits per pixel
357  * @pix: The value to be aligned.
358  *
359  * Align the given pixel count so that it will start on an 32bit word
360  * boundary.
361  */
362 static int s3c_fb_align_word(unsigned int bpp, unsigned int pix)
363 {
364         int pix_per_word;
365
366         if (bpp > 16)
367                 return pix;
368
369         pix_per_word = (8 * 32) / bpp;
370         return ALIGN(pix, pix_per_word);
371 }
372
373 /**
374  * vidosd_set_size() - set OSD size for a window
375  *
376  * @win: the window to set OSD size for
377  * @size: OSD size register value
378  */
379 static void vidosd_set_size(struct s3c_fb_win *win, u32 size)
380 {
381         struct s3c_fb *sfb = win->parent;
382
383         /* OSD can be set up if osd_size_off != 0 for this window */
384         if (win->variant.osd_size_off)
385                 writel(size, sfb->regs + OSD_BASE(win->index, sfb->variant)
386                                 + win->variant.osd_size_off);
387 }
388
389 /**
390  * vidosd_set_alpha() - set alpha transparency for a window
391  *
392  * @win: the window to set OSD size for
393  * @alpha: alpha register value
394  */
395 static void vidosd_set_alpha(struct s3c_fb_win *win, u32 alpha)
396 {
397         struct s3c_fb *sfb = win->parent;
398
399         if (win->variant.has_osd_alpha)
400                 writel(alpha, sfb->regs + VIDOSD_C(win->index, sfb->variant));
401 }
402
403 /**
404  * shadow_protect_win() - disable updating values from shadow registers at vsync
405  *
406  * @win: window to protect registers for
407  * @protect: 1 to protect (disable updates)
408  */
409 static void shadow_protect_win(struct s3c_fb_win *win, bool protect)
410 {
411         struct s3c_fb *sfb = win->parent;
412         u32 reg;
413
414         if (protect) {
415                 if (sfb->variant.has_prtcon) {
416                         writel(PRTCON_PROTECT, sfb->regs + PRTCON);
417                 } else if (sfb->variant.has_shadowcon) {
418                         reg = readl(sfb->regs + SHADOWCON);
419                         writel(reg | SHADOWCON_WINx_PROTECT(win->index),
420                                 sfb->regs + SHADOWCON);
421                 }
422         } else {
423                 if (sfb->variant.has_prtcon) {
424                         writel(0, sfb->regs + PRTCON);
425                 } else if (sfb->variant.has_shadowcon) {
426                         reg = readl(sfb->regs + SHADOWCON);
427                         writel(reg & ~SHADOWCON_WINx_PROTECT(win->index),
428                                 sfb->regs + SHADOWCON);
429                 }
430         }
431 }
432
433 /**
434  * s3c_fb_set_par() - framebuffer request to set new framebuffer state.
435  * @info: The framebuffer to change.
436  *
437  * Framebuffer layer request to set a new mode for the specified framebuffer
438  */
439 static int s3c_fb_set_par(struct fb_info *info)
440 {
441         struct fb_var_screeninfo *var = &info->var;
442         struct s3c_fb_win *win = info->par;
443         struct s3c_fb *sfb = win->parent;
444         void __iomem *regs = sfb->regs;
445         void __iomem *buf = regs;
446         int win_no = win->index;
447         u32 alpha = 0;
448         u32 data;
449         u32 pagewidth;
450         int clkdiv;
451
452         dev_dbg(sfb->dev, "setting framebuffer parameters\n");
453
454         shadow_protect_win(win, 1);
455
456         switch (var->bits_per_pixel) {
457         case 32:
458         case 24:
459         case 16:
460         case 12:
461                 info->fix.visual = FB_VISUAL_TRUECOLOR;
462                 break;
463         case 8:
464                 if (win->variant.palette_sz >= 256)
465                         info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
466                 else
467                         info->fix.visual = FB_VISUAL_TRUECOLOR;
468                 break;
469         case 1:
470                 info->fix.visual = FB_VISUAL_MONO01;
471                 break;
472         default:
473                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
474                 break;
475         }
476
477         info->fix.line_length = (var->xres_virtual * var->bits_per_pixel) / 8;
478
479         info->fix.xpanstep = info->var.xres_virtual > info->var.xres ? 1 : 0;
480         info->fix.ypanstep = info->var.yres_virtual > info->var.yres ? 1 : 0;
481
482         /* disable the window whilst we update it */
483         writel(0, regs + WINCON(win_no));
484
485         /* use platform specified window as the basis for the lcd timings */
486
487         if (win_no == sfb->pdata->default_win) {
488                 clkdiv = s3c_fb_calc_pixclk(sfb, var->pixclock);
489
490                 data = sfb->pdata->vidcon0;
491                 data &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
492
493                 if (clkdiv > 1)
494                         data |= VIDCON0_CLKVAL_F(clkdiv-1) | VIDCON0_CLKDIR;
495                 else
496                         data &= ~VIDCON0_CLKDIR;        /* 1:1 clock */
497
498                 /* write the timing data to the panel */
499
500                 if (sfb->variant.is_2443)
501                         data |= (1 << 5);
502
503                 data |= VIDCON0_ENVID | VIDCON0_ENVID_F;
504                 writel(data, regs + VIDCON0);
505
506                 data = VIDTCON0_VBPD(var->upper_margin - 1) |
507                        VIDTCON0_VFPD(var->lower_margin - 1) |
508                        VIDTCON0_VSPW(var->vsync_len - 1);
509
510                 writel(data, regs + sfb->variant.vidtcon);
511
512                 data = VIDTCON1_HBPD(var->left_margin - 1) |
513                        VIDTCON1_HFPD(var->right_margin - 1) |
514                        VIDTCON1_HSPW(var->hsync_len - 1);
515
516                 /* VIDTCON1 */
517                 writel(data, regs + sfb->variant.vidtcon + 4);
518
519                 data = VIDTCON2_LINEVAL(var->yres - 1) |
520                        VIDTCON2_HOZVAL(var->xres - 1);
521                 writel(data, regs + sfb->variant.vidtcon + 8);
522         }
523
524         /* write the buffer address */
525
526         /* start and end registers stride is 8 */
527         buf = regs + win_no * 8;
528
529         writel(info->fix.smem_start, buf + sfb->variant.buf_start);
530
531         data = info->fix.smem_start + info->fix.line_length * var->yres;
532         writel(data, buf + sfb->variant.buf_end);
533
534         pagewidth = (var->xres * var->bits_per_pixel) >> 3;
535         data = VIDW_BUF_SIZE_OFFSET(info->fix.line_length - pagewidth) |
536                VIDW_BUF_SIZE_PAGEWIDTH(pagewidth);
537         writel(data, regs + sfb->variant.buf_size + (win_no * 4));
538
539         /* write 'OSD' registers to control position of framebuffer */
540
541         data = VIDOSDxA_TOPLEFT_X(0) | VIDOSDxA_TOPLEFT_Y(0);
542         writel(data, regs + VIDOSD_A(win_no, sfb->variant));
543
544         data = VIDOSDxB_BOTRIGHT_X(s3c_fb_align_word(var->bits_per_pixel,
545                                                      var->xres - 1)) |
546                VIDOSDxB_BOTRIGHT_Y(var->yres - 1);
547
548         writel(data, regs + VIDOSD_B(win_no, sfb->variant));
549
550         data = var->xres * var->yres;
551
552         alpha = VIDISD14C_ALPHA1_R(0xf) |
553                 VIDISD14C_ALPHA1_G(0xf) |
554                 VIDISD14C_ALPHA1_B(0xf);
555
556         vidosd_set_alpha(win, alpha);
557         vidosd_set_size(win, data);
558
559         data = WINCONx_ENWIN;
560
561         /* note, since we have to round up the bits-per-pixel, we end up
562          * relying on the bitfield information for r/g/b/a to work out
563          * exactly which mode of operation is intended. */
564
565         switch (var->bits_per_pixel) {
566         case 1:
567                 data |= WINCON0_BPPMODE_1BPP;
568                 data |= WINCONx_BITSWP;
569                 data |= WINCONx_BURSTLEN_4WORD;
570                 break;
571         case 2:
572                 data |= WINCON0_BPPMODE_2BPP;
573                 data |= WINCONx_BITSWP;
574                 data |= WINCONx_BURSTLEN_8WORD;
575                 break;
576         case 4:
577                 data |= WINCON0_BPPMODE_4BPP;
578                 data |= WINCONx_BITSWP;
579                 data |= WINCONx_BURSTLEN_8WORD;
580                 break;
581         case 8:
582                 if (var->transp.length != 0)
583                         data |= WINCON1_BPPMODE_8BPP_1232;
584                 else
585                         data |= WINCON0_BPPMODE_8BPP_PALETTE;
586                 data |= WINCONx_BURSTLEN_8WORD;
587                 data |= WINCONx_BYTSWP;
588                 break;
589         case 16:
590                 if (var->transp.length != 0)
591                         data |= WINCON1_BPPMODE_16BPP_A1555;
592                 else
593                         data |= WINCON0_BPPMODE_16BPP_565;
594                 data |= WINCONx_HAWSWP;
595                 data |= WINCONx_BURSTLEN_16WORD;
596                 break;
597         case 24:
598         case 32:
599                 if (var->red.length == 6) {
600                         if (var->transp.length != 0)
601                                 data |= WINCON1_BPPMODE_19BPP_A1666;
602                         else
603                                 data |= WINCON1_BPPMODE_18BPP_666;
604                 } else if (var->transp.length == 1)
605                         data |= WINCON1_BPPMODE_25BPP_A1888
606                                 | WINCON1_BLD_PIX;
607                 else if (var->transp.length == 4)
608                         data |= WINCON1_BPPMODE_28BPP_A4888
609                                 | WINCON1_BLD_PIX | WINCON1_ALPHA_SEL;
610                 else
611                         data |= WINCON0_BPPMODE_24BPP_888;
612
613                 data |= WINCONx_WSWP;
614                 data |= WINCONx_BURSTLEN_16WORD;
615                 break;
616         }
617
618         /* Enable the colour keying for the window below this one */
619         if (win_no > 0) {
620                 u32 keycon0_data = 0, keycon1_data = 0;
621                 void __iomem *keycon = regs + sfb->variant.keycon;
622
623                 keycon0_data = ~(WxKEYCON0_KEYBL_EN |
624                                 WxKEYCON0_KEYEN_F |
625                                 WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0);
626
627                 keycon1_data = WxKEYCON1_COLVAL(0xffffff);
628
629                 keycon += (win_no - 1) * 8;
630
631                 writel(keycon0_data, keycon + WKEYCON0);
632                 writel(keycon1_data, keycon + WKEYCON1);
633         }
634
635         writel(data, regs + sfb->variant.wincon + (win_no * 4));
636         writel(0x0, regs + sfb->variant.winmap + (win_no * 4));
637
638         /* Enable DMA channel for this window */
639         if (sfb->variant.has_shadowcon) {
640                 data = readl(sfb->regs + SHADOWCON);
641                 data |= SHADOWCON_CHx_ENABLE(win_no);
642                 writel(data, sfb->regs + SHADOWCON);
643         }
644
645         shadow_protect_win(win, 0);
646
647         return 0;
648 }
649
650 /**
651  * s3c_fb_update_palette() - set or schedule a palette update.
652  * @sfb: The hardware information.
653  * @win: The window being updated.
654  * @reg: The palette index being changed.
655  * @value: The computed palette value.
656  *
657  * Change the value of a palette register, either by directly writing to
658  * the palette (this requires the palette RAM to be disconnected from the
659  * hardware whilst this is in progress) or schedule the update for later.
660  *
661  * At the moment, since we have no VSYNC interrupt support, we simply set
662  * the palette entry directly.
663  */
664 static void s3c_fb_update_palette(struct s3c_fb *sfb,
665                                   struct s3c_fb_win *win,
666                                   unsigned int reg,
667                                   u32 value)
668 {
669         void __iomem *palreg;
670         u32 palcon;
671
672         palreg = sfb->regs + sfb->variant.palette[win->index];
673
674         dev_dbg(sfb->dev, "%s: win %d, reg %d (%p): %08x\n",
675                 __func__, win->index, reg, palreg, value);
676
677         win->palette_buffer[reg] = value;
678
679         palcon = readl(sfb->regs + WPALCON);
680         writel(palcon | WPALCON_PAL_UPDATE, sfb->regs + WPALCON);
681
682         if (win->variant.palette_16bpp)
683                 writew(value, palreg + (reg * 2));
684         else
685                 writel(value, palreg + (reg * 4));
686
687         writel(palcon, sfb->regs + WPALCON);
688 }
689
690 static inline unsigned int chan_to_field(unsigned int chan,
691                                          struct fb_bitfield *bf)
692 {
693         chan &= 0xffff;
694         chan >>= 16 - bf->length;
695         return chan << bf->offset;
696 }
697
698 /**
699  * s3c_fb_setcolreg() - framebuffer layer request to change palette.
700  * @regno: The palette index to change.
701  * @red: The red field for the palette data.
702  * @green: The green field for the palette data.
703  * @blue: The blue field for the palette data.
704  * @trans: The transparency (alpha) field for the palette data.
705  * @info: The framebuffer being changed.
706  */
707 static int s3c_fb_setcolreg(unsigned regno,
708                             unsigned red, unsigned green, unsigned blue,
709                             unsigned transp, struct fb_info *info)
710 {
711         struct s3c_fb_win *win = info->par;
712         struct s3c_fb *sfb = win->parent;
713         unsigned int val;
714
715         dev_dbg(sfb->dev, "%s: win %d: %d => rgb=%d/%d/%d\n",
716                 __func__, win->index, regno, red, green, blue);
717
718         switch (info->fix.visual) {
719         case FB_VISUAL_TRUECOLOR:
720                 /* true-colour, use pseudo-palette */
721
722                 if (regno < 16) {
723                         u32 *pal = info->pseudo_palette;
724
725                         val  = chan_to_field(red,   &info->var.red);
726                         val |= chan_to_field(green, &info->var.green);
727                         val |= chan_to_field(blue,  &info->var.blue);
728
729                         pal[regno] = val;
730                 }
731                 break;
732
733         case FB_VISUAL_PSEUDOCOLOR:
734                 if (regno < win->variant.palette_sz) {
735                         val  = chan_to_field(red, &win->palette.r);
736                         val |= chan_to_field(green, &win->palette.g);
737                         val |= chan_to_field(blue, &win->palette.b);
738
739                         s3c_fb_update_palette(sfb, win, regno, val);
740                 }
741
742                 break;
743
744         default:
745                 return 1;       /* unknown type */
746         }
747
748         return 0;
749 }
750
751 /**
752  * s3c_fb_enable() - Set the state of the main LCD output
753  * @sfb: The main framebuffer state.
754  * @enable: The state to set.
755  */
756 static void s3c_fb_enable(struct s3c_fb *sfb, int enable)
757 {
758         u32 vidcon0 = readl(sfb->regs + VIDCON0);
759
760         if (enable)
761                 vidcon0 |= VIDCON0_ENVID | VIDCON0_ENVID_F;
762         else {
763                 /* see the note in the framebuffer datasheet about
764                  * why you cannot take both of these bits down at the
765                  * same time. */
766
767                 if (!(vidcon0 & VIDCON0_ENVID))
768                         return;
769
770                 vidcon0 |= VIDCON0_ENVID;
771                 vidcon0 &= ~VIDCON0_ENVID_F;
772         }
773
774         writel(vidcon0, sfb->regs + VIDCON0);
775 }
776
777 /**
778  * s3c_fb_blank() - blank or unblank the given window
779  * @blank_mode: The blank state from FB_BLANK_*
780  * @info: The framebuffer to blank.
781  *
782  * Framebuffer layer request to change the power state.
783  */
784 static int s3c_fb_blank(int blank_mode, struct fb_info *info)
785 {
786         struct s3c_fb_win *win = info->par;
787         struct s3c_fb *sfb = win->parent;
788         unsigned int index = win->index;
789         u32 wincon;
790
791         dev_dbg(sfb->dev, "blank mode %d\n", blank_mode);
792
793         wincon = readl(sfb->regs + sfb->variant.wincon + (index * 4));
794
795         switch (blank_mode) {
796         case FB_BLANK_POWERDOWN:
797                 wincon &= ~WINCONx_ENWIN;
798                 sfb->enabled &= ~(1 << index);
799                 /* fall through to FB_BLANK_NORMAL */
800
801         case FB_BLANK_NORMAL:
802                 /* disable the DMA and display 0x0 (black) */
803                 writel(WINxMAP_MAP | WINxMAP_MAP_COLOUR(0x0),
804                        sfb->regs + sfb->variant.winmap + (index * 4));
805                 break;
806
807         case FB_BLANK_UNBLANK:
808                 writel(0x0, sfb->regs + sfb->variant.winmap + (index * 4));
809                 wincon |= WINCONx_ENWIN;
810                 sfb->enabled |= (1 << index);
811                 break;
812
813         case FB_BLANK_VSYNC_SUSPEND:
814         case FB_BLANK_HSYNC_SUSPEND:
815         default:
816                 return 1;
817         }
818
819         writel(wincon, sfb->regs + sfb->variant.wincon + (index * 4));
820
821         /* Check the enabled state to see if we need to be running the
822          * main LCD interface, as if there are no active windows then
823          * it is highly likely that we also do not need to output
824          * anything.
825          */
826
827         /* We could do something like the following code, but the current
828          * system of using framebuffer events means that we cannot make
829          * the distinction between just window 0 being inactive and all
830          * the windows being down.
831          *
832          * s3c_fb_enable(sfb, sfb->enabled ? 1 : 0);
833         */
834
835         /* we're stuck with this until we can do something about overriding
836          * the power control using the blanking event for a single fb.
837          */
838         if (index == sfb->pdata->default_win)
839                 s3c_fb_enable(sfb, blank_mode != FB_BLANK_POWERDOWN ? 1 : 0);
840
841         return 0;
842 }
843
844 /**
845  * s3c_fb_pan_display() - Pan the display.
846  *
847  * Note that the offsets can be written to the device at any time, as their
848  * values are latched at each vsync automatically. This also means that only
849  * the last call to this function will have any effect on next vsync, but
850  * there is no need to sleep waiting for it to prevent tearing.
851  *
852  * @var: The screen information to verify.
853  * @info: The framebuffer device.
854  */
855 static int s3c_fb_pan_display(struct fb_var_screeninfo *var,
856                               struct fb_info *info)
857 {
858         struct s3c_fb_win *win  = info->par;
859         struct s3c_fb *sfb      = win->parent;
860         void __iomem *buf       = sfb->regs + win->index * 8;
861         unsigned int start_boff, end_boff;
862
863         /* Offset in bytes to the start of the displayed area */
864         start_boff = var->yoffset * info->fix.line_length;
865         /* X offset depends on the current bpp */
866         if (info->var.bits_per_pixel >= 8) {
867                 start_boff += var->xoffset * (info->var.bits_per_pixel >> 3);
868         } else {
869                 switch (info->var.bits_per_pixel) {
870                 case 4:
871                         start_boff += var->xoffset >> 1;
872                         break;
873                 case 2:
874                         start_boff += var->xoffset >> 2;
875                         break;
876                 case 1:
877                         start_boff += var->xoffset >> 3;
878                         break;
879                 default:
880                         dev_err(sfb->dev, "invalid bpp\n");
881                         return -EINVAL;
882                 }
883         }
884         /* Offset in bytes to the end of the displayed area */
885         end_boff = start_boff + var->yres * info->fix.line_length;
886
887         /* Temporarily turn off per-vsync update from shadow registers until
888          * both start and end addresses are updated to prevent corruption */
889         shadow_protect_win(win, 1);
890
891         writel(info->fix.smem_start + start_boff, buf + sfb->variant.buf_start);
892         writel(info->fix.smem_start + end_boff, buf + sfb->variant.buf_end);
893
894         shadow_protect_win(win, 0);
895
896         return 0;
897 }
898
899 /**
900  * s3c_fb_enable_irq() - enable framebuffer interrupts
901  * @sfb: main hardware state
902  */
903 static void s3c_fb_enable_irq(struct s3c_fb *sfb)
904 {
905         void __iomem *regs = sfb->regs;
906         u32 irq_ctrl_reg;
907
908         if (!test_and_set_bit(S3C_FB_VSYNC_IRQ_EN, &sfb->irq_flags)) {
909                 /* IRQ disabled, enable it */
910                 irq_ctrl_reg = readl(regs + VIDINTCON0);
911
912                 irq_ctrl_reg |= VIDINTCON0_INT_ENABLE;
913                 irq_ctrl_reg |= VIDINTCON0_INT_FRAME;
914
915                 irq_ctrl_reg &= ~VIDINTCON0_FRAMESEL0_MASK;
916                 irq_ctrl_reg |= VIDINTCON0_FRAMESEL0_VSYNC;
917                 irq_ctrl_reg &= ~VIDINTCON0_FRAMESEL1_MASK;
918                 irq_ctrl_reg |= VIDINTCON0_FRAMESEL1_NONE;
919
920                 writel(irq_ctrl_reg, regs + VIDINTCON0);
921         }
922 }
923
924 /**
925  * s3c_fb_disable_irq() - disable framebuffer interrupts
926  * @sfb: main hardware state
927  */
928 static void s3c_fb_disable_irq(struct s3c_fb *sfb)
929 {
930         void __iomem *regs = sfb->regs;
931         u32 irq_ctrl_reg;
932
933         if (test_and_clear_bit(S3C_FB_VSYNC_IRQ_EN, &sfb->irq_flags)) {
934                 /* IRQ enabled, disable it */
935                 irq_ctrl_reg = readl(regs + VIDINTCON0);
936
937                 irq_ctrl_reg &= ~VIDINTCON0_INT_FRAME;
938                 irq_ctrl_reg &= ~VIDINTCON0_INT_ENABLE;
939
940                 writel(irq_ctrl_reg, regs + VIDINTCON0);
941         }
942 }
943
944 static irqreturn_t s3c_fb_irq(int irq, void *dev_id)
945 {
946         struct s3c_fb *sfb = dev_id;
947         void __iomem  *regs = sfb->regs;
948         u32 irq_sts_reg;
949
950         irq_sts_reg = readl(regs + VIDINTCON1);
951
952         if (irq_sts_reg & VIDINTCON1_INT_FRAME) {
953
954                 /* VSYNC interrupt, accept it */
955                 writel(VIDINTCON1_INT_FRAME, regs + VIDINTCON1);
956
957                 sfb->vsync_info.count++;
958                 wake_up_interruptible(&sfb->vsync_info.wait);
959         }
960
961         /* We only support waiting for VSYNC for now, so it's safe
962          * to always disable irqs here.
963          */
964         s3c_fb_disable_irq(sfb);
965
966         return IRQ_HANDLED;
967 }
968
969 /**
970  * s3c_fb_wait_for_vsync() - sleep until next VSYNC interrupt or timeout
971  * @sfb: main hardware state
972  * @crtc: head index.
973  */
974 static int s3c_fb_wait_for_vsync(struct s3c_fb *sfb, u32 crtc)
975 {
976         unsigned long count;
977         int ret;
978
979         if (crtc != 0)
980                 return -ENODEV;
981
982         count = sfb->vsync_info.count;
983         s3c_fb_enable_irq(sfb);
984         ret = wait_event_interruptible_timeout(sfb->vsync_info.wait,
985                                        count != sfb->vsync_info.count,
986                                        msecs_to_jiffies(VSYNC_TIMEOUT_MSEC));
987         if (ret == 0)
988                 return -ETIMEDOUT;
989
990         return 0;
991 }
992
993 static int s3c_fb_ioctl(struct fb_info *info, unsigned int cmd,
994                         unsigned long arg)
995 {
996         struct s3c_fb_win *win = info->par;
997         struct s3c_fb *sfb = win->parent;
998         int ret;
999         u32 crtc;
1000
1001         switch (cmd) {
1002         case FBIO_WAITFORVSYNC:
1003                 if (get_user(crtc, (u32 __user *)arg)) {
1004                         ret = -EFAULT;
1005                         break;
1006                 }
1007
1008                 ret = s3c_fb_wait_for_vsync(sfb, crtc);
1009                 break;
1010         default:
1011                 ret = -ENOTTY;
1012         }
1013
1014         return ret;
1015 }
1016
1017 static int s3c_fb_open(struct fb_info *info, int user)
1018 {
1019         struct s3c_fb_win *win = info->par;
1020         struct s3c_fb *sfb = win->parent;
1021
1022         pm_runtime_get_sync(sfb->dev);
1023
1024         return 0;
1025 }
1026
1027 static int s3c_fb_release(struct fb_info *info, int user)
1028 {
1029         struct s3c_fb_win *win = info->par;
1030         struct s3c_fb *sfb = win->parent;
1031
1032         pm_runtime_put_sync(sfb->dev);
1033
1034         return 0;
1035 }
1036
1037 static struct fb_ops s3c_fb_ops = {
1038         .owner          = THIS_MODULE,
1039         .fb_open        = s3c_fb_open,
1040         .fb_release     = s3c_fb_release,
1041         .fb_check_var   = s3c_fb_check_var,
1042         .fb_set_par     = s3c_fb_set_par,
1043         .fb_blank       = s3c_fb_blank,
1044         .fb_setcolreg   = s3c_fb_setcolreg,
1045         .fb_fillrect    = cfb_fillrect,
1046         .fb_copyarea    = cfb_copyarea,
1047         .fb_imageblit   = cfb_imageblit,
1048         .fb_pan_display = s3c_fb_pan_display,
1049         .fb_ioctl       = s3c_fb_ioctl,
1050 };
1051
1052 /**
1053  * s3c_fb_missing_pixclock() - calculates pixel clock
1054  * @mode: The video mode to change.
1055  *
1056  * Calculate the pixel clock when none has been given through platform data.
1057  */
1058 static void __devinit s3c_fb_missing_pixclock(struct fb_videomode *mode)
1059 {
1060         u64 pixclk = 1000000000000ULL;
1061         u32 div;
1062
1063         div  = mode->left_margin + mode->hsync_len + mode->right_margin +
1064                mode->xres;
1065         div *= mode->upper_margin + mode->vsync_len + mode->lower_margin +
1066                mode->yres;
1067         div *= mode->refresh ? : 60;
1068
1069         do_div(pixclk, div);
1070
1071         mode->pixclock = pixclk;
1072 }
1073
1074 /**
1075  * s3c_fb_alloc_memory() - allocate display memory for framebuffer window
1076  * @sfb: The base resources for the hardware.
1077  * @win: The window to initialise memory for.
1078  *
1079  * Allocate memory for the given framebuffer.
1080  */
1081 static int __devinit s3c_fb_alloc_memory(struct s3c_fb *sfb,
1082                                          struct s3c_fb_win *win)
1083 {
1084         struct s3c_fb_pd_win *windata = win->windata;
1085         unsigned int real_size, virt_size, size;
1086         struct fb_info *fbi = win->fbinfo;
1087         dma_addr_t map_dma;
1088
1089         dev_dbg(sfb->dev, "allocating memory for display\n");
1090
1091         real_size = windata->win_mode.xres * windata->win_mode.yres;
1092         virt_size = windata->virtual_x * windata->virtual_y;
1093
1094         dev_dbg(sfb->dev, "real_size=%u (%u.%u), virt_size=%u (%u.%u)\n",
1095                 real_size, windata->win_mode.xres, windata->win_mode.yres,
1096                 virt_size, windata->virtual_x, windata->virtual_y);
1097
1098         size = (real_size > virt_size) ? real_size : virt_size;
1099         size *= (windata->max_bpp > 16) ? 32 : windata->max_bpp;
1100         size /= 8;
1101
1102         fbi->fix.smem_len = size;
1103         size = PAGE_ALIGN(size);
1104
1105         dev_dbg(sfb->dev, "want %u bytes for window\n", size);
1106
1107         fbi->screen_base = dma_alloc_writecombine(sfb->dev, size,
1108                                                   &map_dma, GFP_KERNEL);
1109         if (!fbi->screen_base)
1110                 return -ENOMEM;
1111
1112         dev_dbg(sfb->dev, "mapped %x to %p\n",
1113                 (unsigned int)map_dma, fbi->screen_base);
1114
1115         memset(fbi->screen_base, 0x0, size);
1116         fbi->fix.smem_start = map_dma;
1117
1118         return 0;
1119 }
1120
1121 /**
1122  * s3c_fb_free_memory() - free the display memory for the given window
1123  * @sfb: The base resources for the hardware.
1124  * @win: The window to free the display memory for.
1125  *
1126  * Free the display memory allocated by s3c_fb_alloc_memory().
1127  */
1128 static void s3c_fb_free_memory(struct s3c_fb *sfb, struct s3c_fb_win *win)
1129 {
1130         struct fb_info *fbi = win->fbinfo;
1131
1132         if (fbi->screen_base)
1133                 dma_free_writecombine(sfb->dev, PAGE_ALIGN(fbi->fix.smem_len),
1134                               fbi->screen_base, fbi->fix.smem_start);
1135 }
1136
1137 /**
1138  * s3c_fb_release_win() - release resources for a framebuffer window.
1139  * @win: The window to cleanup the resources for.
1140  *
1141  * Release the resources that where claimed for the hardware window,
1142  * such as the framebuffer instance and any memory claimed for it.
1143  */
1144 static void s3c_fb_release_win(struct s3c_fb *sfb, struct s3c_fb_win *win)
1145 {
1146         u32 data;
1147
1148         if (win->fbinfo) {
1149                 if (sfb->variant.has_shadowcon) {
1150                         data = readl(sfb->regs + SHADOWCON);
1151                         data &= ~SHADOWCON_CHx_ENABLE(win->index);
1152                         data &= ~SHADOWCON_CHx_LOCAL_ENABLE(win->index);
1153                         writel(data, sfb->regs + SHADOWCON);
1154                 }
1155                 unregister_framebuffer(win->fbinfo);
1156                 if (win->fbinfo->cmap.len)
1157                         fb_dealloc_cmap(&win->fbinfo->cmap);
1158                 s3c_fb_free_memory(sfb, win);
1159                 framebuffer_release(win->fbinfo);
1160         }
1161 }
1162
1163 /**
1164  * s3c_fb_probe_win() - register an hardware window
1165  * @sfb: The base resources for the hardware
1166  * @variant: The variant information for this window.
1167  * @res: Pointer to where to place the resultant window.
1168  *
1169  * Allocate and do the basic initialisation for one of the hardware's graphics
1170  * windows.
1171  */
1172 static int __devinit s3c_fb_probe_win(struct s3c_fb *sfb, unsigned int win_no,
1173                                       struct s3c_fb_win_variant *variant,
1174                                       struct s3c_fb_win **res)
1175 {
1176         struct fb_var_screeninfo *var;
1177         struct fb_videomode *initmode;
1178         struct s3c_fb_pd_win *windata;
1179         struct s3c_fb_win *win;
1180         struct fb_info *fbinfo;
1181         int palette_size;
1182         int ret;
1183
1184         dev_dbg(sfb->dev, "probing window %d, variant %p\n", win_no, variant);
1185
1186         init_waitqueue_head(&sfb->vsync_info.wait);
1187
1188         palette_size = variant->palette_sz * 4;
1189
1190         fbinfo = framebuffer_alloc(sizeof(struct s3c_fb_win) +
1191                                    palette_size * sizeof(u32), sfb->dev);
1192         if (!fbinfo) {
1193                 dev_err(sfb->dev, "failed to allocate framebuffer\n");
1194                 return -ENOENT;
1195         }
1196
1197         windata = sfb->pdata->win[win_no];
1198         initmode = &windata->win_mode;
1199
1200         WARN_ON(windata->max_bpp == 0);
1201         WARN_ON(windata->win_mode.xres == 0);
1202         WARN_ON(windata->win_mode.yres == 0);
1203
1204         win = fbinfo->par;
1205         *res = win;
1206         var = &fbinfo->var;
1207         win->variant = *variant;
1208         win->fbinfo = fbinfo;
1209         win->parent = sfb;
1210         win->windata = windata;
1211         win->index = win_no;
1212         win->palette_buffer = (u32 *)(win + 1);
1213
1214         ret = s3c_fb_alloc_memory(sfb, win);
1215         if (ret) {
1216                 dev_err(sfb->dev, "failed to allocate display memory\n");
1217                 return ret;
1218         }
1219
1220         /* setup the r/b/g positions for the window's palette */
1221         if (win->variant.palette_16bpp) {
1222                 /* Set RGB 5:6:5 as default */
1223                 win->palette.r.offset = 11;
1224                 win->palette.r.length = 5;
1225                 win->palette.g.offset = 5;
1226                 win->palette.g.length = 6;
1227                 win->palette.b.offset = 0;
1228                 win->palette.b.length = 5;
1229
1230         } else {
1231                 /* Set 8bpp or 8bpp and 1bit alpha */
1232                 win->palette.r.offset = 16;
1233                 win->palette.r.length = 8;
1234                 win->palette.g.offset = 8;
1235                 win->palette.g.length = 8;
1236                 win->palette.b.offset = 0;
1237                 win->palette.b.length = 8;
1238         }
1239
1240         /* setup the initial video mode from the window */
1241         fb_videomode_to_var(&fbinfo->var, initmode);
1242
1243         fbinfo->fix.type        = FB_TYPE_PACKED_PIXELS;
1244         fbinfo->fix.accel       = FB_ACCEL_NONE;
1245         fbinfo->var.activate    = FB_ACTIVATE_NOW;
1246         fbinfo->var.vmode       = FB_VMODE_NONINTERLACED;
1247         fbinfo->var.bits_per_pixel = windata->default_bpp;
1248         fbinfo->fbops           = &s3c_fb_ops;
1249         fbinfo->flags           = FBINFO_FLAG_DEFAULT;
1250         fbinfo->pseudo_palette  = &win->pseudo_palette;
1251
1252         /* prepare to actually start the framebuffer */
1253
1254         ret = s3c_fb_check_var(&fbinfo->var, fbinfo);
1255         if (ret < 0) {
1256                 dev_err(sfb->dev, "check_var failed on initial video params\n");
1257                 return ret;
1258         }
1259
1260         /* create initial colour map */
1261
1262         ret = fb_alloc_cmap(&fbinfo->cmap, win->variant.palette_sz, 1);
1263         if (ret == 0)
1264                 fb_set_cmap(&fbinfo->cmap, fbinfo);
1265         else
1266                 dev_err(sfb->dev, "failed to allocate fb cmap\n");
1267
1268         s3c_fb_set_par(fbinfo);
1269
1270         dev_dbg(sfb->dev, "about to register framebuffer\n");
1271
1272         /* run the check_var and set_par on our configuration. */
1273
1274         ret = register_framebuffer(fbinfo);
1275         if (ret < 0) {
1276                 dev_err(sfb->dev, "failed to register framebuffer\n");
1277                 return ret;
1278         }
1279
1280         dev_info(sfb->dev, "window %d: fb %s\n", win_no, fbinfo->fix.id);
1281
1282         return 0;
1283 }
1284
1285 /**
1286  * s3c_fb_clear_win() - clear hardware window registers.
1287  * @sfb: The base resources for the hardware.
1288  * @win: The window to process.
1289  *
1290  * Reset the specific window registers to a known state.
1291  */
1292 static void s3c_fb_clear_win(struct s3c_fb *sfb, int win)
1293 {
1294         void __iomem *regs = sfb->regs;
1295         u32 reg;
1296
1297         writel(0, regs + sfb->variant.wincon + (win * 4));
1298         writel(0, regs + VIDOSD_A(win, sfb->variant));
1299         writel(0, regs + VIDOSD_B(win, sfb->variant));
1300         writel(0, regs + VIDOSD_C(win, sfb->variant));
1301         reg = readl(regs + SHADOWCON);
1302         writel(reg & ~SHADOWCON_WINx_PROTECT(win), regs + SHADOWCON);
1303 }
1304
1305 static int __devinit s3c_fb_probe(struct platform_device *pdev)
1306 {
1307         const struct platform_device_id *platid;
1308         struct s3c_fb_driverdata *fbdrv;
1309         struct device *dev = &pdev->dev;
1310         struct s3c_fb_platdata *pd;
1311         struct s3c_fb *sfb;
1312         struct resource *res;
1313         int win;
1314         int ret = 0;
1315
1316         platid = platform_get_device_id(pdev);
1317         fbdrv = (struct s3c_fb_driverdata *)platid->driver_data;
1318
1319         if (fbdrv->variant.nr_windows > S3C_FB_MAX_WIN) {
1320                 dev_err(dev, "too many windows, cannot attach\n");
1321                 return -EINVAL;
1322         }
1323
1324         pd = pdev->dev.platform_data;
1325         if (!pd) {
1326                 dev_err(dev, "no platform data specified\n");
1327                 return -EINVAL;
1328         }
1329
1330         sfb = kzalloc(sizeof(struct s3c_fb), GFP_KERNEL);
1331         if (!sfb) {
1332                 dev_err(dev, "no memory for framebuffers\n");
1333                 return -ENOMEM;
1334         }
1335
1336         dev_dbg(dev, "allocate new framebuffer %p\n", sfb);
1337
1338         sfb->dev = dev;
1339         sfb->pdata = pd;
1340         sfb->variant = fbdrv->variant;
1341
1342         sfb->bus_clk = clk_get(dev, "lcd");
1343         if (IS_ERR(sfb->bus_clk)) {
1344                 dev_err(dev, "failed to get bus clock\n");
1345                 ret = PTR_ERR(sfb->bus_clk);
1346                 goto err_sfb;
1347         }
1348
1349         clk_enable(sfb->bus_clk);
1350
1351         pm_runtime_enable(sfb->dev);
1352
1353         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1354         if (!res) {
1355                 dev_err(dev, "failed to find registers\n");
1356                 ret = -ENOENT;
1357                 goto err_clk;
1358         }
1359
1360         sfb->regs_res = request_mem_region(res->start, resource_size(res),
1361                                            dev_name(dev));
1362         if (!sfb->regs_res) {
1363                 dev_err(dev, "failed to claim register region\n");
1364                 ret = -ENOENT;
1365                 goto err_clk;
1366         }
1367
1368         sfb->regs = ioremap(res->start, resource_size(res));
1369         if (!sfb->regs) {
1370                 dev_err(dev, "failed to map registers\n");
1371                 ret = -ENXIO;
1372                 goto err_req_region;
1373         }
1374
1375         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1376         if (!res) {
1377                 dev_err(dev, "failed to acquire irq resource\n");
1378                 ret = -ENOENT;
1379                 goto err_ioremap;
1380         }
1381         sfb->irq_no = res->start;
1382         ret = request_irq(sfb->irq_no, s3c_fb_irq,
1383                           0, "s3c_fb", sfb);
1384         if (ret) {
1385                 dev_err(dev, "irq request failed\n");
1386                 goto err_ioremap;
1387         }
1388
1389         dev_dbg(dev, "got resources (regs %p), probing windows\n", sfb->regs);
1390
1391         platform_set_drvdata(pdev, sfb);
1392         pm_runtime_get_sync(sfb->dev);
1393
1394         /* setup gpio and output polarity controls */
1395
1396         pd->setup_gpio();
1397
1398         writel(pd->vidcon1, sfb->regs + VIDCON1);
1399
1400         /* zero all windows before we do anything */
1401
1402         for (win = 0; win < fbdrv->variant.nr_windows; win++)
1403                 s3c_fb_clear_win(sfb, win);
1404
1405         /* initialise colour key controls */
1406         for (win = 0; win < (fbdrv->variant.nr_windows - 1); win++) {
1407                 void __iomem *regs = sfb->regs + sfb->variant.keycon;
1408
1409                 regs += (win * 8);
1410                 writel(0xffffff, regs + WKEYCON0);
1411                 writel(0xffffff, regs + WKEYCON1);
1412         }
1413
1414         /* we have the register setup, start allocating framebuffers */
1415
1416         for (win = 0; win < fbdrv->variant.nr_windows; win++) {
1417                 if (!pd->win[win])
1418                         continue;
1419
1420                 if (!pd->win[win]->win_mode.pixclock)
1421                         s3c_fb_missing_pixclock(&pd->win[win]->win_mode);
1422
1423                 ret = s3c_fb_probe_win(sfb, win, fbdrv->win[win],
1424                                        &sfb->windows[win]);
1425                 if (ret < 0) {
1426                         dev_err(dev, "failed to create window %d\n", win);
1427                         for (; win >= 0; win--)
1428                                 s3c_fb_release_win(sfb, sfb->windows[win]);
1429                         goto err_irq;
1430                 }
1431         }
1432
1433         platform_set_drvdata(pdev, sfb);
1434         pm_runtime_put_sync(sfb->dev);
1435
1436         return 0;
1437
1438 err_irq:
1439         free_irq(sfb->irq_no, sfb);
1440
1441 err_ioremap:
1442         iounmap(sfb->regs);
1443
1444 err_req_region:
1445         release_resource(sfb->regs_res);
1446         kfree(sfb->regs_res);
1447
1448 err_clk:
1449         clk_disable(sfb->bus_clk);
1450         clk_put(sfb->bus_clk);
1451
1452 err_sfb:
1453         kfree(sfb);
1454         return ret;
1455 }
1456
1457 /**
1458  * s3c_fb_remove() - Cleanup on module finalisation
1459  * @pdev: The platform device we are bound to.
1460  *
1461  * Shutdown and then release all the resources that the driver allocated
1462  * on initialisation.
1463  */
1464 static int __devexit s3c_fb_remove(struct platform_device *pdev)
1465 {
1466         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1467         int win;
1468
1469         pm_runtime_get_sync(sfb->dev);
1470
1471         for (win = 0; win < S3C_FB_MAX_WIN; win++)
1472                 if (sfb->windows[win])
1473                         s3c_fb_release_win(sfb, sfb->windows[win]);
1474
1475         free_irq(sfb->irq_no, sfb);
1476
1477         iounmap(sfb->regs);
1478
1479         clk_disable(sfb->bus_clk);
1480         clk_put(sfb->bus_clk);
1481
1482         release_resource(sfb->regs_res);
1483         kfree(sfb->regs_res);
1484
1485         kfree(sfb);
1486
1487         pm_runtime_put_sync(sfb->dev);
1488         pm_runtime_disable(sfb->dev);
1489
1490         return 0;
1491 }
1492
1493 #ifdef CONFIG_PM
1494 static int s3c_fb_suspend(struct device *dev)
1495 {
1496         struct platform_device *pdev = to_platform_device(dev);
1497         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1498         struct s3c_fb_win *win;
1499         int win_no;
1500
1501         for (win_no = S3C_FB_MAX_WIN - 1; win_no >= 0; win_no--) {
1502                 win = sfb->windows[win_no];
1503                 if (!win)
1504                         continue;
1505
1506                 /* use the blank function to push into power-down */
1507                 s3c_fb_blank(FB_BLANK_POWERDOWN, win->fbinfo);
1508         }
1509
1510         clk_disable(sfb->bus_clk);
1511         return 0;
1512 }
1513
1514 static int s3c_fb_resume(struct device *dev)
1515 {
1516         struct platform_device *pdev = to_platform_device(dev);
1517         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1518         struct s3c_fb_platdata *pd = sfb->pdata;
1519         struct s3c_fb_win *win;
1520         int win_no;
1521
1522         clk_enable(sfb->bus_clk);
1523
1524         /* setup registers */
1525         writel(pd->vidcon1, sfb->regs + VIDCON1);
1526
1527         /* zero all windows before we do anything */
1528         for (win_no = 0; win_no < sfb->variant.nr_windows; win_no++)
1529                 s3c_fb_clear_win(sfb, win_no);
1530
1531         for (win_no = 0; win_no < sfb->variant.nr_windows - 1; win_no++) {
1532                 void __iomem *regs = sfb->regs + sfb->variant.keycon;
1533
1534                 regs += (win_no * 8);
1535                 writel(0xffffff, regs + WKEYCON0);
1536                 writel(0xffffff, regs + WKEYCON1);
1537         }
1538
1539         /* restore framebuffers */
1540         for (win_no = 0; win_no < S3C_FB_MAX_WIN; win_no++) {
1541                 win = sfb->windows[win_no];
1542                 if (!win)
1543                         continue;
1544
1545                 dev_dbg(&pdev->dev, "resuming window %d\n", win_no);
1546                 s3c_fb_set_par(win->fbinfo);
1547         }
1548
1549         return 0;
1550 }
1551
1552 int s3c_fb_runtime_suspend(struct device *dev)
1553 {
1554         struct platform_device *pdev = to_platform_device(dev);
1555         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1556         struct s3c_fb_win *win;
1557         int win_no;
1558
1559         for (win_no = S3C_FB_MAX_WIN - 1; win_no >= 0; win_no--) {
1560                 win = sfb->windows[win_no];
1561                 if (!win)
1562                         continue;
1563
1564                 /* use the blank function to push into power-down */
1565                 s3c_fb_blank(FB_BLANK_POWERDOWN, win->fbinfo);
1566         }
1567
1568         clk_disable(sfb->bus_clk);
1569         return 0;
1570 }
1571
1572 int s3c_fb_runtime_resume(struct device *dev)
1573 {
1574         struct platform_device *pdev = to_platform_device(dev);
1575         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1576         struct s3c_fb_platdata *pd = sfb->pdata;
1577         struct s3c_fb_win *win;
1578         int win_no;
1579
1580         clk_enable(sfb->bus_clk);
1581
1582         /* setup registers */
1583         writel(pd->vidcon1, sfb->regs + VIDCON1);
1584
1585         /* zero all windows before we do anything */
1586         for (win_no = 0; win_no < sfb->variant.nr_windows; win_no++)
1587                 s3c_fb_clear_win(sfb, win_no);
1588
1589         for (win_no = 0; win_no < sfb->variant.nr_windows - 1; win_no++) {
1590                 void __iomem *regs = sfb->regs + sfb->variant.keycon;
1591
1592                 regs += (win_no * 8);
1593                 writel(0xffffff, regs + WKEYCON0);
1594                 writel(0xffffff, regs + WKEYCON1);
1595         }
1596
1597         /* restore framebuffers */
1598         for (win_no = 0; win_no < S3C_FB_MAX_WIN; win_no++) {
1599                 win = sfb->windows[win_no];
1600                 if (!win)
1601                         continue;
1602
1603                 dev_dbg(&pdev->dev, "resuming window %d\n", win_no);
1604                 s3c_fb_set_par(win->fbinfo);
1605         }
1606
1607         return 0;
1608 }
1609
1610 #else
1611 #define s3c_fb_suspend NULL
1612 #define s3c_fb_resume  NULL
1613 #define s3c_fb_runtime_suspend NULL
1614 #define s3c_fb_runtime_resume NULL
1615 #endif
1616
1617
1618 #define VALID_BPP124 (VALID_BPP(1) | VALID_BPP(2) | VALID_BPP(4))
1619 #define VALID_BPP1248 (VALID_BPP124 | VALID_BPP(8))
1620
1621 static struct s3c_fb_win_variant s3c_fb_data_64xx_wins[] = {
1622         [0] = {
1623                 .has_osd_c      = 1,
1624                 .osd_size_off   = 0x8,
1625                 .palette_sz     = 256,
1626                 .valid_bpp      = VALID_BPP1248 | VALID_BPP(16) | VALID_BPP(24),
1627         },
1628         [1] = {
1629                 .has_osd_c      = 1,
1630                 .has_osd_d      = 1,
1631                 .osd_size_off   = 0x12,
1632                 .has_osd_alpha  = 1,
1633                 .palette_sz     = 256,
1634                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(16) |
1635                                    VALID_BPP(18) | VALID_BPP(19) |
1636                                    VALID_BPP(24) | VALID_BPP(25)),
1637         },
1638         [2] = {
1639                 .has_osd_c      = 1,
1640                 .has_osd_d      = 1,
1641                 .osd_size_off   = 0x12,
1642                 .has_osd_alpha  = 1,
1643                 .palette_sz     = 16,
1644                 .palette_16bpp  = 1,
1645                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(16) |
1646                                    VALID_BPP(18) | VALID_BPP(19) |
1647                                    VALID_BPP(24) | VALID_BPP(25)),
1648         },
1649         [3] = {
1650                 .has_osd_c      = 1,
1651                 .has_osd_alpha  = 1,
1652                 .palette_sz     = 16,
1653                 .palette_16bpp  = 1,
1654                 .valid_bpp      = (VALID_BPP124  | VALID_BPP(16) |
1655                                    VALID_BPP(18) | VALID_BPP(19) |
1656                                    VALID_BPP(24) | VALID_BPP(25)),
1657         },
1658         [4] = {
1659                 .has_osd_c      = 1,
1660                 .has_osd_alpha  = 1,
1661                 .palette_sz     = 4,
1662                 .palette_16bpp  = 1,
1663                 .valid_bpp      = (VALID_BPP(1) | VALID_BPP(2) |
1664                                    VALID_BPP(16) | VALID_BPP(18) |
1665                                    VALID_BPP(24) | VALID_BPP(25)),
1666         },
1667 };
1668
1669 static struct s3c_fb_driverdata s3c_fb_data_64xx = {
1670         .variant = {
1671                 .nr_windows     = 5,
1672                 .vidtcon        = VIDTCON0,
1673                 .wincon         = WINCON(0),
1674                 .winmap         = WINxMAP(0),
1675                 .keycon         = WKEYCON,
1676                 .osd            = VIDOSD_BASE,
1677                 .osd_stride     = 16,
1678                 .buf_start      = VIDW_BUF_START(0),
1679                 .buf_size       = VIDW_BUF_SIZE(0),
1680                 .buf_end        = VIDW_BUF_END(0),
1681
1682                 .palette = {
1683                         [0] = 0x400,
1684                         [1] = 0x800,
1685                         [2] = 0x300,
1686                         [3] = 0x320,
1687                         [4] = 0x340,
1688                 },
1689
1690                 .has_prtcon     = 1,
1691         },
1692         .win[0] = &s3c_fb_data_64xx_wins[0],
1693         .win[1] = &s3c_fb_data_64xx_wins[1],
1694         .win[2] = &s3c_fb_data_64xx_wins[2],
1695         .win[3] = &s3c_fb_data_64xx_wins[3],
1696         .win[4] = &s3c_fb_data_64xx_wins[4],
1697 };
1698
1699 static struct s3c_fb_driverdata s3c_fb_data_s5pc100 = {
1700         .variant = {
1701                 .nr_windows     = 5,
1702                 .vidtcon        = VIDTCON0,
1703                 .wincon         = WINCON(0),
1704                 .winmap         = WINxMAP(0),
1705                 .keycon         = WKEYCON,
1706                 .osd            = VIDOSD_BASE,
1707                 .osd_stride     = 16,
1708                 .buf_start      = VIDW_BUF_START(0),
1709                 .buf_size       = VIDW_BUF_SIZE(0),
1710                 .buf_end        = VIDW_BUF_END(0),
1711
1712                 .palette = {
1713                         [0] = 0x2400,
1714                         [1] = 0x2800,
1715                         [2] = 0x2c00,
1716                         [3] = 0x3000,
1717                         [4] = 0x3400,
1718                 },
1719
1720                 .has_prtcon     = 1,
1721         },
1722         .win[0] = &s3c_fb_data_64xx_wins[0],
1723         .win[1] = &s3c_fb_data_64xx_wins[1],
1724         .win[2] = &s3c_fb_data_64xx_wins[2],
1725         .win[3] = &s3c_fb_data_64xx_wins[3],
1726         .win[4] = &s3c_fb_data_64xx_wins[4],
1727 };
1728
1729 static struct s3c_fb_driverdata s3c_fb_data_s5pv210 = {
1730         .variant = {
1731                 .nr_windows     = 5,
1732                 .vidtcon        = VIDTCON0,
1733                 .wincon         = WINCON(0),
1734                 .winmap         = WINxMAP(0),
1735                 .keycon         = WKEYCON,
1736                 .osd            = VIDOSD_BASE,
1737                 .osd_stride     = 16,
1738                 .buf_start      = VIDW_BUF_START(0),
1739                 .buf_size       = VIDW_BUF_SIZE(0),
1740                 .buf_end        = VIDW_BUF_END(0),
1741
1742                 .palette = {
1743                         [0] = 0x2400,
1744                         [1] = 0x2800,
1745                         [2] = 0x2c00,
1746                         [3] = 0x3000,
1747                         [4] = 0x3400,
1748                 },
1749
1750                 .has_shadowcon  = 1,
1751         },
1752         .win[0] = &s3c_fb_data_64xx_wins[0],
1753         .win[1] = &s3c_fb_data_64xx_wins[1],
1754         .win[2] = &s3c_fb_data_64xx_wins[2],
1755         .win[3] = &s3c_fb_data_64xx_wins[3],
1756         .win[4] = &s3c_fb_data_64xx_wins[4],
1757 };
1758
1759 /* S3C2443/S3C2416 style hardware */
1760 static struct s3c_fb_driverdata s3c_fb_data_s3c2443 = {
1761         .variant = {
1762                 .nr_windows     = 2,
1763                 .is_2443        = 1,
1764
1765                 .vidtcon        = 0x08,
1766                 .wincon         = 0x14,
1767                 .winmap         = 0xd0,
1768                 .keycon         = 0xb0,
1769                 .osd            = 0x28,
1770                 .osd_stride     = 12,
1771                 .buf_start      = 0x64,
1772                 .buf_size       = 0x94,
1773                 .buf_end        = 0x7c,
1774
1775                 .palette = {
1776                         [0] = 0x400,
1777                         [1] = 0x800,
1778                 },
1779         },
1780         .win[0] = &(struct s3c_fb_win_variant) {
1781                 .palette_sz     = 256,
1782                 .valid_bpp      = VALID_BPP1248 | VALID_BPP(16) | VALID_BPP(24),
1783         },
1784         .win[1] = &(struct s3c_fb_win_variant) {
1785                 .has_osd_c      = 1,
1786                 .has_osd_alpha  = 1,
1787                 .palette_sz     = 256,
1788                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(16) |
1789                                    VALID_BPP(18) | VALID_BPP(19) |
1790                                    VALID_BPP(24) | VALID_BPP(25) |
1791                                    VALID_BPP(28)),
1792         },
1793 };
1794
1795 static struct platform_device_id s3c_fb_driver_ids[] = {
1796         {
1797                 .name           = "s3c-fb",
1798                 .driver_data    = (unsigned long)&s3c_fb_data_64xx,
1799         }, {
1800                 .name           = "s5pc100-fb",
1801                 .driver_data    = (unsigned long)&s3c_fb_data_s5pc100,
1802         }, {
1803                 .name           = "s5pv210-fb",
1804                 .driver_data    = (unsigned long)&s3c_fb_data_s5pv210,
1805         }, {
1806                 .name           = "s3c2443-fb",
1807                 .driver_data    = (unsigned long)&s3c_fb_data_s3c2443,
1808         },
1809         {},
1810 };
1811 MODULE_DEVICE_TABLE(platform, s3c_fb_driver_ids);
1812
1813 static const struct dev_pm_ops s3cfb_pm_ops = {
1814         .suspend        = s3c_fb_suspend,
1815         .resume         = s3c_fb_resume,
1816         .runtime_suspend        = s3c_fb_runtime_suspend,
1817         .runtime_resume         = s3c_fb_runtime_resume,
1818 };
1819
1820 static struct platform_driver s3c_fb_driver = {
1821         .probe          = s3c_fb_probe,
1822         .remove         = __devexit_p(s3c_fb_remove),
1823         .id_table       = s3c_fb_driver_ids,
1824         .driver         = {
1825                 .name   = "s3c-fb",
1826                 .owner  = THIS_MODULE,
1827                 .pm     = &s3cfb_pm_ops,
1828         },
1829 };
1830
1831 static int __init s3c_fb_init(void)
1832 {
1833         return platform_driver_register(&s3c_fb_driver);
1834 }
1835
1836 static void __exit s3c_fb_cleanup(void)
1837 {
1838         platform_driver_unregister(&s3c_fb_driver);
1839 }
1840
1841 module_init(s3c_fb_init);
1842 module_exit(s3c_fb_cleanup);
1843
1844 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
1845 MODULE_DESCRIPTION("Samsung S3C SoC Framebuffer driver");
1846 MODULE_LICENSE("GPL");
1847 MODULE_ALIAS("platform:s3c-fb");