fbdev/amifb: Correct check for video memory size
[linux-2.6.git] / drivers / video / s1d13xxxfb.c
1 /* drivers/video/s1d13xxxfb.c
2  *
3  * (c) 2004 Simtec Electronics
4  * (c) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5  * (c) 2009 Kristoffer Ericson <kristoffer.ericson@gmail.com>
6  *
7  * Driver for Epson S1D13xxx series framebuffer chips
8  *
9  * Adapted from
10  *  linux/drivers/video/skeletonfb.c
11  *  linux/drivers/video/epson1355fb.c
12  *  linux/drivers/video/epson/s1d13xxxfb.c (2.4 driver by Epson)
13  *
14  * TODO: - handle dual screen display (CRT and LCD at the same time).
15  *       - check_var(), mode change, etc.
16  *       - probably not SMP safe :)
17  *       - support all bitblt operations on all cards
18  *
19  * This file is subject to the terms and conditions of the GNU General Public
20  * License. See the file COPYING in the main directory of this archive for
21  * more details.
22  */
23
24 #include <linux/module.h>
25 #include <linux/platform_device.h>
26 #include <linux/delay.h>
27 #include <linux/types.h>
28 #include <linux/errno.h>
29 #include <linux/mm.h>
30 #include <linux/mman.h>
31 #include <linux/fb.h>
32 #include <linux/spinlock_types.h>
33 #include <linux/spinlock.h>
34 #include <linux/slab.h>
35
36 #include <asm/io.h>
37
38 #include <video/s1d13xxxfb.h>
39
40 #define PFX     "s1d13xxxfb: "
41 #define BLIT    "s1d13xxxfb_bitblt: "
42
43 /*
44  * set this to enable debugging on general functions
45  */
46 #if 0
47 #define dbg(fmt, args...) do { printk(KERN_INFO fmt, ## args); } while(0)
48 #else
49 #define dbg(fmt, args...) do { } while (0)
50 #endif
51
52 /*
53  * set this to enable debugging on 2D acceleration
54  */
55 #if 0
56 #define dbg_blit(fmt, args...) do { printk(KERN_INFO BLIT fmt, ## args); } while (0)
57 #else
58 #define dbg_blit(fmt, args...) do { } while (0)
59 #endif
60
61 /*
62  * we make sure only one bitblt operation is running
63  */
64 static DEFINE_SPINLOCK(s1d13xxxfb_bitblt_lock);
65
66 /*
67  * list of card production ids
68  */
69 static const int s1d13xxxfb_prod_ids[] = {
70         S1D13505_PROD_ID,
71         S1D13506_PROD_ID,
72         S1D13806_PROD_ID,
73 };
74
75 /*
76  * List of card strings
77  */
78 static const char *s1d13xxxfb_prod_names[] = {
79         "S1D13505",
80         "S1D13506",
81         "S1D13806",
82 };
83
84 /*
85  * here we define the default struct fb_fix_screeninfo
86  */
87 static struct fb_fix_screeninfo __devinitdata s1d13xxxfb_fix = {
88         .id             = S1D_FBID,
89         .type           = FB_TYPE_PACKED_PIXELS,
90         .visual         = FB_VISUAL_PSEUDOCOLOR,
91         .xpanstep       = 0,
92         .ypanstep       = 1,
93         .ywrapstep      = 0,
94         .accel          = FB_ACCEL_NONE,
95 };
96
97 static inline u8
98 s1d13xxxfb_readreg(struct s1d13xxxfb_par *par, u16 regno)
99 {
100 #if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
101         regno=((regno & 1) ? (regno & ~1L) : (regno + 1));
102 #endif
103         return readb(par->regs + regno);
104 }
105
106 static inline void
107 s1d13xxxfb_writereg(struct s1d13xxxfb_par *par, u16 regno, u8 value)
108 {
109 #if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
110         regno=((regno & 1) ? (regno & ~1L) : (regno + 1));
111 #endif
112         writeb(value, par->regs + regno);
113 }
114
115 static inline void
116 s1d13xxxfb_runinit(struct s1d13xxxfb_par *par,
117                         const struct s1d13xxxfb_regval *initregs,
118                         const unsigned int size)
119 {
120         int i;
121
122         for (i = 0; i < size; i++) {
123                 if ((initregs[i].addr == S1DREG_DELAYOFF) ||
124                                 (initregs[i].addr == S1DREG_DELAYON))
125                         mdelay((int)initregs[i].value);
126                 else {
127                         s1d13xxxfb_writereg(par, initregs[i].addr, initregs[i].value);
128                 }
129         }
130
131         /* make sure the hardware can cope with us */
132         mdelay(1);
133 }
134
135 static inline void
136 lcd_enable(struct s1d13xxxfb_par *par, int enable)
137 {
138         u8 mode = s1d13xxxfb_readreg(par, S1DREG_COM_DISP_MODE);
139
140         if (enable)
141                 mode |= 0x01;
142         else
143                 mode &= ~0x01;
144
145         s1d13xxxfb_writereg(par, S1DREG_COM_DISP_MODE, mode);
146 }
147
148 static inline void
149 crt_enable(struct s1d13xxxfb_par *par, int enable)
150 {
151         u8 mode = s1d13xxxfb_readreg(par, S1DREG_COM_DISP_MODE);
152
153         if (enable)
154                 mode |= 0x02;
155         else
156                 mode &= ~0x02;
157
158         s1d13xxxfb_writereg(par, S1DREG_COM_DISP_MODE, mode);
159 }
160
161
162 /*************************************************************
163  framebuffer control functions
164  *************************************************************/
165 static inline void
166 s1d13xxxfb_setup_pseudocolour(struct fb_info *info)
167 {
168         info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
169
170         info->var.red.length = 4;
171         info->var.green.length = 4;
172         info->var.blue.length = 4;
173 }
174
175 static inline void
176 s1d13xxxfb_setup_truecolour(struct fb_info *info)
177 {
178         info->fix.visual = FB_VISUAL_TRUECOLOR;
179         info->var.bits_per_pixel = 16;
180
181         info->var.red.length = 5;
182         info->var.red.offset = 11;
183
184         info->var.green.length = 6;
185         info->var.green.offset = 5;
186
187         info->var.blue.length = 5;
188         info->var.blue.offset = 0;
189 }
190
191 /**
192  *      s1d13xxxfb_set_par - Alters the hardware state.
193  *      @info: frame buffer structure
194  *
195  *      Using the fb_var_screeninfo in fb_info we set the depth of the
196  *      framebuffer. This function alters the par AND the
197  *      fb_fix_screeninfo stored in fb_info. It doesn't not alter var in
198  *      fb_info since we are using that data. This means we depend on the
199  *      data in var inside fb_info to be supported by the hardware.
200  *      xxxfb_check_var is always called before xxxfb_set_par to ensure this.
201  *
202  *      XXX TODO: write proper s1d13xxxfb_check_var(), without which that
203  *      function is quite useless.
204  */
205 static int
206 s1d13xxxfb_set_par(struct fb_info *info)
207 {
208         struct s1d13xxxfb_par *s1dfb = info->par;
209         unsigned int val;
210
211         dbg("s1d13xxxfb_set_par: bpp=%d\n", info->var.bits_per_pixel);
212
213         if ((s1dfb->display & 0x01))    /* LCD */
214                 val = s1d13xxxfb_readreg(s1dfb, S1DREG_LCD_DISP_MODE);   /* read colour control */
215         else    /* CRT */
216                 val = s1d13xxxfb_readreg(s1dfb, S1DREG_CRT_DISP_MODE);   /* read colour control */
217
218         val &= ~0x07;
219
220         switch (info->var.bits_per_pixel) {
221                 case 4:
222                         dbg("pseudo colour 4\n");
223                         s1d13xxxfb_setup_pseudocolour(info);
224                         val |= 2;
225                         break;
226                 case 8:
227                         dbg("pseudo colour 8\n");
228                         s1d13xxxfb_setup_pseudocolour(info);
229                         val |= 3;
230                         break;
231                 case 16:
232                         dbg("true colour\n");
233                         s1d13xxxfb_setup_truecolour(info);
234                         val |= 5;
235                         break;
236
237                 default:
238                         dbg("bpp not supported!\n");
239                         return -EINVAL;
240         }
241
242         dbg("writing %02x to display mode register\n", val);
243
244         if ((s1dfb->display & 0x01))    /* LCD */
245                 s1d13xxxfb_writereg(s1dfb, S1DREG_LCD_DISP_MODE, val);
246         else    /* CRT */
247                 s1d13xxxfb_writereg(s1dfb, S1DREG_CRT_DISP_MODE, val);
248
249         info->fix.line_length  = info->var.xres * info->var.bits_per_pixel;
250         info->fix.line_length /= 8;
251
252         dbg("setting line_length to %d\n", info->fix.line_length);
253
254         dbg("done setup\n");
255
256         return 0;
257 }
258
259 /**
260  *      s1d13xxxfb_setcolreg - sets a color register.
261  *      @regno: Which register in the CLUT we are programming
262  *      @red: The red value which can be up to 16 bits wide
263  *      @green: The green value which can be up to 16 bits wide
264  *      @blue:  The blue value which can be up to 16 bits wide.
265  *      @transp: If supported the alpha value which can be up to 16 bits wide.
266  *      @info: frame buffer info structure
267  *
268  *      Returns negative errno on error, or zero on success.
269  */
270 static int
271 s1d13xxxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
272                         u_int transp, struct fb_info *info)
273 {
274         struct s1d13xxxfb_par *s1dfb = info->par;
275         unsigned int pseudo_val;
276
277         if (regno >= S1D_PALETTE_SIZE)
278                 return -EINVAL;
279
280         dbg("s1d13xxxfb_setcolreg: %d: rgb=%d,%d,%d, tr=%d\n",
281                     regno, red, green, blue, transp);
282
283         if (info->var.grayscale)
284                 red = green = blue = (19595*red + 38470*green + 7471*blue) >> 16;
285
286         switch (info->fix.visual) {
287                 case FB_VISUAL_TRUECOLOR:
288                         if (regno >= 16)
289                                 return -EINVAL;
290
291                         /* deal with creating pseudo-palette entries */
292
293                         pseudo_val  = (red   >> 11) << info->var.red.offset;
294                         pseudo_val |= (green >> 10) << info->var.green.offset;
295                         pseudo_val |= (blue  >> 11) << info->var.blue.offset;
296
297                         dbg("s1d13xxxfb_setcolreg: pseudo %d, val %08x\n",
298                                     regno, pseudo_val);
299
300 #if defined(CONFIG_PLAT_MAPPI)
301                         ((u32 *)info->pseudo_palette)[regno] = cpu_to_le16(pseudo_val);
302 #else
303                         ((u32 *)info->pseudo_palette)[regno] = pseudo_val;
304 #endif
305
306                         break;
307                 case FB_VISUAL_PSEUDOCOLOR:
308                         s1d13xxxfb_writereg(s1dfb, S1DREG_LKUP_ADDR, regno);
309                         s1d13xxxfb_writereg(s1dfb, S1DREG_LKUP_DATA, red);
310                         s1d13xxxfb_writereg(s1dfb, S1DREG_LKUP_DATA, green);
311                         s1d13xxxfb_writereg(s1dfb, S1DREG_LKUP_DATA, blue);
312
313                         break;
314                 default:
315                         return -ENOSYS;
316         }
317
318         dbg("s1d13xxxfb_setcolreg: done\n");
319
320         return 0;
321 }
322
323 /**
324  *      s1d13xxxfb_blank - blanks the display.
325  *      @blank_mode: the blank mode we want.
326  *      @info: frame buffer structure that represents a single frame buffer
327  *
328  *      Blank the screen if blank_mode != 0, else unblank. Return 0 if
329  *      blanking succeeded, != 0 if un-/blanking failed due to e.g. a
330  *      video mode which doesn't support it. Implements VESA suspend
331  *      and powerdown modes on hardware that supports disabling hsync/vsync:
332  *      blank_mode == 2: suspend vsync
333  *      blank_mode == 3: suspend hsync
334  *      blank_mode == 4: powerdown
335  *
336  *      Returns negative errno on error, or zero on success.
337  */
338 static int
339 s1d13xxxfb_blank(int blank_mode, struct fb_info *info)
340 {
341         struct s1d13xxxfb_par *par = info->par;
342
343         dbg("s1d13xxxfb_blank: blank=%d, info=%p\n", blank_mode, info);
344
345         switch (blank_mode) {
346                 case FB_BLANK_UNBLANK:
347                 case FB_BLANK_NORMAL:
348                         if ((par->display & 0x01) != 0)
349                                 lcd_enable(par, 1);
350                         if ((par->display & 0x02) != 0)
351                                 crt_enable(par, 1);
352                         break;
353                 case FB_BLANK_VSYNC_SUSPEND:
354                 case FB_BLANK_HSYNC_SUSPEND:
355                         break;
356                 case FB_BLANK_POWERDOWN:
357                         lcd_enable(par, 0);
358                         crt_enable(par, 0);
359                         break;
360                 default:
361                         return -EINVAL;
362         }
363
364         /* let fbcon do a soft blank for us */
365         return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
366 }
367
368 /**
369  *      s1d13xxxfb_pan_display - Pans the display.
370  *      @var: frame buffer variable screen structure
371  *      @info: frame buffer structure that represents a single frame buffer
372  *
373  *      Pan (or wrap, depending on the `vmode' field) the display using the
374  *      `yoffset' field of the `var' structure (`xoffset'  not yet supported).
375  *      If the values don't fit, return -EINVAL.
376  *
377  *      Returns negative errno on error, or zero on success.
378  */
379 static int
380 s1d13xxxfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
381 {
382         struct s1d13xxxfb_par *par = info->par;
383         u32 start;
384
385         if (var->xoffset != 0)  /* not yet ... */
386                 return -EINVAL;
387
388         if (var->yoffset + info->var.yres > info->var.yres_virtual)
389                 return -EINVAL;
390
391         start = (info->fix.line_length >> 1) * var->yoffset;
392
393         if ((par->display & 0x01)) {
394                 /* LCD */
395                 s1d13xxxfb_writereg(par, S1DREG_LCD_DISP_START0, (start & 0xff));
396                 s1d13xxxfb_writereg(par, S1DREG_LCD_DISP_START1, ((start >> 8) & 0xff));
397                 s1d13xxxfb_writereg(par, S1DREG_LCD_DISP_START2, ((start >> 16) & 0x0f));
398         } else {
399                 /* CRT */
400                 s1d13xxxfb_writereg(par, S1DREG_CRT_DISP_START0, (start & 0xff));
401                 s1d13xxxfb_writereg(par, S1DREG_CRT_DISP_START1, ((start >> 8) & 0xff));
402                 s1d13xxxfb_writereg(par, S1DREG_CRT_DISP_START2, ((start >> 16) & 0x0f));
403         }
404
405         return 0;
406 }
407
408 /************************************************************
409  functions to handle bitblt acceleration
410  ************************************************************/
411
412 /**
413  *      bltbit_wait_bitclear - waits for change in register value
414  *      @info : frambuffer structure
415  *      @bit  : value currently in register
416  *      @timeout : ...
417  *
418  *      waits until value changes FROM bit
419  *
420  */
421 static u8
422 bltbit_wait_bitclear(struct fb_info *info, u8 bit, int timeout)
423 {
424         while (s1d13xxxfb_readreg(info->par, S1DREG_BBLT_CTL0) & bit) {
425                 udelay(10);
426                 if (!--timeout) {
427                         dbg_blit("wait_bitclear timeout\n");
428                         break;
429                 }
430         }
431
432         return timeout;
433 }
434
435 /*
436  *      s1d13xxxfb_bitblt_copyarea - accelerated copyarea function
437  *      @info : framebuffer structure
438  *      @area : fb_copyarea structure
439  *
440  *      supports (atleast) S1D13506
441  *
442  */
443 static void
444 s1d13xxxfb_bitblt_copyarea(struct fb_info *info, const struct fb_copyarea *area)
445 {
446         u32 dst, src;
447         u32 stride;
448         u16 reverse = 0;
449         u16 sx = area->sx, sy = area->sy;
450         u16 dx = area->dx, dy = area->dy;
451         u16 width = area->width, height = area->height;
452         u16 bpp;
453
454         spin_lock(&s1d13xxxfb_bitblt_lock);
455
456         /* bytes per xres line */
457         bpp = (info->var.bits_per_pixel >> 3);
458         stride = bpp * info->var.xres;
459
460         /* reverse, calculate the last pixel in rectangle */
461         if ((dy > sy) || ((dy == sy) && (dx >= sx))) {
462                 dst = (((dy + height - 1) * stride) + (bpp * (dx + width - 1)));
463                 src = (((sy + height - 1) * stride) + (bpp * (sx + width - 1)));
464                 reverse = 1;
465         /* not reverse, calculate the first pixel in rectangle */
466         } else { /* (y * xres) + (bpp * x) */
467                 dst = (dy * stride) + (bpp * dx);
468                 src = (sy * stride) + (bpp * sx);
469         }
470
471         /* set source address */
472         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_SRC_START0, (src & 0xff));
473         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_SRC_START1, (src >> 8) & 0x00ff);
474         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_SRC_START2, (src >> 16) & 0x00ff);
475
476         /* set destination address */
477         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START0, (dst & 0xff));
478         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START1, (dst >> 8) & 0x00ff);
479         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START2, (dst >> 16) & 0x00ff);
480
481         /* program height and width */
482         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_WIDTH0, (width & 0xff) - 1);
483         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_WIDTH1, (width >> 8));
484
485         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_HEIGHT0, (height & 0xff) - 1);
486         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_HEIGHT1, (height >> 8));
487
488         /* negative direction ROP */
489         if (reverse == 1) {
490                 dbg_blit("(copyarea) negative rop\n");
491                 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_OP, 0x03);
492         } else /* positive direction ROP */ {
493                 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_OP, 0x02);
494                 dbg_blit("(copyarea) positive rop\n");
495         }
496
497         /* set for rectangel mode and not linear */
498         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_CTL0, 0x0);
499
500         /* setup the bpp 1 = 16bpp, 0 = 8bpp*/
501         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_CTL1, (bpp >> 1));
502
503         /* set words per xres */
504         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_MEM_OFF0, (stride >> 1) & 0xff);
505         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_MEM_OFF1, (stride >> 9));
506
507         dbg_blit("(copyarea) dx=%d, dy=%d\n", dx, dy);
508         dbg_blit("(copyarea) sx=%d, sy=%d\n", sx, sy);
509         dbg_blit("(copyarea) width=%d, height=%d\n", width - 1, height - 1);
510         dbg_blit("(copyarea) stride=%d\n", stride);
511         dbg_blit("(copyarea) bpp=%d=0x0%d, mem_offset1=%d, mem_offset2=%d\n", bpp, (bpp >> 1),
512                 (stride >> 1) & 0xff, stride >> 9);
513
514         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_CC_EXP, 0x0c);
515
516         /* initialize the engine */
517         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_CTL0, 0x80);
518
519         /* wait to complete */
520         bltbit_wait_bitclear(info, 0x80, 8000);
521
522         spin_unlock(&s1d13xxxfb_bitblt_lock);
523 }
524
525 /**
526  *
527  *      s1d13xxxfb_bitblt_solidfill - accelerated solidfill function
528  *      @info : framebuffer structure
529  *      @rect : fb_fillrect structure
530  *
531  *      supports (atleast 13506)
532  *
533  **/
534 static void
535 s1d13xxxfb_bitblt_solidfill(struct fb_info *info, const struct fb_fillrect *rect)
536 {
537         u32 screen_stride, dest;
538         u32 fg;
539         u16 bpp = (info->var.bits_per_pixel >> 3);
540
541         /* grab spinlock */
542         spin_lock(&s1d13xxxfb_bitblt_lock);
543
544         /* bytes per x width */
545         screen_stride = (bpp * info->var.xres);
546
547         /* bytes to starting point */
548         dest = ((rect->dy * screen_stride) + (bpp * rect->dx));
549
550         dbg_blit("(solidfill) dx=%d, dy=%d, stride=%d, dest=%d\n"
551                  "(solidfill) : rect_width=%d, rect_height=%d\n",
552                                 rect->dx, rect->dy, screen_stride, dest,
553                                 rect->width - 1, rect->height - 1);
554
555         dbg_blit("(solidfill) : xres=%d, yres=%d, bpp=%d\n",
556                                 info->var.xres, info->var.yres,
557                                 info->var.bits_per_pixel);
558         dbg_blit("(solidfill) : rop=%d\n", rect->rop);
559
560         /* We split the destination into the three registers */
561         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START0, (dest & 0x00ff));
562         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START1, ((dest >> 8) & 0x00ff));
563         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START2, ((dest >> 16) & 0x00ff));
564
565         /* give information regarding rectangel width */
566         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_WIDTH0, ((rect->width) & 0x00ff) - 1);
567         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_WIDTH1, (rect->width >> 8));
568
569         /* give information regarding rectangel height */
570         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_HEIGHT0, ((rect->height) & 0x00ff) - 1);
571         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_HEIGHT1, (rect->height >> 8));
572
573         if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
574                 info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
575                 fg = ((u32 *)info->pseudo_palette)[rect->color];
576                 dbg_blit("(solidfill) truecolor/directcolor\n");
577                 dbg_blit("(solidfill) pseudo_palette[%d] = %d\n", rect->color, fg);
578         } else {
579                 fg = rect->color;
580                 dbg_blit("(solidfill) color = %d\n", rect->color);
581         }
582
583         /* set foreground color */
584         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_FGC0, (fg & 0xff));
585         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_FGC1, (fg >> 8) & 0xff);
586
587         /* set rectangual region of memory (rectangle and not linear) */
588         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_CTL0, 0x0);
589
590         /* set operation mode SOLID_FILL */
591         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_OP, BBLT_SOLID_FILL);
592
593         /* set bits per pixel (1 = 16bpp, 0 = 8bpp) */
594         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_CTL1, (info->var.bits_per_pixel >> 4));
595
596         /* set the memory offset for the bblt in word sizes */
597         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_MEM_OFF0, (screen_stride >> 1) & 0x00ff);
598         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_MEM_OFF1, (screen_stride >> 9));
599
600         /* and away we go.... */
601         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_CTL0, 0x80);
602
603         /* wait until its done */
604         bltbit_wait_bitclear(info, 0x80, 8000);
605
606         /* let others play */
607         spin_unlock(&s1d13xxxfb_bitblt_lock);
608 }
609
610 /* framebuffer information structures */
611 static struct fb_ops s1d13xxxfb_fbops = {
612         .owner          = THIS_MODULE,
613         .fb_set_par     = s1d13xxxfb_set_par,
614         .fb_setcolreg   = s1d13xxxfb_setcolreg,
615         .fb_blank       = s1d13xxxfb_blank,
616
617         .fb_pan_display = s1d13xxxfb_pan_display,
618
619         /* gets replaced at chip detection time */
620         .fb_fillrect    = cfb_fillrect,
621         .fb_copyarea    = cfb_copyarea,
622         .fb_imageblit   = cfb_imageblit,
623 };
624
625 static int s1d13xxxfb_width_tab[2][4] __devinitdata = {
626         {4, 8, 16, -1},
627         {9, 12, 18, -1},
628 };
629
630 /**
631  *      s1d13xxxfb_fetch_hw_state - Configure the framebuffer according to
632  *      hardware setup.
633  *      @info: frame buffer structure
634  *
635  *      We setup the framebuffer structures according to the current
636  *      hardware setup. On some machines, the BIOS will have filled
637  *      the chip registers with such info, on others, these values will
638  *      have been written in some init procedure. In any case, the
639  *      software values needs to match the hardware ones. This is what
640  *      this function ensures.
641  *
642  *      Note: some of the hardcoded values here might need some love to
643  *      work on various chips, and might need to no longer be hardcoded.
644  */
645 static void __devinit
646 s1d13xxxfb_fetch_hw_state(struct fb_info *info)
647 {
648         struct fb_var_screeninfo *var = &info->var;
649         struct fb_fix_screeninfo *fix = &info->fix;
650         struct s1d13xxxfb_par *par = info->par;
651         u8 panel, display;
652         u16 offset;
653         u32 xres, yres;
654         u32 xres_virtual, yres_virtual;
655         int bpp, lcd_bpp;
656         int is_color, is_dual, is_tft;
657         int lcd_enabled, crt_enabled;
658
659         fix->type = FB_TYPE_PACKED_PIXELS;
660
661         /* general info */
662         par->display = s1d13xxxfb_readreg(par, S1DREG_COM_DISP_MODE);
663         crt_enabled = (par->display & 0x02) != 0;
664         lcd_enabled = (par->display & 0x01) != 0;
665
666         if (lcd_enabled && crt_enabled)
667                 printk(KERN_WARNING PFX "Warning: LCD and CRT detected, using LCD\n");
668
669         if (lcd_enabled)
670                 display = s1d13xxxfb_readreg(par, S1DREG_LCD_DISP_MODE);
671         else    /* CRT */
672                 display = s1d13xxxfb_readreg(par, S1DREG_CRT_DISP_MODE);
673
674         bpp = display & 0x07;
675
676         switch (bpp) {
677                 case 2: /* 4 bpp */
678                 case 3: /* 8 bpp */
679                         var->bits_per_pixel = 8;
680                         var->red.offset = var->green.offset = var->blue.offset = 0;
681                         var->red.length = var->green.length = var->blue.length = 8;
682                         break;
683                 case 5: /* 16 bpp */
684                         s1d13xxxfb_setup_truecolour(info);
685                         break;
686                 default:
687                         dbg("bpp: %i\n", bpp);
688         }
689         fb_alloc_cmap(&info->cmap, 256, 0);
690
691         /* LCD info */
692         panel = s1d13xxxfb_readreg(par, S1DREG_PANEL_TYPE);
693         is_color = (panel & 0x04) != 0;
694         is_dual = (panel & 0x02) != 0;
695         is_tft = (panel & 0x01) != 0;
696         lcd_bpp = s1d13xxxfb_width_tab[is_tft][(panel >> 4) & 3];
697
698         if (lcd_enabled) {
699                 xres = (s1d13xxxfb_readreg(par, S1DREG_LCD_DISP_HWIDTH) + 1) * 8;
700                 yres = (s1d13xxxfb_readreg(par, S1DREG_LCD_DISP_VHEIGHT0) +
701                         ((s1d13xxxfb_readreg(par, S1DREG_LCD_DISP_VHEIGHT1) & 0x03) << 8) + 1);
702
703                 offset = (s1d13xxxfb_readreg(par, S1DREG_LCD_MEM_OFF0) +
704                         ((s1d13xxxfb_readreg(par, S1DREG_LCD_MEM_OFF1) & 0x7) << 8));
705         } else { /* crt */
706                 xres = (s1d13xxxfb_readreg(par, S1DREG_CRT_DISP_HWIDTH) + 1) * 8;
707                 yres = (s1d13xxxfb_readreg(par, S1DREG_CRT_DISP_VHEIGHT0) +
708                         ((s1d13xxxfb_readreg(par, S1DREG_CRT_DISP_VHEIGHT1) & 0x03) << 8) + 1);
709
710                 offset = (s1d13xxxfb_readreg(par, S1DREG_CRT_MEM_OFF0) +
711                         ((s1d13xxxfb_readreg(par, S1DREG_CRT_MEM_OFF1) & 0x7) << 8));
712         }
713         xres_virtual = offset * 16 / var->bits_per_pixel;
714         yres_virtual = fix->smem_len / (offset * 2);
715
716         var->xres               = xres;
717         var->yres               = yres;
718         var->xres_virtual       = xres_virtual;
719         var->yres_virtual       = yres_virtual;
720         var->xoffset            = var->yoffset = 0;
721
722         fix->line_length        = offset * 2;
723
724         var->grayscale          = !is_color;
725
726         var->activate           = FB_ACTIVATE_NOW;
727
728         dbg(PFX "bpp=%d, lcd_bpp=%d, "
729                 "crt_enabled=%d, lcd_enabled=%d\n",
730                 var->bits_per_pixel, lcd_bpp, crt_enabled, lcd_enabled);
731         dbg(PFX "xres=%d, yres=%d, vxres=%d, vyres=%d "
732                 "is_color=%d, is_dual=%d, is_tft=%d\n",
733                 xres, yres, xres_virtual, yres_virtual, is_color, is_dual, is_tft);
734 }
735
736
737 static int
738 s1d13xxxfb_remove(struct platform_device *pdev)
739 {
740         struct fb_info *info = platform_get_drvdata(pdev);
741         struct s1d13xxxfb_par *par = NULL;
742
743         if (info) {
744                 par = info->par;
745                 if (par && par->regs) {
746                         /* disable output & enable powersave */
747                         s1d13xxxfb_writereg(par, S1DREG_COM_DISP_MODE, 0x00);
748                         s1d13xxxfb_writereg(par, S1DREG_PS_CNF, 0x11);
749                         iounmap(par->regs);
750                 }
751
752                 fb_dealloc_cmap(&info->cmap);
753
754                 if (info->screen_base)
755                         iounmap(info->screen_base);
756
757                 framebuffer_release(info);
758         }
759
760         release_mem_region(pdev->resource[0].start,
761                         pdev->resource[0].end - pdev->resource[0].start +1);
762         release_mem_region(pdev->resource[1].start,
763                         pdev->resource[1].end - pdev->resource[1].start +1);
764         return 0;
765 }
766
767 static int __devinit
768 s1d13xxxfb_probe(struct platform_device *pdev)
769 {
770         struct s1d13xxxfb_par *default_par;
771         struct fb_info *info;
772         struct s1d13xxxfb_pdata *pdata = NULL;
773         int ret = 0;
774         int i;
775         u8 revision, prod_id;
776
777         dbg("probe called: device is %p\n", pdev);
778
779         printk(KERN_INFO "Epson S1D13XXX FB Driver\n");
780
781         /* enable platform-dependent hardware glue, if any */
782         if (pdev->dev.platform_data)
783                 pdata = pdev->dev.platform_data;
784
785         if (pdata && pdata->platform_init_video)
786                 pdata->platform_init_video();
787
788         if (pdev->num_resources != 2) {
789                 dev_err(&pdev->dev, "invalid num_resources: %i\n",
790                        pdev->num_resources);
791                 ret = -ENODEV;
792                 goto bail;
793         }
794
795         /* resource[0] is VRAM, resource[1] is registers */
796         if (pdev->resource[0].flags != IORESOURCE_MEM
797                         || pdev->resource[1].flags != IORESOURCE_MEM) {
798                 dev_err(&pdev->dev, "invalid resource type\n");
799                 ret = -ENODEV;
800                 goto bail;
801         }
802
803         if (!request_mem_region(pdev->resource[0].start,
804                 pdev->resource[0].end - pdev->resource[0].start +1, "s1d13xxxfb mem")) {
805                 dev_dbg(&pdev->dev, "request_mem_region failed\n");
806                 ret = -EBUSY;
807                 goto bail;
808         }
809
810         if (!request_mem_region(pdev->resource[1].start,
811                 pdev->resource[1].end - pdev->resource[1].start +1, "s1d13xxxfb regs")) {
812                 dev_dbg(&pdev->dev, "request_mem_region failed\n");
813                 ret = -EBUSY;
814                 goto bail;
815         }
816
817         info = framebuffer_alloc(sizeof(struct s1d13xxxfb_par) + sizeof(u32) * 256, &pdev->dev);
818         if (!info) {
819                 ret = -ENOMEM;
820                 goto bail;
821         }
822
823         platform_set_drvdata(pdev, info);
824         default_par = info->par;
825         default_par->regs = ioremap_nocache(pdev->resource[1].start,
826                         pdev->resource[1].end - pdev->resource[1].start +1);
827         if (!default_par->regs) {
828                 printk(KERN_ERR PFX "unable to map registers\n");
829                 ret = -ENOMEM;
830                 goto bail;
831         }
832         info->pseudo_palette = default_par->pseudo_palette;
833
834         info->screen_base = ioremap_nocache(pdev->resource[0].start,
835                         pdev->resource[0].end - pdev->resource[0].start +1);
836
837         if (!info->screen_base) {
838                 printk(KERN_ERR PFX "unable to map framebuffer\n");
839                 ret = -ENOMEM;
840                 goto bail;
841         }
842
843         /* production id is top 6 bits */
844         prod_id = s1d13xxxfb_readreg(default_par, S1DREG_REV_CODE) >> 2;
845         /* revision id is lower 2 bits */
846         revision = s1d13xxxfb_readreg(default_par, S1DREG_REV_CODE) & 0x3;
847         ret = -ENODEV;
848
849         for (i = 0; i < ARRAY_SIZE(s1d13xxxfb_prod_ids); i++) {
850                 if (prod_id == s1d13xxxfb_prod_ids[i]) {
851                         /* looks like we got it in our list */
852                         default_par->prod_id = prod_id;
853                         default_par->revision = revision;
854                         ret = 0;
855                         break;
856                 }
857         }
858
859         if (!ret) {
860                 printk(KERN_INFO PFX "chip production id %i = %s\n",
861                         prod_id, s1d13xxxfb_prod_names[i]);
862                 printk(KERN_INFO PFX "chip revision %i\n", revision);
863         } else {
864                 printk(KERN_INFO PFX
865                         "unknown chip production id %i, revision %i\n",
866                         prod_id, revision);
867                 printk(KERN_INFO PFX "please contant maintainer\n");
868                 goto bail;
869         }
870
871         info->fix = s1d13xxxfb_fix;
872         info->fix.mmio_start = pdev->resource[1].start;
873         info->fix.mmio_len = pdev->resource[1].end - pdev->resource[1].start + 1;
874         info->fix.smem_start = pdev->resource[0].start;
875         info->fix.smem_len = pdev->resource[0].end - pdev->resource[0].start + 1;
876
877         printk(KERN_INFO PFX "regs mapped at 0x%p, fb %d KiB mapped at 0x%p\n",
878                default_par->regs, info->fix.smem_len / 1024, info->screen_base);
879
880         info->par = default_par;
881         info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
882         info->fbops = &s1d13xxxfb_fbops;
883
884         switch(prod_id) {
885         case S1D13506_PROD_ID:  /* activate acceleration */
886                 s1d13xxxfb_fbops.fb_fillrect = s1d13xxxfb_bitblt_solidfill;
887                 s1d13xxxfb_fbops.fb_copyarea = s1d13xxxfb_bitblt_copyarea;
888                 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN |
889                         FBINFO_HWACCEL_FILLRECT | FBINFO_HWACCEL_COPYAREA;
890                 break;
891         default:
892                 break;
893         }
894
895         /* perform "manual" chip initialization, if needed */
896         if (pdata && pdata->initregs)
897                 s1d13xxxfb_runinit(info->par, pdata->initregs, pdata->initregssize);
898
899         s1d13xxxfb_fetch_hw_state(info);
900
901         if (register_framebuffer(info) < 0) {
902                 ret = -EINVAL;
903                 goto bail;
904         }
905
906         printk(KERN_INFO "fb%d: %s frame buffer device\n",
907                info->node, info->fix.id);
908
909         return 0;
910
911 bail:
912         s1d13xxxfb_remove(pdev);
913         return ret;
914
915 }
916
917 #ifdef CONFIG_PM
918 static int s1d13xxxfb_suspend(struct platform_device *dev, pm_message_t state)
919 {
920         struct fb_info *info = platform_get_drvdata(dev);
921         struct s1d13xxxfb_par *s1dfb = info->par;
922         struct s1d13xxxfb_pdata *pdata = NULL;
923
924         /* disable display */
925         lcd_enable(s1dfb, 0);
926         crt_enable(s1dfb, 0);
927
928         if (dev->dev.platform_data)
929                 pdata = dev->dev.platform_data;
930
931 #if 0
932         if (!s1dfb->disp_save)
933                 s1dfb->disp_save = kmalloc(info->fix.smem_len, GFP_KERNEL);
934
935         if (!s1dfb->disp_save) {
936                 printk(KERN_ERR PFX "no memory to save screen");
937                 return -ENOMEM;
938         }
939
940         memcpy_fromio(s1dfb->disp_save, info->screen_base, info->fix.smem_len);
941 #else
942         s1dfb->disp_save = NULL;
943 #endif
944
945         if (!s1dfb->regs_save)
946                 s1dfb->regs_save = kmalloc(info->fix.mmio_len, GFP_KERNEL);
947
948         if (!s1dfb->regs_save) {
949                 printk(KERN_ERR PFX "no memory to save registers");
950                 return -ENOMEM;
951         }
952
953         /* backup all registers */
954         memcpy_fromio(s1dfb->regs_save, s1dfb->regs, info->fix.mmio_len);
955
956         /* now activate power save mode */
957         s1d13xxxfb_writereg(s1dfb, S1DREG_PS_CNF, 0x11);
958
959         if (pdata && pdata->platform_suspend_video)
960                 return pdata->platform_suspend_video();
961         else
962                 return 0;
963 }
964
965 static int s1d13xxxfb_resume(struct platform_device *dev)
966 {
967         struct fb_info *info = platform_get_drvdata(dev);
968         struct s1d13xxxfb_par *s1dfb = info->par;
969         struct s1d13xxxfb_pdata *pdata = NULL;
970
971         /* awaken the chip */
972         s1d13xxxfb_writereg(s1dfb, S1DREG_PS_CNF, 0x10);
973
974         /* do not let go until SDRAM "wakes up" */
975         while ((s1d13xxxfb_readreg(s1dfb, S1DREG_PS_STATUS) & 0x01))
976                 udelay(10);
977
978         if (dev->dev.platform_data)
979                 pdata = dev->dev.platform_data;
980
981         if (s1dfb->regs_save) {
982                 /* will write RO regs, *should* get away with it :) */
983                 memcpy_toio(s1dfb->regs, s1dfb->regs_save, info->fix.mmio_len);
984                 kfree(s1dfb->regs_save);
985         }
986
987         if (s1dfb->disp_save) {
988                 memcpy_toio(info->screen_base, s1dfb->disp_save,
989                                 info->fix.smem_len);
990                 kfree(s1dfb->disp_save);        /* XXX kmalloc()'d when? */
991         }
992
993         if ((s1dfb->display & 0x01) != 0)
994                 lcd_enable(s1dfb, 1);
995         if ((s1dfb->display & 0x02) != 0)
996                 crt_enable(s1dfb, 1);
997
998         if (pdata && pdata->platform_resume_video)
999                 return pdata->platform_resume_video();
1000         else
1001                 return 0;
1002 }
1003 #endif /* CONFIG_PM */
1004
1005 static struct platform_driver s1d13xxxfb_driver = {
1006         .probe          = s1d13xxxfb_probe,
1007         .remove         = s1d13xxxfb_remove,
1008 #ifdef CONFIG_PM
1009         .suspend        = s1d13xxxfb_suspend,
1010         .resume         = s1d13xxxfb_resume,
1011 #endif
1012         .driver         = {
1013                 .name   = S1D_DEVICENAME,
1014         },
1015 };
1016
1017
1018 static int __init
1019 s1d13xxxfb_init(void)
1020 {
1021
1022 #ifndef MODULE
1023         if (fb_get_options("s1d13xxxfb", NULL))
1024                 return -ENODEV;
1025 #endif
1026
1027         return platform_driver_register(&s1d13xxxfb_driver);
1028 }
1029
1030
1031 static void __exit
1032 s1d13xxxfb_exit(void)
1033 {
1034         platform_driver_unregister(&s1d13xxxfb_driver);
1035 }
1036
1037 module_init(s1d13xxxfb_init);
1038 module_exit(s1d13xxxfb_exit);
1039
1040
1041 MODULE_LICENSE("GPL");
1042 MODULE_DESCRIPTION("Framebuffer driver for S1D13xxx devices");
1043 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>, Thibaut VARENE <varenet@parisc-linux.org>");