bfb802d26d5af7286a59364c15f50ca9f881e97e
[linux-2.6.git] / drivers / video / neofb.c
1 /*
2  * linux/drivers/video/neofb.c -- NeoMagic Framebuffer Driver
3  *
4  * Copyright (c) 2001-2002  Denis Oliver Kropp <dok@directfb.org>
5  *
6  *
7  * Card specific code is based on XFree86's neomagic driver.
8  * Framebuffer framework code is based on code of cyber2000fb.
9  *
10  * This file is subject to the terms and conditions of the GNU General
11  * Public License.  See the file COPYING in the main directory of this
12  * archive for more details.
13  *
14  *
15  * 0.4.1
16  *  - Cosmetic changes (dok)
17  *
18  * 0.4
19  *  - Toshiba Libretto support, allow modes larger than LCD size if
20  *    LCD is disabled, keep BIOS settings if internal/external display
21  *    haven't been enabled explicitly
22  *                          (Thomas J. Moore <dark@mama.indstate.edu>)
23  *
24  * 0.3.3
25  *  - Porting over to new fbdev api. (jsimmons)
26  *  
27  * 0.3.2
28  *  - got rid of all floating point (dok) 
29  *
30  * 0.3.1
31  *  - added module license (dok)
32  *
33  * 0.3
34  *  - hardware accelerated clear and move for 2200 and above (dok)
35  *  - maximum allowed dotclock is handled now (dok)
36  *
37  * 0.2.1
38  *  - correct panning after X usage (dok)
39  *  - added module and kernel parameters (dok)
40  *  - no stretching if external display is enabled (dok)
41  *
42  * 0.2
43  *  - initial version (dok)
44  *
45  *
46  * TODO
47  * - ioctl for internal/external switching
48  * - blanking
49  * - 32bit depth support, maybe impossible
50  * - disable pan-on-sync, need specs
51  *
52  * BUGS
53  * - white margin on bootup like with tdfxfb (colormap problem?)
54  *
55  */
56
57 #include <linux/module.h>
58 #include <linux/kernel.h>
59 #include <linux/errno.h>
60 #include <linux/string.h>
61 #include <linux/mm.h>
62 #include <linux/slab.h>
63 #include <linux/delay.h>
64 #include <linux/fb.h>
65 #include <linux/pci.h>
66 #include <linux/init.h>
67 #ifdef CONFIG_TOSHIBA
68 #include <linux/toshiba.h>
69 #endif
70
71 #include <asm/io.h>
72 #include <asm/irq.h>
73 #include <asm/pgtable.h>
74 #include <asm/system.h>
75
76 #ifdef CONFIG_MTRR
77 #include <asm/mtrr.h>
78 #endif
79
80 #include <video/vga.h>
81 #include <video/neomagic.h>
82
83 #define NEOFB_VERSION "0.4.2"
84
85 /* --------------------------------------------------------------------- */
86
87 static int internal;
88 static int external;
89 static int libretto;
90 static int nostretch;
91 static int nopciburst;
92 static char *mode_option __devinitdata = NULL;
93
94 #ifdef MODULE
95
96 MODULE_AUTHOR("(c) 2001-2002  Denis Oliver Kropp <dok@convergence.de>");
97 MODULE_LICENSE("GPL");
98 MODULE_DESCRIPTION("FBDev driver for NeoMagic PCI Chips");
99 module_param(internal, bool, 0);
100 MODULE_PARM_DESC(internal, "Enable output on internal LCD Display.");
101 module_param(external, bool, 0);
102 MODULE_PARM_DESC(external, "Enable output on external CRT.");
103 module_param(libretto, bool, 0);
104 MODULE_PARM_DESC(libretto, "Force Libretto 100/110 800x480 LCD.");
105 module_param(nostretch, bool, 0);
106 MODULE_PARM_DESC(nostretch,
107                  "Disable stretching of modes smaller than LCD.");
108 module_param(nopciburst, bool, 0);
109 MODULE_PARM_DESC(nopciburst, "Disable PCI burst mode.");
110 module_param(mode_option, charp, 0);
111 MODULE_PARM_DESC(mode_option, "Preferred video mode ('640x480-8@60', etc)");
112
113 #endif
114
115
116 /* --------------------------------------------------------------------- */
117
118 static biosMode bios8[] = {
119         {320, 240, 0x40},
120         {300, 400, 0x42},
121         {640, 400, 0x20},
122         {640, 480, 0x21},
123         {800, 600, 0x23},
124         {1024, 768, 0x25},
125 };
126
127 static biosMode bios16[] = {
128         {320, 200, 0x2e},
129         {320, 240, 0x41},
130         {300, 400, 0x43},
131         {640, 480, 0x31},
132         {800, 600, 0x34},
133         {1024, 768, 0x37},
134 };
135
136 static biosMode bios24[] = {
137         {640, 480, 0x32},
138         {800, 600, 0x35},
139         {1024, 768, 0x38}
140 };
141
142 #ifdef NO_32BIT_SUPPORT_YET
143 /* FIXME: guessed values, wrong */
144 static biosMode bios32[] = {
145         {640, 480, 0x33},
146         {800, 600, 0x36},
147         {1024, 768, 0x39}
148 };
149 #endif
150
151 static inline void write_le32(int regindex, u32 val, const struct neofb_par *par)
152 {
153         writel(val, par->neo2200 + par->cursorOff + regindex);
154 }
155
156 static int neoFindMode(int xres, int yres, int depth)
157 {
158         int xres_s;
159         int i, size;
160         biosMode *mode;
161
162         switch (depth) {
163         case 8:
164                 size = ARRAY_SIZE(bios8);
165                 mode = bios8;
166                 break;
167         case 16:
168                 size = ARRAY_SIZE(bios16);
169                 mode = bios16;
170                 break;
171         case 24:
172                 size = ARRAY_SIZE(bios24);
173                 mode = bios24;
174                 break;
175 #ifdef NO_32BIT_SUPPORT_YET
176         case 32:
177                 size = ARRAY_SIZE(bios32);
178                 mode = bios32;
179                 break;
180 #endif
181         default:
182                 return 0;
183         }
184
185         for (i = 0; i < size; i++) {
186                 if (xres <= mode[i].x_res) {
187                         xres_s = mode[i].x_res;
188                         for (; i < size; i++) {
189                                 if (mode[i].x_res != xres_s)
190                                         return mode[i - 1].mode;
191                                 if (yres <= mode[i].y_res)
192                                         return mode[i].mode;
193                         }
194                 }
195         }
196         return mode[size - 1].mode;
197 }
198
199 /*
200  * neoCalcVCLK --
201  *
202  * Determine the closest clock frequency to the one requested.
203  */
204 #define MAX_N 127
205 #define MAX_D 31
206 #define MAX_F 1
207
208 static void neoCalcVCLK(const struct fb_info *info,
209                         struct neofb_par *par, long freq)
210 {
211         int n, d, f;
212         int n_best = 0, d_best = 0, f_best = 0;
213         long f_best_diff = 0x7ffff;
214
215         for (f = 0; f <= MAX_F; f++)
216                 for (d = 0; d <= MAX_D; d++)
217                         for (n = 0; n <= MAX_N; n++) {
218                                 long f_out;
219                                 long f_diff;
220
221                                 f_out = ((14318 * (n + 1)) / (d + 1)) >> f;
222                                 f_diff = abs(f_out - freq);
223                                 if (f_diff <= f_best_diff) {
224                                         f_best_diff = f_diff;
225                                         n_best = n;
226                                         d_best = d;
227                                         f_best = f;
228                                 }
229                                 if (f_out > freq)
230                                         break;
231                         }
232
233         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
234             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
235             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
236             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
237                 /* NOT_DONE:  We are trying the full range of the 2200 clock.
238                    We should be able to try n up to 2047 */
239                 par->VCLK3NumeratorLow = n_best;
240                 par->VCLK3NumeratorHigh = (f_best << 7);
241         } else
242                 par->VCLK3NumeratorLow = n_best | (f_best << 7);
243
244         par->VCLK3Denominator = d_best;
245
246 #ifdef NEOFB_DEBUG
247         printk(KERN_DEBUG "neoVCLK: f:%ld NumLow=%d NumHi=%d Den=%d Df=%ld\n",
248                freq,
249                par->VCLK3NumeratorLow,
250                par->VCLK3NumeratorHigh,
251                par->VCLK3Denominator, f_best_diff);
252 #endif
253 }
254
255 /*
256  * vgaHWInit --
257  *      Handle the initialization, etc. of a screen.
258  *      Return FALSE on failure.
259  */
260
261 static int vgaHWInit(const struct fb_var_screeninfo *var,
262                      struct neofb_par *par)
263 {
264         int hsync_end = var->xres + var->right_margin + var->hsync_len;
265         int htotal = (hsync_end + var->left_margin) >> 3;
266         int vsync_start = var->yres + var->lower_margin;
267         int vsync_end = vsync_start + var->vsync_len;
268         int vtotal = vsync_end + var->upper_margin;
269
270         par->MiscOutReg = 0x23;
271
272         if (!(var->sync & FB_SYNC_HOR_HIGH_ACT))
273                 par->MiscOutReg |= 0x40;
274
275         if (!(var->sync & FB_SYNC_VERT_HIGH_ACT))
276                 par->MiscOutReg |= 0x80;
277
278         /*
279          * Time Sequencer
280          */
281         par->Sequencer[0] = 0x00;
282         par->Sequencer[1] = 0x01;
283         par->Sequencer[2] = 0x0F;
284         par->Sequencer[3] = 0x00;       /* Font select */
285         par->Sequencer[4] = 0x0E;       /* Misc */
286
287         /*
288          * CRTC Controller
289          */
290         par->CRTC[0] = htotal - 5;
291         par->CRTC[1] = (var->xres >> 3) - 1;
292         par->CRTC[2] = (var->xres >> 3) - 1;
293         par->CRTC[3] = ((htotal - 1) & 0x1F) | 0x80;
294         par->CRTC[4] = ((var->xres + var->right_margin) >> 3);
295         par->CRTC[5] = (((htotal - 1) & 0x20) << 2)
296             | (((hsync_end >> 3)) & 0x1F);
297         par->CRTC[6] = (vtotal - 2) & 0xFF;
298         par->CRTC[7] = (((vtotal - 2) & 0x100) >> 8)
299             | (((var->yres - 1) & 0x100) >> 7)
300             | ((vsync_start & 0x100) >> 6)
301             | (((var->yres - 1) & 0x100) >> 5)
302             | 0x10 | (((vtotal - 2) & 0x200) >> 4)
303             | (((var->yres - 1) & 0x200) >> 3)
304             | ((vsync_start & 0x200) >> 2);
305         par->CRTC[8] = 0x00;
306         par->CRTC[9] = (((var->yres - 1) & 0x200) >> 4) | 0x40;
307
308         if (var->vmode & FB_VMODE_DOUBLE)
309                 par->CRTC[9] |= 0x80;
310
311         par->CRTC[10] = 0x00;
312         par->CRTC[11] = 0x00;
313         par->CRTC[12] = 0x00;
314         par->CRTC[13] = 0x00;
315         par->CRTC[14] = 0x00;
316         par->CRTC[15] = 0x00;
317         par->CRTC[16] = vsync_start & 0xFF;
318         par->CRTC[17] = (vsync_end & 0x0F) | 0x20;
319         par->CRTC[18] = (var->yres - 1) & 0xFF;
320         par->CRTC[19] = var->xres_virtual >> 4;
321         par->CRTC[20] = 0x00;
322         par->CRTC[21] = (var->yres - 1) & 0xFF;
323         par->CRTC[22] = (vtotal - 1) & 0xFF;
324         par->CRTC[23] = 0xC3;
325         par->CRTC[24] = 0xFF;
326
327         /*
328          * are these unnecessary?
329          * vgaHWHBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
330          * vgaHWVBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
331          */
332
333         /*
334          * Graphics Display Controller
335          */
336         par->Graphics[0] = 0x00;
337         par->Graphics[1] = 0x00;
338         par->Graphics[2] = 0x00;
339         par->Graphics[3] = 0x00;
340         par->Graphics[4] = 0x00;
341         par->Graphics[5] = 0x40;
342         par->Graphics[6] = 0x05;        /* only map 64k VGA memory !!!! */
343         par->Graphics[7] = 0x0F;
344         par->Graphics[8] = 0xFF;
345
346
347         par->Attribute[0] = 0x00;       /* standard colormap translation */
348         par->Attribute[1] = 0x01;
349         par->Attribute[2] = 0x02;
350         par->Attribute[3] = 0x03;
351         par->Attribute[4] = 0x04;
352         par->Attribute[5] = 0x05;
353         par->Attribute[6] = 0x06;
354         par->Attribute[7] = 0x07;
355         par->Attribute[8] = 0x08;
356         par->Attribute[9] = 0x09;
357         par->Attribute[10] = 0x0A;
358         par->Attribute[11] = 0x0B;
359         par->Attribute[12] = 0x0C;
360         par->Attribute[13] = 0x0D;
361         par->Attribute[14] = 0x0E;
362         par->Attribute[15] = 0x0F;
363         par->Attribute[16] = 0x41;
364         par->Attribute[17] = 0xFF;
365         par->Attribute[18] = 0x0F;
366         par->Attribute[19] = 0x00;
367         par->Attribute[20] = 0x00;
368         return 0;
369 }
370
371 static void vgaHWLock(struct vgastate *state)
372 {
373         /* Protect CRTC[0-7] */
374         vga_wcrt(state->vgabase, 0x11, vga_rcrt(state->vgabase, 0x11) | 0x80);
375 }
376
377 static void vgaHWUnlock(void)
378 {
379         /* Unprotect CRTC[0-7] */
380         vga_wcrt(NULL, 0x11, vga_rcrt(NULL, 0x11) & ~0x80);
381 }
382
383 static void neoLock(struct vgastate *state)
384 {
385         vga_wgfx(state->vgabase, 0x09, 0x00);
386         vgaHWLock(state);
387 }
388
389 static void neoUnlock(void)
390 {
391         vgaHWUnlock();
392         vga_wgfx(NULL, 0x09, 0x26);
393 }
394
395 /*
396  * VGA Palette management
397  */
398 static int paletteEnabled = 0;
399
400 static inline void VGAenablePalette(void)
401 {
402         vga_r(NULL, VGA_IS1_RC);
403         vga_w(NULL, VGA_ATT_W, 0x00);
404         paletteEnabled = 1;
405 }
406
407 static inline void VGAdisablePalette(void)
408 {
409         vga_r(NULL, VGA_IS1_RC);
410         vga_w(NULL, VGA_ATT_W, 0x20);
411         paletteEnabled = 0;
412 }
413
414 static inline void VGAwATTR(u8 index, u8 value)
415 {
416         if (paletteEnabled)
417                 index &= ~0x20;
418         else
419                 index |= 0x20;
420
421         vga_r(NULL, VGA_IS1_RC);
422         vga_wattr(NULL, index, value);
423 }
424
425 static void vgaHWProtect(int on)
426 {
427         unsigned char tmp;
428
429         tmp = vga_rseq(NULL, 0x01);
430         if (on) {
431                 /*
432                  * Turn off screen and disable sequencer.
433                  */
434                 vga_wseq(NULL, 0x00, 0x01);             /* Synchronous Reset */
435                 vga_wseq(NULL, 0x01, tmp | 0x20);       /* disable the display */
436
437                 VGAenablePalette();
438         } else {
439                 /*
440                  * Reenable sequencer, then turn on screen.
441                  */
442                 vga_wseq(NULL, 0x01, tmp & ~0x20);      /* reenable display */
443                 vga_wseq(NULL, 0x00, 0x03);             /* clear synchronousreset */
444
445                 VGAdisablePalette();
446         }
447 }
448
449 static void vgaHWRestore(const struct fb_info *info,
450                          const struct neofb_par *par)
451 {
452         int i;
453
454         vga_w(NULL, VGA_MIS_W, par->MiscOutReg);
455
456         for (i = 1; i < 5; i++)
457                 vga_wseq(NULL, i, par->Sequencer[i]);
458
459         /* Ensure CRTC registers 0-7 are unlocked by clearing bit 7 or CRTC[17] */
460         vga_wcrt(NULL, 17, par->CRTC[17] & ~0x80);
461
462         for (i = 0; i < 25; i++)
463                 vga_wcrt(NULL, i, par->CRTC[i]);
464
465         for (i = 0; i < 9; i++)
466                 vga_wgfx(NULL, i, par->Graphics[i]);
467
468         VGAenablePalette();
469
470         for (i = 0; i < 21; i++)
471                 VGAwATTR(i, par->Attribute[i]);
472
473         VGAdisablePalette();
474 }
475
476
477 /* -------------------- Hardware specific routines ------------------------- */
478
479 /*
480  * Hardware Acceleration for Neo2200+
481  */
482 static inline int neo2200_sync(struct fb_info *info)
483 {
484         struct neofb_par *par = info->par;
485
486         while (readl(&par->neo2200->bltStat) & 1)
487                 cpu_relax();
488         return 0;
489 }
490
491 static inline void neo2200_wait_fifo(struct fb_info *info,
492                                      int requested_fifo_space)
493 {
494         //  ndev->neo.waitfifo_calls++;
495         //  ndev->neo.waitfifo_sum += requested_fifo_space;
496
497         /* FIXME: does not work
498            if (neo_fifo_space < requested_fifo_space)
499            {
500            neo_fifo_waitcycles++;
501
502            while (1)
503            {
504            neo_fifo_space = (neo2200->bltStat >> 8);
505            if (neo_fifo_space >= requested_fifo_space)
506            break;
507            }
508            }
509            else
510            {
511            neo_fifo_cache_hits++;
512            }
513
514            neo_fifo_space -= requested_fifo_space;
515          */
516
517         neo2200_sync(info);
518 }
519
520 static inline void neo2200_accel_init(struct fb_info *info,
521                                       struct fb_var_screeninfo *var)
522 {
523         struct neofb_par *par = info->par;
524         Neo2200 __iomem *neo2200 = par->neo2200;
525         u32 bltMod, pitch;
526
527         neo2200_sync(info);
528
529         switch (var->bits_per_pixel) {
530         case 8:
531                 bltMod = NEO_MODE1_DEPTH8;
532                 pitch = var->xres_virtual;
533                 break;
534         case 15:
535         case 16:
536                 bltMod = NEO_MODE1_DEPTH16;
537                 pitch = var->xres_virtual * 2;
538                 break;
539         case 24:
540                 bltMod = NEO_MODE1_DEPTH24;
541                 pitch = var->xres_virtual * 3;
542                 break;
543         default:
544                 printk(KERN_ERR
545                        "neofb: neo2200_accel_init: unexpected bits per pixel!\n");
546                 return;
547         }
548
549         writel(bltMod << 16, &neo2200->bltStat);
550         writel((pitch << 16) | pitch, &neo2200->pitch);
551 }
552
553 /* --------------------------------------------------------------------- */
554
555 static int
556 neofb_open(struct fb_info *info, int user)
557 {
558         struct neofb_par *par = info->par;
559
560         if (!par->ref_count) {
561                 memset(&par->state, 0, sizeof(struct vgastate));
562                 par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS;
563                 save_vga(&par->state);
564         }
565         par->ref_count++;
566
567         return 0;
568 }
569
570 static int
571 neofb_release(struct fb_info *info, int user)
572 {
573         struct neofb_par *par = info->par;
574
575         if (!par->ref_count)
576                 return -EINVAL;
577
578         if (par->ref_count == 1) {
579                 restore_vga(&par->state);
580         }
581         par->ref_count--;
582
583         return 0;
584 }
585
586 static int
587 neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
588 {
589         struct neofb_par *par = info->par;
590         int memlen, vramlen;
591         int mode_ok = 0;
592
593         DBG("neofb_check_var");
594
595         if (PICOS2KHZ(var->pixclock) > par->maxClock)
596                 return -EINVAL;
597
598         /* Is the mode larger than the LCD panel? */
599         if (par->internal_display &&
600             ((var->xres > par->NeoPanelWidth) ||
601              (var->yres > par->NeoPanelHeight))) {
602                 printk(KERN_INFO
603                        "Mode (%dx%d) larger than the LCD panel (%dx%d)\n",
604                        var->xres, var->yres, par->NeoPanelWidth,
605                        par->NeoPanelHeight);
606                 return -EINVAL;
607         }
608
609         /* Is the mode one of the acceptable sizes? */
610         if (!par->internal_display)
611                 mode_ok = 1;
612         else {
613                 switch (var->xres) {
614                 case 1280:
615                         if (var->yres == 1024)
616                                 mode_ok = 1;
617                         break;
618                 case 1024:
619                         if (var->yres == 768)
620                                 mode_ok = 1;
621                         break;
622                 case 800:
623                         if (var->yres == (par->libretto ? 480 : 600))
624                                 mode_ok = 1;
625                         break;
626                 case 640:
627                         if (var->yres == 480)
628                                 mode_ok = 1;
629                         break;
630                 }
631         }
632
633         if (!mode_ok) {
634                 printk(KERN_INFO
635                        "Mode (%dx%d) won't display properly on LCD\n",
636                        var->xres, var->yres);
637                 return -EINVAL;
638         }
639
640         var->red.msb_right = 0;
641         var->green.msb_right = 0;
642         var->blue.msb_right = 0;
643         var->transp.msb_right = 0;
644
645         var->transp.offset = 0;
646         var->transp.length = 0;
647         switch (var->bits_per_pixel) {
648         case 8:         /* PSEUDOCOLOUR, 256 */
649                 var->red.offset = 0;
650                 var->red.length = 8;
651                 var->green.offset = 0;
652                 var->green.length = 8;
653                 var->blue.offset = 0;
654                 var->blue.length = 8;
655                 break;
656
657         case 16:                /* DIRECTCOLOUR, 64k */
658                 var->red.offset = 11;
659                 var->red.length = 5;
660                 var->green.offset = 5;
661                 var->green.length = 6;
662                 var->blue.offset = 0;
663                 var->blue.length = 5;
664                 break;
665
666         case 24:                /* TRUECOLOUR, 16m */
667                 var->red.offset = 16;
668                 var->red.length = 8;
669                 var->green.offset = 8;
670                 var->green.length = 8;
671                 var->blue.offset = 0;
672                 var->blue.length = 8;
673                 break;
674
675 #ifdef NO_32BIT_SUPPORT_YET
676         case 32:                /* TRUECOLOUR, 16m */
677                 var->transp.offset = 24;
678                 var->transp.length = 8;
679                 var->red.offset = 16;
680                 var->red.length = 8;
681                 var->green.offset = 8;
682                 var->green.length = 8;
683                 var->blue.offset = 0;
684                 var->blue.length = 8;
685                 break;
686 #endif
687         default:
688                 printk(KERN_WARNING "neofb: no support for %dbpp\n",
689                        var->bits_per_pixel);
690                 return -EINVAL;
691         }
692
693         vramlen = info->fix.smem_len;
694         if (vramlen > 4 * 1024 * 1024)
695                 vramlen = 4 * 1024 * 1024;
696
697         if (var->xres_virtual < var->xres)
698                 var->xres_virtual = var->xres;
699
700         memlen = var->xres_virtual * var->bits_per_pixel * var->yres_virtual >> 3;
701
702         if (memlen > vramlen) {
703                 var->yres_virtual =  vramlen * 8 / (var->xres_virtual *
704                                         var->bits_per_pixel);
705                 memlen = var->xres_virtual * var->bits_per_pixel *
706                                 var->yres_virtual / 8;
707         }
708
709         /* we must round yres/xres down, we already rounded y/xres_virtual up
710            if it was possible. We should return -EINVAL, but I disagree */
711         if (var->yres_virtual < var->yres)
712                 var->yres = var->yres_virtual;
713         if (var->xoffset + var->xres > var->xres_virtual)
714                 var->xoffset = var->xres_virtual - var->xres;
715         if (var->yoffset + var->yres > var->yres_virtual)
716                 var->yoffset = var->yres_virtual - var->yres;
717
718         var->nonstd = 0;
719         var->height = -1;
720         var->width = -1;
721
722         if (var->bits_per_pixel >= 24 || !par->neo2200)
723                 var->accel_flags &= ~FB_ACCELF_TEXT;
724         return 0;
725 }
726
727 static int neofb_set_par(struct fb_info *info)
728 {
729         struct neofb_par *par = info->par;
730         unsigned char temp;
731         int i, clock_hi = 0;
732         int lcd_stretch;
733         int hoffset, voffset;
734         int vsync_start, vtotal;
735
736         DBG("neofb_set_par");
737
738         neoUnlock();
739
740         vgaHWProtect(1);        /* Blank the screen */
741
742         vsync_start = info->var.yres + info->var.lower_margin;
743         vtotal = vsync_start + info->var.vsync_len + info->var.upper_margin;
744
745         /*
746          * This will allocate the datastructure and initialize all of the
747          * generic VGA registers.
748          */
749
750         if (vgaHWInit(&info->var, par))
751                 return -EINVAL;
752
753         /*
754          * The default value assigned by vgaHW.c is 0x41, but this does
755          * not work for NeoMagic.
756          */
757         par->Attribute[16] = 0x01;
758
759         switch (info->var.bits_per_pixel) {
760         case 8:
761                 par->CRTC[0x13] = info->var.xres_virtual >> 3;
762                 par->ExtCRTOffset = info->var.xres_virtual >> 11;
763                 par->ExtColorModeSelect = 0x11;
764                 break;
765         case 16:
766                 par->CRTC[0x13] = info->var.xres_virtual >> 2;
767                 par->ExtCRTOffset = info->var.xres_virtual >> 10;
768                 par->ExtColorModeSelect = 0x13;
769                 break;
770         case 24:
771                 par->CRTC[0x13] = (info->var.xres_virtual * 3) >> 3;
772                 par->ExtCRTOffset = (info->var.xres_virtual * 3) >> 11;
773                 par->ExtColorModeSelect = 0x14;
774                 break;
775 #ifdef NO_32BIT_SUPPORT_YET
776         case 32:                /* FIXME: guessed values */
777                 par->CRTC[0x13] = info->var.xres_virtual >> 1;
778                 par->ExtCRTOffset = info->var.xres_virtual >> 9;
779                 par->ExtColorModeSelect = 0x15;
780                 break;
781 #endif
782         default:
783                 break;
784         }
785
786         par->ExtCRTDispAddr = 0x10;
787
788         /* Vertical Extension */
789         par->VerticalExt = (((vtotal - 2) & 0x400) >> 10)
790             | (((info->var.yres - 1) & 0x400) >> 9)
791             | (((vsync_start) & 0x400) >> 8)
792             | (((vsync_start) & 0x400) >> 7);
793
794         /* Fast write bursts on unless disabled. */
795         if (par->pci_burst)
796                 par->SysIfaceCntl1 = 0x30;
797         else
798                 par->SysIfaceCntl1 = 0x00;
799
800         par->SysIfaceCntl2 = 0xc0;      /* VESA Bios sets this to 0x80! */
801
802         /* Initialize: by default, we want display config register to be read */
803         par->PanelDispCntlRegRead = 1;
804
805         /* Enable any user specified display devices. */
806         par->PanelDispCntlReg1 = 0x00;
807         if (par->internal_display)
808                 par->PanelDispCntlReg1 |= 0x02;
809         if (par->external_display)
810                 par->PanelDispCntlReg1 |= 0x01;
811
812         /* If the user did not specify any display devices, then... */
813         if (par->PanelDispCntlReg1 == 0x00) {
814                 /* Default to internal (i.e., LCD) only. */
815                 par->PanelDispCntlReg1 = vga_rgfx(NULL, 0x20) & 0x03;
816         }
817
818         /* If we are using a fixed mode, then tell the chip we are. */
819         switch (info->var.xres) {
820         case 1280:
821                 par->PanelDispCntlReg1 |= 0x60;
822                 break;
823         case 1024:
824                 par->PanelDispCntlReg1 |= 0x40;
825                 break;
826         case 800:
827                 par->PanelDispCntlReg1 |= 0x20;
828                 break;
829         case 640:
830         default:
831                 break;
832         }
833
834         /* Setup shadow register locking. */
835         switch (par->PanelDispCntlReg1 & 0x03) {
836         case 0x01:              /* External CRT only mode: */
837                 par->GeneralLockReg = 0x00;
838                 /* We need to program the VCLK for external display only mode. */
839                 par->ProgramVCLK = 1;
840                 break;
841         case 0x02:              /* Internal LCD only mode: */
842         case 0x03:              /* Simultaneous internal/external (LCD/CRT) mode: */
843                 par->GeneralLockReg = 0x01;
844                 /* Don't program the VCLK when using the LCD. */
845                 par->ProgramVCLK = 0;
846                 break;
847         }
848
849         /*
850          * If the screen is to be stretched, turn on stretching for the
851          * various modes.
852          *
853          * OPTION_LCD_STRETCH means stretching should be turned off!
854          */
855         par->PanelDispCntlReg2 = 0x00;
856         par->PanelDispCntlReg3 = 0x00;
857
858         if (par->lcd_stretch && (par->PanelDispCntlReg1 == 0x02) &&     /* LCD only */
859             (info->var.xres != par->NeoPanelWidth)) {
860                 switch (info->var.xres) {
861                 case 320:       /* Needs testing.  KEM -- 24 May 98 */
862                 case 400:       /* Needs testing.  KEM -- 24 May 98 */
863                 case 640:
864                 case 800:
865                 case 1024:
866                         lcd_stretch = 1;
867                         par->PanelDispCntlReg2 |= 0xC6;
868                         break;
869                 default:
870                         lcd_stretch = 0;
871                         /* No stretching in these modes. */
872                 }
873         } else
874                 lcd_stretch = 0;
875
876         /*
877          * If the screen is to be centerd, turn on the centering for the
878          * various modes.
879          */
880         par->PanelVertCenterReg1 = 0x00;
881         par->PanelVertCenterReg2 = 0x00;
882         par->PanelVertCenterReg3 = 0x00;
883         par->PanelVertCenterReg4 = 0x00;
884         par->PanelVertCenterReg5 = 0x00;
885         par->PanelHorizCenterReg1 = 0x00;
886         par->PanelHorizCenterReg2 = 0x00;
887         par->PanelHorizCenterReg3 = 0x00;
888         par->PanelHorizCenterReg4 = 0x00;
889         par->PanelHorizCenterReg5 = 0x00;
890
891
892         if (par->PanelDispCntlReg1 & 0x02) {
893                 if (info->var.xres == par->NeoPanelWidth) {
894                         /*
895                          * No centering required when the requested display width
896                          * equals the panel width.
897                          */
898                 } else {
899                         par->PanelDispCntlReg2 |= 0x01;
900                         par->PanelDispCntlReg3 |= 0x10;
901
902                         /* Calculate the horizontal and vertical offsets. */
903                         if (!lcd_stretch) {
904                                 hoffset =
905                                     ((par->NeoPanelWidth -
906                                       info->var.xres) >> 4) - 1;
907                                 voffset =
908                                     ((par->NeoPanelHeight -
909                                       info->var.yres) >> 1) - 2;
910                         } else {
911                                 /* Stretched modes cannot be centered. */
912                                 hoffset = 0;
913                                 voffset = 0;
914                         }
915
916                         switch (info->var.xres) {
917                         case 320:       /* Needs testing.  KEM -- 24 May 98 */
918                                 par->PanelHorizCenterReg3 = hoffset;
919                                 par->PanelVertCenterReg2 = voffset;
920                                 break;
921                         case 400:       /* Needs testing.  KEM -- 24 May 98 */
922                                 par->PanelHorizCenterReg4 = hoffset;
923                                 par->PanelVertCenterReg1 = voffset;
924                                 break;
925                         case 640:
926                                 par->PanelHorizCenterReg1 = hoffset;
927                                 par->PanelVertCenterReg3 = voffset;
928                                 break;
929                         case 800:
930                                 par->PanelHorizCenterReg2 = hoffset;
931                                 par->PanelVertCenterReg4 = voffset;
932                                 break;
933                         case 1024:
934                                 par->PanelHorizCenterReg5 = hoffset;
935                                 par->PanelVertCenterReg5 = voffset;
936                                 break;
937                         case 1280:
938                         default:
939                                 /* No centering in these modes. */
940                                 break;
941                         }
942                 }
943         }
944
945         par->biosMode =
946             neoFindMode(info->var.xres, info->var.yres,
947                         info->var.bits_per_pixel);
948
949         /*
950          * Calculate the VCLK that most closely matches the requested dot
951          * clock.
952          */
953         neoCalcVCLK(info, par, PICOS2KHZ(info->var.pixclock));
954
955         /* Since we program the clocks ourselves, always use VCLK3. */
956         par->MiscOutReg |= 0x0C;
957
958         /* alread unlocked above */
959         /* BOGUS  vga_wgfx(NULL, 0x09, 0x26); */
960
961         /* don't know what this is, but it's 0 from bootup anyway */
962         vga_wgfx(NULL, 0x15, 0x00);
963
964         /* was set to 0x01 by my bios in text and vesa modes */
965         vga_wgfx(NULL, 0x0A, par->GeneralLockReg);
966
967         /*
968          * The color mode needs to be set before calling vgaHWRestore
969          * to ensure the DAC is initialized properly.
970          *
971          * NOTE: Make sure we don't change bits make sure we don't change
972          * any reserved bits.
973          */
974         temp = vga_rgfx(NULL, 0x90);
975         switch (info->fix.accel) {
976         case FB_ACCEL_NEOMAGIC_NM2070:
977                 temp &= 0xF0;   /* Save bits 7:4 */
978                 temp |= (par->ExtColorModeSelect & ~0xF0);
979                 break;
980         case FB_ACCEL_NEOMAGIC_NM2090:
981         case FB_ACCEL_NEOMAGIC_NM2093:
982         case FB_ACCEL_NEOMAGIC_NM2097:
983         case FB_ACCEL_NEOMAGIC_NM2160:
984         case FB_ACCEL_NEOMAGIC_NM2200:
985         case FB_ACCEL_NEOMAGIC_NM2230:
986         case FB_ACCEL_NEOMAGIC_NM2360:
987         case FB_ACCEL_NEOMAGIC_NM2380:
988                 temp &= 0x70;   /* Save bits 6:4 */
989                 temp |= (par->ExtColorModeSelect & ~0x70);
990                 break;
991         }
992
993         vga_wgfx(NULL, 0x90, temp);
994
995         /*
996          * In some rare cases a lockup might occur if we don't delay
997          * here. (Reported by Miles Lane)
998          */
999         //mdelay(200);
1000
1001         /*
1002          * Disable horizontal and vertical graphics and text expansions so
1003          * that vgaHWRestore works properly.
1004          */
1005         temp = vga_rgfx(NULL, 0x25);
1006         temp &= 0x39;
1007         vga_wgfx(NULL, 0x25, temp);
1008
1009         /*
1010          * Sleep for 200ms to make sure that the two operations above have
1011          * had time to take effect.
1012          */
1013         mdelay(200);
1014
1015         /*
1016          * This function handles restoring the generic VGA registers.  */
1017         vgaHWRestore(info, par);
1018
1019         /* linear colormap for non palettized modes */
1020         switch (info->var.bits_per_pixel) {
1021         case 8:
1022                 /* PseudoColor, 256 */
1023                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
1024                 break;
1025         case 16:
1026                 /* TrueColor, 64k */
1027                 info->fix.visual = FB_VISUAL_TRUECOLOR;
1028
1029                 for (i = 0; i < 64; i++) {
1030                         outb(i, 0x3c8);
1031
1032                         outb(i << 1, 0x3c9);
1033                         outb(i, 0x3c9);
1034                         outb(i << 1, 0x3c9);
1035                 }
1036                 break;
1037         case 24:
1038 #ifdef NO_32BIT_SUPPORT_YET
1039         case 32:
1040 #endif
1041                 /* TrueColor, 16m */
1042                 info->fix.visual = FB_VISUAL_TRUECOLOR;
1043
1044                 for (i = 0; i < 256; i++) {
1045                         outb(i, 0x3c8);
1046
1047                         outb(i, 0x3c9);
1048                         outb(i, 0x3c9);
1049                         outb(i, 0x3c9);
1050                 }
1051                 break;
1052         }
1053
1054         vga_wgfx(NULL, 0x0E, par->ExtCRTDispAddr);
1055         vga_wgfx(NULL, 0x0F, par->ExtCRTOffset);
1056         temp = vga_rgfx(NULL, 0x10);
1057         temp &= 0x0F;           /* Save bits 3:0 */
1058         temp |= (par->SysIfaceCntl1 & ~0x0F);   /* VESA Bios sets bit 1! */
1059         vga_wgfx(NULL, 0x10, temp);
1060
1061         vga_wgfx(NULL, 0x11, par->SysIfaceCntl2);
1062         vga_wgfx(NULL, 0x15, 0 /*par->SingleAddrPage */ );
1063         vga_wgfx(NULL, 0x16, 0 /*par->DualAddrPage */ );
1064
1065         temp = vga_rgfx(NULL, 0x20);
1066         switch (info->fix.accel) {
1067         case FB_ACCEL_NEOMAGIC_NM2070:
1068                 temp &= 0xFC;   /* Save bits 7:2 */
1069                 temp |= (par->PanelDispCntlReg1 & ~0xFC);
1070                 break;
1071         case FB_ACCEL_NEOMAGIC_NM2090:
1072         case FB_ACCEL_NEOMAGIC_NM2093:
1073         case FB_ACCEL_NEOMAGIC_NM2097:
1074         case FB_ACCEL_NEOMAGIC_NM2160:
1075                 temp &= 0xDC;   /* Save bits 7:6,4:2 */
1076                 temp |= (par->PanelDispCntlReg1 & ~0xDC);
1077                 break;
1078         case FB_ACCEL_NEOMAGIC_NM2200:
1079         case FB_ACCEL_NEOMAGIC_NM2230:
1080         case FB_ACCEL_NEOMAGIC_NM2360:
1081         case FB_ACCEL_NEOMAGIC_NM2380:
1082                 temp &= 0x98;   /* Save bits 7,4:3 */
1083                 temp |= (par->PanelDispCntlReg1 & ~0x98);
1084                 break;
1085         }
1086         vga_wgfx(NULL, 0x20, temp);
1087
1088         temp = vga_rgfx(NULL, 0x25);
1089         temp &= 0x38;           /* Save bits 5:3 */
1090         temp |= (par->PanelDispCntlReg2 & ~0x38);
1091         vga_wgfx(NULL, 0x25, temp);
1092
1093         if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1094                 temp = vga_rgfx(NULL, 0x30);
1095                 temp &= 0xEF;   /* Save bits 7:5 and bits 3:0 */
1096                 temp |= (par->PanelDispCntlReg3 & ~0xEF);
1097                 vga_wgfx(NULL, 0x30, temp);
1098         }
1099
1100         vga_wgfx(NULL, 0x28, par->PanelVertCenterReg1);
1101         vga_wgfx(NULL, 0x29, par->PanelVertCenterReg2);
1102         vga_wgfx(NULL, 0x2a, par->PanelVertCenterReg3);
1103
1104         if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1105                 vga_wgfx(NULL, 0x32, par->PanelVertCenterReg4);
1106                 vga_wgfx(NULL, 0x33, par->PanelHorizCenterReg1);
1107                 vga_wgfx(NULL, 0x34, par->PanelHorizCenterReg2);
1108                 vga_wgfx(NULL, 0x35, par->PanelHorizCenterReg3);
1109         }
1110
1111         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2160)
1112                 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1113
1114         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1115             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1116             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1117             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1118                 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1119                 vga_wgfx(NULL, 0x37, par->PanelVertCenterReg5);
1120                 vga_wgfx(NULL, 0x38, par->PanelHorizCenterReg5);
1121
1122                 clock_hi = 1;
1123         }
1124
1125         /* Program VCLK3 if needed. */
1126         if (par->ProgramVCLK && ((vga_rgfx(NULL, 0x9B) != par->VCLK3NumeratorLow)
1127                                  || (vga_rgfx(NULL, 0x9F) != par->VCLK3Denominator)
1128                                  || (clock_hi && ((vga_rgfx(NULL, 0x8F) & ~0x0f)
1129                                                   != (par->VCLK3NumeratorHigh &
1130                                                       ~0x0F))))) {
1131                 vga_wgfx(NULL, 0x9B, par->VCLK3NumeratorLow);
1132                 if (clock_hi) {
1133                         temp = vga_rgfx(NULL, 0x8F);
1134                         temp &= 0x0F;   /* Save bits 3:0 */
1135                         temp |= (par->VCLK3NumeratorHigh & ~0x0F);
1136                         vga_wgfx(NULL, 0x8F, temp);
1137                 }
1138                 vga_wgfx(NULL, 0x9F, par->VCLK3Denominator);
1139         }
1140
1141         if (par->biosMode)
1142                 vga_wcrt(NULL, 0x23, par->biosMode);
1143
1144         vga_wgfx(NULL, 0x93, 0xc0);     /* Gives 5x faster framebuffer writes !!! */
1145
1146         /* Program vertical extension register */
1147         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1148             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1149             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1150             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1151                 vga_wcrt(NULL, 0x70, par->VerticalExt);
1152         }
1153
1154         vgaHWProtect(0);        /* Turn on screen */
1155
1156         /* Calling this also locks offset registers required in update_start */
1157         neoLock(&par->state);
1158
1159         info->fix.line_length =
1160             info->var.xres_virtual * (info->var.bits_per_pixel >> 3);
1161
1162         switch (info->fix.accel) {
1163                 case FB_ACCEL_NEOMAGIC_NM2200:
1164                 case FB_ACCEL_NEOMAGIC_NM2230: 
1165                 case FB_ACCEL_NEOMAGIC_NM2360: 
1166                 case FB_ACCEL_NEOMAGIC_NM2380: 
1167                         neo2200_accel_init(info, &info->var);
1168                         break;
1169                 default:
1170                         break;
1171         }       
1172         return 0;
1173 }
1174
1175 /*
1176  *    Pan or Wrap the Display
1177  */
1178 static int neofb_pan_display(struct fb_var_screeninfo *var,
1179                              struct fb_info *info)
1180 {
1181         struct neofb_par *par = info->par;
1182         struct vgastate *state = &par->state;
1183         int oldExtCRTDispAddr;
1184         int Base;
1185
1186         DBG("neofb_update_start");
1187
1188         Base = (var->yoffset * var->xres_virtual + var->xoffset) >> 2;
1189         Base *= (var->bits_per_pixel + 7) / 8;
1190
1191         neoUnlock();
1192
1193         /*
1194          * These are the generic starting address registers.
1195          */
1196         vga_wcrt(state->vgabase, 0x0C, (Base & 0x00FF00) >> 8);
1197         vga_wcrt(state->vgabase, 0x0D, (Base & 0x00FF));
1198
1199         /*
1200          * Make sure we don't clobber some other bits that might already
1201          * have been set. NOTE: NM2200 has a writable bit 3, but it shouldn't
1202          * be needed.
1203          */
1204         oldExtCRTDispAddr = vga_rgfx(NULL, 0x0E);
1205         vga_wgfx(state->vgabase, 0x0E, (((Base >> 16) & 0x0f) | (oldExtCRTDispAddr & 0xf0)));
1206
1207         neoLock(state);
1208
1209         return 0;
1210 }
1211
1212 static int neofb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
1213                            u_int transp, struct fb_info *fb)
1214 {
1215         if (regno >= fb->cmap.len || regno > 255)
1216                 return -EINVAL;
1217
1218         if (fb->var.bits_per_pixel <= 8) {
1219                 outb(regno, 0x3c8);
1220
1221                 outb(red >> 10, 0x3c9);
1222                 outb(green >> 10, 0x3c9);
1223                 outb(blue >> 10, 0x3c9);
1224         } else if (regno < 16) {
1225                 switch (fb->var.bits_per_pixel) {
1226                 case 16:
1227                         ((u32 *) fb->pseudo_palette)[regno] =
1228                                 ((red & 0xf800)) | ((green & 0xfc00) >> 5) |
1229                                 ((blue & 0xf800) >> 11);
1230                         break;
1231                 case 24:
1232                         ((u32 *) fb->pseudo_palette)[regno] =
1233                                 ((red & 0xff00) << 8) | ((green & 0xff00)) |
1234                                 ((blue & 0xff00) >> 8);
1235                         break;
1236 #ifdef NO_32BIT_SUPPORT_YET
1237                 case 32:
1238                         ((u32 *) fb->pseudo_palette)[regno] =
1239                                 ((transp & 0xff00) << 16) | ((red & 0xff00) << 8) |
1240                                 ((green & 0xff00)) | ((blue & 0xff00) >> 8);
1241                         break;
1242 #endif
1243                 default:
1244                         return 1;
1245                 }
1246         }
1247
1248         return 0;
1249 }
1250
1251 /*
1252  *    (Un)Blank the display.
1253  */
1254 static int neofb_blank(int blank_mode, struct fb_info *info)
1255 {
1256         /*
1257          *  Blank the screen if blank_mode != 0, else unblank.
1258          *  Return 0 if blanking succeeded, != 0 if un-/blanking failed due to
1259          *  e.g. a video mode which doesn't support it. Implements VESA suspend
1260          *  and powerdown modes for monitors, and backlight control on LCDs.
1261          *    blank_mode == 0: unblanked (backlight on)
1262          *    blank_mode == 1: blank (backlight on)
1263          *    blank_mode == 2: suspend vsync (backlight off)
1264          *    blank_mode == 3: suspend hsync (backlight off)
1265          *    blank_mode == 4: powerdown (backlight off)
1266          *
1267          *  wms...Enable VESA DPMS compatible powerdown mode
1268          *  run "setterm -powersave powerdown" to take advantage
1269          */
1270         struct neofb_par *par = info->par;
1271         int seqflags, lcdflags, dpmsflags, reg, tmpdisp;
1272
1273         /*
1274          * Read back the register bits related to display configuration. They might
1275          * have been changed underneath the driver via Fn key stroke.
1276          */
1277         neoUnlock();
1278         tmpdisp = vga_rgfx(NULL, 0x20) & 0x03;
1279         neoLock(&par->state);
1280
1281         /* In case we blank the screen, we want to store the possibly new
1282          * configuration in the driver. During un-blank, we re-apply this setting,
1283          * since the LCD bit will be cleared in order to switch off the backlight.
1284          */
1285         if (par->PanelDispCntlRegRead) {
1286                 par->PanelDispCntlReg1 = tmpdisp;
1287         }
1288         par->PanelDispCntlRegRead = !blank_mode;
1289
1290         switch (blank_mode) {
1291         case FB_BLANK_POWERDOWN:        /* powerdown - both sync lines down */
1292                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1293                 lcdflags = 0;                   /* LCD off */
1294                 dpmsflags = NEO_GR01_SUPPRESS_HSYNC |
1295                             NEO_GR01_SUPPRESS_VSYNC;
1296 #ifdef CONFIG_TOSHIBA
1297                 /* Do we still need this ? */
1298                 /* attempt to turn off backlight on toshiba; also turns off external */
1299                 {
1300                         SMMRegisters regs;
1301
1302                         regs.eax = 0xff00; /* HCI_SET */
1303                         regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1304                         regs.ecx = 0x0000; /* HCI_DISABLE */
1305                         tosh_smm(&regs);
1306                 }
1307 #endif
1308                 break;
1309         case FB_BLANK_HSYNC_SUSPEND:            /* hsync off */
1310                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1311                 lcdflags = 0;                   /* LCD off */
1312                 dpmsflags = NEO_GR01_SUPPRESS_HSYNC;
1313                 break;
1314         case FB_BLANK_VSYNC_SUSPEND:            /* vsync off */
1315                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1316                 lcdflags = 0;                   /* LCD off */
1317                 dpmsflags = NEO_GR01_SUPPRESS_VSYNC;
1318                 break;
1319         case FB_BLANK_NORMAL:           /* just blank screen (backlight stays on) */
1320                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1321                 /*
1322                  * During a blank operation with the LID shut, we might store "LCD off"
1323                  * by mistake. Due to timing issues, the BIOS may switch the lights
1324                  * back on, and we turn it back off once we "unblank".
1325                  *
1326                  * So here is an attempt to implement ">=" - if we are in the process
1327                  * of unblanking, and the LCD bit is unset in the driver but set in the
1328                  * register, we must keep it.
1329                  */
1330                 lcdflags = ((par->PanelDispCntlReg1 | tmpdisp) & 0x02); /* LCD normal */
1331                 dpmsflags = 0x00;       /* no hsync/vsync suppression */
1332                 break;
1333         case FB_BLANK_UNBLANK:          /* unblank */
1334                 seqflags = 0;                   /* Enable sequencer */
1335                 lcdflags = ((par->PanelDispCntlReg1 | tmpdisp) & 0x02); /* LCD normal */
1336                 dpmsflags = 0x00;       /* no hsync/vsync suppression */
1337 #ifdef CONFIG_TOSHIBA
1338                 /* Do we still need this ? */
1339                 /* attempt to re-enable backlight/external on toshiba */
1340                 {
1341                         SMMRegisters regs;
1342
1343                         regs.eax = 0xff00; /* HCI_SET */
1344                         regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1345                         regs.ecx = 0x0001; /* HCI_ENABLE */
1346                         tosh_smm(&regs);
1347                 }
1348 #endif
1349                 break;
1350         default:        /* Anything else we don't understand; return 1 to tell
1351                          * fb_blank we didn't aactually do anything */
1352                 return 1;
1353         }
1354
1355         neoUnlock();
1356         reg = (vga_rseq(NULL, 0x01) & ~0x20) | seqflags;
1357         vga_wseq(NULL, 0x01, reg);
1358         reg = (vga_rgfx(NULL, 0x20) & ~0x02) | lcdflags;
1359         vga_wgfx(NULL, 0x20, reg);
1360         reg = (vga_rgfx(NULL, 0x01) & ~0xF0) | 0x80 | dpmsflags;
1361         vga_wgfx(NULL, 0x01, reg);
1362         neoLock(&par->state);
1363         return 0;
1364 }
1365
1366 static void
1367 neo2200_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1368 {
1369         struct neofb_par *par = info->par;
1370         u_long dst, rop;
1371
1372         dst = rect->dx + rect->dy * info->var.xres_virtual;
1373         rop = rect->rop ? 0x060000 : 0x0c0000;
1374
1375         neo2200_wait_fifo(info, 4);
1376
1377         /* set blt control */
1378         writel(NEO_BC3_FIFO_EN |
1379                NEO_BC0_SRC_IS_FG | NEO_BC3_SKIP_MAPPING |
1380                //               NEO_BC3_DST_XY_ADDR  |
1381                //               NEO_BC3_SRC_XY_ADDR  |
1382                rop, &par->neo2200->bltCntl);
1383
1384         switch (info->var.bits_per_pixel) {
1385         case 8:
1386                 writel(rect->color, &par->neo2200->fgColor);
1387                 break;
1388         case 16:
1389         case 24:
1390                 writel(((u32 *) (info->pseudo_palette))[rect->color],
1391                        &par->neo2200->fgColor);
1392                 break;
1393         }
1394
1395         writel(dst * ((info->var.bits_per_pixel + 7) >> 3),
1396                &par->neo2200->dstStart);
1397         writel((rect->height << 16) | (rect->width & 0xffff),
1398                &par->neo2200->xyExt);
1399 }
1400
1401 static void
1402 neo2200_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1403 {
1404         u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy;
1405         struct neofb_par *par = info->par;
1406         u_long src, dst, bltCntl;
1407
1408         bltCntl = NEO_BC3_FIFO_EN | NEO_BC3_SKIP_MAPPING | 0x0C0000;
1409
1410         if ((dy > sy) || ((dy == sy) && (dx > sx))) {
1411                 /* Start with the lower right corner */
1412                 sy += (area->height - 1);
1413                 dy += (area->height - 1);
1414                 sx += (area->width - 1);
1415                 dx += (area->width - 1);
1416
1417                 bltCntl |= NEO_BC0_X_DEC | NEO_BC0_DST_Y_DEC | NEO_BC0_SRC_Y_DEC;
1418         }
1419
1420         src = sx * (info->var.bits_per_pixel >> 3) + sy*info->fix.line_length;
1421         dst = dx * (info->var.bits_per_pixel >> 3) + dy*info->fix.line_length;
1422
1423         neo2200_wait_fifo(info, 4);
1424
1425         /* set blt control */
1426         writel(bltCntl, &par->neo2200->bltCntl);
1427
1428         writel(src, &par->neo2200->srcStart);
1429         writel(dst, &par->neo2200->dstStart);
1430         writel((area->height << 16) | (area->width & 0xffff),
1431                &par->neo2200->xyExt);
1432 }
1433
1434 static void
1435 neo2200_imageblit(struct fb_info *info, const struct fb_image *image)
1436 {
1437         struct neofb_par *par = info->par;
1438         int s_pitch = (image->width * image->depth + 7) >> 3;
1439         int scan_align = info->pixmap.scan_align - 1;
1440         int buf_align = info->pixmap.buf_align - 1;
1441         int bltCntl_flags, d_pitch, data_len;
1442
1443         // The data is padded for the hardware
1444         d_pitch = (s_pitch + scan_align) & ~scan_align;
1445         data_len = ((d_pitch * image->height) + buf_align) & ~buf_align;
1446
1447         neo2200_sync(info);
1448
1449         if (image->depth == 1) {
1450                 if (info->var.bits_per_pixel == 24 && image->width < 16) {
1451                         /* FIXME. There is a bug with accelerated color-expanded
1452                          * transfers in 24 bit mode if the image being transferred
1453                          * is less than 16 bits wide. This is due to insufficient
1454                          * padding when writing the image. We need to adjust
1455                          * struct fb_pixmap. Not yet done. */
1456                         return cfb_imageblit(info, image);
1457                 }
1458                 bltCntl_flags = NEO_BC0_SRC_MONO;
1459         } else if (image->depth == info->var.bits_per_pixel) {
1460                 bltCntl_flags = 0;
1461         } else {
1462                 /* We don't currently support hardware acceleration if image
1463                  * depth is different from display */
1464                 return cfb_imageblit(info, image);
1465         }
1466
1467         switch (info->var.bits_per_pixel) {
1468         case 8:
1469                 writel(image->fg_color, &par->neo2200->fgColor);
1470                 writel(image->bg_color, &par->neo2200->bgColor);
1471                 break;
1472         case 16:
1473         case 24:
1474                 writel(((u32 *) (info->pseudo_palette))[image->fg_color],
1475                        &par->neo2200->fgColor);
1476                 writel(((u32 *) (info->pseudo_palette))[image->bg_color],
1477                        &par->neo2200->bgColor);
1478                 break;
1479         }
1480
1481         writel(NEO_BC0_SYS_TO_VID |
1482                 NEO_BC3_SKIP_MAPPING | bltCntl_flags |
1483                 // NEO_BC3_DST_XY_ADDR |
1484                 0x0c0000, &par->neo2200->bltCntl);
1485
1486         writel(0, &par->neo2200->srcStart);
1487 //      par->neo2200->dstStart = (image->dy << 16) | (image->dx & 0xffff);
1488         writel(((image->dx & 0xffff) * (info->var.bits_per_pixel >> 3) +
1489                 image->dy * info->fix.line_length), &par->neo2200->dstStart);
1490         writel((image->height << 16) | (image->width & 0xffff),
1491                &par->neo2200->xyExt);
1492
1493         memcpy_toio(par->mmio_vbase + 0x100000, image->data, data_len);
1494 }
1495
1496 static void
1497 neofb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1498 {
1499         switch (info->fix.accel) {
1500                 case FB_ACCEL_NEOMAGIC_NM2200:
1501                 case FB_ACCEL_NEOMAGIC_NM2230: 
1502                 case FB_ACCEL_NEOMAGIC_NM2360: 
1503                 case FB_ACCEL_NEOMAGIC_NM2380:
1504                         neo2200_fillrect(info, rect);
1505                         break;
1506                 default:
1507                         cfb_fillrect(info, rect);
1508                         break;
1509         }       
1510 }
1511
1512 static void
1513 neofb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1514 {
1515         switch (info->fix.accel) {
1516                 case FB_ACCEL_NEOMAGIC_NM2200:
1517                 case FB_ACCEL_NEOMAGIC_NM2230: 
1518                 case FB_ACCEL_NEOMAGIC_NM2360: 
1519                 case FB_ACCEL_NEOMAGIC_NM2380: 
1520                         neo2200_copyarea(info, area);
1521                         break;
1522                 default:
1523                         cfb_copyarea(info, area);
1524                         break;
1525         }       
1526 }
1527
1528 static void
1529 neofb_imageblit(struct fb_info *info, const struct fb_image *image)
1530 {
1531         switch (info->fix.accel) {
1532                 case FB_ACCEL_NEOMAGIC_NM2200:
1533                 case FB_ACCEL_NEOMAGIC_NM2230:
1534                 case FB_ACCEL_NEOMAGIC_NM2360:
1535                 case FB_ACCEL_NEOMAGIC_NM2380:
1536                         neo2200_imageblit(info, image);
1537                         break;
1538                 default:
1539                         cfb_imageblit(info, image);
1540                         break;
1541         }
1542 }
1543
1544 static int 
1545 neofb_sync(struct fb_info *info)
1546 {
1547         switch (info->fix.accel) {
1548                 case FB_ACCEL_NEOMAGIC_NM2200:
1549                 case FB_ACCEL_NEOMAGIC_NM2230: 
1550                 case FB_ACCEL_NEOMAGIC_NM2360: 
1551                 case FB_ACCEL_NEOMAGIC_NM2380: 
1552                         neo2200_sync(info);
1553                         break;
1554                 default:
1555                         break;
1556         }
1557         return 0;               
1558 }
1559
1560 /*
1561 static void
1562 neofb_draw_cursor(struct fb_info *info, u8 *dst, u8 *src, unsigned int width)
1563 {
1564         //memset_io(info->sprite.addr, 0xff, 1);
1565 }
1566
1567 static int
1568 neofb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1569 {
1570         struct neofb_par *par = (struct neofb_par *) info->par;
1571
1572         * Disable cursor *
1573         write_le32(NEOREG_CURSCNTL, ~NEO_CURS_ENABLE, par);
1574
1575         if (cursor->set & FB_CUR_SETPOS) {
1576                 u32 x = cursor->image.dx;
1577                 u32 y = cursor->image.dy;
1578
1579                 info->cursor.image.dx = x;
1580                 info->cursor.image.dy = y;
1581                 write_le32(NEOREG_CURSX, x, par);
1582                 write_le32(NEOREG_CURSY, y, par);
1583         }
1584
1585         if (cursor->set & FB_CUR_SETSIZE) {
1586                 info->cursor.image.height = cursor->image.height;
1587                 info->cursor.image.width = cursor->image.width;
1588         }
1589
1590         if (cursor->set & FB_CUR_SETHOT)
1591                 info->cursor.hot = cursor->hot;
1592
1593         if (cursor->set & FB_CUR_SETCMAP) {
1594                 if (cursor->image.depth == 1) {
1595                         u32 fg = cursor->image.fg_color;
1596                         u32 bg = cursor->image.bg_color;
1597
1598                         info->cursor.image.fg_color = fg;
1599                         info->cursor.image.bg_color = bg;
1600
1601                         fg = ((fg & 0xff0000) >> 16) | ((fg & 0xff) << 16) | (fg & 0xff00);
1602                         bg = ((bg & 0xff0000) >> 16) | ((bg & 0xff) << 16) | (bg & 0xff00);
1603                         write_le32(NEOREG_CURSFGCOLOR, fg, par);
1604                         write_le32(NEOREG_CURSBGCOLOR, bg, par);
1605                 }
1606         }
1607
1608         if (cursor->set & FB_CUR_SETSHAPE)
1609                 fb_load_cursor_image(info);
1610
1611         if (info->cursor.enable)
1612                 write_le32(NEOREG_CURSCNTL, NEO_CURS_ENABLE, par);
1613         return 0;
1614 }
1615 */
1616
1617 static struct fb_ops neofb_ops = {
1618         .owner          = THIS_MODULE,
1619         .fb_open        = neofb_open,
1620         .fb_release     = neofb_release,
1621         .fb_check_var   = neofb_check_var,
1622         .fb_set_par     = neofb_set_par,
1623         .fb_setcolreg   = neofb_setcolreg,
1624         .fb_pan_display = neofb_pan_display,
1625         .fb_blank       = neofb_blank,
1626         .fb_sync        = neofb_sync,
1627         .fb_fillrect    = neofb_fillrect,
1628         .fb_copyarea    = neofb_copyarea,
1629         .fb_imageblit   = neofb_imageblit,
1630 };
1631
1632 /* --------------------------------------------------------------------- */
1633
1634 static struct fb_videomode __devinitdata mode800x480 = {
1635         .xres           = 800,
1636         .yres           = 480,
1637         .pixclock       = 25000,
1638         .left_margin    = 88,
1639         .right_margin   = 40,
1640         .upper_margin   = 23,
1641         .lower_margin   = 1,
1642         .hsync_len      = 128,
1643         .vsync_len      = 4,
1644         .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1645         .vmode          = FB_VMODE_NONINTERLACED
1646 };
1647
1648 static int __devinit neo_map_mmio(struct fb_info *info,
1649                                   struct pci_dev *dev)
1650 {
1651         struct neofb_par *par = info->par;
1652
1653         DBG("neo_map_mmio");
1654
1655         switch (info->fix.accel) {
1656                 case FB_ACCEL_NEOMAGIC_NM2070:
1657                         info->fix.mmio_start = pci_resource_start(dev, 0)+
1658                                 0x100000;
1659                         break;
1660                 case FB_ACCEL_NEOMAGIC_NM2090:
1661                 case FB_ACCEL_NEOMAGIC_NM2093:
1662                         info->fix.mmio_start = pci_resource_start(dev, 0)+
1663                                 0x200000;
1664                         break;
1665                 case FB_ACCEL_NEOMAGIC_NM2160:
1666                 case FB_ACCEL_NEOMAGIC_NM2097:
1667                 case FB_ACCEL_NEOMAGIC_NM2200:
1668                 case FB_ACCEL_NEOMAGIC_NM2230:
1669                 case FB_ACCEL_NEOMAGIC_NM2360:
1670                 case FB_ACCEL_NEOMAGIC_NM2380:
1671                         info->fix.mmio_start = pci_resource_start(dev, 1);
1672                         break;
1673                 default:
1674                         info->fix.mmio_start = pci_resource_start(dev, 0);
1675         }
1676         info->fix.mmio_len = MMIO_SIZE;
1677
1678         if (!request_mem_region
1679             (info->fix.mmio_start, MMIO_SIZE, "memory mapped I/O")) {
1680                 printk("neofb: memory mapped IO in use\n");
1681                 return -EBUSY;
1682         }
1683
1684         par->mmio_vbase = ioremap(info->fix.mmio_start, MMIO_SIZE);
1685         if (!par->mmio_vbase) {
1686                 printk("neofb: unable to map memory mapped IO\n");
1687                 release_mem_region(info->fix.mmio_start,
1688                                    info->fix.mmio_len);
1689                 return -ENOMEM;
1690         } else
1691                 printk(KERN_INFO "neofb: mapped io at %p\n",
1692                        par->mmio_vbase);
1693         return 0;
1694 }
1695
1696 static void neo_unmap_mmio(struct fb_info *info)
1697 {
1698         struct neofb_par *par = info->par;
1699
1700         DBG("neo_unmap_mmio");
1701
1702         iounmap(par->mmio_vbase);
1703         par->mmio_vbase = NULL;
1704
1705         release_mem_region(info->fix.mmio_start,
1706                            info->fix.mmio_len);
1707 }
1708
1709 static int __devinit neo_map_video(struct fb_info *info,
1710                                    struct pci_dev *dev, int video_len)
1711 {
1712         //unsigned long addr;
1713
1714         DBG("neo_map_video");
1715
1716         info->fix.smem_start = pci_resource_start(dev, 0);
1717         info->fix.smem_len = video_len;
1718
1719         if (!request_mem_region(info->fix.smem_start, info->fix.smem_len,
1720                                 "frame buffer")) {
1721                 printk("neofb: frame buffer in use\n");
1722                 return -EBUSY;
1723         }
1724
1725         info->screen_base =
1726             ioremap(info->fix.smem_start, info->fix.smem_len);
1727         if (!info->screen_base) {
1728                 printk("neofb: unable to map screen memory\n");
1729                 release_mem_region(info->fix.smem_start,
1730                                    info->fix.smem_len);
1731                 return -ENOMEM;
1732         } else
1733                 printk(KERN_INFO "neofb: mapped framebuffer at %p\n",
1734                        info->screen_base);
1735
1736 #ifdef CONFIG_MTRR
1737         ((struct neofb_par *)(info->par))->mtrr =
1738                 mtrr_add(info->fix.smem_start, pci_resource_len(dev, 0),
1739                                 MTRR_TYPE_WRCOMB, 1);
1740 #endif
1741
1742         /* Clear framebuffer, it's all white in memory after boot */
1743         memset_io(info->screen_base, 0, info->fix.smem_len);
1744
1745         /* Allocate Cursor drawing pad.
1746         info->fix.smem_len -= PAGE_SIZE;
1747         addr = info->fix.smem_start + info->fix.smem_len;
1748         write_le32(NEOREG_CURSMEMPOS, ((0x000f & (addr >> 10)) << 8) |
1749                                         ((0x0ff0 & (addr >> 10)) >> 4), par);
1750         addr = (unsigned long) info->screen_base + info->fix.smem_len;
1751         info->sprite.addr = (u8 *) addr; */
1752         return 0;
1753 }
1754
1755 static void neo_unmap_video(struct fb_info *info)
1756 {
1757         DBG("neo_unmap_video");
1758
1759 #ifdef CONFIG_MTRR
1760         {
1761                 struct neofb_par *par = info->par;
1762
1763                 mtrr_del(par->mtrr, info->fix.smem_start,
1764                          info->fix.smem_len);
1765         }
1766 #endif
1767         iounmap(info->screen_base);
1768         info->screen_base = NULL;
1769
1770         release_mem_region(info->fix.smem_start,
1771                            info->fix.smem_len);
1772 }
1773
1774 static int __devinit neo_scan_monitor(struct fb_info *info)
1775 {
1776         struct neofb_par *par = info->par;
1777         unsigned char type, display;
1778         int w;
1779
1780         // Eventually we will have i2c support.
1781         info->monspecs.modedb = kmalloc(sizeof(struct fb_videomode), GFP_KERNEL);
1782         if (!info->monspecs.modedb)
1783                 return -ENOMEM;
1784         info->monspecs.modedb_len = 1;
1785
1786         /* Determine the panel type */
1787         vga_wgfx(NULL, 0x09, 0x26);
1788         type = vga_rgfx(NULL, 0x21);
1789         display = vga_rgfx(NULL, 0x20);
1790         if (!par->internal_display && !par->external_display) {
1791                 par->internal_display = display & 2 || !(display & 3) ? 1 : 0;
1792                 par->external_display = display & 1;
1793                 printk (KERN_INFO "Autodetected %s display\n",
1794                         par->internal_display && par->external_display ? "simultaneous" :
1795                         par->internal_display ? "internal" : "external");
1796         }
1797
1798         /* Determine panel width -- used in NeoValidMode. */
1799         w = vga_rgfx(NULL, 0x20);
1800         vga_wgfx(NULL, 0x09, 0x00);
1801         switch ((w & 0x18) >> 3) {
1802         case 0x00:
1803                 // 640x480@60
1804                 par->NeoPanelWidth = 640;
1805                 par->NeoPanelHeight = 480;
1806                 memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
1807                 break;
1808         case 0x01:
1809                 par->NeoPanelWidth = 800;
1810                 if (par->libretto) {
1811                         par->NeoPanelHeight = 480;
1812                         memcpy(info->monspecs.modedb, &mode800x480, sizeof(struct fb_videomode));
1813                 } else {
1814                         // 800x600@60
1815                         par->NeoPanelHeight = 600;
1816                         memcpy(info->monspecs.modedb, &vesa_modes[8], sizeof(struct fb_videomode));
1817                 }
1818                 break;
1819         case 0x02:
1820                 // 1024x768@60
1821                 par->NeoPanelWidth = 1024;
1822                 par->NeoPanelHeight = 768;
1823                 memcpy(info->monspecs.modedb, &vesa_modes[13], sizeof(struct fb_videomode));
1824                 break;
1825         case 0x03:
1826                 /* 1280x1024@60 panel support needs to be added */
1827 #ifdef NOT_DONE
1828                 par->NeoPanelWidth = 1280;
1829                 par->NeoPanelHeight = 1024;
1830                 memcpy(info->monspecs.modedb, &vesa_modes[20], sizeof(struct fb_videomode));
1831                 break;
1832 #else
1833                 printk(KERN_ERR
1834                        "neofb: Only 640x480, 800x600/480 and 1024x768 panels are currently supported\n");
1835                 return -1;
1836 #endif
1837         default:
1838                 // 640x480@60
1839                 par->NeoPanelWidth = 640;
1840                 par->NeoPanelHeight = 480;
1841                 memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
1842                 break;
1843         }
1844
1845         printk(KERN_INFO "Panel is a %dx%d %s %s display\n",
1846                par->NeoPanelWidth,
1847                par->NeoPanelHeight,
1848                (type & 0x02) ? "color" : "monochrome",
1849                (type & 0x10) ? "TFT" : "dual scan");
1850         return 0;
1851 }
1852
1853 static int __devinit neo_init_hw(struct fb_info *info)
1854 {
1855         struct neofb_par *par = info->par;
1856         int videoRam = 896;
1857         int maxClock = 65000;
1858         int CursorMem = 1024;
1859         int CursorOff = 0x100;
1860
1861         DBG("neo_init_hw");
1862
1863         neoUnlock();
1864
1865 #if 0
1866         printk(KERN_DEBUG "--- Neo extended register dump ---\n");
1867         for (int w = 0; w < 0x85; w++)
1868                 printk(KERN_DEBUG "CR %p: %p\n", (void *) w,
1869                        (void *) vga_rcrt(NULL, w));
1870         for (int w = 0; w < 0xC7; w++)
1871                 printk(KERN_DEBUG "GR %p: %p\n", (void *) w,
1872                        (void *) vga_rgfx(NULL, w));
1873 #endif
1874         switch (info->fix.accel) {
1875         case FB_ACCEL_NEOMAGIC_NM2070:
1876                 videoRam = 896;
1877                 maxClock = 65000;
1878                 break;
1879         case FB_ACCEL_NEOMAGIC_NM2090:
1880         case FB_ACCEL_NEOMAGIC_NM2093:
1881         case FB_ACCEL_NEOMAGIC_NM2097:
1882                 videoRam = 1152;
1883                 maxClock = 80000;
1884                 break;
1885         case FB_ACCEL_NEOMAGIC_NM2160:
1886                 videoRam = 2048;
1887                 maxClock = 90000;
1888                 break;
1889         case FB_ACCEL_NEOMAGIC_NM2200:
1890                 videoRam = 2560;
1891                 maxClock = 110000;
1892                 break;
1893         case FB_ACCEL_NEOMAGIC_NM2230:
1894                 videoRam = 3008;
1895                 maxClock = 110000;
1896                 break;
1897         case FB_ACCEL_NEOMAGIC_NM2360:
1898                 videoRam = 4096;
1899                 maxClock = 110000;
1900                 break;
1901         case FB_ACCEL_NEOMAGIC_NM2380:
1902                 videoRam = 6144;
1903                 maxClock = 110000;
1904                 break;
1905         }
1906         switch (info->fix.accel) {
1907         case FB_ACCEL_NEOMAGIC_NM2070:
1908         case FB_ACCEL_NEOMAGIC_NM2090:
1909         case FB_ACCEL_NEOMAGIC_NM2093:
1910                 CursorMem = 2048;
1911                 CursorOff = 0x100;
1912                 break;
1913         case FB_ACCEL_NEOMAGIC_NM2097:
1914         case FB_ACCEL_NEOMAGIC_NM2160:
1915                 CursorMem = 1024;
1916                 CursorOff = 0x100;
1917                 break;
1918         case FB_ACCEL_NEOMAGIC_NM2200:
1919         case FB_ACCEL_NEOMAGIC_NM2230:
1920         case FB_ACCEL_NEOMAGIC_NM2360:
1921         case FB_ACCEL_NEOMAGIC_NM2380:
1922                 CursorMem = 1024;
1923                 CursorOff = 0x1000;
1924
1925                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
1926                 break;
1927         }
1928 /*
1929         info->sprite.size = CursorMem;
1930         info->sprite.scan_align = 1;
1931         info->sprite.buf_align = 1;
1932         info->sprite.flags = FB_PIXMAP_IO;
1933         info->sprite.outbuf = neofb_draw_cursor;
1934 */
1935         par->maxClock = maxClock;
1936         par->cursorOff = CursorOff;
1937         return videoRam * 1024;
1938 }
1939
1940
1941 static struct fb_info *__devinit neo_alloc_fb_info(struct pci_dev *dev, const struct
1942                                                    pci_device_id *id)
1943 {
1944         struct fb_info *info;
1945         struct neofb_par *par;
1946
1947         info = framebuffer_alloc(sizeof(struct neofb_par), &dev->dev);
1948
1949         if (!info)
1950                 return NULL;
1951
1952         par = info->par;
1953
1954         info->fix.accel = id->driver_data;
1955
1956         par->pci_burst = !nopciburst;
1957         par->lcd_stretch = !nostretch;
1958         par->libretto = libretto;
1959
1960         par->internal_display = internal;
1961         par->external_display = external;
1962         info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1963
1964         switch (info->fix.accel) {
1965         case FB_ACCEL_NEOMAGIC_NM2070:
1966                 snprintf(info->fix.id, sizeof(info->fix.id),
1967                                 "MagicGraph 128");
1968                 break;
1969         case FB_ACCEL_NEOMAGIC_NM2090:
1970                 snprintf(info->fix.id, sizeof(info->fix.id),
1971                                 "MagicGraph 128V");
1972                 break;
1973         case FB_ACCEL_NEOMAGIC_NM2093:
1974                 snprintf(info->fix.id, sizeof(info->fix.id),
1975                                 "MagicGraph 128ZV");
1976                 break;
1977         case FB_ACCEL_NEOMAGIC_NM2097:
1978                 snprintf(info->fix.id, sizeof(info->fix.id),
1979                                 "MagicGraph 128ZV+");
1980                 break;
1981         case FB_ACCEL_NEOMAGIC_NM2160:
1982                 snprintf(info->fix.id, sizeof(info->fix.id),
1983                                 "MagicGraph 128XD");
1984                 break;
1985         case FB_ACCEL_NEOMAGIC_NM2200:
1986                 snprintf(info->fix.id, sizeof(info->fix.id),
1987                                 "MagicGraph 256AV");
1988                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
1989                                FBINFO_HWACCEL_COPYAREA |
1990                                FBINFO_HWACCEL_FILLRECT;
1991                 break;
1992         case FB_ACCEL_NEOMAGIC_NM2230:
1993                 snprintf(info->fix.id, sizeof(info->fix.id),
1994                                 "MagicGraph 256AV+");
1995                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
1996                                FBINFO_HWACCEL_COPYAREA |
1997                                FBINFO_HWACCEL_FILLRECT;
1998                 break;
1999         case FB_ACCEL_NEOMAGIC_NM2360:
2000                 snprintf(info->fix.id, sizeof(info->fix.id),
2001                                 "MagicGraph 256ZX");
2002                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2003                                FBINFO_HWACCEL_COPYAREA |
2004                                FBINFO_HWACCEL_FILLRECT;
2005                 break;
2006         case FB_ACCEL_NEOMAGIC_NM2380:
2007                 snprintf(info->fix.id, sizeof(info->fix.id),
2008                                 "MagicGraph 256XL+");
2009                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2010                                FBINFO_HWACCEL_COPYAREA |
2011                                FBINFO_HWACCEL_FILLRECT;
2012                 break;
2013         }
2014
2015         info->fix.type = FB_TYPE_PACKED_PIXELS;
2016         info->fix.type_aux = 0;
2017         info->fix.xpanstep = 0;
2018         info->fix.ypanstep = 4;
2019         info->fix.ywrapstep = 0;
2020         info->fix.accel = id->driver_data;
2021
2022         info->fbops = &neofb_ops;
2023         info->pseudo_palette = par->palette;
2024         return info;
2025 }
2026
2027 static void neo_free_fb_info(struct fb_info *info)
2028 {
2029         if (info) {
2030                 /*
2031                  * Free the colourmap
2032                  */
2033                 fb_dealloc_cmap(&info->cmap);
2034                 framebuffer_release(info);
2035         }
2036 }
2037
2038 /* --------------------------------------------------------------------- */
2039
2040 static int __devinit neofb_probe(struct pci_dev *dev,
2041                                  const struct pci_device_id *id)
2042 {
2043         struct fb_info *info;
2044         u_int h_sync, v_sync;
2045         int video_len, err;
2046
2047         DBG("neofb_probe");
2048
2049         err = pci_enable_device(dev);
2050         if (err)
2051                 return err;
2052
2053         err = -ENOMEM;
2054         info = neo_alloc_fb_info(dev, id);
2055         if (!info)
2056                 return err;
2057
2058         err = neo_map_mmio(info, dev);
2059         if (err)
2060                 goto err_map_mmio;
2061
2062         err = neo_scan_monitor(info);
2063         if (err)
2064                 goto err_scan_monitor;
2065
2066         video_len = neo_init_hw(info);
2067         if (video_len < 0) {
2068                 err = video_len;
2069                 goto err_init_hw;
2070         }
2071
2072         err = neo_map_video(info, dev, video_len);
2073         if (err)
2074                 goto err_init_hw;
2075
2076         if (!fb_find_mode(&info->var, info, mode_option, NULL, 0,
2077                         info->monspecs.modedb, 16)) {
2078                 printk(KERN_ERR "neofb: Unable to find usable video mode.\n");
2079                 goto err_map_video;
2080         }
2081
2082         /*
2083          * Calculate the hsync and vsync frequencies.  Note that
2084          * we split the 1e12 constant up so that we can preserve
2085          * the precision and fit the results into 32-bit registers.
2086          *  (1953125000 * 512 = 1e12)
2087          */
2088         h_sync = 1953125000 / info->var.pixclock;
2089         h_sync =
2090             h_sync * 512 / (info->var.xres + info->var.left_margin +
2091                             info->var.right_margin + info->var.hsync_len);
2092         v_sync =
2093             h_sync / (info->var.yres + info->var.upper_margin +
2094                       info->var.lower_margin + info->var.vsync_len);
2095
2096         printk(KERN_INFO "neofb v" NEOFB_VERSION
2097                ": %dkB VRAM, using %dx%d, %d.%03dkHz, %dHz\n",
2098                info->fix.smem_len >> 10, info->var.xres,
2099                info->var.yres, h_sync / 1000, h_sync % 1000, v_sync);
2100
2101         if (fb_alloc_cmap(&info->cmap, 256, 0) < 0)
2102                 goto err_map_video;
2103
2104         err = register_framebuffer(info);
2105         if (err < 0)
2106                 goto err_reg_fb;
2107
2108         printk(KERN_INFO "fb%d: %s frame buffer device\n",
2109                info->node, info->fix.id);
2110
2111         /*
2112          * Our driver data
2113          */
2114         pci_set_drvdata(dev, info);
2115         return 0;
2116
2117 err_reg_fb:
2118         fb_dealloc_cmap(&info->cmap);
2119 err_map_video:
2120         neo_unmap_video(info);
2121 err_init_hw:
2122         fb_destroy_modedb(info->monspecs.modedb);
2123 err_scan_monitor:
2124         neo_unmap_mmio(info);
2125 err_map_mmio:
2126         neo_free_fb_info(info);
2127         return err;
2128 }
2129
2130 static void __devexit neofb_remove(struct pci_dev *dev)
2131 {
2132         struct fb_info *info = pci_get_drvdata(dev);
2133
2134         DBG("neofb_remove");
2135
2136         if (info) {
2137                 /*
2138                  * If unregister_framebuffer fails, then
2139                  * we will be leaving hooks that could cause
2140                  * oopsen laying around.
2141                  */
2142                 if (unregister_framebuffer(info))
2143                         printk(KERN_WARNING
2144                                "neofb: danger danger!  Oopsen imminent!\n");
2145
2146                 neo_unmap_video(info);
2147                 fb_destroy_modedb(info->monspecs.modedb);
2148                 neo_unmap_mmio(info);
2149                 neo_free_fb_info(info);
2150
2151                 /*
2152                  * Ensure that the driver data is no longer
2153                  * valid.
2154                  */
2155                 pci_set_drvdata(dev, NULL);
2156         }
2157 }
2158
2159 static struct pci_device_id neofb_devices[] = {
2160         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2070,
2161          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2070},
2162
2163         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2090,
2164          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2090},
2165
2166         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2093,
2167          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2093},
2168
2169         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2097,
2170          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2097},
2171
2172         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2160,
2173          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2160},
2174
2175         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2200,
2176          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2200},
2177
2178         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2230,
2179          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2230},
2180
2181         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2360,
2182          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2360},
2183
2184         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2380,
2185          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2380},
2186
2187         {0, 0, 0, 0, 0, 0, 0}
2188 };
2189
2190 MODULE_DEVICE_TABLE(pci, neofb_devices);
2191
2192 static struct pci_driver neofb_driver = {
2193         .name =         "neofb",
2194         .id_table =     neofb_devices,
2195         .probe =        neofb_probe,
2196         .remove =       __devexit_p(neofb_remove)
2197 };
2198
2199 /* ************************* init in-kernel code ************************** */
2200
2201 #ifndef MODULE
2202 static int __init neofb_setup(char *options)
2203 {
2204         char *this_opt;
2205
2206         DBG("neofb_setup");
2207
2208         if (!options || !*options)
2209                 return 0;
2210
2211         while ((this_opt = strsep(&options, ",")) != NULL) {
2212                 if (!*this_opt)
2213                         continue;
2214
2215                 if (!strncmp(this_opt, "internal", 8))
2216                         internal = 1;
2217                 else if (!strncmp(this_opt, "external", 8))
2218                         external = 1;
2219                 else if (!strncmp(this_opt, "nostretch", 9))
2220                         nostretch = 1;
2221                 else if (!strncmp(this_opt, "nopciburst", 10))
2222                         nopciburst = 1;
2223                 else if (!strncmp(this_opt, "libretto", 8))
2224                         libretto = 1;
2225                 else
2226                         mode_option = this_opt;
2227         }
2228         return 0;
2229 }
2230 #endif  /*  MODULE  */
2231
2232 static int __init neofb_init(void)
2233 {
2234 #ifndef MODULE
2235         char *option = NULL;
2236
2237         if (fb_get_options("neofb", &option))
2238                 return -ENODEV;
2239         neofb_setup(option);
2240 #endif
2241         return pci_register_driver(&neofb_driver);
2242 }
2243
2244 module_init(neofb_init);
2245
2246 #ifdef MODULE
2247 static void __exit neofb_exit(void)
2248 {
2249         pci_unregister_driver(&neofb_driver);
2250 }
2251
2252 module_exit(neofb_exit);
2253 #endif                          /* MODULE */