[SBUSFB]: Kill 'list' member from foo_par structs, totally unused.
[linux-2.6.git] / drivers / video / cg14.c
1 /* cg14.c: CGFOURTEEN frame buffer driver
2  *
3  * Copyright (C) 2003 David S. Miller (davem@redhat.com)
4  * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
5  * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
6  *
7  * Driver layout based loosely on tgafb.c, see that file for credits.
8  */
9
10 #include <linux/module.h>
11 #include <linux/kernel.h>
12 #include <linux/errno.h>
13 #include <linux/string.h>
14 #include <linux/slab.h>
15 #include <linux/delay.h>
16 #include <linux/init.h>
17 #include <linux/fb.h>
18 #include <linux/mm.h>
19
20 #include <asm/io.h>
21 #include <asm/sbus.h>
22 #include <asm/oplib.h>
23 #include <asm/fbio.h>
24
25 #include "sbuslib.h"
26
27 /*
28  * Local functions.
29  */
30
31 static int cg14_setcolreg(unsigned, unsigned, unsigned, unsigned,
32                          unsigned, struct fb_info *);
33
34 static int cg14_mmap(struct fb_info *, struct file *, struct vm_area_struct *);
35 static int cg14_ioctl(struct inode *, struct file *, unsigned int,
36                       unsigned long, struct fb_info *);
37 static int cg14_pan_display(struct fb_var_screeninfo *, struct fb_info *);
38
39 /*
40  *  Frame buffer operations
41  */
42
43 static struct fb_ops cg14_ops = {
44         .owner                  = THIS_MODULE,
45         .fb_setcolreg           = cg14_setcolreg,
46         .fb_pan_display         = cg14_pan_display,
47         .fb_fillrect            = cfb_fillrect,
48         .fb_copyarea            = cfb_copyarea,
49         .fb_imageblit           = cfb_imageblit,
50         .fb_mmap                = cg14_mmap,
51         .fb_ioctl               = cg14_ioctl,
52 #ifdef CONFIG_COMPAT
53         .fb_compat_ioctl        = sbusfb_compat_ioctl,
54 #endif
55 };
56
57 #define CG14_MCR_INTENABLE_SHIFT        7
58 #define CG14_MCR_INTENABLE_MASK         0x80
59 #define CG14_MCR_VIDENABLE_SHIFT        6
60 #define CG14_MCR_VIDENABLE_MASK         0x40
61 #define CG14_MCR_PIXMODE_SHIFT          4
62 #define CG14_MCR_PIXMODE_MASK           0x30
63 #define CG14_MCR_TMR_SHIFT              2
64 #define CG14_MCR_TMR_MASK               0x0c
65 #define CG14_MCR_TMENABLE_SHIFT         1
66 #define CG14_MCR_TMENABLE_MASK          0x02
67 #define CG14_MCR_RESET_SHIFT            0
68 #define CG14_MCR_RESET_MASK             0x01
69 #define CG14_REV_REVISION_SHIFT         4
70 #define CG14_REV_REVISION_MASK          0xf0
71 #define CG14_REV_IMPL_SHIFT             0
72 #define CG14_REV_IMPL_MASK              0x0f
73 #define CG14_VBR_FRAMEBASE_SHIFT        12
74 #define CG14_VBR_FRAMEBASE_MASK         0x00fff000
75 #define CG14_VMCR1_SETUP_SHIFT          0
76 #define CG14_VMCR1_SETUP_MASK           0x000001ff
77 #define CG14_VMCR1_VCONFIG_SHIFT        9
78 #define CG14_VMCR1_VCONFIG_MASK         0x00000e00
79 #define CG14_VMCR2_REFRESH_SHIFT        0
80 #define CG14_VMCR2_REFRESH_MASK         0x00000001
81 #define CG14_VMCR2_TESTROWCNT_SHIFT     1
82 #define CG14_VMCR2_TESTROWCNT_MASK      0x00000002
83 #define CG14_VMCR2_FBCONFIG_SHIFT       2
84 #define CG14_VMCR2_FBCONFIG_MASK        0x0000000c
85 #define CG14_VCR_REFRESHREQ_SHIFT       0
86 #define CG14_VCR_REFRESHREQ_MASK        0x000003ff
87 #define CG14_VCR1_REFRESHENA_SHIFT      10
88 #define CG14_VCR1_REFRESHENA_MASK       0x00000400
89 #define CG14_VCA_CAD_SHIFT              0
90 #define CG14_VCA_CAD_MASK               0x000003ff
91 #define CG14_VCA_VERS_SHIFT             10
92 #define CG14_VCA_VERS_MASK              0x00000c00
93 #define CG14_VCA_RAMSPEED_SHIFT         12
94 #define CG14_VCA_RAMSPEED_MASK          0x00001000
95 #define CG14_VCA_8MB_SHIFT              13
96 #define CG14_VCA_8MB_MASK               0x00002000
97
98 #define CG14_MCR_PIXMODE_8              0
99 #define CG14_MCR_PIXMODE_16             2
100 #define CG14_MCR_PIXMODE_32             3
101
102 struct cg14_regs{
103         volatile u8 mcr;        /* Master Control Reg */
104         volatile u8 ppr;        /* Packed Pixel Reg */
105         volatile u8 tms[2];     /* Test Mode Status Regs */
106         volatile u8 msr;        /* Master Status Reg */
107         volatile u8 fsr;        /* Fault Status Reg */
108         volatile u8 rev;        /* Revision & Impl */
109         volatile u8 ccr;        /* Clock Control Reg */
110         volatile u32 tmr;       /* Test Mode Read Back */
111         volatile u8 mod;        /* Monitor Operation Data Reg */
112         volatile u8 acr;        /* Aux Control */
113         u8 xxx0[6];
114         volatile u16 hct;       /* Hor Counter */
115         volatile u16 vct;       /* Vert Counter */
116         volatile u16 hbs;       /* Hor Blank Start */
117         volatile u16 hbc;       /* Hor Blank Clear */
118         volatile u16 hss;       /* Hor Sync Start */
119         volatile u16 hsc;       /* Hor Sync Clear */
120         volatile u16 csc;       /* Composite Sync Clear */
121         volatile u16 vbs;       /* Vert Blank Start */
122         volatile u16 vbc;       /* Vert Blank Clear */
123         volatile u16 vss;       /* Vert Sync Start */
124         volatile u16 vsc;       /* Vert Sync Clear */
125         volatile u16 xcs;
126         volatile u16 xcc;
127         volatile u16 fsa;       /* Fault Status Address */
128         volatile u16 adr;       /* Address Registers */
129         u8 xxx1[0xce];
130         volatile u8 pcg[0x100]; /* Pixel Clock Generator */
131         volatile u32 vbr;       /* Frame Base Row */
132         volatile u32 vmcr;      /* VBC Master Control */
133         volatile u32 vcr;       /* VBC refresh */
134         volatile u32 vca;       /* VBC Config */
135 };
136
137 #define CG14_CCR_ENABLE 0x04
138 #define CG14_CCR_SELECT 0x02    /* HW/Full screen */
139
140 struct cg14_cursor {
141         volatile u32 cpl0[32];  /* Enable plane 0 */
142         volatile u32 cpl1[32];  /* Color selection plane */
143         volatile u8 ccr;        /* Cursor Control Reg */
144         u8 xxx0[3];
145         volatile u16 cursx;     /* Cursor x,y position */
146         volatile u16 cursy;     /* Cursor x,y position */
147         volatile u32 color0;
148         volatile u32 color1;
149         u32 xxx1[0x1bc];
150         volatile u32 cpl0i[32]; /* Enable plane 0 autoinc */
151         volatile u32 cpl1i[32]; /* Color selection autoinc */
152 };
153
154 struct cg14_dac {
155         volatile u8 addr;       /* Address Register */
156         u8 xxx0[255];
157         volatile u8 glut;       /* Gamma table */
158         u8 xxx1[255];
159         volatile u8 select;     /* Register Select */
160         u8 xxx2[255];
161         volatile u8 mode;       /* Mode Register */
162 };
163
164 struct cg14_xlut{
165         volatile u8 x_xlut [256];
166         volatile u8 x_xlutd [256];
167         u8 xxx0[0x600];
168         volatile u8 x_xlut_inc [256];
169         volatile u8 x_xlutd_inc [256];
170 };
171
172 /* Color look up table (clut) */
173 /* Each one of these arrays hold the color lookup table (for 256
174  * colors) for each MDI page (I assume then there should be 4 MDI
175  * pages, I still wonder what they are.  I have seen NeXTStep split
176  * the screen in four parts, while operating in 24 bits mode.  Each
177  * integer holds 4 values: alpha value (transparency channel, thanks
178  * go to John Stone (johns@umr.edu) from OpenBSD), red, green and blue
179  *
180  * I currently use the clut instead of the Xlut
181  */
182 struct cg14_clut {
183         u32 c_clut [256];
184         u32 c_clutd [256];    /* i wonder what the 'd' is for */
185         u32 c_clut_inc [256];
186         u32 c_clutd_inc [256];
187 };
188
189 #define CG14_MMAP_ENTRIES       16
190
191 struct cg14_par {
192         spinlock_t              lock;
193         struct cg14_regs        __iomem *regs;
194         struct cg14_clut        __iomem *clut;
195         struct cg14_cursor      __iomem *cursor;
196
197         u32                     flags;
198 #define CG14_FLAG_BLANKED       0x00000001
199
200         unsigned long           physbase;
201         unsigned long           iospace;
202         unsigned long           fbsize;
203
204         struct sbus_mmap_map    mmap_map[CG14_MMAP_ENTRIES];
205
206         int                     mode;
207         int                     ramsize;
208         struct sbus_dev         *sdev;
209 };
210
211 static void __cg14_reset(struct cg14_par *par)
212 {
213         struct cg14_regs __iomem *regs = par->regs;
214         u8 val;
215
216         val = sbus_readb(&regs->mcr);
217         val &= ~(CG14_MCR_PIXMODE_MASK);
218         sbus_writeb(val, &regs->mcr);
219 }
220
221 static int cg14_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
222 {
223         struct cg14_par *par = (struct cg14_par *) info->par;
224         unsigned long flags;
225
226         /* We just use this to catch switches out of
227          * graphics mode.
228          */
229         spin_lock_irqsave(&par->lock, flags);
230         __cg14_reset(par);
231         spin_unlock_irqrestore(&par->lock, flags);
232
233         if (var->xoffset || var->yoffset || var->vmode)
234                 return -EINVAL;
235         return 0;
236 }
237
238 /**
239  *      cg14_setcolreg - Optional function. Sets a color register.
240  *      @regno: boolean, 0 copy local, 1 get_user() function
241  *      @red: frame buffer colormap structure
242  *      @green: The green value which can be up to 16 bits wide
243  *      @blue:  The blue value which can be up to 16 bits wide.
244  *      @transp: If supported the alpha value which can be up to 16 bits wide.
245  *      @info: frame buffer info structure
246  */
247 static int cg14_setcolreg(unsigned regno,
248                           unsigned red, unsigned green, unsigned blue,
249                           unsigned transp, struct fb_info *info)
250 {
251         struct cg14_par *par = (struct cg14_par *) info->par;
252         struct cg14_clut __iomem *clut = par->clut;
253         unsigned long flags;
254         u32 val;
255
256         if (regno >= 256)
257                 return 1;
258
259         red >>= 8;
260         green >>= 8;
261         blue >>= 8;
262         val = (red | (green << 8) | (blue << 16));
263
264         spin_lock_irqsave(&par->lock, flags);
265         sbus_writel(val, &clut->c_clut[regno]);
266         spin_unlock_irqrestore(&par->lock, flags);
267
268         return 0;
269 }
270
271 static int cg14_mmap(struct fb_info *info, struct file *file, struct vm_area_struct *vma)
272 {
273         struct cg14_par *par = (struct cg14_par *) info->par;
274
275         return sbusfb_mmap_helper(par->mmap_map,
276                                   par->physbase, par->fbsize,
277                                   par->iospace, vma);
278 }
279
280 static int cg14_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
281                       unsigned long arg, struct fb_info *info)
282 {
283         struct cg14_par *par = (struct cg14_par *) info->par;
284         struct cg14_regs __iomem *regs = par->regs;
285         struct mdi_cfginfo kmdi, __user *mdii;
286         unsigned long flags;
287         int cur_mode, mode, ret = 0;
288
289         switch (cmd) {
290         case MDI_RESET:
291                 spin_lock_irqsave(&par->lock, flags);
292                 __cg14_reset(par);
293                 spin_unlock_irqrestore(&par->lock, flags);
294                 break;
295
296         case MDI_GET_CFGINFO:
297                 memset(&kmdi, 0, sizeof(kmdi));
298
299                 spin_lock_irqsave(&par->lock, flags);
300                 kmdi.mdi_type = FBTYPE_MDICOLOR;
301                 kmdi.mdi_height = info->var.yres;
302                 kmdi.mdi_width = info->var.xres;
303                 kmdi.mdi_mode = par->mode;
304                 kmdi.mdi_pixfreq = 72; /* FIXME */
305                 kmdi.mdi_size = par->ramsize;
306                 spin_unlock_irqrestore(&par->lock, flags);
307
308                 mdii = (struct mdi_cfginfo __user *) arg;
309                 if (copy_to_user(mdii, &kmdi, sizeof(kmdi)))
310                         ret = -EFAULT;
311                 break;
312
313         case MDI_SET_PIXELMODE:
314                 if (get_user(mode, (int __user *) arg)) {
315                         ret = -EFAULT;
316                         break;
317                 }
318
319                 spin_lock_irqsave(&par->lock, flags);
320                 cur_mode = sbus_readb(&regs->mcr);
321                 cur_mode &= ~CG14_MCR_PIXMODE_MASK;
322                 switch(mode) {
323                 case MDI_32_PIX:
324                         cur_mode |= (CG14_MCR_PIXMODE_32 <<
325                                      CG14_MCR_PIXMODE_SHIFT);
326                         break;
327
328                 case MDI_16_PIX:
329                         cur_mode |= (CG14_MCR_PIXMODE_16 <<
330                                      CG14_MCR_PIXMODE_SHIFT);
331                         break;
332
333                 case MDI_8_PIX:
334                         break;
335
336                 default:
337                         ret = -ENOSYS;
338                         break;
339                 };
340                 if (!ret) {
341                         sbus_writeb(cur_mode, &regs->mcr);
342                         par->mode = mode;
343                 }
344                 spin_unlock_irqrestore(&par->lock, flags);
345                 break;
346
347         default:
348                 ret = sbusfb_ioctl_helper(cmd, arg, info,
349                                           FBTYPE_MDICOLOR, 8, par->fbsize);
350                 break;
351         };
352
353         return ret;
354 }
355
356 /*
357  *  Initialisation
358  */
359
360 static void cg14_init_fix(struct fb_info *info, int linebytes)
361 {
362         struct cg14_par *par = (struct cg14_par *)info->par;
363         const char *name;
364
365         name = "cgfourteen";
366         if (par->sdev)
367                 name = par->sdev->prom_name;
368
369         strlcpy(info->fix.id, name, sizeof(info->fix.id));
370
371         info->fix.type = FB_TYPE_PACKED_PIXELS;
372         info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
373
374         info->fix.line_length = linebytes;
375
376         info->fix.accel = FB_ACCEL_SUN_CG14;
377 }
378
379 static struct sbus_mmap_map __cg14_mmap_map[CG14_MMAP_ENTRIES] __initdata = {
380         {
381                 .voff   = CG14_REGS,
382                 .poff   = 0x80000000,
383                 .size   = 0x1000
384         },
385         {
386                 .voff   = CG14_XLUT,
387                 .poff   = 0x80003000,
388                 .size   = 0x1000
389         },
390         {
391                 .voff   = CG14_CLUT1,
392                 .poff   = 0x80004000,
393                 .size   = 0x1000
394         },
395         {
396                 .voff   = CG14_CLUT2,
397                 .poff   = 0x80005000,
398                 .size   = 0x1000
399         },
400         {
401                 .voff   = CG14_CLUT3,
402                 .poff   = 0x80006000,
403                 .size   = 0x1000
404         },
405         {
406                 .voff   = CG3_MMAP_OFFSET - 0x7000,
407                 .poff   = 0x80000000,
408                 .size   = 0x7000
409         },
410         {
411                 .voff   = CG3_MMAP_OFFSET,
412                 .poff   = 0x00000000,
413                 .size   = SBUS_MMAP_FBSIZE(1)
414         },
415         {
416                 .voff   = MDI_CURSOR_MAP,
417                 .poff   = 0x80001000,
418                 .size   = 0x1000
419         },
420         {
421                 .voff   = MDI_CHUNKY_BGR_MAP,
422                 .poff   = 0x01000000,
423                 .size   = 0x400000
424         },
425         {
426                 .voff   = MDI_PLANAR_X16_MAP,
427                 .poff   = 0x02000000,
428                 .size   = 0x200000
429         },
430         {
431                 .voff   = MDI_PLANAR_C16_MAP,
432                 .poff   = 0x02800000,
433                 .size   = 0x200000
434         },
435         {
436                 .voff   = MDI_PLANAR_X32_MAP,
437                 .poff   = 0x03000000,
438                 .size   = 0x100000
439         },
440         {
441                 .voff   = MDI_PLANAR_B32_MAP,
442                 .poff   = 0x03400000,
443                 .size   = 0x100000
444         },
445         {
446                 .voff   = MDI_PLANAR_G32_MAP,
447                 .poff   = 0x03800000,
448                 .size   = 0x100000
449         },
450         {
451                 .voff   = MDI_PLANAR_R32_MAP,
452                 .poff   = 0x03c00000,
453                 .size   = 0x100000
454         },
455         { .size = 0 }
456 };
457
458 struct all_info {
459         struct fb_info info;
460         struct cg14_par par;
461         struct list_head list;
462 };
463 static LIST_HEAD(cg14_list);
464
465 static void cg14_init_one(struct sbus_dev *sdev, int node, int parent_node)
466 {
467         struct all_info *all;
468         unsigned long phys, rphys;
469         u32 bases[6];
470         int is_8mb, linebytes, i;
471
472         if (!sdev) {
473                 if (prom_getproperty(node, "address",
474                                      (char *) &bases[0], sizeof(bases)) <= 0
475                     || !bases[0]) {
476                         printk(KERN_ERR "cg14: Device is not mapped.\n");
477                         return;
478                 }
479                 if (__get_iospace(bases[0]) != __get_iospace(bases[1])) {
480                         printk(KERN_ERR "cg14: I/O spaces don't match.\n");
481                         return;
482                 }
483         }
484
485         all = kmalloc(sizeof(*all), GFP_KERNEL);
486         if (!all) {
487                 printk(KERN_ERR "cg14: Cannot allocate memory.\n");
488                 return;
489         }
490         memset(all, 0, sizeof(*all));
491
492         INIT_LIST_HEAD(&all->list);
493
494         spin_lock_init(&all->par.lock);
495
496         sbusfb_fill_var(&all->info.var, node, 8);
497         all->info.var.red.length = 8;
498         all->info.var.green.length = 8;
499         all->info.var.blue.length = 8;
500
501         linebytes = prom_getintdefault(node, "linebytes",
502                                        all->info.var.xres);
503         all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
504
505         all->par.sdev = sdev;
506         if (sdev) {
507                 rphys = sdev->reg_addrs[0].phys_addr;
508                 all->par.physbase = phys = sdev->reg_addrs[1].phys_addr;
509                 all->par.iospace = sdev->reg_addrs[0].which_io;
510
511                 all->par.regs = sbus_ioremap(&sdev->resource[0], 0,
512                                      sizeof(struct cg14_regs),
513                                      "cg14 regs");
514                 all->par.clut = sbus_ioremap(&sdev->resource[0], CG14_CLUT1,
515                                      sizeof(struct cg14_clut),
516                                      "cg14 clut");
517                 all->par.cursor = sbus_ioremap(&sdev->resource[0], CG14_CURSORREGS,
518                                      sizeof(struct cg14_cursor),
519                                      "cg14 cursor");
520                 all->info.screen_base = sbus_ioremap(&sdev->resource[1], 0,
521                                      all->par.fbsize, "cg14 ram");
522         } else {
523                 rphys = __get_phys(bases[0]);
524                 all->par.physbase = phys = __get_phys(bases[1]);
525                 all->par.iospace = __get_iospace(bases[0]);
526                 all->par.regs = (struct cg14_regs __iomem *)(unsigned long)bases[0];
527                 all->par.clut = (struct cg14_clut __iomem *)((unsigned long)bases[0] +
528                                                      CG14_CLUT1);
529                 all->par.cursor =
530                         (struct cg14_cursor __iomem *)((unsigned long)bases[0] +
531                                                CG14_CURSORREGS);
532
533                 all->info.screen_base = (char __iomem *)(unsigned long)bases[1];
534         }
535
536         prom_getproperty(node, "reg", (char *) &bases[0], sizeof(bases));
537         is_8mb = (bases[5] == 0x800000);
538
539         if (sizeof(all->par.mmap_map) != sizeof(__cg14_mmap_map)) {
540                 extern void __cg14_mmap_sized_wrongly(void);
541
542                 __cg14_mmap_sized_wrongly();
543         }
544                 
545         memcpy(&all->par.mmap_map, &__cg14_mmap_map, sizeof(all->par.mmap_map));
546         for (i = 0; i < CG14_MMAP_ENTRIES; i++) {
547                 struct sbus_mmap_map *map = &all->par.mmap_map[i];
548
549                 if (!map->size)
550                         break;
551                 if (map->poff & 0x80000000)
552                         map->poff = (map->poff & 0x7fffffff) + rphys - phys;
553                 if (is_8mb &&
554                     map->size >= 0x100000 &&
555                     map->size <= 0x400000)
556                         map->size *= 2;
557         }
558
559         all->par.mode = MDI_8_PIX;
560         all->par.ramsize = (is_8mb ? 0x800000 : 0x400000);
561
562         all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
563         all->info.fbops = &cg14_ops;
564         all->info.par = &all->par;
565
566         __cg14_reset(&all->par);
567
568         if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
569                 printk(KERN_ERR "cg14: Could not allocate color map.\n");
570                 kfree(all);
571                 return;
572         }
573         fb_set_cmap(&all->info.cmap, &all->info);
574
575         cg14_init_fix(&all->info, linebytes);
576
577         if (register_framebuffer(&all->info) < 0) {
578                 printk(KERN_ERR "cg14: Could not register framebuffer.\n");
579                 fb_dealloc_cmap(&all->info.cmap);
580                 kfree(all);
581                 return;
582         }
583
584         list_add(&all->list, &cg14_list);
585
586         printk("cg14: cgfourteen at %lx:%lx, %dMB\n",
587                all->par.iospace, all->par.physbase, all->par.ramsize >> 20);
588
589 }
590
591 int __init cg14_init(void)
592 {
593         struct sbus_bus *sbus;
594         struct sbus_dev *sdev;
595
596         if (fb_get_options("cg14fb", NULL))
597                 return -ENODEV;
598
599 #ifdef CONFIG_SPARC32
600         {
601                 int root, node;
602
603                 root = prom_getchild(prom_root_node);
604                 root = prom_searchsiblings(root, "obio");
605                 if (root) {
606                         node = prom_searchsiblings(prom_getchild(root),
607                                                    "cgfourteen");
608                         if (node)
609                                 cg14_init_one(NULL, node, root);
610                 }
611         }
612 #endif
613         for_all_sbusdev(sdev, sbus) {
614                 if (!strcmp(sdev->prom_name, "cgfourteen"))
615                         cg14_init_one(sdev, sdev->prom_node, sbus->prom_node);
616         }
617
618         return 0;
619 }
620
621 void __exit cg14_exit(void)
622 {
623         struct list_head *pos, *tmp;
624
625         list_for_each_safe(pos, tmp, &cg14_list) {
626                 struct all_info *all = list_entry(pos, typeof(*all), list);
627
628                 unregister_framebuffer(&all->info);
629                 fb_dealloc_cmap(&all->info.cmap);
630                 kfree(all);
631         }
632 }
633
634 int __init
635 cg14_setup(char *arg)
636 {
637         /* No cmdline options yet... */
638         return 0;
639 }
640
641 module_init(cg14_init);
642
643 #ifdef MODULE
644 module_exit(cg14_exit);
645 #endif
646
647 MODULE_DESCRIPTION("framebuffer driver for CGfourteen chipsets");
648 MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
649 MODULE_LICENSE("GPL");