atmel_lcdfb: set ypanstep to 1 and enable y-panning on AT91
[linux-2.6.git] / drivers / video / atmel_lcdfb.c
1 /*
2  *  Driver for AT91/AT32 LCD Controller
3  *
4  *  Copyright (C) 2007 Atmel Corporation
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License.  See the file COPYING in the main directory of this archive for
8  * more details.
9  */
10
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
16 #include <linux/fb.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20
21 #include <mach/board.h>
22 #include <mach/cpu.h>
23 #include <mach/gpio.h>
24
25 #include <video/atmel_lcdc.h>
26
27 #define lcdc_readl(sinfo, reg)          __raw_readl((sinfo)->mmio+(reg))
28 #define lcdc_writel(sinfo, reg, val)    __raw_writel((val), (sinfo)->mmio+(reg))
29
30 /* configurable parameters */
31 #define ATMEL_LCDC_CVAL_DEFAULT         0xc8
32 #define ATMEL_LCDC_DMA_BURST_LEN        8
33
34 #if defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91CAP9) || \
35         defined(CONFIG_ARCH_AT91SAM9RL)
36 #define ATMEL_LCDC_FIFO_SIZE            2048
37 #else
38 #define ATMEL_LCDC_FIFO_SIZE            512
39 #endif
40
41 #if defined(CONFIG_ARCH_AT91)
42 #define ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
43                                          | FBINFO_PARTIAL_PAN_OK \
44                                          | FBINFO_HWACCEL_YPAN)
45
46 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
47                                         struct fb_var_screeninfo *var)
48 {
49
50 }
51 #elif defined(CONFIG_AVR32)
52 #define ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
53                                         | FBINFO_PARTIAL_PAN_OK \
54                                         | FBINFO_HWACCEL_XPAN \
55                                         | FBINFO_HWACCEL_YPAN)
56
57 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
58                                      struct fb_var_screeninfo *var)
59 {
60         u32 dma2dcfg;
61         u32 pixeloff;
62
63         pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
64
65         dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
66         dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
67         lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
68
69         /* Update configuration */
70         lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
71                     lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
72                     | ATMEL_LCDC_DMAUPDT);
73 }
74 #endif
75
76 static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
77                 | ATMEL_LCDC_POL_POSITIVE
78                 | ATMEL_LCDC_ENA_PWMENABLE;
79
80 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
81
82 /* some bl->props field just changed */
83 static int atmel_bl_update_status(struct backlight_device *bl)
84 {
85         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
86         int                     power = sinfo->bl_power;
87         int                     brightness = bl->props.brightness;
88
89         /* REVISIT there may be a meaningful difference between
90          * fb_blank and power ... there seem to be some cases
91          * this doesn't handle correctly.
92          */
93         if (bl->props.fb_blank != sinfo->bl_power)
94                 power = bl->props.fb_blank;
95         else if (bl->props.power != sinfo->bl_power)
96                 power = bl->props.power;
97
98         if (brightness < 0 && power == FB_BLANK_UNBLANK)
99                 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
100         else if (power != FB_BLANK_UNBLANK)
101                 brightness = 0;
102
103         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
104         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
105                         brightness ? contrast_ctr : 0);
106
107         bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
108
109         return 0;
110 }
111
112 static int atmel_bl_get_brightness(struct backlight_device *bl)
113 {
114         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
115
116         return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
117 }
118
119 static struct backlight_ops atmel_lcdc_bl_ops = {
120         .update_status = atmel_bl_update_status,
121         .get_brightness = atmel_bl_get_brightness,
122 };
123
124 static void init_backlight(struct atmel_lcdfb_info *sinfo)
125 {
126         struct backlight_device *bl;
127
128         sinfo->bl_power = FB_BLANK_UNBLANK;
129
130         if (sinfo->backlight)
131                 return;
132
133         bl = backlight_device_register("backlight", &sinfo->pdev->dev,
134                         sinfo, &atmel_lcdc_bl_ops);
135         if (IS_ERR(sinfo->backlight)) {
136                 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
137                                 PTR_ERR(bl));
138                 return;
139         }
140         sinfo->backlight = bl;
141
142         bl->props.power = FB_BLANK_UNBLANK;
143         bl->props.fb_blank = FB_BLANK_UNBLANK;
144         bl->props.max_brightness = 0xff;
145         bl->props.brightness = atmel_bl_get_brightness(bl);
146 }
147
148 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
149 {
150         if (sinfo->backlight)
151                 backlight_device_unregister(sinfo->backlight);
152 }
153
154 #else
155
156 static void init_backlight(struct atmel_lcdfb_info *sinfo)
157 {
158         dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
159 }
160
161 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
162 {
163 }
164
165 #endif
166
167 static void init_contrast(struct atmel_lcdfb_info *sinfo)
168 {
169         /* have some default contrast/backlight settings */
170         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
171         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
172
173         if (sinfo->lcdcon_is_backlight)
174                 init_backlight(sinfo);
175 }
176
177
178 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
179         .type           = FB_TYPE_PACKED_PIXELS,
180         .visual         = FB_VISUAL_TRUECOLOR,
181         .xpanstep       = 0,
182         .ypanstep       = 1,
183         .ywrapstep      = 0,
184         .accel          = FB_ACCEL_NONE,
185 };
186
187 static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
188 {
189         unsigned long value;
190
191         if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
192                 return xres;
193
194         value = xres;
195         if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
196                 /* STN display */
197                 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
198                         value *= 3;
199                 }
200                 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
201                    || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
202                       && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
203                         value = DIV_ROUND_UP(value, 4);
204                 else
205                         value = DIV_ROUND_UP(value, 8);
206         }
207
208         return value;
209 }
210
211 static void atmel_lcdfb_update_dma(struct fb_info *info,
212                                struct fb_var_screeninfo *var)
213 {
214         struct atmel_lcdfb_info *sinfo = info->par;
215         struct fb_fix_screeninfo *fix = &info->fix;
216         unsigned long dma_addr;
217
218         dma_addr = (fix->smem_start + var->yoffset * fix->line_length
219                     + var->xoffset * var->bits_per_pixel / 8);
220
221         dma_addr &= ~3UL;
222
223         /* Set framebuffer DMA base address and pixel offset */
224         lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
225
226         atmel_lcdfb_update_dma2d(sinfo, var);
227 }
228
229 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
230 {
231         struct fb_info *info = sinfo->info;
232
233         dma_free_writecombine(info->device, info->fix.smem_len,
234                                 info->screen_base, info->fix.smem_start);
235 }
236
237 /**
238  *      atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
239  *      @sinfo: the frame buffer to allocate memory for
240  */
241 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
242 {
243         struct fb_info *info = sinfo->info;
244         struct fb_var_screeninfo *var = &info->var;
245
246         info->fix.smem_len = (var->xres_virtual * var->yres_virtual
247                             * ((var->bits_per_pixel + 7) / 8));
248
249         info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
250                                         (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
251
252         if (!info->screen_base) {
253                 return -ENOMEM;
254         }
255
256         memset(info->screen_base, 0, info->fix.smem_len);
257
258         return 0;
259 }
260
261 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
262                                                      struct fb_info *info)
263 {
264         struct fb_videomode varfbmode;
265         const struct fb_videomode *fbmode = NULL;
266
267         fb_var_to_videomode(&varfbmode, var);
268         fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
269         if (fbmode)
270                 fb_videomode_to_var(var, fbmode);
271         return fbmode;
272 }
273
274
275 /**
276  *      atmel_lcdfb_check_var - Validates a var passed in.
277  *      @var: frame buffer variable screen structure
278  *      @info: frame buffer structure that represents a single frame buffer
279  *
280  *      Checks to see if the hardware supports the state requested by
281  *      var passed in. This function does not alter the hardware
282  *      state!!!  This means the data stored in struct fb_info and
283  *      struct atmel_lcdfb_info do not change. This includes the var
284  *      inside of struct fb_info.  Do NOT change these. This function
285  *      can be called on its own if we intent to only test a mode and
286  *      not actually set it. The stuff in modedb.c is a example of
287  *      this. If the var passed in is slightly off by what the
288  *      hardware can support then we alter the var PASSED in to what
289  *      we can do. If the hardware doesn't support mode change a
290  *      -EINVAL will be returned by the upper layers. You don't need
291  *      to implement this function then. If you hardware doesn't
292  *      support changing the resolution then this function is not
293  *      needed. In this case the driver would just provide a var that
294  *      represents the static state the screen is in.
295  *
296  *      Returns negative errno on error, or zero on success.
297  */
298 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
299                              struct fb_info *info)
300 {
301         struct device *dev = info->device;
302         struct atmel_lcdfb_info *sinfo = info->par;
303         unsigned long clk_value_khz;
304
305         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
306
307         dev_dbg(dev, "%s:\n", __func__);
308
309         if (!(var->pixclock && var->bits_per_pixel)) {
310                 /* choose a suitable mode if possible */
311                 if (!atmel_lcdfb_choose_mode(var, info)) {
312                         dev_err(dev, "needed value not specified\n");
313                         return -EINVAL;
314                 }
315         }
316
317         dev_dbg(dev, "  resolution: %ux%u\n", var->xres, var->yres);
318         dev_dbg(dev, "  pixclk:     %lu KHz\n", PICOS2KHZ(var->pixclock));
319         dev_dbg(dev, "  bpp:        %u\n", var->bits_per_pixel);
320         dev_dbg(dev, "  clk:        %lu KHz\n", clk_value_khz);
321
322         if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) {
323                 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
324                 return -EINVAL;
325         }
326
327         /* Do not allow to have real resoulution larger than virtual */
328         if (var->xres > var->xres_virtual)
329                 var->xres_virtual = var->xres;
330
331         if (var->yres > var->yres_virtual)
332                 var->yres_virtual = var->yres;
333
334         /* Force same alignment for each line */
335         var->xres = (var->xres + 3) & ~3UL;
336         var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
337
338         var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
339         var->transp.msb_right = 0;
340         var->transp.offset = var->transp.length = 0;
341         var->xoffset = var->yoffset = 0;
342
343         /* Saturate vertical and horizontal timings at maximum values */
344         var->vsync_len = min_t(u32, var->vsync_len,
345                         (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
346         var->upper_margin = min_t(u32, var->upper_margin,
347                         ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
348         var->lower_margin = min_t(u32, var->lower_margin,
349                         ATMEL_LCDC_VFP);
350         var->right_margin = min_t(u32, var->right_margin,
351                         (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
352         var->hsync_len = min_t(u32, var->hsync_len,
353                         (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
354         var->left_margin = min_t(u32, var->left_margin,
355                         ATMEL_LCDC_HBP + 1);
356
357         /* Some parameters can't be zero */
358         var->vsync_len = max_t(u32, var->vsync_len, 1);
359         var->right_margin = max_t(u32, var->right_margin, 1);
360         var->hsync_len = max_t(u32, var->hsync_len, 1);
361         var->left_margin = max_t(u32, var->left_margin, 1);
362
363         switch (var->bits_per_pixel) {
364         case 1:
365         case 2:
366         case 4:
367         case 8:
368                 var->red.offset = var->green.offset = var->blue.offset = 0;
369                 var->red.length = var->green.length = var->blue.length
370                         = var->bits_per_pixel;
371                 break;
372         case 15:
373         case 16:
374                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
375                         /* RGB:565 mode */
376                         var->red.offset = 11;
377                         var->blue.offset = 0;
378                         var->green.length = 6;
379                 } else {
380                         /* BGR:555 mode */
381                         var->red.offset = 0;
382                         var->blue.offset = 10;
383                         var->green.length = 5;
384                 }
385                 var->green.offset = 5;
386                 var->red.length = var->blue.length = 5;
387                 break;
388         case 32:
389                 var->transp.offset = 24;
390                 var->transp.length = 8;
391                 /* fall through */
392         case 24:
393                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
394                         /* RGB:888 mode */
395                         var->red.offset = 16;
396                         var->blue.offset = 0;
397                 } else {
398                         /* BGR:888 mode */
399                         var->red.offset = 0;
400                         var->blue.offset = 16;
401                 }
402                 var->green.offset = 8;
403                 var->red.length = var->green.length = var->blue.length = 8;
404                 break;
405         default:
406                 dev_err(dev, "color depth %d not supported\n",
407                                         var->bits_per_pixel);
408                 return -EINVAL;
409         }
410
411         return 0;
412 }
413
414 /*
415  * LCD reset sequence
416  */
417 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
418 {
419         might_sleep();
420
421         /* LCD power off */
422         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
423
424         /* wait for the LCDC core to become idle */
425         while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
426                 msleep(10);
427
428         /* DMA disable */
429         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
430
431         /* wait for DMA engine to become idle */
432         while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
433                 msleep(10);
434
435         /* LCD power on */
436         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
437                 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
438
439         /* DMA enable */
440         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
441 }
442
443 /**
444  *      atmel_lcdfb_set_par - Alters the hardware state.
445  *      @info: frame buffer structure that represents a single frame buffer
446  *
447  *      Using the fb_var_screeninfo in fb_info we set the resolution
448  *      of the this particular framebuffer. This function alters the
449  *      par AND the fb_fix_screeninfo stored in fb_info. It doesn't
450  *      not alter var in fb_info since we are using that data. This
451  *      means we depend on the data in var inside fb_info to be
452  *      supported by the hardware.  atmel_lcdfb_check_var is always called
453  *      before atmel_lcdfb_set_par to ensure this.  Again if you can't
454  *      change the resolution you don't need this function.
455  *
456  */
457 static int atmel_lcdfb_set_par(struct fb_info *info)
458 {
459         struct atmel_lcdfb_info *sinfo = info->par;
460         unsigned long hozval_linesz;
461         unsigned long value;
462         unsigned long clk_value_khz;
463         unsigned long bits_per_line;
464
465         might_sleep();
466
467         dev_dbg(info->device, "%s:\n", __func__);
468         dev_dbg(info->device, "  * resolution: %ux%u (%ux%u virtual)\n",
469                  info->var.xres, info->var.yres,
470                  info->var.xres_virtual, info->var.yres_virtual);
471
472         /* Turn off the LCD controller and the DMA controller */
473         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
474
475         /* Wait for the LCDC core to become idle */
476         while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
477                 msleep(10);
478
479         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
480
481         if (info->var.bits_per_pixel == 1)
482                 info->fix.visual = FB_VISUAL_MONO01;
483         else if (info->var.bits_per_pixel <= 8)
484                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
485         else
486                 info->fix.visual = FB_VISUAL_TRUECOLOR;
487
488         bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
489         info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
490
491         /* Re-initialize the DMA engine... */
492         dev_dbg(info->device, "  * update DMA engine\n");
493         atmel_lcdfb_update_dma(info, &info->var);
494
495         /* ...set frame size and burst length = 8 words (?) */
496         value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
497         value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
498         lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
499
500         /* Now, the LCDC core... */
501
502         /* Set pixel clock */
503         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
504
505         value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
506
507         if (value < 2) {
508                 dev_notice(info->device, "Bypassing pixel clock divider\n");
509                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
510         } else {
511                 value = (value / 2) - 1;
512                 dev_dbg(info->device, "  * programming CLKVAL = 0x%08lx\n",
513                                 value);
514                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
515                                 value << ATMEL_LCDC_CLKVAL_OFFSET);
516                 info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
517                 dev_dbg(info->device, "  updated pixclk:     %lu KHz\n",
518                                         PICOS2KHZ(info->var.pixclock));
519         }
520
521
522         /* Initialize control register 2 */
523         value = sinfo->default_lcdcon2;
524
525         if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
526                 value |= ATMEL_LCDC_INVLINE_INVERTED;
527         if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
528                 value |= ATMEL_LCDC_INVFRAME_INVERTED;
529
530         switch (info->var.bits_per_pixel) {
531                 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
532                 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
533                 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
534                 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
535                 case 15: /* fall through */
536                 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
537                 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
538                 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
539                 default: BUG(); break;
540         }
541         dev_dbg(info->device, "  * LCDCON2 = %08lx\n", value);
542         lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
543
544         /* Vertical timing */
545         value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
546         value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
547         value |= info->var.lower_margin;
548         dev_dbg(info->device, "  * LCDTIM1 = %08lx\n", value);
549         lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
550
551         /* Horizontal timing */
552         value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
553         value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
554         value |= (info->var.left_margin - 1);
555         dev_dbg(info->device, "  * LCDTIM2 = %08lx\n", value);
556         lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
557
558         /* Horizontal value (aka line size) */
559         hozval_linesz = compute_hozval(info->var.xres,
560                                         lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
561
562         /* Display size */
563         value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
564         value |= info->var.yres - 1;
565         dev_dbg(info->device, "  * LCDFRMCFG = %08lx\n", value);
566         lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
567
568         /* FIFO Threshold: Use formula from data sheet */
569         value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
570         lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
571
572         /* Toggle LCD_MODE every frame */
573         lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
574
575         /* Disable all interrupts */
576         lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
577         /* Enable FIFO & DMA errors */
578         lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
579
580         /* ...wait for DMA engine to become idle... */
581         while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
582                 msleep(10);
583
584         dev_dbg(info->device, "  * re-enable DMA engine\n");
585         /* ...and enable it with updated configuration */
586         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
587
588         dev_dbg(info->device, "  * re-enable LCDC core\n");
589         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
590                 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
591
592         dev_dbg(info->device, "  * DONE\n");
593
594         return 0;
595 }
596
597 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
598 {
599         chan &= 0xffff;
600         chan >>= 16 - bf->length;
601         return chan << bf->offset;
602 }
603
604 /**
605  *      atmel_lcdfb_setcolreg - Optional function. Sets a color register.
606  *      @regno: Which register in the CLUT we are programming
607  *      @red: The red value which can be up to 16 bits wide
608  *      @green: The green value which can be up to 16 bits wide
609  *      @blue:  The blue value which can be up to 16 bits wide.
610  *      @transp: If supported the alpha value which can be up to 16 bits wide.
611  *      @info: frame buffer info structure
612  *
613  *      Set a single color register. The values supplied have a 16 bit
614  *      magnitude which needs to be scaled in this function for the hardware.
615  *      Things to take into consideration are how many color registers, if
616  *      any, are supported with the current color visual. With truecolor mode
617  *      no color palettes are supported. Here a psuedo palette is created
618  *      which we store the value in pseudo_palette in struct fb_info. For
619  *      pseudocolor mode we have a limited color palette. To deal with this
620  *      we can program what color is displayed for a particular pixel value.
621  *      DirectColor is similar in that we can program each color field. If
622  *      we have a static colormap we don't need to implement this function.
623  *
624  *      Returns negative errno on error, or zero on success. In an
625  *      ideal world, this would have been the case, but as it turns
626  *      out, the other drivers return 1 on failure, so that's what
627  *      we're going to do.
628  */
629 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
630                              unsigned int green, unsigned int blue,
631                              unsigned int transp, struct fb_info *info)
632 {
633         struct atmel_lcdfb_info *sinfo = info->par;
634         unsigned int val;
635         u32 *pal;
636         int ret = 1;
637
638         if (info->var.grayscale)
639                 red = green = blue = (19595 * red + 38470 * green
640                                       + 7471 * blue) >> 16;
641
642         switch (info->fix.visual) {
643         case FB_VISUAL_TRUECOLOR:
644                 if (regno < 16) {
645                         pal = info->pseudo_palette;
646
647                         val  = chan_to_field(red, &info->var.red);
648                         val |= chan_to_field(green, &info->var.green);
649                         val |= chan_to_field(blue, &info->var.blue);
650
651                         pal[regno] = val;
652                         ret = 0;
653                 }
654                 break;
655
656         case FB_VISUAL_PSEUDOCOLOR:
657                 if (regno < 256) {
658                         val  = ((red   >> 11) & 0x001f);
659                         val |= ((green >>  6) & 0x03e0);
660                         val |= ((blue  >>  1) & 0x7c00);
661
662                         /*
663                          * TODO: intensity bit. Maybe something like
664                          *   ~(red[10] ^ green[10] ^ blue[10]) & 1
665                          */
666
667                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
668                         ret = 0;
669                 }
670                 break;
671
672         case FB_VISUAL_MONO01:
673                 if (regno < 2) {
674                         val = (regno == 0) ? 0x00 : 0x1F;
675                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
676                         ret = 0;
677                 }
678                 break;
679
680         }
681
682         return ret;
683 }
684
685 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
686                                struct fb_info *info)
687 {
688         dev_dbg(info->device, "%s\n", __func__);
689
690         atmel_lcdfb_update_dma(info, var);
691
692         return 0;
693 }
694
695 static struct fb_ops atmel_lcdfb_ops = {
696         .owner          = THIS_MODULE,
697         .fb_check_var   = atmel_lcdfb_check_var,
698         .fb_set_par     = atmel_lcdfb_set_par,
699         .fb_setcolreg   = atmel_lcdfb_setcolreg,
700         .fb_pan_display = atmel_lcdfb_pan_display,
701         .fb_fillrect    = cfb_fillrect,
702         .fb_copyarea    = cfb_copyarea,
703         .fb_imageblit   = cfb_imageblit,
704 };
705
706 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
707 {
708         struct fb_info *info = dev_id;
709         struct atmel_lcdfb_info *sinfo = info->par;
710         u32 status;
711
712         status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
713         if (status & ATMEL_LCDC_UFLWI) {
714                 dev_warn(info->device, "FIFO underflow %#x\n", status);
715                 /* reset DMA and FIFO to avoid screen shifting */
716                 schedule_work(&sinfo->task);
717         }
718         lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
719         return IRQ_HANDLED;
720 }
721
722 /*
723  * LCD controller task (to reset the LCD)
724  */
725 static void atmel_lcdfb_task(struct work_struct *work)
726 {
727         struct atmel_lcdfb_info *sinfo =
728                 container_of(work, struct atmel_lcdfb_info, task);
729
730         atmel_lcdfb_reset(sinfo);
731 }
732
733 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
734 {
735         struct fb_info *info = sinfo->info;
736         int ret = 0;
737
738         info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
739
740         dev_info(info->device,
741                "%luKiB frame buffer at %08lx (mapped at %p)\n",
742                (unsigned long)info->fix.smem_len / 1024,
743                (unsigned long)info->fix.smem_start,
744                info->screen_base);
745
746         /* Allocate colormap */
747         ret = fb_alloc_cmap(&info->cmap, 256, 0);
748         if (ret < 0)
749                 dev_err(info->device, "Alloc color map failed\n");
750
751         return ret;
752 }
753
754 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
755 {
756         if (sinfo->bus_clk)
757                 clk_enable(sinfo->bus_clk);
758         clk_enable(sinfo->lcdc_clk);
759 }
760
761 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
762 {
763         if (sinfo->bus_clk)
764                 clk_disable(sinfo->bus_clk);
765         clk_disable(sinfo->lcdc_clk);
766 }
767
768
769 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
770 {
771         struct device *dev = &pdev->dev;
772         struct fb_info *info;
773         struct atmel_lcdfb_info *sinfo;
774         struct atmel_lcdfb_info *pdata_sinfo;
775         struct fb_videomode fbmode;
776         struct resource *regs = NULL;
777         struct resource *map = NULL;
778         int ret;
779
780         dev_dbg(dev, "%s BEGIN\n", __func__);
781
782         ret = -ENOMEM;
783         info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
784         if (!info) {
785                 dev_err(dev, "cannot allocate memory\n");
786                 goto out;
787         }
788
789         sinfo = info->par;
790
791         if (dev->platform_data) {
792                 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
793                 sinfo->default_bpp = pdata_sinfo->default_bpp;
794                 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
795                 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
796                 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
797                 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
798                 sinfo->guard_time = pdata_sinfo->guard_time;
799                 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
800                 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
801         } else {
802                 dev_err(dev, "cannot get default configuration\n");
803                 goto free_info;
804         }
805         sinfo->info = info;
806         sinfo->pdev = pdev;
807
808         strcpy(info->fix.id, sinfo->pdev->name);
809         info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
810         info->pseudo_palette = sinfo->pseudo_palette;
811         info->fbops = &atmel_lcdfb_ops;
812
813         memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
814         info->fix = atmel_lcdfb_fix;
815
816         /* Enable LCDC Clocks */
817         if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
818                 sinfo->bus_clk = clk_get(dev, "hck1");
819                 if (IS_ERR(sinfo->bus_clk)) {
820                         ret = PTR_ERR(sinfo->bus_clk);
821                         goto free_info;
822                 }
823         }
824         sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
825         if (IS_ERR(sinfo->lcdc_clk)) {
826                 ret = PTR_ERR(sinfo->lcdc_clk);
827                 goto put_bus_clk;
828         }
829         atmel_lcdfb_start_clock(sinfo);
830
831         ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
832                         info->monspecs.modedb_len, info->monspecs.modedb,
833                         sinfo->default_bpp);
834         if (!ret) {
835                 dev_err(dev, "no suitable video mode found\n");
836                 goto stop_clk;
837         }
838
839
840         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
841         if (!regs) {
842                 dev_err(dev, "resources unusable\n");
843                 ret = -ENXIO;
844                 goto stop_clk;
845         }
846
847         sinfo->irq_base = platform_get_irq(pdev, 0);
848         if (sinfo->irq_base < 0) {
849                 dev_err(dev, "unable to get irq\n");
850                 ret = sinfo->irq_base;
851                 goto stop_clk;
852         }
853
854         /* Initialize video memory */
855         map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
856         if (map) {
857                 /* use a pre-allocated memory buffer */
858                 info->fix.smem_start = map->start;
859                 info->fix.smem_len = map->end - map->start + 1;
860                 if (!request_mem_region(info->fix.smem_start,
861                                         info->fix.smem_len, pdev->name)) {
862                         ret = -EBUSY;
863                         goto stop_clk;
864                 }
865
866                 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
867                 if (!info->screen_base)
868                         goto release_intmem;
869
870                 /*
871                  * Don't clear the framebuffer -- someone may have set
872                  * up a splash image.
873                  */
874         } else {
875                 /* alocate memory buffer */
876                 ret = atmel_lcdfb_alloc_video_memory(sinfo);
877                 if (ret < 0) {
878                         dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
879                         goto stop_clk;
880                 }
881         }
882
883         /* LCDC registers */
884         info->fix.mmio_start = regs->start;
885         info->fix.mmio_len = regs->end - regs->start + 1;
886
887         if (!request_mem_region(info->fix.mmio_start,
888                                 info->fix.mmio_len, pdev->name)) {
889                 ret = -EBUSY;
890                 goto free_fb;
891         }
892
893         sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
894         if (!sinfo->mmio) {
895                 dev_err(dev, "cannot map LCDC registers\n");
896                 goto release_mem;
897         }
898
899         /* Initialize PWM for contrast or backlight ("off") */
900         init_contrast(sinfo);
901
902         /* interrupt */
903         ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
904         if (ret) {
905                 dev_err(dev, "request_irq failed: %d\n", ret);
906                 goto unmap_mmio;
907         }
908
909         /* Some operations on the LCDC might sleep and
910          * require a preemptible task context */
911         INIT_WORK(&sinfo->task, atmel_lcdfb_task);
912
913         ret = atmel_lcdfb_init_fbinfo(sinfo);
914         if (ret < 0) {
915                 dev_err(dev, "init fbinfo failed: %d\n", ret);
916                 goto unregister_irqs;
917         }
918
919         /*
920          * This makes sure that our colour bitfield
921          * descriptors are correctly initialised.
922          */
923         atmel_lcdfb_check_var(&info->var, info);
924
925         ret = fb_set_var(info, &info->var);
926         if (ret) {
927                 dev_warn(dev, "unable to set display parameters\n");
928                 goto free_cmap;
929         }
930
931         dev_set_drvdata(dev, info);
932
933         /*
934          * Tell the world that we're ready to go
935          */
936         ret = register_framebuffer(info);
937         if (ret < 0) {
938                 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
939                 goto free_cmap;
940         }
941
942         /* add selected videomode to modelist */
943         fb_var_to_videomode(&fbmode, &info->var);
944         fb_add_videomode(&fbmode, &info->modelist);
945
946         /* Power up the LCDC screen */
947         if (sinfo->atmel_lcdfb_power_control)
948                 sinfo->atmel_lcdfb_power_control(1);
949
950         dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
951                        info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
952
953         return 0;
954
955
956 free_cmap:
957         fb_dealloc_cmap(&info->cmap);
958 unregister_irqs:
959         cancel_work_sync(&sinfo->task);
960         free_irq(sinfo->irq_base, info);
961 unmap_mmio:
962         exit_backlight(sinfo);
963         iounmap(sinfo->mmio);
964 release_mem:
965         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
966 free_fb:
967         if (map)
968                 iounmap(info->screen_base);
969         else
970                 atmel_lcdfb_free_video_memory(sinfo);
971
972 release_intmem:
973         if (map)
974                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
975 stop_clk:
976         atmel_lcdfb_stop_clock(sinfo);
977         clk_put(sinfo->lcdc_clk);
978 put_bus_clk:
979         if (sinfo->bus_clk)
980                 clk_put(sinfo->bus_clk);
981 free_info:
982         framebuffer_release(info);
983 out:
984         dev_dbg(dev, "%s FAILED\n", __func__);
985         return ret;
986 }
987
988 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
989 {
990         struct device *dev = &pdev->dev;
991         struct fb_info *info = dev_get_drvdata(dev);
992         struct atmel_lcdfb_info *sinfo = info->par;
993
994         if (!sinfo)
995                 return 0;
996
997         cancel_work_sync(&sinfo->task);
998         exit_backlight(sinfo);
999         if (sinfo->atmel_lcdfb_power_control)
1000                 sinfo->atmel_lcdfb_power_control(0);
1001         unregister_framebuffer(info);
1002         atmel_lcdfb_stop_clock(sinfo);
1003         clk_put(sinfo->lcdc_clk);
1004         if (sinfo->bus_clk)
1005                 clk_put(sinfo->bus_clk);
1006         fb_dealloc_cmap(&info->cmap);
1007         free_irq(sinfo->irq_base, info);
1008         iounmap(sinfo->mmio);
1009         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1010         if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1011                 iounmap(info->screen_base);
1012                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1013         } else {
1014                 atmel_lcdfb_free_video_memory(sinfo);
1015         }
1016
1017         dev_set_drvdata(dev, NULL);
1018         framebuffer_release(info);
1019
1020         return 0;
1021 }
1022
1023 #ifdef CONFIG_PM
1024
1025 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1026 {
1027         struct fb_info *info = platform_get_drvdata(pdev);
1028         struct atmel_lcdfb_info *sinfo = info->par;
1029
1030         sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
1031         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1032         if (sinfo->atmel_lcdfb_power_control)
1033                 sinfo->atmel_lcdfb_power_control(0);
1034         atmel_lcdfb_stop_clock(sinfo);
1035         return 0;
1036 }
1037
1038 static int atmel_lcdfb_resume(struct platform_device *pdev)
1039 {
1040         struct fb_info *info = platform_get_drvdata(pdev);
1041         struct atmel_lcdfb_info *sinfo = info->par;
1042
1043         atmel_lcdfb_start_clock(sinfo);
1044         if (sinfo->atmel_lcdfb_power_control)
1045                 sinfo->atmel_lcdfb_power_control(1);
1046         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1047         return 0;
1048 }
1049
1050 #else
1051 #define atmel_lcdfb_suspend     NULL
1052 #define atmel_lcdfb_resume      NULL
1053 #endif
1054
1055 static struct platform_driver atmel_lcdfb_driver = {
1056         .remove         = __exit_p(atmel_lcdfb_remove),
1057         .suspend        = atmel_lcdfb_suspend,
1058         .resume         = atmel_lcdfb_resume,
1059
1060         .driver         = {
1061                 .name   = "atmel_lcdfb",
1062                 .owner  = THIS_MODULE,
1063         },
1064 };
1065
1066 static int __init atmel_lcdfb_init(void)
1067 {
1068         return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
1069 }
1070
1071 static void __exit atmel_lcdfb_exit(void)
1072 {
1073         platform_driver_unregister(&atmel_lcdfb_driver);
1074 }
1075
1076 module_init(atmel_lcdfb_init);
1077 module_exit(atmel_lcdfb_exit);
1078
1079 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1080 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1081 MODULE_LICENSE("GPL");