atmel_lcdfb: FIFO underflow management
[linux-2.6.git] / drivers / video / atmel_lcdfb.c
1 /*
2  *  Driver for AT91/AT32 LCD Controller
3  *
4  *  Copyright (C) 2007 Atmel Corporation
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License.  See the file COPYING in the main directory of this archive for
8  * more details.
9  */
10
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
16 #include <linux/fb.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20
21 #include <asm/arch/board.h>
22 #include <asm/arch/cpu.h>
23 #include <asm/arch/gpio.h>
24
25 #include <video/atmel_lcdc.h>
26
27 #define lcdc_readl(sinfo, reg)          __raw_readl((sinfo)->mmio+(reg))
28 #define lcdc_writel(sinfo, reg, val)    __raw_writel((val), (sinfo)->mmio+(reg))
29
30 /* configurable parameters */
31 #define ATMEL_LCDC_CVAL_DEFAULT         0xc8
32 #define ATMEL_LCDC_DMA_BURST_LEN        8
33
34 #if defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91CAP9) || \
35         defined(CONFIG_ARCH_AT91SAM9RL)
36 #define ATMEL_LCDC_FIFO_SIZE            2048
37 #else
38 #define ATMEL_LCDC_FIFO_SIZE            512
39 #endif
40
41 #if defined(CONFIG_ARCH_AT91)
42 #define ATMEL_LCDFB_FBINFO_DEFAULT      FBINFO_DEFAULT
43
44 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
45                                         struct fb_var_screeninfo *var)
46 {
47
48 }
49 #elif defined(CONFIG_AVR32)
50 #define ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
51                                         | FBINFO_PARTIAL_PAN_OK \
52                                         | FBINFO_HWACCEL_XPAN \
53                                         | FBINFO_HWACCEL_YPAN)
54
55 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
56                                      struct fb_var_screeninfo *var)
57 {
58         u32 dma2dcfg;
59         u32 pixeloff;
60
61         pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
62
63         dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
64         dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
65         lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
66
67         /* Update configuration */
68         lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
69                     lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
70                     | ATMEL_LCDC_DMAUPDT);
71 }
72 #endif
73
74 static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
75                 | ATMEL_LCDC_POL_POSITIVE
76                 | ATMEL_LCDC_ENA_PWMENABLE;
77
78 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
79
80 /* some bl->props field just changed */
81 static int atmel_bl_update_status(struct backlight_device *bl)
82 {
83         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
84         int                     power = sinfo->bl_power;
85         int                     brightness = bl->props.brightness;
86
87         /* REVISIT there may be a meaningful difference between
88          * fb_blank and power ... there seem to be some cases
89          * this doesn't handle correctly.
90          */
91         if (bl->props.fb_blank != sinfo->bl_power)
92                 power = bl->props.fb_blank;
93         else if (bl->props.power != sinfo->bl_power)
94                 power = bl->props.power;
95
96         if (brightness < 0 && power == FB_BLANK_UNBLANK)
97                 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
98         else if (power != FB_BLANK_UNBLANK)
99                 brightness = 0;
100
101         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
102         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
103                         brightness ? contrast_ctr : 0);
104
105         bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
106
107         return 0;
108 }
109
110 static int atmel_bl_get_brightness(struct backlight_device *bl)
111 {
112         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
113
114         return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
115 }
116
117 static struct backlight_ops atmel_lcdc_bl_ops = {
118         .update_status = atmel_bl_update_status,
119         .get_brightness = atmel_bl_get_brightness,
120 };
121
122 static void init_backlight(struct atmel_lcdfb_info *sinfo)
123 {
124         struct backlight_device *bl;
125
126         sinfo->bl_power = FB_BLANK_UNBLANK;
127
128         if (sinfo->backlight)
129                 return;
130
131         bl = backlight_device_register("backlight", &sinfo->pdev->dev,
132                         sinfo, &atmel_lcdc_bl_ops);
133         if (IS_ERR(sinfo->backlight)) {
134                 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
135                                 PTR_ERR(bl));
136                 return;
137         }
138         sinfo->backlight = bl;
139
140         bl->props.power = FB_BLANK_UNBLANK;
141         bl->props.fb_blank = FB_BLANK_UNBLANK;
142         bl->props.max_brightness = 0xff;
143         bl->props.brightness = atmel_bl_get_brightness(bl);
144 }
145
146 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
147 {
148         if (sinfo->backlight)
149                 backlight_device_unregister(sinfo->backlight);
150 }
151
152 #else
153
154 static void init_backlight(struct atmel_lcdfb_info *sinfo)
155 {
156         dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
157 }
158
159 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
160 {
161 }
162
163 #endif
164
165 static void init_contrast(struct atmel_lcdfb_info *sinfo)
166 {
167         /* have some default contrast/backlight settings */
168         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
169         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
170
171         if (sinfo->lcdcon_is_backlight)
172                 init_backlight(sinfo);
173 }
174
175
176 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
177         .type           = FB_TYPE_PACKED_PIXELS,
178         .visual         = FB_VISUAL_TRUECOLOR,
179         .xpanstep       = 0,
180         .ypanstep       = 0,
181         .ywrapstep      = 0,
182         .accel          = FB_ACCEL_NONE,
183 };
184
185 static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
186 {
187         unsigned long value;
188
189         if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
190                 return xres;
191
192         value = xres;
193         if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
194                 /* STN display */
195                 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
196                         value *= 3;
197                 }
198                 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
199                    || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
200                       && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
201                         value = DIV_ROUND_UP(value, 4);
202                 else
203                         value = DIV_ROUND_UP(value, 8);
204         }
205
206         return value;
207 }
208
209 static void atmel_lcdfb_update_dma(struct fb_info *info,
210                                struct fb_var_screeninfo *var)
211 {
212         struct atmel_lcdfb_info *sinfo = info->par;
213         struct fb_fix_screeninfo *fix = &info->fix;
214         unsigned long dma_addr;
215
216         dma_addr = (fix->smem_start + var->yoffset * fix->line_length
217                     + var->xoffset * var->bits_per_pixel / 8);
218
219         dma_addr &= ~3UL;
220
221         /* Set framebuffer DMA base address and pixel offset */
222         lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
223
224         atmel_lcdfb_update_dma2d(sinfo, var);
225 }
226
227 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
228 {
229         struct fb_info *info = sinfo->info;
230
231         dma_free_writecombine(info->device, info->fix.smem_len,
232                                 info->screen_base, info->fix.smem_start);
233 }
234
235 /**
236  *      atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
237  *      @sinfo: the frame buffer to allocate memory for
238  */
239 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
240 {
241         struct fb_info *info = sinfo->info;
242         struct fb_var_screeninfo *var = &info->var;
243
244         info->fix.smem_len = (var->xres_virtual * var->yres_virtual
245                             * ((var->bits_per_pixel + 7) / 8));
246
247         info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
248                                         (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
249
250         if (!info->screen_base) {
251                 return -ENOMEM;
252         }
253
254         memset(info->screen_base, 0, info->fix.smem_len);
255
256         return 0;
257 }
258
259 /**
260  *      atmel_lcdfb_check_var - Validates a var passed in.
261  *      @var: frame buffer variable screen structure
262  *      @info: frame buffer structure that represents a single frame buffer
263  *
264  *      Checks to see if the hardware supports the state requested by
265  *      var passed in. This function does not alter the hardware
266  *      state!!!  This means the data stored in struct fb_info and
267  *      struct atmel_lcdfb_info do not change. This includes the var
268  *      inside of struct fb_info.  Do NOT change these. This function
269  *      can be called on its own if we intent to only test a mode and
270  *      not actually set it. The stuff in modedb.c is a example of
271  *      this. If the var passed in is slightly off by what the
272  *      hardware can support then we alter the var PASSED in to what
273  *      we can do. If the hardware doesn't support mode change a
274  *      -EINVAL will be returned by the upper layers. You don't need
275  *      to implement this function then. If you hardware doesn't
276  *      support changing the resolution then this function is not
277  *      needed. In this case the driver would just provide a var that
278  *      represents the static state the screen is in.
279  *
280  *      Returns negative errno on error, or zero on success.
281  */
282 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
283                              struct fb_info *info)
284 {
285         struct device *dev = info->device;
286         struct atmel_lcdfb_info *sinfo = info->par;
287         unsigned long clk_value_khz;
288
289         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
290
291         dev_dbg(dev, "%s:\n", __func__);
292         dev_dbg(dev, "  resolution: %ux%u\n", var->xres, var->yres);
293         dev_dbg(dev, "  pixclk:     %lu KHz\n", PICOS2KHZ(var->pixclock));
294         dev_dbg(dev, "  bpp:        %u\n", var->bits_per_pixel);
295         dev_dbg(dev, "  clk:        %lu KHz\n", clk_value_khz);
296
297         if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) {
298                 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
299                 return -EINVAL;
300         }
301
302         /* Force same alignment for each line */
303         var->xres = (var->xres + 3) & ~3UL;
304         var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
305
306         var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
307         var->transp.msb_right = 0;
308         var->transp.offset = var->transp.length = 0;
309         var->xoffset = var->yoffset = 0;
310
311         /* Saturate vertical and horizontal timings at maximum values */
312         var->vsync_len = min_t(u32, var->vsync_len,
313                         (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
314         var->upper_margin = min_t(u32, var->upper_margin,
315                         ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
316         var->lower_margin = min_t(u32, var->lower_margin,
317                         ATMEL_LCDC_VFP);
318         var->right_margin = min_t(u32, var->right_margin,
319                         (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
320         var->hsync_len = min_t(u32, var->hsync_len,
321                         (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
322         var->left_margin = min_t(u32, var->left_margin,
323                         ATMEL_LCDC_HBP + 1);
324
325         /* Some parameters can't be zero */
326         var->vsync_len = max_t(u32, var->vsync_len, 1);
327         var->right_margin = max_t(u32, var->right_margin, 1);
328         var->hsync_len = max_t(u32, var->hsync_len, 1);
329         var->left_margin = max_t(u32, var->left_margin, 1);
330
331         switch (var->bits_per_pixel) {
332         case 1:
333         case 2:
334         case 4:
335         case 8:
336                 var->red.offset = var->green.offset = var->blue.offset = 0;
337                 var->red.length = var->green.length = var->blue.length
338                         = var->bits_per_pixel;
339                 break;
340         case 15:
341         case 16:
342                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
343                         /* RGB:565 mode */
344                         var->red.offset = 11;
345                         var->blue.offset = 0;
346                         var->green.length = 6;
347                 } else {
348                         /* BGR:555 mode */
349                         var->red.offset = 0;
350                         var->blue.offset = 10;
351                         var->green.length = 5;
352                 }
353                 var->green.offset = 5;
354                 var->red.length = var->blue.length = 5;
355                 break;
356         case 32:
357                 var->transp.offset = 24;
358                 var->transp.length = 8;
359                 /* fall through */
360         case 24:
361                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
362                         /* RGB:888 mode */
363                         var->red.offset = 16;
364                         var->blue.offset = 0;
365                 } else {
366                         /* BGR:888 mode */
367                         var->red.offset = 0;
368                         var->blue.offset = 16;
369                 }
370                 var->green.offset = 8;
371                 var->red.length = var->green.length = var->blue.length = 8;
372                 break;
373         default:
374                 dev_err(dev, "color depth %d not supported\n",
375                                         var->bits_per_pixel);
376                 return -EINVAL;
377         }
378
379         return 0;
380 }
381
382 /*
383  * LCD reset sequence
384  */
385 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
386 {
387         might_sleep();
388
389         /* LCD power off */
390         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
391
392         /* wait for the LCDC core to become idle */
393         while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
394                 msleep(10);
395
396         /* DMA disable */
397         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
398
399         /* wait for DMA engine to become idle */
400         while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
401                 msleep(10);
402
403         /* LCD power on */
404         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
405                 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
406
407         /* DMA enable */
408         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
409 }
410
411 /**
412  *      atmel_lcdfb_set_par - Alters the hardware state.
413  *      @info: frame buffer structure that represents a single frame buffer
414  *
415  *      Using the fb_var_screeninfo in fb_info we set the resolution
416  *      of the this particular framebuffer. This function alters the
417  *      par AND the fb_fix_screeninfo stored in fb_info. It doesn't
418  *      not alter var in fb_info since we are using that data. This
419  *      means we depend on the data in var inside fb_info to be
420  *      supported by the hardware.  atmel_lcdfb_check_var is always called
421  *      before atmel_lcdfb_set_par to ensure this.  Again if you can't
422  *      change the resolution you don't need this function.
423  *
424  */
425 static int atmel_lcdfb_set_par(struct fb_info *info)
426 {
427         struct atmel_lcdfb_info *sinfo = info->par;
428         unsigned long hozval_linesz;
429         unsigned long value;
430         unsigned long clk_value_khz;
431         unsigned long bits_per_line;
432
433         might_sleep();
434
435         dev_dbg(info->device, "%s:\n", __func__);
436         dev_dbg(info->device, "  * resolution: %ux%u (%ux%u virtual)\n",
437                  info->var.xres, info->var.yres,
438                  info->var.xres_virtual, info->var.yres_virtual);
439
440         /* Turn off the LCD controller and the DMA controller */
441         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
442
443         /* Wait for the LCDC core to become idle */
444         while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
445                 msleep(10);
446
447         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
448
449         if (info->var.bits_per_pixel == 1)
450                 info->fix.visual = FB_VISUAL_MONO01;
451         else if (info->var.bits_per_pixel <= 8)
452                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
453         else
454                 info->fix.visual = FB_VISUAL_TRUECOLOR;
455
456         bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
457         info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
458
459         /* Re-initialize the DMA engine... */
460         dev_dbg(info->device, "  * update DMA engine\n");
461         atmel_lcdfb_update_dma(info, &info->var);
462
463         /* ...set frame size and burst length = 8 words (?) */
464         value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
465         value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
466         lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
467
468         /* Now, the LCDC core... */
469
470         /* Set pixel clock */
471         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
472
473         value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
474
475         if (value < 2) {
476                 dev_notice(info->device, "Bypassing pixel clock divider\n");
477                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
478         } else {
479                 value = (value / 2) - 1;
480                 dev_dbg(info->device, "  * programming CLKVAL = 0x%08lx\n",
481                                 value);
482                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
483                                 value << ATMEL_LCDC_CLKVAL_OFFSET);
484                 info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
485                 dev_dbg(info->device, "  updated pixclk:     %lu KHz\n",
486                                         PICOS2KHZ(info->var.pixclock));
487         }
488
489
490         /* Initialize control register 2 */
491         value = sinfo->default_lcdcon2;
492
493         if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
494                 value |= ATMEL_LCDC_INVLINE_INVERTED;
495         if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
496                 value |= ATMEL_LCDC_INVFRAME_INVERTED;
497
498         switch (info->var.bits_per_pixel) {
499                 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
500                 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
501                 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
502                 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
503                 case 15: /* fall through */
504                 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
505                 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
506                 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
507                 default: BUG(); break;
508         }
509         dev_dbg(info->device, "  * LCDCON2 = %08lx\n", value);
510         lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
511
512         /* Vertical timing */
513         value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
514         value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
515         value |= info->var.lower_margin;
516         dev_dbg(info->device, "  * LCDTIM1 = %08lx\n", value);
517         lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
518
519         /* Horizontal timing */
520         value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
521         value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
522         value |= (info->var.left_margin - 1);
523         dev_dbg(info->device, "  * LCDTIM2 = %08lx\n", value);
524         lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
525
526         /* Horizontal value (aka line size) */
527         hozval_linesz = compute_hozval(info->var.xres,
528                                         lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
529
530         /* Display size */
531         value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
532         value |= info->var.yres - 1;
533         dev_dbg(info->device, "  * LCDFRMCFG = %08lx\n", value);
534         lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
535
536         /* FIFO Threshold: Use formula from data sheet */
537         value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
538         lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
539
540         /* Toggle LCD_MODE every frame */
541         lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
542
543         /* Disable all interrupts */
544         lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
545         /* Enable FIFO & DMA errors */
546         lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
547
548         /* ...wait for DMA engine to become idle... */
549         while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
550                 msleep(10);
551
552         dev_dbg(info->device, "  * re-enable DMA engine\n");
553         /* ...and enable it with updated configuration */
554         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
555
556         dev_dbg(info->device, "  * re-enable LCDC core\n");
557         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
558                 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
559
560         dev_dbg(info->device, "  * DONE\n");
561
562         return 0;
563 }
564
565 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
566 {
567         chan &= 0xffff;
568         chan >>= 16 - bf->length;
569         return chan << bf->offset;
570 }
571
572 /**
573  *      atmel_lcdfb_setcolreg - Optional function. Sets a color register.
574  *      @regno: Which register in the CLUT we are programming
575  *      @red: The red value which can be up to 16 bits wide
576  *      @green: The green value which can be up to 16 bits wide
577  *      @blue:  The blue value which can be up to 16 bits wide.
578  *      @transp: If supported the alpha value which can be up to 16 bits wide.
579  *      @info: frame buffer info structure
580  *
581  *      Set a single color register. The values supplied have a 16 bit
582  *      magnitude which needs to be scaled in this function for the hardware.
583  *      Things to take into consideration are how many color registers, if
584  *      any, are supported with the current color visual. With truecolor mode
585  *      no color palettes are supported. Here a psuedo palette is created
586  *      which we store the value in pseudo_palette in struct fb_info. For
587  *      pseudocolor mode we have a limited color palette. To deal with this
588  *      we can program what color is displayed for a particular pixel value.
589  *      DirectColor is similar in that we can program each color field. If
590  *      we have a static colormap we don't need to implement this function.
591  *
592  *      Returns negative errno on error, or zero on success. In an
593  *      ideal world, this would have been the case, but as it turns
594  *      out, the other drivers return 1 on failure, so that's what
595  *      we're going to do.
596  */
597 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
598                              unsigned int green, unsigned int blue,
599                              unsigned int transp, struct fb_info *info)
600 {
601         struct atmel_lcdfb_info *sinfo = info->par;
602         unsigned int val;
603         u32 *pal;
604         int ret = 1;
605
606         if (info->var.grayscale)
607                 red = green = blue = (19595 * red + 38470 * green
608                                       + 7471 * blue) >> 16;
609
610         switch (info->fix.visual) {
611         case FB_VISUAL_TRUECOLOR:
612                 if (regno < 16) {
613                         pal = info->pseudo_palette;
614
615                         val  = chan_to_field(red, &info->var.red);
616                         val |= chan_to_field(green, &info->var.green);
617                         val |= chan_to_field(blue, &info->var.blue);
618
619                         pal[regno] = val;
620                         ret = 0;
621                 }
622                 break;
623
624         case FB_VISUAL_PSEUDOCOLOR:
625                 if (regno < 256) {
626                         val  = ((red   >> 11) & 0x001f);
627                         val |= ((green >>  6) & 0x03e0);
628                         val |= ((blue  >>  1) & 0x7c00);
629
630                         /*
631                          * TODO: intensity bit. Maybe something like
632                          *   ~(red[10] ^ green[10] ^ blue[10]) & 1
633                          */
634
635                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
636                         ret = 0;
637                 }
638                 break;
639
640         case FB_VISUAL_MONO01:
641                 if (regno < 2) {
642                         val = (regno == 0) ? 0x00 : 0x1F;
643                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
644                         ret = 0;
645                 }
646                 break;
647
648         }
649
650         return ret;
651 }
652
653 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
654                                struct fb_info *info)
655 {
656         dev_dbg(info->device, "%s\n", __func__);
657
658         atmel_lcdfb_update_dma(info, var);
659
660         return 0;
661 }
662
663 static struct fb_ops atmel_lcdfb_ops = {
664         .owner          = THIS_MODULE,
665         .fb_check_var   = atmel_lcdfb_check_var,
666         .fb_set_par     = atmel_lcdfb_set_par,
667         .fb_setcolreg   = atmel_lcdfb_setcolreg,
668         .fb_pan_display = atmel_lcdfb_pan_display,
669         .fb_fillrect    = cfb_fillrect,
670         .fb_copyarea    = cfb_copyarea,
671         .fb_imageblit   = cfb_imageblit,
672 };
673
674 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
675 {
676         struct fb_info *info = dev_id;
677         struct atmel_lcdfb_info *sinfo = info->par;
678         u32 status;
679
680         status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
681         if (status & ATMEL_LCDC_UFLWI) {
682                 dev_warn(info->device, "FIFO underflow %#x\n", status);
683                 /* reset DMA and FIFO to avoid screen shifting */
684                 schedule_work(&sinfo->task);
685         }
686         lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
687         return IRQ_HANDLED;
688 }
689
690 /*
691  * LCD controller task (to reset the LCD)
692  */
693 static void atmel_lcdfb_task(struct work_struct *work)
694 {
695         struct atmel_lcdfb_info *sinfo =
696                 container_of(work, struct atmel_lcdfb_info, task);
697
698         atmel_lcdfb_reset(sinfo);
699 }
700
701 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
702 {
703         struct fb_info *info = sinfo->info;
704         int ret = 0;
705
706         info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
707
708         dev_info(info->device,
709                "%luKiB frame buffer at %08lx (mapped at %p)\n",
710                (unsigned long)info->fix.smem_len / 1024,
711                (unsigned long)info->fix.smem_start,
712                info->screen_base);
713
714         /* Allocate colormap */
715         ret = fb_alloc_cmap(&info->cmap, 256, 0);
716         if (ret < 0)
717                 dev_err(info->device, "Alloc color map failed\n");
718
719         return ret;
720 }
721
722 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
723 {
724         if (sinfo->bus_clk)
725                 clk_enable(sinfo->bus_clk);
726         clk_enable(sinfo->lcdc_clk);
727 }
728
729 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
730 {
731         if (sinfo->bus_clk)
732                 clk_disable(sinfo->bus_clk);
733         clk_disable(sinfo->lcdc_clk);
734 }
735
736
737 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
738 {
739         struct device *dev = &pdev->dev;
740         struct fb_info *info;
741         struct atmel_lcdfb_info *sinfo;
742         struct atmel_lcdfb_info *pdata_sinfo;
743         struct resource *regs = NULL;
744         struct resource *map = NULL;
745         int ret;
746
747         dev_dbg(dev, "%s BEGIN\n", __func__);
748
749         ret = -ENOMEM;
750         info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
751         if (!info) {
752                 dev_err(dev, "cannot allocate memory\n");
753                 goto out;
754         }
755
756         sinfo = info->par;
757
758         if (dev->platform_data) {
759                 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
760                 sinfo->default_bpp = pdata_sinfo->default_bpp;
761                 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
762                 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
763                 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
764                 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
765                 sinfo->guard_time = pdata_sinfo->guard_time;
766                 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
767                 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
768         } else {
769                 dev_err(dev, "cannot get default configuration\n");
770                 goto free_info;
771         }
772         sinfo->info = info;
773         sinfo->pdev = pdev;
774
775         strcpy(info->fix.id, sinfo->pdev->name);
776         info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
777         info->pseudo_palette = sinfo->pseudo_palette;
778         info->fbops = &atmel_lcdfb_ops;
779
780         memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
781         info->fix = atmel_lcdfb_fix;
782
783         /* Enable LCDC Clocks */
784         if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
785                 sinfo->bus_clk = clk_get(dev, "hck1");
786                 if (IS_ERR(sinfo->bus_clk)) {
787                         ret = PTR_ERR(sinfo->bus_clk);
788                         goto free_info;
789                 }
790         }
791         sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
792         if (IS_ERR(sinfo->lcdc_clk)) {
793                 ret = PTR_ERR(sinfo->lcdc_clk);
794                 goto put_bus_clk;
795         }
796         atmel_lcdfb_start_clock(sinfo);
797
798         ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
799                         info->monspecs.modedb_len, info->monspecs.modedb,
800                         sinfo->default_bpp);
801         if (!ret) {
802                 dev_err(dev, "no suitable video mode found\n");
803                 goto stop_clk;
804         }
805
806
807         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
808         if (!regs) {
809                 dev_err(dev, "resources unusable\n");
810                 ret = -ENXIO;
811                 goto stop_clk;
812         }
813
814         sinfo->irq_base = platform_get_irq(pdev, 0);
815         if (sinfo->irq_base < 0) {
816                 dev_err(dev, "unable to get irq\n");
817                 ret = sinfo->irq_base;
818                 goto stop_clk;
819         }
820
821         /* Initialize video memory */
822         map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
823         if (map) {
824                 /* use a pre-allocated memory buffer */
825                 info->fix.smem_start = map->start;
826                 info->fix.smem_len = map->end - map->start + 1;
827                 if (!request_mem_region(info->fix.smem_start,
828                                         info->fix.smem_len, pdev->name)) {
829                         ret = -EBUSY;
830                         goto stop_clk;
831                 }
832
833                 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
834                 if (!info->screen_base)
835                         goto release_intmem;
836
837                 /*
838                  * Don't clear the framebuffer -- someone may have set
839                  * up a splash image.
840                  */
841         } else {
842                 /* alocate memory buffer */
843                 ret = atmel_lcdfb_alloc_video_memory(sinfo);
844                 if (ret < 0) {
845                         dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
846                         goto stop_clk;
847                 }
848         }
849
850         /* LCDC registers */
851         info->fix.mmio_start = regs->start;
852         info->fix.mmio_len = regs->end - regs->start + 1;
853
854         if (!request_mem_region(info->fix.mmio_start,
855                                 info->fix.mmio_len, pdev->name)) {
856                 ret = -EBUSY;
857                 goto free_fb;
858         }
859
860         sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
861         if (!sinfo->mmio) {
862                 dev_err(dev, "cannot map LCDC registers\n");
863                 goto release_mem;
864         }
865
866         /* Initialize PWM for contrast or backlight ("off") */
867         init_contrast(sinfo);
868
869         /* interrupt */
870         ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
871         if (ret) {
872                 dev_err(dev, "request_irq failed: %d\n", ret);
873                 goto unmap_mmio;
874         }
875
876         /* Some operations on the LCDC might sleep and
877          * require a preemptible task context */
878         INIT_WORK(&sinfo->task, atmel_lcdfb_task);
879
880         ret = atmel_lcdfb_init_fbinfo(sinfo);
881         if (ret < 0) {
882                 dev_err(dev, "init fbinfo failed: %d\n", ret);
883                 goto unregister_irqs;
884         }
885
886         /*
887          * This makes sure that our colour bitfield
888          * descriptors are correctly initialised.
889          */
890         atmel_lcdfb_check_var(&info->var, info);
891
892         ret = fb_set_var(info, &info->var);
893         if (ret) {
894                 dev_warn(dev, "unable to set display parameters\n");
895                 goto free_cmap;
896         }
897
898         dev_set_drvdata(dev, info);
899
900         /*
901          * Tell the world that we're ready to go
902          */
903         ret = register_framebuffer(info);
904         if (ret < 0) {
905                 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
906                 goto free_cmap;
907         }
908
909         /* Power up the LCDC screen */
910         if (sinfo->atmel_lcdfb_power_control)
911                 sinfo->atmel_lcdfb_power_control(1);
912
913         dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
914                        info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
915
916         return 0;
917
918
919 free_cmap:
920         fb_dealloc_cmap(&info->cmap);
921 unregister_irqs:
922         cancel_work_sync(&sinfo->task);
923         free_irq(sinfo->irq_base, info);
924 unmap_mmio:
925         exit_backlight(sinfo);
926         iounmap(sinfo->mmio);
927 release_mem:
928         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
929 free_fb:
930         if (map)
931                 iounmap(info->screen_base);
932         else
933                 atmel_lcdfb_free_video_memory(sinfo);
934
935 release_intmem:
936         if (map)
937                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
938 stop_clk:
939         atmel_lcdfb_stop_clock(sinfo);
940         clk_put(sinfo->lcdc_clk);
941 put_bus_clk:
942         if (sinfo->bus_clk)
943                 clk_put(sinfo->bus_clk);
944 free_info:
945         framebuffer_release(info);
946 out:
947         dev_dbg(dev, "%s FAILED\n", __func__);
948         return ret;
949 }
950
951 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
952 {
953         struct device *dev = &pdev->dev;
954         struct fb_info *info = dev_get_drvdata(dev);
955         struct atmel_lcdfb_info *sinfo = info->par;
956
957         if (!sinfo)
958                 return 0;
959
960         cancel_work_sync(&sinfo->task);
961         exit_backlight(sinfo);
962         if (sinfo->atmel_lcdfb_power_control)
963                 sinfo->atmel_lcdfb_power_control(0);
964         unregister_framebuffer(info);
965         atmel_lcdfb_stop_clock(sinfo);
966         clk_put(sinfo->lcdc_clk);
967         if (sinfo->bus_clk)
968                 clk_put(sinfo->bus_clk);
969         fb_dealloc_cmap(&info->cmap);
970         free_irq(sinfo->irq_base, info);
971         iounmap(sinfo->mmio);
972         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
973         if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
974                 iounmap(info->screen_base);
975                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
976         } else {
977                 atmel_lcdfb_free_video_memory(sinfo);
978         }
979
980         dev_set_drvdata(dev, NULL);
981         framebuffer_release(info);
982
983         return 0;
984 }
985
986 #ifdef CONFIG_PM
987
988 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
989 {
990         struct fb_info *info = platform_get_drvdata(pdev);
991         struct atmel_lcdfb_info *sinfo = info->par;
992
993         sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
994         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
995         if (sinfo->atmel_lcdfb_power_control)
996                 sinfo->atmel_lcdfb_power_control(0);
997         atmel_lcdfb_stop_clock(sinfo);
998         return 0;
999 }
1000
1001 static int atmel_lcdfb_resume(struct platform_device *pdev)
1002 {
1003         struct fb_info *info = platform_get_drvdata(pdev);
1004         struct atmel_lcdfb_info *sinfo = info->par;
1005
1006         atmel_lcdfb_start_clock(sinfo);
1007         if (sinfo->atmel_lcdfb_power_control)
1008                 sinfo->atmel_lcdfb_power_control(1);
1009         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1010         return 0;
1011 }
1012
1013 #else
1014 #define atmel_lcdfb_suspend     NULL
1015 #define atmel_lcdfb_resume      NULL
1016 #endif
1017
1018 static struct platform_driver atmel_lcdfb_driver = {
1019         .remove         = __exit_p(atmel_lcdfb_remove),
1020         .suspend        = atmel_lcdfb_suspend,
1021         .resume         = atmel_lcdfb_resume,
1022
1023         .driver         = {
1024                 .name   = "atmel_lcdfb",
1025                 .owner  = THIS_MODULE,
1026         },
1027 };
1028
1029 static int __init atmel_lcdfb_init(void)
1030 {
1031         return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
1032 }
1033
1034 static void __exit atmel_lcdfb_exit(void)
1035 {
1036         platform_driver_unregister(&atmel_lcdfb_driver);
1037 }
1038
1039 module_init(atmel_lcdfb_init);
1040 module_exit(atmel_lcdfb_exit);
1041
1042 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1043 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1044 MODULE_LICENSE("GPL");