Revert "atmel_lcdfb: Adjust HFP calculation so it matches the manual."
[linux-2.6.git] / drivers / video / atmel_lcdfb.c
1 /*
2  *  Driver for AT91/AT32 LCD Controller
3  *
4  *  Copyright (C) 2007 Atmel Corporation
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License.  See the file COPYING in the main directory of this archive for
8  * more details.
9  */
10
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
16 #include <linux/fb.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20 #include <linux/gfp.h>
21 #include <linux/module.h>
22
23 #include <mach/board.h>
24 #include <mach/cpu.h>
25 #include <asm/gpio.h>
26
27 #include <video/atmel_lcdc.h>
28
29 #define lcdc_readl(sinfo, reg)          __raw_readl((sinfo)->mmio+(reg))
30 #define lcdc_writel(sinfo, reg, val)    __raw_writel((val), (sinfo)->mmio+(reg))
31
32 /* configurable parameters */
33 #define ATMEL_LCDC_CVAL_DEFAULT         0xc8
34 #define ATMEL_LCDC_DMA_BURST_LEN        8       /* words */
35 #define ATMEL_LCDC_FIFO_SIZE            512     /* words */
36
37 #if defined(CONFIG_ARCH_AT91)
38 #define ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
39                                          | FBINFO_PARTIAL_PAN_OK \
40                                          | FBINFO_HWACCEL_YPAN)
41
42 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
43                                         struct fb_var_screeninfo *var,
44                                         struct fb_info *info)
45 {
46
47 }
48 #elif defined(CONFIG_AVR32)
49 #define ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
50                                         | FBINFO_PARTIAL_PAN_OK \
51                                         | FBINFO_HWACCEL_XPAN \
52                                         | FBINFO_HWACCEL_YPAN)
53
54 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
55                                      struct fb_var_screeninfo *var,
56                                      struct fb_info *info)
57 {
58         u32 dma2dcfg;
59         u32 pixeloff;
60
61         pixeloff = (var->xoffset * info->var.bits_per_pixel) & 0x1f;
62
63         dma2dcfg = (info->var.xres_virtual - info->var.xres)
64                  * info->var.bits_per_pixel / 8;
65         dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
66         lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
67
68         /* Update configuration */
69         lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
70                     lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
71                     | ATMEL_LCDC_DMAUPDT);
72 }
73 #endif
74
75 static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
76                 | ATMEL_LCDC_POL_POSITIVE
77                 | ATMEL_LCDC_ENA_PWMENABLE;
78
79 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
80
81 /* some bl->props field just changed */
82 static int atmel_bl_update_status(struct backlight_device *bl)
83 {
84         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
85         int                     power = sinfo->bl_power;
86         int                     brightness = bl->props.brightness;
87
88         /* REVISIT there may be a meaningful difference between
89          * fb_blank and power ... there seem to be some cases
90          * this doesn't handle correctly.
91          */
92         if (bl->props.fb_blank != sinfo->bl_power)
93                 power = bl->props.fb_blank;
94         else if (bl->props.power != sinfo->bl_power)
95                 power = bl->props.power;
96
97         if (brightness < 0 && power == FB_BLANK_UNBLANK)
98                 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
99         else if (power != FB_BLANK_UNBLANK)
100                 brightness = 0;
101
102         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
103         if (contrast_ctr & ATMEL_LCDC_POL_POSITIVE)
104                 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
105                         brightness ? contrast_ctr : 0);
106         else
107                 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
108
109         bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
110
111         return 0;
112 }
113
114 static int atmel_bl_get_brightness(struct backlight_device *bl)
115 {
116         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
117
118         return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
119 }
120
121 static const struct backlight_ops atmel_lcdc_bl_ops = {
122         .update_status = atmel_bl_update_status,
123         .get_brightness = atmel_bl_get_brightness,
124 };
125
126 static void init_backlight(struct atmel_lcdfb_info *sinfo)
127 {
128         struct backlight_properties props;
129         struct backlight_device *bl;
130
131         sinfo->bl_power = FB_BLANK_UNBLANK;
132
133         if (sinfo->backlight)
134                 return;
135
136         memset(&props, 0, sizeof(struct backlight_properties));
137         props.type = BACKLIGHT_RAW;
138         props.max_brightness = 0xff;
139         bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
140                                        &atmel_lcdc_bl_ops, &props);
141         if (IS_ERR(bl)) {
142                 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
143                                 PTR_ERR(bl));
144                 return;
145         }
146         sinfo->backlight = bl;
147
148         bl->props.power = FB_BLANK_UNBLANK;
149         bl->props.fb_blank = FB_BLANK_UNBLANK;
150         bl->props.brightness = atmel_bl_get_brightness(bl);
151 }
152
153 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
154 {
155         if (sinfo->backlight)
156                 backlight_device_unregister(sinfo->backlight);
157 }
158
159 #else
160
161 static void init_backlight(struct atmel_lcdfb_info *sinfo)
162 {
163         dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
164 }
165
166 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
167 {
168 }
169
170 #endif
171
172 static void init_contrast(struct atmel_lcdfb_info *sinfo)
173 {
174         /* contrast pwm can be 'inverted' */
175         if (sinfo->lcdcon_pol_negative)
176                         contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE);
177
178         /* have some default contrast/backlight settings */
179         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
180         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
181
182         if (sinfo->lcdcon_is_backlight)
183                 init_backlight(sinfo);
184 }
185
186
187 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
188         .type           = FB_TYPE_PACKED_PIXELS,
189         .visual         = FB_VISUAL_TRUECOLOR,
190         .xpanstep       = 0,
191         .ypanstep       = 1,
192         .ywrapstep      = 0,
193         .accel          = FB_ACCEL_NONE,
194 };
195
196 static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
197 {
198         unsigned long value;
199
200         if (!(cpu_is_at91sam9261() || cpu_is_at91sam9g10()
201                 || cpu_is_at32ap7000()))
202                 return xres;
203
204         value = xres;
205         if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
206                 /* STN display */
207                 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
208                         value *= 3;
209                 }
210                 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
211                    || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
212                       && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
213                         value = DIV_ROUND_UP(value, 4);
214                 else
215                         value = DIV_ROUND_UP(value, 8);
216         }
217
218         return value;
219 }
220
221 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
222 {
223         /* Turn off the LCD controller and the DMA controller */
224         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
225                         sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
226
227         /* Wait for the LCDC core to become idle */
228         while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
229                 msleep(10);
230
231         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
232 }
233
234 static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
235 {
236         atmel_lcdfb_stop_nowait(sinfo);
237
238         /* Wait for DMA engine to become idle... */
239         while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
240                 msleep(10);
241 }
242
243 static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
244 {
245         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
246         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
247                 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
248                 | ATMEL_LCDC_PWR);
249 }
250
251 static void atmel_lcdfb_update_dma(struct fb_info *info,
252                                struct fb_var_screeninfo *var)
253 {
254         struct atmel_lcdfb_info *sinfo = info->par;
255         struct fb_fix_screeninfo *fix = &info->fix;
256         unsigned long dma_addr;
257
258         dma_addr = (fix->smem_start + var->yoffset * fix->line_length
259                     + var->xoffset * info->var.bits_per_pixel / 8);
260
261         dma_addr &= ~3UL;
262
263         /* Set framebuffer DMA base address and pixel offset */
264         lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
265
266         atmel_lcdfb_update_dma2d(sinfo, var, info);
267 }
268
269 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
270 {
271         struct fb_info *info = sinfo->info;
272
273         dma_free_writecombine(info->device, info->fix.smem_len,
274                                 info->screen_base, info->fix.smem_start);
275 }
276
277 /**
278  *      atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
279  *      @sinfo: the frame buffer to allocate memory for
280  *      
281  *      This function is called only from the atmel_lcdfb_probe()
282  *      so no locking by fb_info->mm_lock around smem_len setting is needed.
283  */
284 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
285 {
286         struct fb_info *info = sinfo->info;
287         struct fb_var_screeninfo *var = &info->var;
288         unsigned int smem_len;
289
290         smem_len = (var->xres_virtual * var->yres_virtual
291                     * ((var->bits_per_pixel + 7) / 8));
292         info->fix.smem_len = max(smem_len, sinfo->smem_len);
293
294         info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
295                                         (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
296
297         if (!info->screen_base) {
298                 return -ENOMEM;
299         }
300
301         memset(info->screen_base, 0, info->fix.smem_len);
302
303         return 0;
304 }
305
306 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
307                                                      struct fb_info *info)
308 {
309         struct fb_videomode varfbmode;
310         const struct fb_videomode *fbmode = NULL;
311
312         fb_var_to_videomode(&varfbmode, var);
313         fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
314         if (fbmode)
315                 fb_videomode_to_var(var, fbmode);
316         return fbmode;
317 }
318
319
320 /**
321  *      atmel_lcdfb_check_var - Validates a var passed in.
322  *      @var: frame buffer variable screen structure
323  *      @info: frame buffer structure that represents a single frame buffer
324  *
325  *      Checks to see if the hardware supports the state requested by
326  *      var passed in. This function does not alter the hardware
327  *      state!!!  This means the data stored in struct fb_info and
328  *      struct atmel_lcdfb_info do not change. This includes the var
329  *      inside of struct fb_info.  Do NOT change these. This function
330  *      can be called on its own if we intent to only test a mode and
331  *      not actually set it. The stuff in modedb.c is a example of
332  *      this. If the var passed in is slightly off by what the
333  *      hardware can support then we alter the var PASSED in to what
334  *      we can do. If the hardware doesn't support mode change a
335  *      -EINVAL will be returned by the upper layers. You don't need
336  *      to implement this function then. If you hardware doesn't
337  *      support changing the resolution then this function is not
338  *      needed. In this case the driver would just provide a var that
339  *      represents the static state the screen is in.
340  *
341  *      Returns negative errno on error, or zero on success.
342  */
343 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
344                              struct fb_info *info)
345 {
346         struct device *dev = info->device;
347         struct atmel_lcdfb_info *sinfo = info->par;
348         unsigned long clk_value_khz;
349
350         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
351
352         dev_dbg(dev, "%s:\n", __func__);
353
354         if (!(var->pixclock && var->bits_per_pixel)) {
355                 /* choose a suitable mode if possible */
356                 if (!atmel_lcdfb_choose_mode(var, info)) {
357                         dev_err(dev, "needed value not specified\n");
358                         return -EINVAL;
359                 }
360         }
361
362         dev_dbg(dev, "  resolution: %ux%u\n", var->xres, var->yres);
363         dev_dbg(dev, "  pixclk:     %lu KHz\n", PICOS2KHZ(var->pixclock));
364         dev_dbg(dev, "  bpp:        %u\n", var->bits_per_pixel);
365         dev_dbg(dev, "  clk:        %lu KHz\n", clk_value_khz);
366
367         if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
368                 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
369                 return -EINVAL;
370         }
371
372         /* Do not allow to have real resoulution larger than virtual */
373         if (var->xres > var->xres_virtual)
374                 var->xres_virtual = var->xres;
375
376         if (var->yres > var->yres_virtual)
377                 var->yres_virtual = var->yres;
378
379         /* Force same alignment for each line */
380         var->xres = (var->xres + 3) & ~3UL;
381         var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
382
383         var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
384         var->transp.msb_right = 0;
385         var->transp.offset = var->transp.length = 0;
386         var->xoffset = var->yoffset = 0;
387
388         if (info->fix.smem_len) {
389                 unsigned int smem_len = (var->xres_virtual * var->yres_virtual
390                                          * ((var->bits_per_pixel + 7) / 8));
391                 if (smem_len > info->fix.smem_len)
392                         return -EINVAL;
393         }
394
395         /* Saturate vertical and horizontal timings at maximum values */
396         var->vsync_len = min_t(u32, var->vsync_len,
397                         (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
398         var->upper_margin = min_t(u32, var->upper_margin,
399                         ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
400         var->lower_margin = min_t(u32, var->lower_margin,
401                         ATMEL_LCDC_VFP);
402         var->right_margin = min_t(u32, var->right_margin,
403                         (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
404         var->hsync_len = min_t(u32, var->hsync_len,
405                         (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
406         var->left_margin = min_t(u32, var->left_margin,
407                         ATMEL_LCDC_HBP + 1);
408
409         /* Some parameters can't be zero */
410         var->vsync_len = max_t(u32, var->vsync_len, 1);
411         var->right_margin = max_t(u32, var->right_margin, 1);
412         var->hsync_len = max_t(u32, var->hsync_len, 1);
413         var->left_margin = max_t(u32, var->left_margin, 1);
414
415         switch (var->bits_per_pixel) {
416         case 1:
417         case 2:
418         case 4:
419         case 8:
420                 var->red.offset = var->green.offset = var->blue.offset = 0;
421                 var->red.length = var->green.length = var->blue.length
422                         = var->bits_per_pixel;
423                 break;
424         case 15:
425         case 16:
426                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
427                         /* RGB:565 mode */
428                         var->red.offset = 11;
429                         var->blue.offset = 0;
430                         var->green.length = 6;
431                 } else if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB555) {
432                         var->red.offset = 10;
433                         var->blue.offset = 0;
434                         var->green.length = 5;
435                 } else {
436                         /* BGR:555 mode */
437                         var->red.offset = 0;
438                         var->blue.offset = 10;
439                         var->green.length = 5;
440                 }
441                 var->green.offset = 5;
442                 var->red.length = var->blue.length = 5;
443                 break;
444         case 32:
445                 var->transp.offset = 24;
446                 var->transp.length = 8;
447                 /* fall through */
448         case 24:
449                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
450                         /* RGB:888 mode */
451                         var->red.offset = 16;
452                         var->blue.offset = 0;
453                 } else {
454                         /* BGR:888 mode */
455                         var->red.offset = 0;
456                         var->blue.offset = 16;
457                 }
458                 var->green.offset = 8;
459                 var->red.length = var->green.length = var->blue.length = 8;
460                 break;
461         default:
462                 dev_err(dev, "color depth %d not supported\n",
463                                         var->bits_per_pixel);
464                 return -EINVAL;
465         }
466
467         return 0;
468 }
469
470 /*
471  * LCD reset sequence
472  */
473 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
474 {
475         might_sleep();
476
477         atmel_lcdfb_stop(sinfo);
478         atmel_lcdfb_start(sinfo);
479 }
480
481 /**
482  *      atmel_lcdfb_set_par - Alters the hardware state.
483  *      @info: frame buffer structure that represents a single frame buffer
484  *
485  *      Using the fb_var_screeninfo in fb_info we set the resolution
486  *      of the this particular framebuffer. This function alters the
487  *      par AND the fb_fix_screeninfo stored in fb_info. It doesn't
488  *      not alter var in fb_info since we are using that data. This
489  *      means we depend on the data in var inside fb_info to be
490  *      supported by the hardware.  atmel_lcdfb_check_var is always called
491  *      before atmel_lcdfb_set_par to ensure this.  Again if you can't
492  *      change the resolution you don't need this function.
493  *
494  */
495 static int atmel_lcdfb_set_par(struct fb_info *info)
496 {
497         struct atmel_lcdfb_info *sinfo = info->par;
498         unsigned long hozval_linesz;
499         unsigned long value;
500         unsigned long clk_value_khz;
501         unsigned long bits_per_line;
502         unsigned long pix_factor = 2;
503
504         might_sleep();
505
506         dev_dbg(info->device, "%s:\n", __func__);
507         dev_dbg(info->device, "  * resolution: %ux%u (%ux%u virtual)\n",
508                  info->var.xres, info->var.yres,
509                  info->var.xres_virtual, info->var.yres_virtual);
510
511         atmel_lcdfb_stop_nowait(sinfo);
512
513         if (info->var.bits_per_pixel == 1)
514                 info->fix.visual = FB_VISUAL_MONO01;
515         else if (info->var.bits_per_pixel <= 8)
516                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
517         else
518                 info->fix.visual = FB_VISUAL_TRUECOLOR;
519
520         bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
521         info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
522
523         /* Re-initialize the DMA engine... */
524         dev_dbg(info->device, "  * update DMA engine\n");
525         atmel_lcdfb_update_dma(info, &info->var);
526
527         /* ...set frame size and burst length = 8 words (?) */
528         value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
529         value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
530         lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
531
532         /* Now, the LCDC core... */
533
534         /* Set pixel clock */
535         if (cpu_is_at91sam9g45() && !cpu_is_at91sam9g45es())
536                 pix_factor = 1;
537
538         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
539
540         value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
541
542         if (value < pix_factor) {
543                 dev_notice(info->device, "Bypassing pixel clock divider\n");
544                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
545         } else {
546                 value = (value / pix_factor) - 1;
547                 dev_dbg(info->device, "  * programming CLKVAL = 0x%08lx\n",
548                                 value);
549                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
550                                 value << ATMEL_LCDC_CLKVAL_OFFSET);
551                 info->var.pixclock =
552                         KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
553                 dev_dbg(info->device, "  updated pixclk:     %lu KHz\n",
554                                         PICOS2KHZ(info->var.pixclock));
555         }
556
557
558         /* Initialize control register 2 */
559         value = sinfo->default_lcdcon2;
560
561         if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
562                 value |= ATMEL_LCDC_INVLINE_INVERTED;
563         if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
564                 value |= ATMEL_LCDC_INVFRAME_INVERTED;
565
566         switch (info->var.bits_per_pixel) {
567                 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
568                 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
569                 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
570                 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
571                 case 15: /* fall through */
572                 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
573                 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
574                 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
575                 default: BUG(); break;
576         }
577         dev_dbg(info->device, "  * LCDCON2 = %08lx\n", value);
578         lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
579
580         /* Vertical timing */
581         value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
582         value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
583         value |= info->var.lower_margin;
584         dev_dbg(info->device, "  * LCDTIM1 = %08lx\n", value);
585         lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
586
587         /* Horizontal timing */
588         value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
589         value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
590         value |= (info->var.left_margin - 1);
591         dev_dbg(info->device, "  * LCDTIM2 = %08lx\n", value);
592         lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
593
594         /* Horizontal value (aka line size) */
595         hozval_linesz = compute_hozval(info->var.xres,
596                                         lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
597
598         /* Display size */
599         value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
600         value |= info->var.yres - 1;
601         dev_dbg(info->device, "  * LCDFRMCFG = %08lx\n", value);
602         lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
603
604         /* FIFO Threshold: Use formula from data sheet */
605         value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
606         lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
607
608         /* Toggle LCD_MODE every frame */
609         lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
610
611         /* Disable all interrupts */
612         lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
613         /* Enable FIFO & DMA errors */
614         lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
615
616         /* ...wait for DMA engine to become idle... */
617         while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
618                 msleep(10);
619
620         atmel_lcdfb_start(sinfo);
621
622         dev_dbg(info->device, "  * DONE\n");
623
624         return 0;
625 }
626
627 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
628 {
629         chan &= 0xffff;
630         chan >>= 16 - bf->length;
631         return chan << bf->offset;
632 }
633
634 /**
635  *      atmel_lcdfb_setcolreg - Optional function. Sets a color register.
636  *      @regno: Which register in the CLUT we are programming
637  *      @red: The red value which can be up to 16 bits wide
638  *      @green: The green value which can be up to 16 bits wide
639  *      @blue:  The blue value which can be up to 16 bits wide.
640  *      @transp: If supported the alpha value which can be up to 16 bits wide.
641  *      @info: frame buffer info structure
642  *
643  *      Set a single color register. The values supplied have a 16 bit
644  *      magnitude which needs to be scaled in this function for the hardware.
645  *      Things to take into consideration are how many color registers, if
646  *      any, are supported with the current color visual. With truecolor mode
647  *      no color palettes are supported. Here a pseudo palette is created
648  *      which we store the value in pseudo_palette in struct fb_info. For
649  *      pseudocolor mode we have a limited color palette. To deal with this
650  *      we can program what color is displayed for a particular pixel value.
651  *      DirectColor is similar in that we can program each color field. If
652  *      we have a static colormap we don't need to implement this function.
653  *
654  *      Returns negative errno on error, or zero on success. In an
655  *      ideal world, this would have been the case, but as it turns
656  *      out, the other drivers return 1 on failure, so that's what
657  *      we're going to do.
658  */
659 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
660                              unsigned int green, unsigned int blue,
661                              unsigned int transp, struct fb_info *info)
662 {
663         struct atmel_lcdfb_info *sinfo = info->par;
664         unsigned int val;
665         u32 *pal;
666         int ret = 1;
667
668         if (info->var.grayscale)
669                 red = green = blue = (19595 * red + 38470 * green
670                                       + 7471 * blue) >> 16;
671
672         switch (info->fix.visual) {
673         case FB_VISUAL_TRUECOLOR:
674                 if (regno < 16) {
675                         pal = info->pseudo_palette;
676
677                         val  = chan_to_field(red, &info->var.red);
678                         val |= chan_to_field(green, &info->var.green);
679                         val |= chan_to_field(blue, &info->var.blue);
680
681                         pal[regno] = val;
682                         ret = 0;
683                 }
684                 break;
685
686         case FB_VISUAL_PSEUDOCOLOR:
687                 if (regno < 256) {
688                         if (cpu_is_at91sam9261() || cpu_is_at91sam9263()
689                             || cpu_is_at91sam9rl()) {
690                                 /* old style I+BGR:555 */
691                                 val  = ((red   >> 11) & 0x001f);
692                                 val |= ((green >>  6) & 0x03e0);
693                                 val |= ((blue  >>  1) & 0x7c00);
694
695                                 /*
696                                  * TODO: intensity bit. Maybe something like
697                                  *   ~(red[10] ^ green[10] ^ blue[10]) & 1
698                                  */
699                         } else {
700                                 /* new style BGR:565 / RGB:565 */
701                                 if (sinfo->lcd_wiring_mode ==
702                                     ATMEL_LCDC_WIRING_RGB) {
703                                         val  = ((blue >> 11) & 0x001f);
704                                         val |= ((red  >>  0) & 0xf800);
705                                 } else {
706                                         val  = ((red  >> 11) & 0x001f);
707                                         val |= ((blue >>  0) & 0xf800);
708                                 }
709
710                                 val |= ((green >>  5) & 0x07e0);
711                         }
712
713                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
714                         ret = 0;
715                 }
716                 break;
717
718         case FB_VISUAL_MONO01:
719                 if (regno < 2) {
720                         val = (regno == 0) ? 0x00 : 0x1F;
721                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
722                         ret = 0;
723                 }
724                 break;
725
726         }
727
728         return ret;
729 }
730
731 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
732                                struct fb_info *info)
733 {
734         dev_dbg(info->device, "%s\n", __func__);
735
736         atmel_lcdfb_update_dma(info, var);
737
738         return 0;
739 }
740
741 static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info)
742 {
743         struct atmel_lcdfb_info *sinfo = info->par;
744
745         switch (blank_mode) {
746         case FB_BLANK_UNBLANK:
747         case FB_BLANK_NORMAL:
748                 atmel_lcdfb_start(sinfo);
749                 break;
750         case FB_BLANK_VSYNC_SUSPEND:
751         case FB_BLANK_HSYNC_SUSPEND:
752                 break;
753         case FB_BLANK_POWERDOWN:
754                 atmel_lcdfb_stop(sinfo);
755                 break;
756         default:
757                 return -EINVAL;
758         }
759
760         /* let fbcon do a soft blank for us */
761         return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
762 }
763
764 static struct fb_ops atmel_lcdfb_ops = {
765         .owner          = THIS_MODULE,
766         .fb_check_var   = atmel_lcdfb_check_var,
767         .fb_set_par     = atmel_lcdfb_set_par,
768         .fb_setcolreg   = atmel_lcdfb_setcolreg,
769         .fb_blank       = atmel_lcdfb_blank,
770         .fb_pan_display = atmel_lcdfb_pan_display,
771         .fb_fillrect    = cfb_fillrect,
772         .fb_copyarea    = cfb_copyarea,
773         .fb_imageblit   = cfb_imageblit,
774 };
775
776 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
777 {
778         struct fb_info *info = dev_id;
779         struct atmel_lcdfb_info *sinfo = info->par;
780         u32 status;
781
782         status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
783         if (status & ATMEL_LCDC_UFLWI) {
784                 dev_warn(info->device, "FIFO underflow %#x\n", status);
785                 /* reset DMA and FIFO to avoid screen shifting */
786                 schedule_work(&sinfo->task);
787         }
788         lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
789         return IRQ_HANDLED;
790 }
791
792 /*
793  * LCD controller task (to reset the LCD)
794  */
795 static void atmel_lcdfb_task(struct work_struct *work)
796 {
797         struct atmel_lcdfb_info *sinfo =
798                 container_of(work, struct atmel_lcdfb_info, task);
799
800         atmel_lcdfb_reset(sinfo);
801 }
802
803 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
804 {
805         struct fb_info *info = sinfo->info;
806         int ret = 0;
807
808         info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
809
810         dev_info(info->device,
811                "%luKiB frame buffer at %08lx (mapped at %p)\n",
812                (unsigned long)info->fix.smem_len / 1024,
813                (unsigned long)info->fix.smem_start,
814                info->screen_base);
815
816         /* Allocate colormap */
817         ret = fb_alloc_cmap(&info->cmap, 256, 0);
818         if (ret < 0)
819                 dev_err(info->device, "Alloc color map failed\n");
820
821         return ret;
822 }
823
824 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
825 {
826         if (sinfo->bus_clk)
827                 clk_enable(sinfo->bus_clk);
828         clk_enable(sinfo->lcdc_clk);
829 }
830
831 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
832 {
833         if (sinfo->bus_clk)
834                 clk_disable(sinfo->bus_clk);
835         clk_disable(sinfo->lcdc_clk);
836 }
837
838
839 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
840 {
841         struct device *dev = &pdev->dev;
842         struct fb_info *info;
843         struct atmel_lcdfb_info *sinfo;
844         struct atmel_lcdfb_info *pdata_sinfo;
845         struct fb_videomode fbmode;
846         struct resource *regs = NULL;
847         struct resource *map = NULL;
848         int ret;
849
850         dev_dbg(dev, "%s BEGIN\n", __func__);
851
852         ret = -ENOMEM;
853         info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
854         if (!info) {
855                 dev_err(dev, "cannot allocate memory\n");
856                 goto out;
857         }
858
859         sinfo = info->par;
860
861         if (dev->platform_data) {
862                 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
863                 sinfo->default_bpp = pdata_sinfo->default_bpp;
864                 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
865                 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
866                 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
867                 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
868                 sinfo->guard_time = pdata_sinfo->guard_time;
869                 sinfo->smem_len = pdata_sinfo->smem_len;
870                 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
871                 sinfo->lcdcon_pol_negative = pdata_sinfo->lcdcon_pol_negative;
872                 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
873         } else {
874                 dev_err(dev, "cannot get default configuration\n");
875                 goto free_info;
876         }
877         sinfo->info = info;
878         sinfo->pdev = pdev;
879
880         strcpy(info->fix.id, sinfo->pdev->name);
881         info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
882         info->pseudo_palette = sinfo->pseudo_palette;
883         info->fbops = &atmel_lcdfb_ops;
884
885         memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
886         info->fix = atmel_lcdfb_fix;
887
888         /* Enable LCDC Clocks */
889         if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()
890          || cpu_is_at32ap7000()) {
891                 sinfo->bus_clk = clk_get(dev, "hck1");
892                 if (IS_ERR(sinfo->bus_clk)) {
893                         ret = PTR_ERR(sinfo->bus_clk);
894                         goto free_info;
895                 }
896         }
897         sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
898         if (IS_ERR(sinfo->lcdc_clk)) {
899                 ret = PTR_ERR(sinfo->lcdc_clk);
900                 goto put_bus_clk;
901         }
902         atmel_lcdfb_start_clock(sinfo);
903
904         ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
905                         info->monspecs.modedb_len, info->monspecs.modedb,
906                         sinfo->default_bpp);
907         if (!ret) {
908                 dev_err(dev, "no suitable video mode found\n");
909                 goto stop_clk;
910         }
911
912
913         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
914         if (!regs) {
915                 dev_err(dev, "resources unusable\n");
916                 ret = -ENXIO;
917                 goto stop_clk;
918         }
919
920         sinfo->irq_base = platform_get_irq(pdev, 0);
921         if (sinfo->irq_base < 0) {
922                 dev_err(dev, "unable to get irq\n");
923                 ret = sinfo->irq_base;
924                 goto stop_clk;
925         }
926
927         /* Initialize video memory */
928         map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
929         if (map) {
930                 /* use a pre-allocated memory buffer */
931                 info->fix.smem_start = map->start;
932                 info->fix.smem_len = resource_size(map);
933                 if (!request_mem_region(info->fix.smem_start,
934                                         info->fix.smem_len, pdev->name)) {
935                         ret = -EBUSY;
936                         goto stop_clk;
937                 }
938
939                 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
940                 if (!info->screen_base)
941                         goto release_intmem;
942
943                 /*
944                  * Don't clear the framebuffer -- someone may have set
945                  * up a splash image.
946                  */
947         } else {
948                 /* alocate memory buffer */
949                 ret = atmel_lcdfb_alloc_video_memory(sinfo);
950                 if (ret < 0) {
951                         dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
952                         goto stop_clk;
953                 }
954         }
955
956         /* LCDC registers */
957         info->fix.mmio_start = regs->start;
958         info->fix.mmio_len = resource_size(regs);
959
960         if (!request_mem_region(info->fix.mmio_start,
961                                 info->fix.mmio_len, pdev->name)) {
962                 ret = -EBUSY;
963                 goto free_fb;
964         }
965
966         sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
967         if (!sinfo->mmio) {
968                 dev_err(dev, "cannot map LCDC registers\n");
969                 goto release_mem;
970         }
971
972         /* Initialize PWM for contrast or backlight ("off") */
973         init_contrast(sinfo);
974
975         /* interrupt */
976         ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
977         if (ret) {
978                 dev_err(dev, "request_irq failed: %d\n", ret);
979                 goto unmap_mmio;
980         }
981
982         /* Some operations on the LCDC might sleep and
983          * require a preemptible task context */
984         INIT_WORK(&sinfo->task, atmel_lcdfb_task);
985
986         ret = atmel_lcdfb_init_fbinfo(sinfo);
987         if (ret < 0) {
988                 dev_err(dev, "init fbinfo failed: %d\n", ret);
989                 goto unregister_irqs;
990         }
991
992         /*
993          * This makes sure that our colour bitfield
994          * descriptors are correctly initialised.
995          */
996         atmel_lcdfb_check_var(&info->var, info);
997
998         ret = fb_set_var(info, &info->var);
999         if (ret) {
1000                 dev_warn(dev, "unable to set display parameters\n");
1001                 goto free_cmap;
1002         }
1003
1004         dev_set_drvdata(dev, info);
1005
1006         /*
1007          * Tell the world that we're ready to go
1008          */
1009         ret = register_framebuffer(info);
1010         if (ret < 0) {
1011                 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
1012                 goto reset_drvdata;
1013         }
1014
1015         /* add selected videomode to modelist */
1016         fb_var_to_videomode(&fbmode, &info->var);
1017         fb_add_videomode(&fbmode, &info->modelist);
1018
1019         /* Power up the LCDC screen */
1020         if (sinfo->atmel_lcdfb_power_control)
1021                 sinfo->atmel_lcdfb_power_control(1);
1022
1023         dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
1024                        info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
1025
1026         return 0;
1027
1028 reset_drvdata:
1029         dev_set_drvdata(dev, NULL);
1030 free_cmap:
1031         fb_dealloc_cmap(&info->cmap);
1032 unregister_irqs:
1033         cancel_work_sync(&sinfo->task);
1034         free_irq(sinfo->irq_base, info);
1035 unmap_mmio:
1036         exit_backlight(sinfo);
1037         iounmap(sinfo->mmio);
1038 release_mem:
1039         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1040 free_fb:
1041         if (map)
1042                 iounmap(info->screen_base);
1043         else
1044                 atmel_lcdfb_free_video_memory(sinfo);
1045
1046 release_intmem:
1047         if (map)
1048                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1049 stop_clk:
1050         atmel_lcdfb_stop_clock(sinfo);
1051         clk_put(sinfo->lcdc_clk);
1052 put_bus_clk:
1053         if (sinfo->bus_clk)
1054                 clk_put(sinfo->bus_clk);
1055 free_info:
1056         framebuffer_release(info);
1057 out:
1058         dev_dbg(dev, "%s FAILED\n", __func__);
1059         return ret;
1060 }
1061
1062 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
1063 {
1064         struct device *dev = &pdev->dev;
1065         struct fb_info *info = dev_get_drvdata(dev);
1066         struct atmel_lcdfb_info *sinfo;
1067
1068         if (!info || !info->par)
1069                 return 0;
1070         sinfo = info->par;
1071
1072         cancel_work_sync(&sinfo->task);
1073         exit_backlight(sinfo);
1074         if (sinfo->atmel_lcdfb_power_control)
1075                 sinfo->atmel_lcdfb_power_control(0);
1076         unregister_framebuffer(info);
1077         atmel_lcdfb_stop_clock(sinfo);
1078         clk_put(sinfo->lcdc_clk);
1079         if (sinfo->bus_clk)
1080                 clk_put(sinfo->bus_clk);
1081         fb_dealloc_cmap(&info->cmap);
1082         free_irq(sinfo->irq_base, info);
1083         iounmap(sinfo->mmio);
1084         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1085         if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1086                 iounmap(info->screen_base);
1087                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1088         } else {
1089                 atmel_lcdfb_free_video_memory(sinfo);
1090         }
1091
1092         dev_set_drvdata(dev, NULL);
1093         framebuffer_release(info);
1094
1095         return 0;
1096 }
1097
1098 #ifdef CONFIG_PM
1099
1100 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1101 {
1102         struct fb_info *info = platform_get_drvdata(pdev);
1103         struct atmel_lcdfb_info *sinfo = info->par;
1104
1105         /*
1106          * We don't want to handle interrupts while the clock is
1107          * stopped. It may take forever.
1108          */
1109         lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
1110
1111         sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
1112         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1113         if (sinfo->atmel_lcdfb_power_control)
1114                 sinfo->atmel_lcdfb_power_control(0);
1115
1116         atmel_lcdfb_stop(sinfo);
1117         atmel_lcdfb_stop_clock(sinfo);
1118
1119         return 0;
1120 }
1121
1122 static int atmel_lcdfb_resume(struct platform_device *pdev)
1123 {
1124         struct fb_info *info = platform_get_drvdata(pdev);
1125         struct atmel_lcdfb_info *sinfo = info->par;
1126
1127         atmel_lcdfb_start_clock(sinfo);
1128         atmel_lcdfb_start(sinfo);
1129         if (sinfo->atmel_lcdfb_power_control)
1130                 sinfo->atmel_lcdfb_power_control(1);
1131         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1132
1133         /* Enable FIFO & DMA errors */
1134         lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
1135                         | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
1136
1137         return 0;
1138 }
1139
1140 #else
1141 #define atmel_lcdfb_suspend     NULL
1142 #define atmel_lcdfb_resume      NULL
1143 #endif
1144
1145 static struct platform_driver atmel_lcdfb_driver = {
1146         .remove         = __exit_p(atmel_lcdfb_remove),
1147         .suspend        = atmel_lcdfb_suspend,
1148         .resume         = atmel_lcdfb_resume,
1149
1150         .driver         = {
1151                 .name   = "atmel_lcdfb",
1152                 .owner  = THIS_MODULE,
1153         },
1154 };
1155
1156 static int __init atmel_lcdfb_init(void)
1157 {
1158         return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
1159 }
1160
1161 static void __exit atmel_lcdfb_exit(void)
1162 {
1163         platform_driver_unregister(&atmel_lcdfb_driver);
1164 }
1165
1166 module_init(atmel_lcdfb_init);
1167 module_exit(atmel_lcdfb_exit);
1168
1169 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1170 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1171 MODULE_LICENSE("GPL");