atmel_lcdfb: adjust fifo size for at91sam9rl
[linux-2.6.git] / drivers / video / atmel_lcdfb.c
1 /*
2  *  Driver for AT91/AT32 LCD Controller
3  *
4  *  Copyright (C) 2007 Atmel Corporation
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License.  See the file COPYING in the main directory of this archive for
8  * more details.
9  */
10
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
16 #include <linux/fb.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20
21 #include <asm/arch/board.h>
22 #include <asm/arch/cpu.h>
23 #include <asm/arch/gpio.h>
24
25 #include <video/atmel_lcdc.h>
26
27 #define lcdc_readl(sinfo, reg)          __raw_readl((sinfo)->mmio+(reg))
28 #define lcdc_writel(sinfo, reg, val)    __raw_writel((val), (sinfo)->mmio+(reg))
29
30 /* configurable parameters */
31 #define ATMEL_LCDC_CVAL_DEFAULT         0xc8
32 #define ATMEL_LCDC_DMA_BURST_LEN        8
33
34 #if defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91CAP9) || \
35         defined(CONFIG_ARCH_AT91SAM9RL)
36 #define ATMEL_LCDC_FIFO_SIZE            2048
37 #else
38 #define ATMEL_LCDC_FIFO_SIZE            512
39 #endif
40
41 #if defined(CONFIG_ARCH_AT91)
42 #define ATMEL_LCDFB_FBINFO_DEFAULT      FBINFO_DEFAULT
43
44 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
45                                         struct fb_var_screeninfo *var)
46 {
47
48 }
49 #elif defined(CONFIG_AVR32)
50 #define ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
51                                         | FBINFO_PARTIAL_PAN_OK \
52                                         | FBINFO_HWACCEL_XPAN \
53                                         | FBINFO_HWACCEL_YPAN)
54
55 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
56                                      struct fb_var_screeninfo *var)
57 {
58         u32 dma2dcfg;
59         u32 pixeloff;
60
61         pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
62
63         dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
64         dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
65         lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
66
67         /* Update configuration */
68         lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
69                     lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
70                     | ATMEL_LCDC_DMAUPDT);
71 }
72 #endif
73
74 static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
75                 | ATMEL_LCDC_POL_POSITIVE
76                 | ATMEL_LCDC_ENA_PWMENABLE;
77
78 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
79
80 /* some bl->props field just changed */
81 static int atmel_bl_update_status(struct backlight_device *bl)
82 {
83         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
84         int                     power = sinfo->bl_power;
85         int                     brightness = bl->props.brightness;
86
87         /* REVISIT there may be a meaningful difference between
88          * fb_blank and power ... there seem to be some cases
89          * this doesn't handle correctly.
90          */
91         if (bl->props.fb_blank != sinfo->bl_power)
92                 power = bl->props.fb_blank;
93         else if (bl->props.power != sinfo->bl_power)
94                 power = bl->props.power;
95
96         if (brightness < 0 && power == FB_BLANK_UNBLANK)
97                 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
98         else if (power != FB_BLANK_UNBLANK)
99                 brightness = 0;
100
101         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
102         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
103                         brightness ? contrast_ctr : 0);
104
105         bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
106
107         return 0;
108 }
109
110 static int atmel_bl_get_brightness(struct backlight_device *bl)
111 {
112         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
113
114         return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
115 }
116
117 static struct backlight_ops atmel_lcdc_bl_ops = {
118         .update_status = atmel_bl_update_status,
119         .get_brightness = atmel_bl_get_brightness,
120 };
121
122 static void init_backlight(struct atmel_lcdfb_info *sinfo)
123 {
124         struct backlight_device *bl;
125
126         sinfo->bl_power = FB_BLANK_UNBLANK;
127
128         if (sinfo->backlight)
129                 return;
130
131         bl = backlight_device_register("backlight", &sinfo->pdev->dev,
132                         sinfo, &atmel_lcdc_bl_ops);
133         if (IS_ERR(sinfo->backlight)) {
134                 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
135                                 PTR_ERR(bl));
136                 return;
137         }
138         sinfo->backlight = bl;
139
140         bl->props.power = FB_BLANK_UNBLANK;
141         bl->props.fb_blank = FB_BLANK_UNBLANK;
142         bl->props.max_brightness = 0xff;
143         bl->props.brightness = atmel_bl_get_brightness(bl);
144 }
145
146 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
147 {
148         if (sinfo->backlight)
149                 backlight_device_unregister(sinfo->backlight);
150 }
151
152 #else
153
154 static void init_backlight(struct atmel_lcdfb_info *sinfo)
155 {
156         dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
157 }
158
159 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
160 {
161 }
162
163 #endif
164
165 static void init_contrast(struct atmel_lcdfb_info *sinfo)
166 {
167         /* have some default contrast/backlight settings */
168         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
169         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
170
171         if (sinfo->lcdcon_is_backlight)
172                 init_backlight(sinfo);
173 }
174
175
176 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
177         .type           = FB_TYPE_PACKED_PIXELS,
178         .visual         = FB_VISUAL_TRUECOLOR,
179         .xpanstep       = 0,
180         .ypanstep       = 0,
181         .ywrapstep      = 0,
182         .accel          = FB_ACCEL_NONE,
183 };
184
185 static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
186 {
187         unsigned long value;
188
189         if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
190                 return xres;
191
192         value = xres;
193         if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
194                 /* STN display */
195                 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
196                         value *= 3;
197                 }
198                 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
199                    || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
200                       && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
201                         value = DIV_ROUND_UP(value, 4);
202                 else
203                         value = DIV_ROUND_UP(value, 8);
204         }
205
206         return value;
207 }
208
209 static void atmel_lcdfb_update_dma(struct fb_info *info,
210                                struct fb_var_screeninfo *var)
211 {
212         struct atmel_lcdfb_info *sinfo = info->par;
213         struct fb_fix_screeninfo *fix = &info->fix;
214         unsigned long dma_addr;
215
216         dma_addr = (fix->smem_start + var->yoffset * fix->line_length
217                     + var->xoffset * var->bits_per_pixel / 8);
218
219         dma_addr &= ~3UL;
220
221         /* Set framebuffer DMA base address and pixel offset */
222         lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
223
224         atmel_lcdfb_update_dma2d(sinfo, var);
225 }
226
227 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
228 {
229         struct fb_info *info = sinfo->info;
230
231         dma_free_writecombine(info->device, info->fix.smem_len,
232                                 info->screen_base, info->fix.smem_start);
233 }
234
235 /**
236  *      atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
237  *      @sinfo: the frame buffer to allocate memory for
238  */
239 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
240 {
241         struct fb_info *info = sinfo->info;
242         struct fb_var_screeninfo *var = &info->var;
243
244         info->fix.smem_len = (var->xres_virtual * var->yres_virtual
245                             * ((var->bits_per_pixel + 7) / 8));
246
247         info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
248                                         (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
249
250         if (!info->screen_base) {
251                 return -ENOMEM;
252         }
253
254         memset(info->screen_base, 0, info->fix.smem_len);
255
256         return 0;
257 }
258
259 /**
260  *      atmel_lcdfb_check_var - Validates a var passed in.
261  *      @var: frame buffer variable screen structure
262  *      @info: frame buffer structure that represents a single frame buffer
263  *
264  *      Checks to see if the hardware supports the state requested by
265  *      var passed in. This function does not alter the hardware
266  *      state!!!  This means the data stored in struct fb_info and
267  *      struct atmel_lcdfb_info do not change. This includes the var
268  *      inside of struct fb_info.  Do NOT change these. This function
269  *      can be called on its own if we intent to only test a mode and
270  *      not actually set it. The stuff in modedb.c is a example of
271  *      this. If the var passed in is slightly off by what the
272  *      hardware can support then we alter the var PASSED in to what
273  *      we can do. If the hardware doesn't support mode change a
274  *      -EINVAL will be returned by the upper layers. You don't need
275  *      to implement this function then. If you hardware doesn't
276  *      support changing the resolution then this function is not
277  *      needed. In this case the driver would just provide a var that
278  *      represents the static state the screen is in.
279  *
280  *      Returns negative errno on error, or zero on success.
281  */
282 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
283                              struct fb_info *info)
284 {
285         struct device *dev = info->device;
286         struct atmel_lcdfb_info *sinfo = info->par;
287         unsigned long clk_value_khz;
288
289         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
290
291         dev_dbg(dev, "%s:\n", __func__);
292         dev_dbg(dev, "  resolution: %ux%u\n", var->xres, var->yres);
293         dev_dbg(dev, "  pixclk:     %lu KHz\n", PICOS2KHZ(var->pixclock));
294         dev_dbg(dev, "  bpp:        %u\n", var->bits_per_pixel);
295         dev_dbg(dev, "  clk:        %lu KHz\n", clk_value_khz);
296
297         if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) {
298                 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
299                 return -EINVAL;
300         }
301
302         /* Force same alignment for each line */
303         var->xres = (var->xres + 3) & ~3UL;
304         var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
305
306         var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
307         var->transp.msb_right = 0;
308         var->transp.offset = var->transp.length = 0;
309         var->xoffset = var->yoffset = 0;
310
311         /* Saturate vertical and horizontal timings at maximum values */
312         var->vsync_len = min_t(u32, var->vsync_len,
313                         (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
314         var->upper_margin = min_t(u32, var->upper_margin,
315                         ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
316         var->lower_margin = min_t(u32, var->lower_margin,
317                         ATMEL_LCDC_VFP);
318         var->right_margin = min_t(u32, var->right_margin,
319                         (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
320         var->hsync_len = min_t(u32, var->hsync_len,
321                         (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
322         var->left_margin = min_t(u32, var->left_margin,
323                         ATMEL_LCDC_HBP + 1);
324
325         /* Some parameters can't be zero */
326         var->vsync_len = max_t(u32, var->vsync_len, 1);
327         var->right_margin = max_t(u32, var->right_margin, 1);
328         var->hsync_len = max_t(u32, var->hsync_len, 1);
329         var->left_margin = max_t(u32, var->left_margin, 1);
330
331         switch (var->bits_per_pixel) {
332         case 1:
333         case 2:
334         case 4:
335         case 8:
336                 var->red.offset = var->green.offset = var->blue.offset = 0;
337                 var->red.length = var->green.length = var->blue.length
338                         = var->bits_per_pixel;
339                 break;
340         case 15:
341         case 16:
342                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
343                         /* RGB:565 mode */
344                         var->red.offset = 11;
345                         var->blue.offset = 0;
346                         var->green.length = 6;
347                 } else {
348                         /* BGR:555 mode */
349                         var->red.offset = 0;
350                         var->blue.offset = 10;
351                         var->green.length = 5;
352                 }
353                 var->green.offset = 5;
354                 var->red.length = var->blue.length = 5;
355                 break;
356         case 32:
357                 var->transp.offset = 24;
358                 var->transp.length = 8;
359                 /* fall through */
360         case 24:
361                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
362                         /* RGB:888 mode */
363                         var->red.offset = 16;
364                         var->blue.offset = 0;
365                 } else {
366                         /* BGR:888 mode */
367                         var->red.offset = 0;
368                         var->blue.offset = 16;
369                 }
370                 var->green.offset = 8;
371                 var->red.length = var->green.length = var->blue.length = 8;
372                 break;
373         default:
374                 dev_err(dev, "color depth %d not supported\n",
375                                         var->bits_per_pixel);
376                 return -EINVAL;
377         }
378
379         return 0;
380 }
381
382 /**
383  *      atmel_lcdfb_set_par - Alters the hardware state.
384  *      @info: frame buffer structure that represents a single frame buffer
385  *
386  *      Using the fb_var_screeninfo in fb_info we set the resolution
387  *      of the this particular framebuffer. This function alters the
388  *      par AND the fb_fix_screeninfo stored in fb_info. It doesn't
389  *      not alter var in fb_info since we are using that data. This
390  *      means we depend on the data in var inside fb_info to be
391  *      supported by the hardware.  atmel_lcdfb_check_var is always called
392  *      before atmel_lcdfb_set_par to ensure this.  Again if you can't
393  *      change the resolution you don't need this function.
394  *
395  */
396 static int atmel_lcdfb_set_par(struct fb_info *info)
397 {
398         struct atmel_lcdfb_info *sinfo = info->par;
399         unsigned long hozval_linesz;
400         unsigned long value;
401         unsigned long clk_value_khz;
402         unsigned long bits_per_line;
403
404         dev_dbg(info->device, "%s:\n", __func__);
405         dev_dbg(info->device, "  * resolution: %ux%u (%ux%u virtual)\n",
406                  info->var.xres, info->var.yres,
407                  info->var.xres_virtual, info->var.yres_virtual);
408
409         /* Turn off the LCD controller and the DMA controller */
410         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
411
412         /* Wait for the LCDC core to become idle */
413         while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
414                 msleep(10);
415
416         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
417
418         if (info->var.bits_per_pixel == 1)
419                 info->fix.visual = FB_VISUAL_MONO01;
420         else if (info->var.bits_per_pixel <= 8)
421                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
422         else
423                 info->fix.visual = FB_VISUAL_TRUECOLOR;
424
425         bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
426         info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
427
428         /* Re-initialize the DMA engine... */
429         dev_dbg(info->device, "  * update DMA engine\n");
430         atmel_lcdfb_update_dma(info, &info->var);
431
432         /* ...set frame size and burst length = 8 words (?) */
433         value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
434         value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
435         lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
436
437         /* Now, the LCDC core... */
438
439         /* Set pixel clock */
440         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
441
442         value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
443
444         value = (value / 2) - 1;
445         dev_dbg(info->device, "  * programming CLKVAL = 0x%08lx\n", value);
446
447         if (value <= 0) {
448                 dev_notice(info->device, "Bypassing pixel clock divider\n");
449                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
450         } else {
451                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET);
452                 info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
453                 dev_dbg(info->device, "  updated pixclk:     %lu KHz\n",
454                                         PICOS2KHZ(info->var.pixclock));
455         }
456
457
458         /* Initialize control register 2 */
459         value = sinfo->default_lcdcon2;
460
461         if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
462                 value |= ATMEL_LCDC_INVLINE_INVERTED;
463         if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
464                 value |= ATMEL_LCDC_INVFRAME_INVERTED;
465
466         switch (info->var.bits_per_pixel) {
467                 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
468                 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
469                 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
470                 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
471                 case 15: /* fall through */
472                 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
473                 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
474                 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
475                 default: BUG(); break;
476         }
477         dev_dbg(info->device, "  * LCDCON2 = %08lx\n", value);
478         lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
479
480         /* Vertical timing */
481         value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
482         value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
483         value |= info->var.lower_margin;
484         dev_dbg(info->device, "  * LCDTIM1 = %08lx\n", value);
485         lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
486
487         /* Horizontal timing */
488         value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
489         value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
490         value |= (info->var.left_margin - 1);
491         dev_dbg(info->device, "  * LCDTIM2 = %08lx\n", value);
492         lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
493
494         /* Horizontal value (aka line size) */
495         hozval_linesz = compute_hozval(info->var.xres,
496                                         lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
497
498         /* Display size */
499         value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
500         value |= info->var.yres - 1;
501         dev_dbg(info->device, "  * LCDFRMCFG = %08lx\n", value);
502         lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
503
504         /* FIFO Threshold: Use formula from data sheet */
505         value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
506         lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
507
508         /* Toggle LCD_MODE every frame */
509         lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
510
511         /* Disable all interrupts */
512         lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
513
514         /* ...wait for DMA engine to become idle... */
515         while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
516                 msleep(10);
517
518         dev_dbg(info->device, "  * re-enable DMA engine\n");
519         /* ...and enable it with updated configuration */
520         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
521
522         dev_dbg(info->device, "  * re-enable LCDC core\n");
523         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
524                 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
525
526         dev_dbg(info->device, "  * DONE\n");
527
528         return 0;
529 }
530
531 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
532 {
533         chan &= 0xffff;
534         chan >>= 16 - bf->length;
535         return chan << bf->offset;
536 }
537
538 /**
539  *      atmel_lcdfb_setcolreg - Optional function. Sets a color register.
540  *      @regno: Which register in the CLUT we are programming
541  *      @red: The red value which can be up to 16 bits wide
542  *      @green: The green value which can be up to 16 bits wide
543  *      @blue:  The blue value which can be up to 16 bits wide.
544  *      @transp: If supported the alpha value which can be up to 16 bits wide.
545  *      @info: frame buffer info structure
546  *
547  *      Set a single color register. The values supplied have a 16 bit
548  *      magnitude which needs to be scaled in this function for the hardware.
549  *      Things to take into consideration are how many color registers, if
550  *      any, are supported with the current color visual. With truecolor mode
551  *      no color palettes are supported. Here a psuedo palette is created
552  *      which we store the value in pseudo_palette in struct fb_info. For
553  *      pseudocolor mode we have a limited color palette. To deal with this
554  *      we can program what color is displayed for a particular pixel value.
555  *      DirectColor is similar in that we can program each color field. If
556  *      we have a static colormap we don't need to implement this function.
557  *
558  *      Returns negative errno on error, or zero on success. In an
559  *      ideal world, this would have been the case, but as it turns
560  *      out, the other drivers return 1 on failure, so that's what
561  *      we're going to do.
562  */
563 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
564                              unsigned int green, unsigned int blue,
565                              unsigned int transp, struct fb_info *info)
566 {
567         struct atmel_lcdfb_info *sinfo = info->par;
568         unsigned int val;
569         u32 *pal;
570         int ret = 1;
571
572         if (info->var.grayscale)
573                 red = green = blue = (19595 * red + 38470 * green
574                                       + 7471 * blue) >> 16;
575
576         switch (info->fix.visual) {
577         case FB_VISUAL_TRUECOLOR:
578                 if (regno < 16) {
579                         pal = info->pseudo_palette;
580
581                         val  = chan_to_field(red, &info->var.red);
582                         val |= chan_to_field(green, &info->var.green);
583                         val |= chan_to_field(blue, &info->var.blue);
584
585                         pal[regno] = val;
586                         ret = 0;
587                 }
588                 break;
589
590         case FB_VISUAL_PSEUDOCOLOR:
591                 if (regno < 256) {
592                         val  = ((red   >> 11) & 0x001f);
593                         val |= ((green >>  6) & 0x03e0);
594                         val |= ((blue  >>  1) & 0x7c00);
595
596                         /*
597                          * TODO: intensity bit. Maybe something like
598                          *   ~(red[10] ^ green[10] ^ blue[10]) & 1
599                          */
600
601                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
602                         ret = 0;
603                 }
604                 break;
605
606         case FB_VISUAL_MONO01:
607                 if (regno < 2) {
608                         val = (regno == 0) ? 0x00 : 0x1F;
609                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
610                         ret = 0;
611                 }
612                 break;
613
614         }
615
616         return ret;
617 }
618
619 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
620                                struct fb_info *info)
621 {
622         dev_dbg(info->device, "%s\n", __func__);
623
624         atmel_lcdfb_update_dma(info, var);
625
626         return 0;
627 }
628
629 static struct fb_ops atmel_lcdfb_ops = {
630         .owner          = THIS_MODULE,
631         .fb_check_var   = atmel_lcdfb_check_var,
632         .fb_set_par     = atmel_lcdfb_set_par,
633         .fb_setcolreg   = atmel_lcdfb_setcolreg,
634         .fb_pan_display = atmel_lcdfb_pan_display,
635         .fb_fillrect    = cfb_fillrect,
636         .fb_copyarea    = cfb_copyarea,
637         .fb_imageblit   = cfb_imageblit,
638 };
639
640 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
641 {
642         struct fb_info *info = dev_id;
643         struct atmel_lcdfb_info *sinfo = info->par;
644         u32 status;
645
646         status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
647         lcdc_writel(sinfo, ATMEL_LCDC_IDR, status);
648         return IRQ_HANDLED;
649 }
650
651 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
652 {
653         struct fb_info *info = sinfo->info;
654         int ret = 0;
655
656         info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
657
658         dev_info(info->device,
659                "%luKiB frame buffer at %08lx (mapped at %p)\n",
660                (unsigned long)info->fix.smem_len / 1024,
661                (unsigned long)info->fix.smem_start,
662                info->screen_base);
663
664         /* Allocate colormap */
665         ret = fb_alloc_cmap(&info->cmap, 256, 0);
666         if (ret < 0)
667                 dev_err(info->device, "Alloc color map failed\n");
668
669         return ret;
670 }
671
672 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
673 {
674         if (sinfo->bus_clk)
675                 clk_enable(sinfo->bus_clk);
676         clk_enable(sinfo->lcdc_clk);
677 }
678
679 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
680 {
681         if (sinfo->bus_clk)
682                 clk_disable(sinfo->bus_clk);
683         clk_disable(sinfo->lcdc_clk);
684 }
685
686
687 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
688 {
689         struct device *dev = &pdev->dev;
690         struct fb_info *info;
691         struct atmel_lcdfb_info *sinfo;
692         struct atmel_lcdfb_info *pdata_sinfo;
693         struct resource *regs = NULL;
694         struct resource *map = NULL;
695         int ret;
696
697         dev_dbg(dev, "%s BEGIN\n", __func__);
698
699         ret = -ENOMEM;
700         info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
701         if (!info) {
702                 dev_err(dev, "cannot allocate memory\n");
703                 goto out;
704         }
705
706         sinfo = info->par;
707
708         if (dev->platform_data) {
709                 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
710                 sinfo->default_bpp = pdata_sinfo->default_bpp;
711                 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
712                 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
713                 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
714                 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
715                 sinfo->guard_time = pdata_sinfo->guard_time;
716                 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
717                 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
718         } else {
719                 dev_err(dev, "cannot get default configuration\n");
720                 goto free_info;
721         }
722         sinfo->info = info;
723         sinfo->pdev = pdev;
724
725         strcpy(info->fix.id, sinfo->pdev->name);
726         info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
727         info->pseudo_palette = sinfo->pseudo_palette;
728         info->fbops = &atmel_lcdfb_ops;
729
730         memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
731         info->fix = atmel_lcdfb_fix;
732
733         /* Enable LCDC Clocks */
734         if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
735                 sinfo->bus_clk = clk_get(dev, "hck1");
736                 if (IS_ERR(sinfo->bus_clk)) {
737                         ret = PTR_ERR(sinfo->bus_clk);
738                         goto free_info;
739                 }
740         }
741         sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
742         if (IS_ERR(sinfo->lcdc_clk)) {
743                 ret = PTR_ERR(sinfo->lcdc_clk);
744                 goto put_bus_clk;
745         }
746         atmel_lcdfb_start_clock(sinfo);
747
748         ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
749                         info->monspecs.modedb_len, info->monspecs.modedb,
750                         sinfo->default_bpp);
751         if (!ret) {
752                 dev_err(dev, "no suitable video mode found\n");
753                 goto stop_clk;
754         }
755
756
757         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
758         if (!regs) {
759                 dev_err(dev, "resources unusable\n");
760                 ret = -ENXIO;
761                 goto stop_clk;
762         }
763
764         sinfo->irq_base = platform_get_irq(pdev, 0);
765         if (sinfo->irq_base < 0) {
766                 dev_err(dev, "unable to get irq\n");
767                 ret = sinfo->irq_base;
768                 goto stop_clk;
769         }
770
771         /* Initialize video memory */
772         map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
773         if (map) {
774                 /* use a pre-allocated memory buffer */
775                 info->fix.smem_start = map->start;
776                 info->fix.smem_len = map->end - map->start + 1;
777                 if (!request_mem_region(info->fix.smem_start,
778                                         info->fix.smem_len, pdev->name)) {
779                         ret = -EBUSY;
780                         goto stop_clk;
781                 }
782
783                 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
784                 if (!info->screen_base)
785                         goto release_intmem;
786
787                 /*
788                  * Don't clear the framebuffer -- someone may have set
789                  * up a splash image.
790                  */
791         } else {
792                 /* alocate memory buffer */
793                 ret = atmel_lcdfb_alloc_video_memory(sinfo);
794                 if (ret < 0) {
795                         dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
796                         goto stop_clk;
797                 }
798         }
799
800         /* LCDC registers */
801         info->fix.mmio_start = regs->start;
802         info->fix.mmio_len = regs->end - regs->start + 1;
803
804         if (!request_mem_region(info->fix.mmio_start,
805                                 info->fix.mmio_len, pdev->name)) {
806                 ret = -EBUSY;
807                 goto free_fb;
808         }
809
810         sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
811         if (!sinfo->mmio) {
812                 dev_err(dev, "cannot map LCDC registers\n");
813                 goto release_mem;
814         }
815
816         /* Initialize PWM for contrast or backlight ("off") */
817         init_contrast(sinfo);
818
819         /* interrupt */
820         ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
821         if (ret) {
822                 dev_err(dev, "request_irq failed: %d\n", ret);
823                 goto unmap_mmio;
824         }
825
826         ret = atmel_lcdfb_init_fbinfo(sinfo);
827         if (ret < 0) {
828                 dev_err(dev, "init fbinfo failed: %d\n", ret);
829                 goto unregister_irqs;
830         }
831
832         /*
833          * This makes sure that our colour bitfield
834          * descriptors are correctly initialised.
835          */
836         atmel_lcdfb_check_var(&info->var, info);
837
838         ret = fb_set_var(info, &info->var);
839         if (ret) {
840                 dev_warn(dev, "unable to set display parameters\n");
841                 goto free_cmap;
842         }
843
844         dev_set_drvdata(dev, info);
845
846         /*
847          * Tell the world that we're ready to go
848          */
849         ret = register_framebuffer(info);
850         if (ret < 0) {
851                 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
852                 goto free_cmap;
853         }
854
855         /* Power up the LCDC screen */
856         if (sinfo->atmel_lcdfb_power_control)
857                 sinfo->atmel_lcdfb_power_control(1);
858
859         dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
860                        info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
861
862         return 0;
863
864
865 free_cmap:
866         fb_dealloc_cmap(&info->cmap);
867 unregister_irqs:
868         free_irq(sinfo->irq_base, info);
869 unmap_mmio:
870         exit_backlight(sinfo);
871         iounmap(sinfo->mmio);
872 release_mem:
873         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
874 free_fb:
875         if (map)
876                 iounmap(info->screen_base);
877         else
878                 atmel_lcdfb_free_video_memory(sinfo);
879
880 release_intmem:
881         if (map)
882                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
883 stop_clk:
884         atmel_lcdfb_stop_clock(sinfo);
885         clk_put(sinfo->lcdc_clk);
886 put_bus_clk:
887         if (sinfo->bus_clk)
888                 clk_put(sinfo->bus_clk);
889 free_info:
890         framebuffer_release(info);
891 out:
892         dev_dbg(dev, "%s FAILED\n", __func__);
893         return ret;
894 }
895
896 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
897 {
898         struct device *dev = &pdev->dev;
899         struct fb_info *info = dev_get_drvdata(dev);
900         struct atmel_lcdfb_info *sinfo = info->par;
901
902         if (!sinfo)
903                 return 0;
904
905         exit_backlight(sinfo);
906         if (sinfo->atmel_lcdfb_power_control)
907                 sinfo->atmel_lcdfb_power_control(0);
908         unregister_framebuffer(info);
909         atmel_lcdfb_stop_clock(sinfo);
910         clk_put(sinfo->lcdc_clk);
911         if (sinfo->bus_clk)
912                 clk_put(sinfo->bus_clk);
913         fb_dealloc_cmap(&info->cmap);
914         free_irq(sinfo->irq_base, info);
915         iounmap(sinfo->mmio);
916         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
917         if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
918                 iounmap(info->screen_base);
919                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
920         } else {
921                 atmel_lcdfb_free_video_memory(sinfo);
922         }
923
924         dev_set_drvdata(dev, NULL);
925         framebuffer_release(info);
926
927         return 0;
928 }
929
930 #ifdef CONFIG_PM
931
932 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
933 {
934         struct fb_info *info = platform_get_drvdata(pdev);
935         struct atmel_lcdfb_info *sinfo = info->par;
936
937         sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
938         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
939         if (sinfo->atmel_lcdfb_power_control)
940                 sinfo->atmel_lcdfb_power_control(0);
941         atmel_lcdfb_stop_clock(sinfo);
942         return 0;
943 }
944
945 static int atmel_lcdfb_resume(struct platform_device *pdev)
946 {
947         struct fb_info *info = platform_get_drvdata(pdev);
948         struct atmel_lcdfb_info *sinfo = info->par;
949
950         atmel_lcdfb_start_clock(sinfo);
951         if (sinfo->atmel_lcdfb_power_control)
952                 sinfo->atmel_lcdfb_power_control(1);
953         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
954         return 0;
955 }
956
957 #else
958 #define atmel_lcdfb_suspend     NULL
959 #define atmel_lcdfb_resume      NULL
960 #endif
961
962 static struct platform_driver atmel_lcdfb_driver = {
963         .remove         = __exit_p(atmel_lcdfb_remove),
964         .suspend        = atmel_lcdfb_suspend,
965         .resume         = atmel_lcdfb_resume,
966
967         .driver         = {
968                 .name   = "atmel_lcdfb",
969                 .owner  = THIS_MODULE,
970         },
971 };
972
973 static int __init atmel_lcdfb_init(void)
974 {
975         return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
976 }
977
978 static void __exit atmel_lcdfb_exit(void)
979 {
980         platform_driver_unregister(&atmel_lcdfb_driver);
981 }
982
983 module_init(atmel_lcdfb_init);
984 module_exit(atmel_lcdfb_exit);
985
986 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
987 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
988 MODULE_LICENSE("GPL");