atmel_lcdfb: support new-style palette format
[linux-2.6.git] / drivers / video / atmel_lcdfb.c
1 /*
2  *  Driver for AT91/AT32 LCD Controller
3  *
4  *  Copyright (C) 2007 Atmel Corporation
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License.  See the file COPYING in the main directory of this archive for
8  * more details.
9  */
10
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
16 #include <linux/fb.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20 #include <linux/gfp.h>
21
22 #include <mach/board.h>
23 #include <mach/cpu.h>
24 #include <mach/gpio.h>
25
26 #include <video/atmel_lcdc.h>
27
28 #define lcdc_readl(sinfo, reg)          __raw_readl((sinfo)->mmio+(reg))
29 #define lcdc_writel(sinfo, reg, val)    __raw_writel((val), (sinfo)->mmio+(reg))
30
31 /* configurable parameters */
32 #define ATMEL_LCDC_CVAL_DEFAULT         0xc8
33 #define ATMEL_LCDC_DMA_BURST_LEN        8       /* words */
34 #define ATMEL_LCDC_FIFO_SIZE            512     /* words */
35
36 #if defined(CONFIG_ARCH_AT91)
37 #define ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
38                                          | FBINFO_PARTIAL_PAN_OK \
39                                          | FBINFO_HWACCEL_YPAN)
40
41 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
42                                         struct fb_var_screeninfo *var,
43                                         struct fb_info *info)
44 {
45
46 }
47 #elif defined(CONFIG_AVR32)
48 #define ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
49                                         | FBINFO_PARTIAL_PAN_OK \
50                                         | FBINFO_HWACCEL_XPAN \
51                                         | FBINFO_HWACCEL_YPAN)
52
53 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
54                                      struct fb_var_screeninfo *var,
55                                      struct fb_info *info)
56 {
57         u32 dma2dcfg;
58         u32 pixeloff;
59
60         pixeloff = (var->xoffset * info->var.bits_per_pixel) & 0x1f;
61
62         dma2dcfg = (info->var.xres_virtual - info->var.xres)
63                  * info->var.bits_per_pixel / 8;
64         dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
65         lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
66
67         /* Update configuration */
68         lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
69                     lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
70                     | ATMEL_LCDC_DMAUPDT);
71 }
72 #endif
73
74 static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
75                 | ATMEL_LCDC_POL_POSITIVE
76                 | ATMEL_LCDC_ENA_PWMENABLE;
77
78 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
79
80 /* some bl->props field just changed */
81 static int atmel_bl_update_status(struct backlight_device *bl)
82 {
83         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
84         int                     power = sinfo->bl_power;
85         int                     brightness = bl->props.brightness;
86
87         /* REVISIT there may be a meaningful difference between
88          * fb_blank and power ... there seem to be some cases
89          * this doesn't handle correctly.
90          */
91         if (bl->props.fb_blank != sinfo->bl_power)
92                 power = bl->props.fb_blank;
93         else if (bl->props.power != sinfo->bl_power)
94                 power = bl->props.power;
95
96         if (brightness < 0 && power == FB_BLANK_UNBLANK)
97                 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
98         else if (power != FB_BLANK_UNBLANK)
99                 brightness = 0;
100
101         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
102         if (contrast_ctr & ATMEL_LCDC_POL_POSITIVE)
103                 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
104                         brightness ? contrast_ctr : 0);
105         else
106                 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
107
108         bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
109
110         return 0;
111 }
112
113 static int atmel_bl_get_brightness(struct backlight_device *bl)
114 {
115         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
116
117         return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
118 }
119
120 static const struct backlight_ops atmel_lcdc_bl_ops = {
121         .update_status = atmel_bl_update_status,
122         .get_brightness = atmel_bl_get_brightness,
123 };
124
125 static void init_backlight(struct atmel_lcdfb_info *sinfo)
126 {
127         struct backlight_properties props;
128         struct backlight_device *bl;
129
130         sinfo->bl_power = FB_BLANK_UNBLANK;
131
132         if (sinfo->backlight)
133                 return;
134
135         memset(&props, 0, sizeof(struct backlight_properties));
136         props.type = BACKLIGHT_RAW;
137         props.max_brightness = 0xff;
138         bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
139                                        &atmel_lcdc_bl_ops, &props);
140         if (IS_ERR(bl)) {
141                 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
142                                 PTR_ERR(bl));
143                 return;
144         }
145         sinfo->backlight = bl;
146
147         bl->props.power = FB_BLANK_UNBLANK;
148         bl->props.fb_blank = FB_BLANK_UNBLANK;
149         bl->props.brightness = atmel_bl_get_brightness(bl);
150 }
151
152 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
153 {
154         if (sinfo->backlight)
155                 backlight_device_unregister(sinfo->backlight);
156 }
157
158 #else
159
160 static void init_backlight(struct atmel_lcdfb_info *sinfo)
161 {
162         dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
163 }
164
165 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
166 {
167 }
168
169 #endif
170
171 static void init_contrast(struct atmel_lcdfb_info *sinfo)
172 {
173         /* contrast pwm can be 'inverted' */
174         if (sinfo->lcdcon_pol_negative)
175                         contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE);
176
177         /* have some default contrast/backlight settings */
178         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
179         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
180
181         if (sinfo->lcdcon_is_backlight)
182                 init_backlight(sinfo);
183 }
184
185
186 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
187         .type           = FB_TYPE_PACKED_PIXELS,
188         .visual         = FB_VISUAL_TRUECOLOR,
189         .xpanstep       = 0,
190         .ypanstep       = 1,
191         .ywrapstep      = 0,
192         .accel          = FB_ACCEL_NONE,
193 };
194
195 static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
196 {
197         unsigned long value;
198
199         if (!(cpu_is_at91sam9261() || cpu_is_at91sam9g10()
200                 || cpu_is_at32ap7000()))
201                 return xres;
202
203         value = xres;
204         if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
205                 /* STN display */
206                 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
207                         value *= 3;
208                 }
209                 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
210                    || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
211                       && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
212                         value = DIV_ROUND_UP(value, 4);
213                 else
214                         value = DIV_ROUND_UP(value, 8);
215         }
216
217         return value;
218 }
219
220 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
221 {
222         /* Turn off the LCD controller and the DMA controller */
223         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
224                         sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
225
226         /* Wait for the LCDC core to become idle */
227         while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
228                 msleep(10);
229
230         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
231 }
232
233 static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
234 {
235         atmel_lcdfb_stop_nowait(sinfo);
236
237         /* Wait for DMA engine to become idle... */
238         while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
239                 msleep(10);
240 }
241
242 static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
243 {
244         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
245         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
246                 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
247                 | ATMEL_LCDC_PWR);
248 }
249
250 static void atmel_lcdfb_update_dma(struct fb_info *info,
251                                struct fb_var_screeninfo *var)
252 {
253         struct atmel_lcdfb_info *sinfo = info->par;
254         struct fb_fix_screeninfo *fix = &info->fix;
255         unsigned long dma_addr;
256
257         dma_addr = (fix->smem_start + var->yoffset * fix->line_length
258                     + var->xoffset * info->var.bits_per_pixel / 8);
259
260         dma_addr &= ~3UL;
261
262         /* Set framebuffer DMA base address and pixel offset */
263         lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
264
265         atmel_lcdfb_update_dma2d(sinfo, var, info);
266 }
267
268 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
269 {
270         struct fb_info *info = sinfo->info;
271
272         dma_free_writecombine(info->device, info->fix.smem_len,
273                                 info->screen_base, info->fix.smem_start);
274 }
275
276 /**
277  *      atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
278  *      @sinfo: the frame buffer to allocate memory for
279  *      
280  *      This function is called only from the atmel_lcdfb_probe()
281  *      so no locking by fb_info->mm_lock around smem_len setting is needed.
282  */
283 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
284 {
285         struct fb_info *info = sinfo->info;
286         struct fb_var_screeninfo *var = &info->var;
287         unsigned int smem_len;
288
289         smem_len = (var->xres_virtual * var->yres_virtual
290                     * ((var->bits_per_pixel + 7) / 8));
291         info->fix.smem_len = max(smem_len, sinfo->smem_len);
292
293         info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
294                                         (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
295
296         if (!info->screen_base) {
297                 return -ENOMEM;
298         }
299
300         memset(info->screen_base, 0, info->fix.smem_len);
301
302         return 0;
303 }
304
305 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
306                                                      struct fb_info *info)
307 {
308         struct fb_videomode varfbmode;
309         const struct fb_videomode *fbmode = NULL;
310
311         fb_var_to_videomode(&varfbmode, var);
312         fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
313         if (fbmode)
314                 fb_videomode_to_var(var, fbmode);
315         return fbmode;
316 }
317
318
319 /**
320  *      atmel_lcdfb_check_var - Validates a var passed in.
321  *      @var: frame buffer variable screen structure
322  *      @info: frame buffer structure that represents a single frame buffer
323  *
324  *      Checks to see if the hardware supports the state requested by
325  *      var passed in. This function does not alter the hardware
326  *      state!!!  This means the data stored in struct fb_info and
327  *      struct atmel_lcdfb_info do not change. This includes the var
328  *      inside of struct fb_info.  Do NOT change these. This function
329  *      can be called on its own if we intent to only test a mode and
330  *      not actually set it. The stuff in modedb.c is a example of
331  *      this. If the var passed in is slightly off by what the
332  *      hardware can support then we alter the var PASSED in to what
333  *      we can do. If the hardware doesn't support mode change a
334  *      -EINVAL will be returned by the upper layers. You don't need
335  *      to implement this function then. If you hardware doesn't
336  *      support changing the resolution then this function is not
337  *      needed. In this case the driver would just provide a var that
338  *      represents the static state the screen is in.
339  *
340  *      Returns negative errno on error, or zero on success.
341  */
342 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
343                              struct fb_info *info)
344 {
345         struct device *dev = info->device;
346         struct atmel_lcdfb_info *sinfo = info->par;
347         unsigned long clk_value_khz;
348
349         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
350
351         dev_dbg(dev, "%s:\n", __func__);
352
353         if (!(var->pixclock && var->bits_per_pixel)) {
354                 /* choose a suitable mode if possible */
355                 if (!atmel_lcdfb_choose_mode(var, info)) {
356                         dev_err(dev, "needed value not specified\n");
357                         return -EINVAL;
358                 }
359         }
360
361         dev_dbg(dev, "  resolution: %ux%u\n", var->xres, var->yres);
362         dev_dbg(dev, "  pixclk:     %lu KHz\n", PICOS2KHZ(var->pixclock));
363         dev_dbg(dev, "  bpp:        %u\n", var->bits_per_pixel);
364         dev_dbg(dev, "  clk:        %lu KHz\n", clk_value_khz);
365
366         if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
367                 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
368                 return -EINVAL;
369         }
370
371         /* Do not allow to have real resoulution larger than virtual */
372         if (var->xres > var->xres_virtual)
373                 var->xres_virtual = var->xres;
374
375         if (var->yres > var->yres_virtual)
376                 var->yres_virtual = var->yres;
377
378         /* Force same alignment for each line */
379         var->xres = (var->xres + 3) & ~3UL;
380         var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
381
382         var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
383         var->transp.msb_right = 0;
384         var->transp.offset = var->transp.length = 0;
385         var->xoffset = var->yoffset = 0;
386
387         if (info->fix.smem_len) {
388                 unsigned int smem_len = (var->xres_virtual * var->yres_virtual
389                                          * ((var->bits_per_pixel + 7) / 8));
390                 if (smem_len > info->fix.smem_len)
391                         return -EINVAL;
392         }
393
394         /* Saturate vertical and horizontal timings at maximum values */
395         var->vsync_len = min_t(u32, var->vsync_len,
396                         (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
397         var->upper_margin = min_t(u32, var->upper_margin,
398                         ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
399         var->lower_margin = min_t(u32, var->lower_margin,
400                         ATMEL_LCDC_VFP);
401         var->right_margin = min_t(u32, var->right_margin,
402                         (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 2);
403         var->hsync_len = min_t(u32, var->hsync_len,
404                         (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
405         var->left_margin = min_t(u32, var->left_margin,
406                         ATMEL_LCDC_HBP + 1);
407
408         /* Some parameters can't be zero */
409         var->vsync_len = max_t(u32, var->vsync_len, 1);
410         var->right_margin = max_t(u32, var->right_margin, 1);
411         var->hsync_len = max_t(u32, var->hsync_len, 1);
412         var->left_margin = max_t(u32, var->left_margin, 1);
413
414         switch (var->bits_per_pixel) {
415         case 1:
416         case 2:
417         case 4:
418         case 8:
419                 var->red.offset = var->green.offset = var->blue.offset = 0;
420                 var->red.length = var->green.length = var->blue.length
421                         = var->bits_per_pixel;
422                 break;
423         case 15:
424         case 16:
425                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
426                         /* RGB:565 mode */
427                         var->red.offset = 11;
428                         var->blue.offset = 0;
429                         var->green.length = 6;
430                 } else if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB555) {
431                         var->red.offset = 10;
432                         var->blue.offset = 0;
433                         var->green.length = 5;
434                 } else {
435                         /* BGR:555 mode */
436                         var->red.offset = 0;
437                         var->blue.offset = 10;
438                         var->green.length = 5;
439                 }
440                 var->green.offset = 5;
441                 var->red.length = var->blue.length = 5;
442                 break;
443         case 32:
444                 var->transp.offset = 24;
445                 var->transp.length = 8;
446                 /* fall through */
447         case 24:
448                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
449                         /* RGB:888 mode */
450                         var->red.offset = 16;
451                         var->blue.offset = 0;
452                 } else {
453                         /* BGR:888 mode */
454                         var->red.offset = 0;
455                         var->blue.offset = 16;
456                 }
457                 var->green.offset = 8;
458                 var->red.length = var->green.length = var->blue.length = 8;
459                 break;
460         default:
461                 dev_err(dev, "color depth %d not supported\n",
462                                         var->bits_per_pixel);
463                 return -EINVAL;
464         }
465
466         return 0;
467 }
468
469 /*
470  * LCD reset sequence
471  */
472 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
473 {
474         might_sleep();
475
476         atmel_lcdfb_stop(sinfo);
477         atmel_lcdfb_start(sinfo);
478 }
479
480 /**
481  *      atmel_lcdfb_set_par - Alters the hardware state.
482  *      @info: frame buffer structure that represents a single frame buffer
483  *
484  *      Using the fb_var_screeninfo in fb_info we set the resolution
485  *      of the this particular framebuffer. This function alters the
486  *      par AND the fb_fix_screeninfo stored in fb_info. It doesn't
487  *      not alter var in fb_info since we are using that data. This
488  *      means we depend on the data in var inside fb_info to be
489  *      supported by the hardware.  atmel_lcdfb_check_var is always called
490  *      before atmel_lcdfb_set_par to ensure this.  Again if you can't
491  *      change the resolution you don't need this function.
492  *
493  */
494 static int atmel_lcdfb_set_par(struct fb_info *info)
495 {
496         struct atmel_lcdfb_info *sinfo = info->par;
497         unsigned long hozval_linesz;
498         unsigned long value;
499         unsigned long clk_value_khz;
500         unsigned long bits_per_line;
501         unsigned long pix_factor = 2;
502
503         might_sleep();
504
505         dev_dbg(info->device, "%s:\n", __func__);
506         dev_dbg(info->device, "  * resolution: %ux%u (%ux%u virtual)\n",
507                  info->var.xres, info->var.yres,
508                  info->var.xres_virtual, info->var.yres_virtual);
509
510         atmel_lcdfb_stop_nowait(sinfo);
511
512         if (info->var.bits_per_pixel == 1)
513                 info->fix.visual = FB_VISUAL_MONO01;
514         else if (info->var.bits_per_pixel <= 8)
515                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
516         else
517                 info->fix.visual = FB_VISUAL_TRUECOLOR;
518
519         bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
520         info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
521
522         /* Re-initialize the DMA engine... */
523         dev_dbg(info->device, "  * update DMA engine\n");
524         atmel_lcdfb_update_dma(info, &info->var);
525
526         /* ...set frame size and burst length = 8 words (?) */
527         value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
528         value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
529         lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
530
531         /* Now, the LCDC core... */
532
533         /* Set pixel clock */
534         if (cpu_is_at91sam9g45() && !cpu_is_at91sam9g45es())
535                 pix_factor = 1;
536
537         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
538
539         value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
540
541         if (value < pix_factor) {
542                 dev_notice(info->device, "Bypassing pixel clock divider\n");
543                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
544         } else {
545                 value = (value / pix_factor) - 1;
546                 dev_dbg(info->device, "  * programming CLKVAL = 0x%08lx\n",
547                                 value);
548                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
549                                 value << ATMEL_LCDC_CLKVAL_OFFSET);
550                 info->var.pixclock =
551                         KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
552                 dev_dbg(info->device, "  updated pixclk:     %lu KHz\n",
553                                         PICOS2KHZ(info->var.pixclock));
554         }
555
556
557         /* Initialize control register 2 */
558         value = sinfo->default_lcdcon2;
559
560         if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
561                 value |= ATMEL_LCDC_INVLINE_INVERTED;
562         if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
563                 value |= ATMEL_LCDC_INVFRAME_INVERTED;
564
565         switch (info->var.bits_per_pixel) {
566                 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
567                 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
568                 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
569                 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
570                 case 15: /* fall through */
571                 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
572                 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
573                 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
574                 default: BUG(); break;
575         }
576         dev_dbg(info->device, "  * LCDCON2 = %08lx\n", value);
577         lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
578
579         /* Vertical timing */
580         value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
581         value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
582         value |= info->var.lower_margin;
583         dev_dbg(info->device, "  * LCDTIM1 = %08lx\n", value);
584         lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
585
586         /* Horizontal timing */
587         value = (info->var.right_margin - 2) << ATMEL_LCDC_HFP_OFFSET;
588         value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
589         value |= (info->var.left_margin - 1);
590         dev_dbg(info->device, "  * LCDTIM2 = %08lx\n", value);
591         lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
592
593         /* Horizontal value (aka line size) */
594         hozval_linesz = compute_hozval(info->var.xres,
595                                         lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
596
597         /* Display size */
598         value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
599         value |= info->var.yres - 1;
600         dev_dbg(info->device, "  * LCDFRMCFG = %08lx\n", value);
601         lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
602
603         /* FIFO Threshold: Use formula from data sheet */
604         value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
605         lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
606
607         /* Toggle LCD_MODE every frame */
608         lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
609
610         /* Disable all interrupts */
611         lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
612         /* Enable FIFO & DMA errors */
613         lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
614
615         /* ...wait for DMA engine to become idle... */
616         while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
617                 msleep(10);
618
619         atmel_lcdfb_start(sinfo);
620
621         dev_dbg(info->device, "  * DONE\n");
622
623         return 0;
624 }
625
626 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
627 {
628         chan &= 0xffff;
629         chan >>= 16 - bf->length;
630         return chan << bf->offset;
631 }
632
633 /**
634  *      atmel_lcdfb_setcolreg - Optional function. Sets a color register.
635  *      @regno: Which register in the CLUT we are programming
636  *      @red: The red value which can be up to 16 bits wide
637  *      @green: The green value which can be up to 16 bits wide
638  *      @blue:  The blue value which can be up to 16 bits wide.
639  *      @transp: If supported the alpha value which can be up to 16 bits wide.
640  *      @info: frame buffer info structure
641  *
642  *      Set a single color register. The values supplied have a 16 bit
643  *      magnitude which needs to be scaled in this function for the hardware.
644  *      Things to take into consideration are how many color registers, if
645  *      any, are supported with the current color visual. With truecolor mode
646  *      no color palettes are supported. Here a pseudo palette is created
647  *      which we store the value in pseudo_palette in struct fb_info. For
648  *      pseudocolor mode we have a limited color palette. To deal with this
649  *      we can program what color is displayed for a particular pixel value.
650  *      DirectColor is similar in that we can program each color field. If
651  *      we have a static colormap we don't need to implement this function.
652  *
653  *      Returns negative errno on error, or zero on success. In an
654  *      ideal world, this would have been the case, but as it turns
655  *      out, the other drivers return 1 on failure, so that's what
656  *      we're going to do.
657  */
658 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
659                              unsigned int green, unsigned int blue,
660                              unsigned int transp, struct fb_info *info)
661 {
662         struct atmel_lcdfb_info *sinfo = info->par;
663         unsigned int val;
664         u32 *pal;
665         int ret = 1;
666
667         if (info->var.grayscale)
668                 red = green = blue = (19595 * red + 38470 * green
669                                       + 7471 * blue) >> 16;
670
671         switch (info->fix.visual) {
672         case FB_VISUAL_TRUECOLOR:
673                 if (regno < 16) {
674                         pal = info->pseudo_palette;
675
676                         val  = chan_to_field(red, &info->var.red);
677                         val |= chan_to_field(green, &info->var.green);
678                         val |= chan_to_field(blue, &info->var.blue);
679
680                         pal[regno] = val;
681                         ret = 0;
682                 }
683                 break;
684
685         case FB_VISUAL_PSEUDOCOLOR:
686                 if (regno < 256) {
687                         if (cpu_is_at91sam9261() || cpu_is_at91sam9263()
688                             || cpu_is_at91sam9rl()) {
689                                 /* old style I+BGR:555 */
690                                 val  = ((red   >> 11) & 0x001f);
691                                 val |= ((green >>  6) & 0x03e0);
692                                 val |= ((blue  >>  1) & 0x7c00);
693
694                                 /*
695                                  * TODO: intensity bit. Maybe something like
696                                  *   ~(red[10] ^ green[10] ^ blue[10]) & 1
697                                  */
698                         } else {
699                                 /* new style BGR:565 / RGB:565 */
700                                 if (sinfo->lcd_wiring_mode ==
701                                     ATMEL_LCDC_WIRING_RGB) {
702                                         val  = ((blue >> 11) & 0x001f);
703                                         val |= ((red  >>  0) & 0xf800);
704                                 } else {
705                                         val  = ((red  >> 11) & 0x001f);
706                                         val |= ((blue >>  0) & 0xf800);
707                                 }
708
709                                 val |= ((green >>  5) & 0x07e0);
710                         }
711
712                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
713                         ret = 0;
714                 }
715                 break;
716
717         case FB_VISUAL_MONO01:
718                 if (regno < 2) {
719                         val = (regno == 0) ? 0x00 : 0x1F;
720                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
721                         ret = 0;
722                 }
723                 break;
724
725         }
726
727         return ret;
728 }
729
730 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
731                                struct fb_info *info)
732 {
733         dev_dbg(info->device, "%s\n", __func__);
734
735         atmel_lcdfb_update_dma(info, var);
736
737         return 0;
738 }
739
740 static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info)
741 {
742         struct atmel_lcdfb_info *sinfo = info->par;
743
744         switch (blank_mode) {
745         case FB_BLANK_UNBLANK:
746         case FB_BLANK_NORMAL:
747                 atmel_lcdfb_start(sinfo);
748                 break;
749         case FB_BLANK_VSYNC_SUSPEND:
750         case FB_BLANK_HSYNC_SUSPEND:
751                 break;
752         case FB_BLANK_POWERDOWN:
753                 atmel_lcdfb_stop(sinfo);
754                 break;
755         default:
756                 return -EINVAL;
757         }
758
759         /* let fbcon do a soft blank for us */
760         return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
761 }
762
763 static struct fb_ops atmel_lcdfb_ops = {
764         .owner          = THIS_MODULE,
765         .fb_check_var   = atmel_lcdfb_check_var,
766         .fb_set_par     = atmel_lcdfb_set_par,
767         .fb_setcolreg   = atmel_lcdfb_setcolreg,
768         .fb_blank       = atmel_lcdfb_blank,
769         .fb_pan_display = atmel_lcdfb_pan_display,
770         .fb_fillrect    = cfb_fillrect,
771         .fb_copyarea    = cfb_copyarea,
772         .fb_imageblit   = cfb_imageblit,
773 };
774
775 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
776 {
777         struct fb_info *info = dev_id;
778         struct atmel_lcdfb_info *sinfo = info->par;
779         u32 status;
780
781         status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
782         if (status & ATMEL_LCDC_UFLWI) {
783                 dev_warn(info->device, "FIFO underflow %#x\n", status);
784                 /* reset DMA and FIFO to avoid screen shifting */
785                 schedule_work(&sinfo->task);
786         }
787         lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
788         return IRQ_HANDLED;
789 }
790
791 /*
792  * LCD controller task (to reset the LCD)
793  */
794 static void atmel_lcdfb_task(struct work_struct *work)
795 {
796         struct atmel_lcdfb_info *sinfo =
797                 container_of(work, struct atmel_lcdfb_info, task);
798
799         atmel_lcdfb_reset(sinfo);
800 }
801
802 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
803 {
804         struct fb_info *info = sinfo->info;
805         int ret = 0;
806
807         info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
808
809         dev_info(info->device,
810                "%luKiB frame buffer at %08lx (mapped at %p)\n",
811                (unsigned long)info->fix.smem_len / 1024,
812                (unsigned long)info->fix.smem_start,
813                info->screen_base);
814
815         /* Allocate colormap */
816         ret = fb_alloc_cmap(&info->cmap, 256, 0);
817         if (ret < 0)
818                 dev_err(info->device, "Alloc color map failed\n");
819
820         return ret;
821 }
822
823 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
824 {
825         if (sinfo->bus_clk)
826                 clk_enable(sinfo->bus_clk);
827         clk_enable(sinfo->lcdc_clk);
828 }
829
830 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
831 {
832         if (sinfo->bus_clk)
833                 clk_disable(sinfo->bus_clk);
834         clk_disable(sinfo->lcdc_clk);
835 }
836
837
838 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
839 {
840         struct device *dev = &pdev->dev;
841         struct fb_info *info;
842         struct atmel_lcdfb_info *sinfo;
843         struct atmel_lcdfb_info *pdata_sinfo;
844         struct fb_videomode fbmode;
845         struct resource *regs = NULL;
846         struct resource *map = NULL;
847         int ret;
848
849         dev_dbg(dev, "%s BEGIN\n", __func__);
850
851         ret = -ENOMEM;
852         info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
853         if (!info) {
854                 dev_err(dev, "cannot allocate memory\n");
855                 goto out;
856         }
857
858         sinfo = info->par;
859
860         if (dev->platform_data) {
861                 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
862                 sinfo->default_bpp = pdata_sinfo->default_bpp;
863                 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
864                 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
865                 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
866                 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
867                 sinfo->guard_time = pdata_sinfo->guard_time;
868                 sinfo->smem_len = pdata_sinfo->smem_len;
869                 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
870                 sinfo->lcdcon_pol_negative = pdata_sinfo->lcdcon_pol_negative;
871                 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
872         } else {
873                 dev_err(dev, "cannot get default configuration\n");
874                 goto free_info;
875         }
876         sinfo->info = info;
877         sinfo->pdev = pdev;
878
879         strcpy(info->fix.id, sinfo->pdev->name);
880         info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
881         info->pseudo_palette = sinfo->pseudo_palette;
882         info->fbops = &atmel_lcdfb_ops;
883
884         memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
885         info->fix = atmel_lcdfb_fix;
886
887         /* Enable LCDC Clocks */
888         if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()
889          || cpu_is_at32ap7000()) {
890                 sinfo->bus_clk = clk_get(dev, "hck1");
891                 if (IS_ERR(sinfo->bus_clk)) {
892                         ret = PTR_ERR(sinfo->bus_clk);
893                         goto free_info;
894                 }
895         }
896         sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
897         if (IS_ERR(sinfo->lcdc_clk)) {
898                 ret = PTR_ERR(sinfo->lcdc_clk);
899                 goto put_bus_clk;
900         }
901         atmel_lcdfb_start_clock(sinfo);
902
903         ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
904                         info->monspecs.modedb_len, info->monspecs.modedb,
905                         sinfo->default_bpp);
906         if (!ret) {
907                 dev_err(dev, "no suitable video mode found\n");
908                 goto stop_clk;
909         }
910
911
912         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
913         if (!regs) {
914                 dev_err(dev, "resources unusable\n");
915                 ret = -ENXIO;
916                 goto stop_clk;
917         }
918
919         sinfo->irq_base = platform_get_irq(pdev, 0);
920         if (sinfo->irq_base < 0) {
921                 dev_err(dev, "unable to get irq\n");
922                 ret = sinfo->irq_base;
923                 goto stop_clk;
924         }
925
926         /* Initialize video memory */
927         map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
928         if (map) {
929                 /* use a pre-allocated memory buffer */
930                 info->fix.smem_start = map->start;
931                 info->fix.smem_len = resource_size(map);
932                 if (!request_mem_region(info->fix.smem_start,
933                                         info->fix.smem_len, pdev->name)) {
934                         ret = -EBUSY;
935                         goto stop_clk;
936                 }
937
938                 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
939                 if (!info->screen_base)
940                         goto release_intmem;
941
942                 /*
943                  * Don't clear the framebuffer -- someone may have set
944                  * up a splash image.
945                  */
946         } else {
947                 /* alocate memory buffer */
948                 ret = atmel_lcdfb_alloc_video_memory(sinfo);
949                 if (ret < 0) {
950                         dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
951                         goto stop_clk;
952                 }
953         }
954
955         /* LCDC registers */
956         info->fix.mmio_start = regs->start;
957         info->fix.mmio_len = resource_size(regs);
958
959         if (!request_mem_region(info->fix.mmio_start,
960                                 info->fix.mmio_len, pdev->name)) {
961                 ret = -EBUSY;
962                 goto free_fb;
963         }
964
965         sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
966         if (!sinfo->mmio) {
967                 dev_err(dev, "cannot map LCDC registers\n");
968                 goto release_mem;
969         }
970
971         /* Initialize PWM for contrast or backlight ("off") */
972         init_contrast(sinfo);
973
974         /* interrupt */
975         ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
976         if (ret) {
977                 dev_err(dev, "request_irq failed: %d\n", ret);
978                 goto unmap_mmio;
979         }
980
981         /* Some operations on the LCDC might sleep and
982          * require a preemptible task context */
983         INIT_WORK(&sinfo->task, atmel_lcdfb_task);
984
985         ret = atmel_lcdfb_init_fbinfo(sinfo);
986         if (ret < 0) {
987                 dev_err(dev, "init fbinfo failed: %d\n", ret);
988                 goto unregister_irqs;
989         }
990
991         /*
992          * This makes sure that our colour bitfield
993          * descriptors are correctly initialised.
994          */
995         atmel_lcdfb_check_var(&info->var, info);
996
997         ret = fb_set_var(info, &info->var);
998         if (ret) {
999                 dev_warn(dev, "unable to set display parameters\n");
1000                 goto free_cmap;
1001         }
1002
1003         dev_set_drvdata(dev, info);
1004
1005         /*
1006          * Tell the world that we're ready to go
1007          */
1008         ret = register_framebuffer(info);
1009         if (ret < 0) {
1010                 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
1011                 goto reset_drvdata;
1012         }
1013
1014         /* add selected videomode to modelist */
1015         fb_var_to_videomode(&fbmode, &info->var);
1016         fb_add_videomode(&fbmode, &info->modelist);
1017
1018         /* Power up the LCDC screen */
1019         if (sinfo->atmel_lcdfb_power_control)
1020                 sinfo->atmel_lcdfb_power_control(1);
1021
1022         dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
1023                        info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
1024
1025         return 0;
1026
1027 reset_drvdata:
1028         dev_set_drvdata(dev, NULL);
1029 free_cmap:
1030         fb_dealloc_cmap(&info->cmap);
1031 unregister_irqs:
1032         cancel_work_sync(&sinfo->task);
1033         free_irq(sinfo->irq_base, info);
1034 unmap_mmio:
1035         exit_backlight(sinfo);
1036         iounmap(sinfo->mmio);
1037 release_mem:
1038         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1039 free_fb:
1040         if (map)
1041                 iounmap(info->screen_base);
1042         else
1043                 atmel_lcdfb_free_video_memory(sinfo);
1044
1045 release_intmem:
1046         if (map)
1047                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1048 stop_clk:
1049         atmel_lcdfb_stop_clock(sinfo);
1050         clk_put(sinfo->lcdc_clk);
1051 put_bus_clk:
1052         if (sinfo->bus_clk)
1053                 clk_put(sinfo->bus_clk);
1054 free_info:
1055         framebuffer_release(info);
1056 out:
1057         dev_dbg(dev, "%s FAILED\n", __func__);
1058         return ret;
1059 }
1060
1061 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
1062 {
1063         struct device *dev = &pdev->dev;
1064         struct fb_info *info = dev_get_drvdata(dev);
1065         struct atmel_lcdfb_info *sinfo;
1066
1067         if (!info || !info->par)
1068                 return 0;
1069         sinfo = info->par;
1070
1071         cancel_work_sync(&sinfo->task);
1072         exit_backlight(sinfo);
1073         if (sinfo->atmel_lcdfb_power_control)
1074                 sinfo->atmel_lcdfb_power_control(0);
1075         unregister_framebuffer(info);
1076         atmel_lcdfb_stop_clock(sinfo);
1077         clk_put(sinfo->lcdc_clk);
1078         if (sinfo->bus_clk)
1079                 clk_put(sinfo->bus_clk);
1080         fb_dealloc_cmap(&info->cmap);
1081         free_irq(sinfo->irq_base, info);
1082         iounmap(sinfo->mmio);
1083         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1084         if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1085                 iounmap(info->screen_base);
1086                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1087         } else {
1088                 atmel_lcdfb_free_video_memory(sinfo);
1089         }
1090
1091         dev_set_drvdata(dev, NULL);
1092         framebuffer_release(info);
1093
1094         return 0;
1095 }
1096
1097 #ifdef CONFIG_PM
1098
1099 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1100 {
1101         struct fb_info *info = platform_get_drvdata(pdev);
1102         struct atmel_lcdfb_info *sinfo = info->par;
1103
1104         /*
1105          * We don't want to handle interrupts while the clock is
1106          * stopped. It may take forever.
1107          */
1108         lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
1109
1110         sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
1111         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1112         if (sinfo->atmel_lcdfb_power_control)
1113                 sinfo->atmel_lcdfb_power_control(0);
1114
1115         atmel_lcdfb_stop(sinfo);
1116         atmel_lcdfb_stop_clock(sinfo);
1117
1118         return 0;
1119 }
1120
1121 static int atmel_lcdfb_resume(struct platform_device *pdev)
1122 {
1123         struct fb_info *info = platform_get_drvdata(pdev);
1124         struct atmel_lcdfb_info *sinfo = info->par;
1125
1126         atmel_lcdfb_start_clock(sinfo);
1127         atmel_lcdfb_start(sinfo);
1128         if (sinfo->atmel_lcdfb_power_control)
1129                 sinfo->atmel_lcdfb_power_control(1);
1130         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1131
1132         /* Enable FIFO & DMA errors */
1133         lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
1134                         | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
1135
1136         return 0;
1137 }
1138
1139 #else
1140 #define atmel_lcdfb_suspend     NULL
1141 #define atmel_lcdfb_resume      NULL
1142 #endif
1143
1144 static struct platform_driver atmel_lcdfb_driver = {
1145         .remove         = __exit_p(atmel_lcdfb_remove),
1146         .suspend        = atmel_lcdfb_suspend,
1147         .resume         = atmel_lcdfb_resume,
1148
1149         .driver         = {
1150                 .name   = "atmel_lcdfb",
1151                 .owner  = THIS_MODULE,
1152         },
1153 };
1154
1155 static int __init atmel_lcdfb_init(void)
1156 {
1157         return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
1158 }
1159
1160 static void __exit atmel_lcdfb_exit(void)
1161 {
1162         platform_driver_unregister(&atmel_lcdfb_driver);
1163 }
1164
1165 module_init(atmel_lcdfb_init);
1166 module_exit(atmel_lcdfb_exit);
1167
1168 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1169 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1170 MODULE_LICENSE("GPL");