5a24c6411d3486baee17ed6d79d1bfdb4764a2aa
[linux-2.6.git] / drivers / video / atmel_lcdfb.c
1 /*
2  *  Driver for AT91/AT32 LCD Controller
3  *
4  *  Copyright (C) 2007 Atmel Corporation
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License.  See the file COPYING in the main directory of this archive for
8  * more details.
9  */
10
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
16 #include <linux/fb.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20
21 #include <mach/board.h>
22 #include <mach/cpu.h>
23 #include <mach/gpio.h>
24
25 #include <video/atmel_lcdc.h>
26
27 #define lcdc_readl(sinfo, reg)          __raw_readl((sinfo)->mmio+(reg))
28 #define lcdc_writel(sinfo, reg, val)    __raw_writel((val), (sinfo)->mmio+(reg))
29
30 /* configurable parameters */
31 #define ATMEL_LCDC_CVAL_DEFAULT         0xc8
32 #define ATMEL_LCDC_DMA_BURST_LEN        8
33
34 #if defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91CAP9) || \
35         defined(CONFIG_ARCH_AT91SAM9RL)
36 #define ATMEL_LCDC_FIFO_SIZE            2048
37 #else
38 #define ATMEL_LCDC_FIFO_SIZE            512
39 #endif
40
41 #if defined(CONFIG_ARCH_AT91)
42 #define ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
43                                          | FBINFO_PARTIAL_PAN_OK \
44                                          | FBINFO_HWACCEL_YPAN)
45
46 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
47                                         struct fb_var_screeninfo *var)
48 {
49
50 }
51 #elif defined(CONFIG_AVR32)
52 #define ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
53                                         | FBINFO_PARTIAL_PAN_OK \
54                                         | FBINFO_HWACCEL_XPAN \
55                                         | FBINFO_HWACCEL_YPAN)
56
57 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
58                                      struct fb_var_screeninfo *var)
59 {
60         u32 dma2dcfg;
61         u32 pixeloff;
62
63         pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
64
65         dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
66         dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
67         lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
68
69         /* Update configuration */
70         lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
71                     lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
72                     | ATMEL_LCDC_DMAUPDT);
73 }
74 #endif
75
76 static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
77                 | ATMEL_LCDC_POL_POSITIVE
78                 | ATMEL_LCDC_ENA_PWMENABLE;
79
80 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
81
82 /* some bl->props field just changed */
83 static int atmel_bl_update_status(struct backlight_device *bl)
84 {
85         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
86         int                     power = sinfo->bl_power;
87         int                     brightness = bl->props.brightness;
88
89         /* REVISIT there may be a meaningful difference between
90          * fb_blank and power ... there seem to be some cases
91          * this doesn't handle correctly.
92          */
93         if (bl->props.fb_blank != sinfo->bl_power)
94                 power = bl->props.fb_blank;
95         else if (bl->props.power != sinfo->bl_power)
96                 power = bl->props.power;
97
98         if (brightness < 0 && power == FB_BLANK_UNBLANK)
99                 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
100         else if (power != FB_BLANK_UNBLANK)
101                 brightness = 0;
102
103         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
104         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
105                         brightness ? contrast_ctr : 0);
106
107         bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
108
109         return 0;
110 }
111
112 static int atmel_bl_get_brightness(struct backlight_device *bl)
113 {
114         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
115
116         return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
117 }
118
119 static struct backlight_ops atmel_lcdc_bl_ops = {
120         .update_status = atmel_bl_update_status,
121         .get_brightness = atmel_bl_get_brightness,
122 };
123
124 static void init_backlight(struct atmel_lcdfb_info *sinfo)
125 {
126         struct backlight_device *bl;
127
128         sinfo->bl_power = FB_BLANK_UNBLANK;
129
130         if (sinfo->backlight)
131                 return;
132
133         bl = backlight_device_register("backlight", &sinfo->pdev->dev,
134                         sinfo, &atmel_lcdc_bl_ops);
135         if (IS_ERR(sinfo->backlight)) {
136                 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
137                                 PTR_ERR(bl));
138                 return;
139         }
140         sinfo->backlight = bl;
141
142         bl->props.power = FB_BLANK_UNBLANK;
143         bl->props.fb_blank = FB_BLANK_UNBLANK;
144         bl->props.max_brightness = 0xff;
145         bl->props.brightness = atmel_bl_get_brightness(bl);
146 }
147
148 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
149 {
150         if (sinfo->backlight)
151                 backlight_device_unregister(sinfo->backlight);
152 }
153
154 #else
155
156 static void init_backlight(struct atmel_lcdfb_info *sinfo)
157 {
158         dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
159 }
160
161 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
162 {
163 }
164
165 #endif
166
167 static void init_contrast(struct atmel_lcdfb_info *sinfo)
168 {
169         /* have some default contrast/backlight settings */
170         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
171         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
172
173         if (sinfo->lcdcon_is_backlight)
174                 init_backlight(sinfo);
175 }
176
177
178 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
179         .type           = FB_TYPE_PACKED_PIXELS,
180         .visual         = FB_VISUAL_TRUECOLOR,
181         .xpanstep       = 0,
182         .ypanstep       = 1,
183         .ywrapstep      = 0,
184         .accel          = FB_ACCEL_NONE,
185 };
186
187 static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
188 {
189         unsigned long value;
190
191         if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
192                 return xres;
193
194         value = xres;
195         if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
196                 /* STN display */
197                 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
198                         value *= 3;
199                 }
200                 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
201                    || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
202                       && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
203                         value = DIV_ROUND_UP(value, 4);
204                 else
205                         value = DIV_ROUND_UP(value, 8);
206         }
207
208         return value;
209 }
210
211 static void atmel_lcdfb_update_dma(struct fb_info *info,
212                                struct fb_var_screeninfo *var)
213 {
214         struct atmel_lcdfb_info *sinfo = info->par;
215         struct fb_fix_screeninfo *fix = &info->fix;
216         unsigned long dma_addr;
217
218         dma_addr = (fix->smem_start + var->yoffset * fix->line_length
219                     + var->xoffset * var->bits_per_pixel / 8);
220
221         dma_addr &= ~3UL;
222
223         /* Set framebuffer DMA base address and pixel offset */
224         lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
225
226         atmel_lcdfb_update_dma2d(sinfo, var);
227 }
228
229 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
230 {
231         struct fb_info *info = sinfo->info;
232
233         dma_free_writecombine(info->device, info->fix.smem_len,
234                                 info->screen_base, info->fix.smem_start);
235 }
236
237 /**
238  *      atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
239  *      @sinfo: the frame buffer to allocate memory for
240  */
241 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
242 {
243         struct fb_info *info = sinfo->info;
244         struct fb_var_screeninfo *var = &info->var;
245         unsigned int smem_len;
246
247         smem_len = (var->xres_virtual * var->yres_virtual
248                     * ((var->bits_per_pixel + 7) / 8));
249         info->fix.smem_len = max(smem_len, sinfo->smem_len);
250
251         info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
252                                         (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
253
254         if (!info->screen_base) {
255                 return -ENOMEM;
256         }
257
258         memset(info->screen_base, 0, info->fix.smem_len);
259
260         return 0;
261 }
262
263 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
264                                                      struct fb_info *info)
265 {
266         struct fb_videomode varfbmode;
267         const struct fb_videomode *fbmode = NULL;
268
269         fb_var_to_videomode(&varfbmode, var);
270         fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
271         if (fbmode)
272                 fb_videomode_to_var(var, fbmode);
273         return fbmode;
274 }
275
276
277 /**
278  *      atmel_lcdfb_check_var - Validates a var passed in.
279  *      @var: frame buffer variable screen structure
280  *      @info: frame buffer structure that represents a single frame buffer
281  *
282  *      Checks to see if the hardware supports the state requested by
283  *      var passed in. This function does not alter the hardware
284  *      state!!!  This means the data stored in struct fb_info and
285  *      struct atmel_lcdfb_info do not change. This includes the var
286  *      inside of struct fb_info.  Do NOT change these. This function
287  *      can be called on its own if we intent to only test a mode and
288  *      not actually set it. The stuff in modedb.c is a example of
289  *      this. If the var passed in is slightly off by what the
290  *      hardware can support then we alter the var PASSED in to what
291  *      we can do. If the hardware doesn't support mode change a
292  *      -EINVAL will be returned by the upper layers. You don't need
293  *      to implement this function then. If you hardware doesn't
294  *      support changing the resolution then this function is not
295  *      needed. In this case the driver would just provide a var that
296  *      represents the static state the screen is in.
297  *
298  *      Returns negative errno on error, or zero on success.
299  */
300 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
301                              struct fb_info *info)
302 {
303         struct device *dev = info->device;
304         struct atmel_lcdfb_info *sinfo = info->par;
305         unsigned long clk_value_khz;
306
307         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
308
309         dev_dbg(dev, "%s:\n", __func__);
310
311         if (!(var->pixclock && var->bits_per_pixel)) {
312                 /* choose a suitable mode if possible */
313                 if (!atmel_lcdfb_choose_mode(var, info)) {
314                         dev_err(dev, "needed value not specified\n");
315                         return -EINVAL;
316                 }
317         }
318
319         dev_dbg(dev, "  resolution: %ux%u\n", var->xres, var->yres);
320         dev_dbg(dev, "  pixclk:     %lu KHz\n", PICOS2KHZ(var->pixclock));
321         dev_dbg(dev, "  bpp:        %u\n", var->bits_per_pixel);
322         dev_dbg(dev, "  clk:        %lu KHz\n", clk_value_khz);
323
324         if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) {
325                 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
326                 return -EINVAL;
327         }
328
329         /* Do not allow to have real resoulution larger than virtual */
330         if (var->xres > var->xres_virtual)
331                 var->xres_virtual = var->xres;
332
333         if (var->yres > var->yres_virtual)
334                 var->yres_virtual = var->yres;
335
336         /* Force same alignment for each line */
337         var->xres = (var->xres + 3) & ~3UL;
338         var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
339
340         var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
341         var->transp.msb_right = 0;
342         var->transp.offset = var->transp.length = 0;
343         var->xoffset = var->yoffset = 0;
344
345         /* Saturate vertical and horizontal timings at maximum values */
346         var->vsync_len = min_t(u32, var->vsync_len,
347                         (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
348         var->upper_margin = min_t(u32, var->upper_margin,
349                         ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
350         var->lower_margin = min_t(u32, var->lower_margin,
351                         ATMEL_LCDC_VFP);
352         var->right_margin = min_t(u32, var->right_margin,
353                         (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
354         var->hsync_len = min_t(u32, var->hsync_len,
355                         (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
356         var->left_margin = min_t(u32, var->left_margin,
357                         ATMEL_LCDC_HBP + 1);
358
359         /* Some parameters can't be zero */
360         var->vsync_len = max_t(u32, var->vsync_len, 1);
361         var->right_margin = max_t(u32, var->right_margin, 1);
362         var->hsync_len = max_t(u32, var->hsync_len, 1);
363         var->left_margin = max_t(u32, var->left_margin, 1);
364
365         switch (var->bits_per_pixel) {
366         case 1:
367         case 2:
368         case 4:
369         case 8:
370                 var->red.offset = var->green.offset = var->blue.offset = 0;
371                 var->red.length = var->green.length = var->blue.length
372                         = var->bits_per_pixel;
373                 break;
374         case 15:
375         case 16:
376                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
377                         /* RGB:565 mode */
378                         var->red.offset = 11;
379                         var->blue.offset = 0;
380                         var->green.length = 6;
381                 } else {
382                         /* BGR:555 mode */
383                         var->red.offset = 0;
384                         var->blue.offset = 10;
385                         var->green.length = 5;
386                 }
387                 var->green.offset = 5;
388                 var->red.length = var->blue.length = 5;
389                 break;
390         case 32:
391                 var->transp.offset = 24;
392                 var->transp.length = 8;
393                 /* fall through */
394         case 24:
395                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
396                         /* RGB:888 mode */
397                         var->red.offset = 16;
398                         var->blue.offset = 0;
399                 } else {
400                         /* BGR:888 mode */
401                         var->red.offset = 0;
402                         var->blue.offset = 16;
403                 }
404                 var->green.offset = 8;
405                 var->red.length = var->green.length = var->blue.length = 8;
406                 break;
407         default:
408                 dev_err(dev, "color depth %d not supported\n",
409                                         var->bits_per_pixel);
410                 return -EINVAL;
411         }
412
413         return 0;
414 }
415
416 /*
417  * LCD reset sequence
418  */
419 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
420 {
421         might_sleep();
422
423         /* LCD power off */
424         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
425
426         /* wait for the LCDC core to become idle */
427         while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
428                 msleep(10);
429
430         /* DMA disable */
431         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
432
433         /* wait for DMA engine to become idle */
434         while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
435                 msleep(10);
436
437         /* LCD power on */
438         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
439                 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
440
441         /* DMA enable */
442         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
443 }
444
445 /**
446  *      atmel_lcdfb_set_par - Alters the hardware state.
447  *      @info: frame buffer structure that represents a single frame buffer
448  *
449  *      Using the fb_var_screeninfo in fb_info we set the resolution
450  *      of the this particular framebuffer. This function alters the
451  *      par AND the fb_fix_screeninfo stored in fb_info. It doesn't
452  *      not alter var in fb_info since we are using that data. This
453  *      means we depend on the data in var inside fb_info to be
454  *      supported by the hardware.  atmel_lcdfb_check_var is always called
455  *      before atmel_lcdfb_set_par to ensure this.  Again if you can't
456  *      change the resolution you don't need this function.
457  *
458  */
459 static int atmel_lcdfb_set_par(struct fb_info *info)
460 {
461         struct atmel_lcdfb_info *sinfo = info->par;
462         unsigned long hozval_linesz;
463         unsigned long value;
464         unsigned long clk_value_khz;
465         unsigned long bits_per_line;
466
467         might_sleep();
468
469         dev_dbg(info->device, "%s:\n", __func__);
470         dev_dbg(info->device, "  * resolution: %ux%u (%ux%u virtual)\n",
471                  info->var.xres, info->var.yres,
472                  info->var.xres_virtual, info->var.yres_virtual);
473
474         /* Turn off the LCD controller and the DMA controller */
475         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
476
477         /* Wait for the LCDC core to become idle */
478         while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
479                 msleep(10);
480
481         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
482
483         if (info->var.bits_per_pixel == 1)
484                 info->fix.visual = FB_VISUAL_MONO01;
485         else if (info->var.bits_per_pixel <= 8)
486                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
487         else
488                 info->fix.visual = FB_VISUAL_TRUECOLOR;
489
490         bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
491         info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
492
493         /* Re-initialize the DMA engine... */
494         dev_dbg(info->device, "  * update DMA engine\n");
495         atmel_lcdfb_update_dma(info, &info->var);
496
497         /* ...set frame size and burst length = 8 words (?) */
498         value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
499         value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
500         lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
501
502         /* Now, the LCDC core... */
503
504         /* Set pixel clock */
505         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
506
507         value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
508
509         if (value < 2) {
510                 dev_notice(info->device, "Bypassing pixel clock divider\n");
511                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
512         } else {
513                 value = (value / 2) - 1;
514                 dev_dbg(info->device, "  * programming CLKVAL = 0x%08lx\n",
515                                 value);
516                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
517                                 value << ATMEL_LCDC_CLKVAL_OFFSET);
518                 info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
519                 dev_dbg(info->device, "  updated pixclk:     %lu KHz\n",
520                                         PICOS2KHZ(info->var.pixclock));
521         }
522
523
524         /* Initialize control register 2 */
525         value = sinfo->default_lcdcon2;
526
527         if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
528                 value |= ATMEL_LCDC_INVLINE_INVERTED;
529         if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
530                 value |= ATMEL_LCDC_INVFRAME_INVERTED;
531
532         switch (info->var.bits_per_pixel) {
533                 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
534                 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
535                 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
536                 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
537                 case 15: /* fall through */
538                 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
539                 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
540                 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
541                 default: BUG(); break;
542         }
543         dev_dbg(info->device, "  * LCDCON2 = %08lx\n", value);
544         lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
545
546         /* Vertical timing */
547         value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
548         value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
549         value |= info->var.lower_margin;
550         dev_dbg(info->device, "  * LCDTIM1 = %08lx\n", value);
551         lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
552
553         /* Horizontal timing */
554         value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
555         value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
556         value |= (info->var.left_margin - 1);
557         dev_dbg(info->device, "  * LCDTIM2 = %08lx\n", value);
558         lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
559
560         /* Horizontal value (aka line size) */
561         hozval_linesz = compute_hozval(info->var.xres,
562                                         lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
563
564         /* Display size */
565         value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
566         value |= info->var.yres - 1;
567         dev_dbg(info->device, "  * LCDFRMCFG = %08lx\n", value);
568         lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
569
570         /* FIFO Threshold: Use formula from data sheet */
571         value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
572         lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
573
574         /* Toggle LCD_MODE every frame */
575         lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
576
577         /* Disable all interrupts */
578         lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
579         /* Enable FIFO & DMA errors */
580         lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
581
582         /* ...wait for DMA engine to become idle... */
583         while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
584                 msleep(10);
585
586         dev_dbg(info->device, "  * re-enable DMA engine\n");
587         /* ...and enable it with updated configuration */
588         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
589
590         dev_dbg(info->device, "  * re-enable LCDC core\n");
591         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
592                 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
593
594         dev_dbg(info->device, "  * DONE\n");
595
596         return 0;
597 }
598
599 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
600 {
601         chan &= 0xffff;
602         chan >>= 16 - bf->length;
603         return chan << bf->offset;
604 }
605
606 /**
607  *      atmel_lcdfb_setcolreg - Optional function. Sets a color register.
608  *      @regno: Which register in the CLUT we are programming
609  *      @red: The red value which can be up to 16 bits wide
610  *      @green: The green value which can be up to 16 bits wide
611  *      @blue:  The blue value which can be up to 16 bits wide.
612  *      @transp: If supported the alpha value which can be up to 16 bits wide.
613  *      @info: frame buffer info structure
614  *
615  *      Set a single color register. The values supplied have a 16 bit
616  *      magnitude which needs to be scaled in this function for the hardware.
617  *      Things to take into consideration are how many color registers, if
618  *      any, are supported with the current color visual. With truecolor mode
619  *      no color palettes are supported. Here a psuedo palette is created
620  *      which we store the value in pseudo_palette in struct fb_info. For
621  *      pseudocolor mode we have a limited color palette. To deal with this
622  *      we can program what color is displayed for a particular pixel value.
623  *      DirectColor is similar in that we can program each color field. If
624  *      we have a static colormap we don't need to implement this function.
625  *
626  *      Returns negative errno on error, or zero on success. In an
627  *      ideal world, this would have been the case, but as it turns
628  *      out, the other drivers return 1 on failure, so that's what
629  *      we're going to do.
630  */
631 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
632                              unsigned int green, unsigned int blue,
633                              unsigned int transp, struct fb_info *info)
634 {
635         struct atmel_lcdfb_info *sinfo = info->par;
636         unsigned int val;
637         u32 *pal;
638         int ret = 1;
639
640         if (info->var.grayscale)
641                 red = green = blue = (19595 * red + 38470 * green
642                                       + 7471 * blue) >> 16;
643
644         switch (info->fix.visual) {
645         case FB_VISUAL_TRUECOLOR:
646                 if (regno < 16) {
647                         pal = info->pseudo_palette;
648
649                         val  = chan_to_field(red, &info->var.red);
650                         val |= chan_to_field(green, &info->var.green);
651                         val |= chan_to_field(blue, &info->var.blue);
652
653                         pal[regno] = val;
654                         ret = 0;
655                 }
656                 break;
657
658         case FB_VISUAL_PSEUDOCOLOR:
659                 if (regno < 256) {
660                         val  = ((red   >> 11) & 0x001f);
661                         val |= ((green >>  6) & 0x03e0);
662                         val |= ((blue  >>  1) & 0x7c00);
663
664                         /*
665                          * TODO: intensity bit. Maybe something like
666                          *   ~(red[10] ^ green[10] ^ blue[10]) & 1
667                          */
668
669                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
670                         ret = 0;
671                 }
672                 break;
673
674         case FB_VISUAL_MONO01:
675                 if (regno < 2) {
676                         val = (regno == 0) ? 0x00 : 0x1F;
677                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
678                         ret = 0;
679                 }
680                 break;
681
682         }
683
684         return ret;
685 }
686
687 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
688                                struct fb_info *info)
689 {
690         dev_dbg(info->device, "%s\n", __func__);
691
692         atmel_lcdfb_update_dma(info, var);
693
694         return 0;
695 }
696
697 static struct fb_ops atmel_lcdfb_ops = {
698         .owner          = THIS_MODULE,
699         .fb_check_var   = atmel_lcdfb_check_var,
700         .fb_set_par     = atmel_lcdfb_set_par,
701         .fb_setcolreg   = atmel_lcdfb_setcolreg,
702         .fb_pan_display = atmel_lcdfb_pan_display,
703         .fb_fillrect    = cfb_fillrect,
704         .fb_copyarea    = cfb_copyarea,
705         .fb_imageblit   = cfb_imageblit,
706 };
707
708 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
709 {
710         struct fb_info *info = dev_id;
711         struct atmel_lcdfb_info *sinfo = info->par;
712         u32 status;
713
714         status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
715         if (status & ATMEL_LCDC_UFLWI) {
716                 dev_warn(info->device, "FIFO underflow %#x\n", status);
717                 /* reset DMA and FIFO to avoid screen shifting */
718                 schedule_work(&sinfo->task);
719         }
720         lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
721         return IRQ_HANDLED;
722 }
723
724 /*
725  * LCD controller task (to reset the LCD)
726  */
727 static void atmel_lcdfb_task(struct work_struct *work)
728 {
729         struct atmel_lcdfb_info *sinfo =
730                 container_of(work, struct atmel_lcdfb_info, task);
731
732         atmel_lcdfb_reset(sinfo);
733 }
734
735 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
736 {
737         struct fb_info *info = sinfo->info;
738         int ret = 0;
739
740         info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
741
742         dev_info(info->device,
743                "%luKiB frame buffer at %08lx (mapped at %p)\n",
744                (unsigned long)info->fix.smem_len / 1024,
745                (unsigned long)info->fix.smem_start,
746                info->screen_base);
747
748         /* Allocate colormap */
749         ret = fb_alloc_cmap(&info->cmap, 256, 0);
750         if (ret < 0)
751                 dev_err(info->device, "Alloc color map failed\n");
752
753         return ret;
754 }
755
756 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
757 {
758         if (sinfo->bus_clk)
759                 clk_enable(sinfo->bus_clk);
760         clk_enable(sinfo->lcdc_clk);
761 }
762
763 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
764 {
765         if (sinfo->bus_clk)
766                 clk_disable(sinfo->bus_clk);
767         clk_disable(sinfo->lcdc_clk);
768 }
769
770
771 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
772 {
773         struct device *dev = &pdev->dev;
774         struct fb_info *info;
775         struct atmel_lcdfb_info *sinfo;
776         struct atmel_lcdfb_info *pdata_sinfo;
777         struct fb_videomode fbmode;
778         struct resource *regs = NULL;
779         struct resource *map = NULL;
780         int ret;
781
782         dev_dbg(dev, "%s BEGIN\n", __func__);
783
784         ret = -ENOMEM;
785         info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
786         if (!info) {
787                 dev_err(dev, "cannot allocate memory\n");
788                 goto out;
789         }
790
791         sinfo = info->par;
792
793         if (dev->platform_data) {
794                 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
795                 sinfo->default_bpp = pdata_sinfo->default_bpp;
796                 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
797                 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
798                 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
799                 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
800                 sinfo->guard_time = pdata_sinfo->guard_time;
801                 sinfo->smem_len = pdata_sinfo->smem_len;
802                 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
803                 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
804         } else {
805                 dev_err(dev, "cannot get default configuration\n");
806                 goto free_info;
807         }
808         sinfo->info = info;
809         sinfo->pdev = pdev;
810
811         strcpy(info->fix.id, sinfo->pdev->name);
812         info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
813         info->pseudo_palette = sinfo->pseudo_palette;
814         info->fbops = &atmel_lcdfb_ops;
815
816         memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
817         info->fix = atmel_lcdfb_fix;
818
819         /* Enable LCDC Clocks */
820         if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
821                 sinfo->bus_clk = clk_get(dev, "hck1");
822                 if (IS_ERR(sinfo->bus_clk)) {
823                         ret = PTR_ERR(sinfo->bus_clk);
824                         goto free_info;
825                 }
826         }
827         sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
828         if (IS_ERR(sinfo->lcdc_clk)) {
829                 ret = PTR_ERR(sinfo->lcdc_clk);
830                 goto put_bus_clk;
831         }
832         atmel_lcdfb_start_clock(sinfo);
833
834         ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
835                         info->monspecs.modedb_len, info->monspecs.modedb,
836                         sinfo->default_bpp);
837         if (!ret) {
838                 dev_err(dev, "no suitable video mode found\n");
839                 goto stop_clk;
840         }
841
842
843         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
844         if (!regs) {
845                 dev_err(dev, "resources unusable\n");
846                 ret = -ENXIO;
847                 goto stop_clk;
848         }
849
850         sinfo->irq_base = platform_get_irq(pdev, 0);
851         if (sinfo->irq_base < 0) {
852                 dev_err(dev, "unable to get irq\n");
853                 ret = sinfo->irq_base;
854                 goto stop_clk;
855         }
856
857         /* Initialize video memory */
858         map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
859         if (map) {
860                 /* use a pre-allocated memory buffer */
861                 info->fix.smem_start = map->start;
862                 info->fix.smem_len = map->end - map->start + 1;
863                 if (!request_mem_region(info->fix.smem_start,
864                                         info->fix.smem_len, pdev->name)) {
865                         ret = -EBUSY;
866                         goto stop_clk;
867                 }
868
869                 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
870                 if (!info->screen_base)
871                         goto release_intmem;
872
873                 /*
874                  * Don't clear the framebuffer -- someone may have set
875                  * up a splash image.
876                  */
877         } else {
878                 /* alocate memory buffer */
879                 ret = atmel_lcdfb_alloc_video_memory(sinfo);
880                 if (ret < 0) {
881                         dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
882                         goto stop_clk;
883                 }
884         }
885
886         /* LCDC registers */
887         info->fix.mmio_start = regs->start;
888         info->fix.mmio_len = regs->end - regs->start + 1;
889
890         if (!request_mem_region(info->fix.mmio_start,
891                                 info->fix.mmio_len, pdev->name)) {
892                 ret = -EBUSY;
893                 goto free_fb;
894         }
895
896         sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
897         if (!sinfo->mmio) {
898                 dev_err(dev, "cannot map LCDC registers\n");
899                 goto release_mem;
900         }
901
902         /* Initialize PWM for contrast or backlight ("off") */
903         init_contrast(sinfo);
904
905         /* interrupt */
906         ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
907         if (ret) {
908                 dev_err(dev, "request_irq failed: %d\n", ret);
909                 goto unmap_mmio;
910         }
911
912         /* Some operations on the LCDC might sleep and
913          * require a preemptible task context */
914         INIT_WORK(&sinfo->task, atmel_lcdfb_task);
915
916         ret = atmel_lcdfb_init_fbinfo(sinfo);
917         if (ret < 0) {
918                 dev_err(dev, "init fbinfo failed: %d\n", ret);
919                 goto unregister_irqs;
920         }
921
922         /*
923          * This makes sure that our colour bitfield
924          * descriptors are correctly initialised.
925          */
926         atmel_lcdfb_check_var(&info->var, info);
927
928         ret = fb_set_var(info, &info->var);
929         if (ret) {
930                 dev_warn(dev, "unable to set display parameters\n");
931                 goto free_cmap;
932         }
933
934         dev_set_drvdata(dev, info);
935
936         /*
937          * Tell the world that we're ready to go
938          */
939         ret = register_framebuffer(info);
940         if (ret < 0) {
941                 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
942                 goto reset_drvdata;
943         }
944
945         /* add selected videomode to modelist */
946         fb_var_to_videomode(&fbmode, &info->var);
947         fb_add_videomode(&fbmode, &info->modelist);
948
949         /* Power up the LCDC screen */
950         if (sinfo->atmel_lcdfb_power_control)
951                 sinfo->atmel_lcdfb_power_control(1);
952
953         dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
954                        info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
955
956         return 0;
957
958 reset_drvdata:
959         dev_set_drvdata(dev, NULL);
960 free_cmap:
961         fb_dealloc_cmap(&info->cmap);
962 unregister_irqs:
963         cancel_work_sync(&sinfo->task);
964         free_irq(sinfo->irq_base, info);
965 unmap_mmio:
966         exit_backlight(sinfo);
967         iounmap(sinfo->mmio);
968 release_mem:
969         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
970 free_fb:
971         if (map)
972                 iounmap(info->screen_base);
973         else
974                 atmel_lcdfb_free_video_memory(sinfo);
975
976 release_intmem:
977         if (map)
978                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
979 stop_clk:
980         atmel_lcdfb_stop_clock(sinfo);
981         clk_put(sinfo->lcdc_clk);
982 put_bus_clk:
983         if (sinfo->bus_clk)
984                 clk_put(sinfo->bus_clk);
985 free_info:
986         framebuffer_release(info);
987 out:
988         dev_dbg(dev, "%s FAILED\n", __func__);
989         return ret;
990 }
991
992 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
993 {
994         struct device *dev = &pdev->dev;
995         struct fb_info *info = dev_get_drvdata(dev);
996         struct atmel_lcdfb_info *sinfo;
997
998         if (!info || !info->par)
999                 return 0;
1000         sinfo = info->par;
1001
1002         cancel_work_sync(&sinfo->task);
1003         exit_backlight(sinfo);
1004         if (sinfo->atmel_lcdfb_power_control)
1005                 sinfo->atmel_lcdfb_power_control(0);
1006         unregister_framebuffer(info);
1007         atmel_lcdfb_stop_clock(sinfo);
1008         clk_put(sinfo->lcdc_clk);
1009         if (sinfo->bus_clk)
1010                 clk_put(sinfo->bus_clk);
1011         fb_dealloc_cmap(&info->cmap);
1012         free_irq(sinfo->irq_base, info);
1013         iounmap(sinfo->mmio);
1014         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1015         if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1016                 iounmap(info->screen_base);
1017                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1018         } else {
1019                 atmel_lcdfb_free_video_memory(sinfo);
1020         }
1021
1022         dev_set_drvdata(dev, NULL);
1023         framebuffer_release(info);
1024
1025         return 0;
1026 }
1027
1028 #ifdef CONFIG_PM
1029
1030 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1031 {
1032         struct fb_info *info = platform_get_drvdata(pdev);
1033         struct atmel_lcdfb_info *sinfo = info->par;
1034
1035         sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
1036         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1037         if (sinfo->atmel_lcdfb_power_control)
1038                 sinfo->atmel_lcdfb_power_control(0);
1039         atmel_lcdfb_stop_clock(sinfo);
1040         return 0;
1041 }
1042
1043 static int atmel_lcdfb_resume(struct platform_device *pdev)
1044 {
1045         struct fb_info *info = platform_get_drvdata(pdev);
1046         struct atmel_lcdfb_info *sinfo = info->par;
1047
1048         atmel_lcdfb_start_clock(sinfo);
1049         if (sinfo->atmel_lcdfb_power_control)
1050                 sinfo->atmel_lcdfb_power_control(1);
1051         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1052         return 0;
1053 }
1054
1055 #else
1056 #define atmel_lcdfb_suspend     NULL
1057 #define atmel_lcdfb_resume      NULL
1058 #endif
1059
1060 static struct platform_driver atmel_lcdfb_driver = {
1061         .remove         = __exit_p(atmel_lcdfb_remove),
1062         .suspend        = atmel_lcdfb_suspend,
1063         .resume         = atmel_lcdfb_resume,
1064
1065         .driver         = {
1066                 .name   = "atmel_lcdfb",
1067                 .owner  = THIS_MODULE,
1068         },
1069 };
1070
1071 static int __init atmel_lcdfb_init(void)
1072 {
1073         return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
1074 }
1075
1076 static void __exit atmel_lcdfb_exit(void)
1077 {
1078         platform_driver_unregister(&atmel_lcdfb_driver);
1079 }
1080
1081 module_init(atmel_lcdfb_init);
1082 module_exit(atmel_lcdfb_exit);
1083
1084 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1085 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1086 MODULE_LICENSE("GPL");