fb8163d181abbb5383535b37e1b85a26367d5432
[linux-2.6.git] / drivers / video / amba-clcd.c
1 /*
2  *  linux/drivers/video/amba-clcd.c
3  *
4  * Copyright (C) 2001 ARM Limited, by David A Rusling
5  * Updated to 2.5, Deep Blue Solutions Ltd.
6  *
7  * This file is subject to the terms and conditions of the GNU General Public
8  * License.  See the file COPYING in the main directory of this archive
9  * for more details.
10  *
11  *  ARM PrimeCell PL110 Color LCD Controller
12  */
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/errno.h>
16 #include <linux/string.h>
17 #include <linux/slab.h>
18 #include <linux/delay.h>
19 #include <linux/mm.h>
20 #include <linux/fb.h>
21 #include <linux/init.h>
22 #include <linux/ioport.h>
23 #include <linux/list.h>
24 #include <linux/amba/bus.h>
25 #include <linux/amba/clcd.h>
26 #include <linux/clk.h>
27 #include <linux/hardirq.h>
28
29 #include <asm/sizes.h>
30
31 #define to_clcd(info)   container_of(info, struct clcd_fb, fb)
32
33 /* This is limited to 16 characters when displayed by X startup */
34 static const char *clcd_name = "CLCD FB";
35
36 /*
37  * Unfortunately, the enable/disable functions may be called either from
38  * process or IRQ context, and we _need_ to delay.  This is _not_ good.
39  */
40 static inline void clcdfb_sleep(unsigned int ms)
41 {
42         if (in_atomic()) {
43                 mdelay(ms);
44         } else {
45                 msleep(ms);
46         }
47 }
48
49 static inline void clcdfb_set_start(struct clcd_fb *fb)
50 {
51         unsigned long ustart = fb->fb.fix.smem_start;
52         unsigned long lstart;
53
54         ustart += fb->fb.var.yoffset * fb->fb.fix.line_length;
55         lstart = ustart + fb->fb.var.yres * fb->fb.fix.line_length / 2;
56
57         writel(ustart, fb->regs + CLCD_UBAS);
58         writel(lstart, fb->regs + CLCD_LBAS);
59 }
60
61 static void clcdfb_disable(struct clcd_fb *fb)
62 {
63         u32 val;
64
65         if (fb->board->disable)
66                 fb->board->disable(fb);
67
68         val = readl(fb->regs + CLCD_CNTL);
69         if (val & CNTL_LCDPWR) {
70                 val &= ~CNTL_LCDPWR;
71                 writel(val, fb->regs + CLCD_CNTL);
72
73                 clcdfb_sleep(20);
74         }
75         if (val & CNTL_LCDEN) {
76                 val &= ~CNTL_LCDEN;
77                 writel(val, fb->regs + CLCD_CNTL);
78         }
79
80         /*
81          * Disable CLCD clock source.
82          */
83         clk_disable(fb->clk);
84 }
85
86 static void clcdfb_enable(struct clcd_fb *fb, u32 cntl)
87 {
88         /*
89          * Enable the CLCD clock source.
90          */
91         clk_enable(fb->clk);
92
93         /*
94          * Bring up by first enabling..
95          */
96         cntl |= CNTL_LCDEN;
97         writel(cntl, fb->regs + CLCD_CNTL);
98
99         clcdfb_sleep(20);
100
101         /*
102          * and now apply power.
103          */
104         cntl |= CNTL_LCDPWR;
105         writel(cntl, fb->regs + CLCD_CNTL);
106
107         /*
108          * finally, enable the interface.
109          */
110         if (fb->board->enable)
111                 fb->board->enable(fb);
112 }
113
114 static int
115 clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var)
116 {
117         int ret = 0;
118
119         memset(&var->transp, 0, sizeof(var->transp));
120
121         var->red.msb_right = 0;
122         var->green.msb_right = 0;
123         var->blue.msb_right = 0;
124
125         switch (var->bits_per_pixel) {
126         case 1:
127         case 2:
128         case 4:
129         case 8:
130                 var->red.length         = var->bits_per_pixel;
131                 var->red.offset         = 0;
132                 var->green.length       = var->bits_per_pixel;
133                 var->green.offset       = 0;
134                 var->blue.length        = var->bits_per_pixel;
135                 var->blue.offset        = 0;
136                 break;
137         case 16:
138                 var->red.length = 5;
139                 var->blue.length = 5;
140                 /*
141                  * Green length can be 5 or 6 depending whether
142                  * we're operating in RGB555 or RGB565 mode.
143                  */
144                 if (var->green.length != 5 && var->green.length != 6)
145                         var->green.length = 6;
146                 break;
147         case 32:
148                 if (fb->panel->cntl & CNTL_LCDTFT) {
149                         var->red.length         = 8;
150                         var->green.length       = 8;
151                         var->blue.length        = 8;
152                         break;
153                 }
154         default:
155                 ret = -EINVAL;
156                 break;
157         }
158
159         /*
160          * >= 16bpp displays have separate colour component bitfields
161          * encoded in the pixel data.  Calculate their position from
162          * the bitfield length defined above.
163          */
164         if (ret == 0 && var->bits_per_pixel >= 16) {
165                 if (fb->panel->cntl & CNTL_BGR) {
166                         var->blue.offset = 0;
167                         var->green.offset = var->blue.offset + var->blue.length;
168                         var->red.offset = var->green.offset + var->green.length;
169                 } else {
170                         var->red.offset = 0;
171                         var->green.offset = var->red.offset + var->red.length;
172                         var->blue.offset = var->green.offset + var->green.length;
173                 }
174         }
175
176         return ret;
177 }
178
179 static int clcdfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
180 {
181         struct clcd_fb *fb = to_clcd(info);
182         int ret = -EINVAL;
183
184         if (fb->board->check)
185                 ret = fb->board->check(fb, var);
186
187         if (ret == 0 &&
188             var->xres_virtual * var->bits_per_pixel / 8 *
189             var->yres_virtual > fb->fb.fix.smem_len)
190                 ret = -EINVAL;
191
192         if (ret == 0)
193                 ret = clcdfb_set_bitfields(fb, var);
194
195         return ret;
196 }
197
198 static int clcdfb_set_par(struct fb_info *info)
199 {
200         struct clcd_fb *fb = to_clcd(info);
201         struct clcd_regs regs;
202
203         fb->fb.fix.line_length = fb->fb.var.xres_virtual *
204                                  fb->fb.var.bits_per_pixel / 8;
205
206         if (fb->fb.var.bits_per_pixel <= 8)
207                 fb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
208         else
209                 fb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
210
211         fb->board->decode(fb, &regs);
212
213         clcdfb_disable(fb);
214
215         writel(regs.tim0, fb->regs + CLCD_TIM0);
216         writel(regs.tim1, fb->regs + CLCD_TIM1);
217         writel(regs.tim2, fb->regs + CLCD_TIM2);
218         writel(regs.tim3, fb->regs + CLCD_TIM3);
219
220         clcdfb_set_start(fb);
221
222         clk_set_rate(fb->clk, (1000000000 / regs.pixclock) * 1000);
223
224         fb->clcd_cntl = regs.cntl;
225
226         clcdfb_enable(fb, regs.cntl);
227
228 #ifdef DEBUG
229         printk(KERN_INFO "CLCD: Registers set to\n"
230                KERN_INFO "  %08x %08x %08x %08x\n"
231                KERN_INFO "  %08x %08x %08x %08x\n",
232                 readl(fb->regs + CLCD_TIM0), readl(fb->regs + CLCD_TIM1),
233                 readl(fb->regs + CLCD_TIM2), readl(fb->regs + CLCD_TIM3),
234                 readl(fb->regs + CLCD_UBAS), readl(fb->regs + CLCD_LBAS),
235                 readl(fb->regs + CLCD_IENB), readl(fb->regs + CLCD_CNTL));
236 #endif
237
238         return 0;
239 }
240
241 static inline u32 convert_bitfield(int val, struct fb_bitfield *bf)
242 {
243         unsigned int mask = (1 << bf->length) - 1;
244
245         return (val >> (16 - bf->length) & mask) << bf->offset;
246 }
247
248 /*
249  *  Set a single color register. The values supplied have a 16 bit
250  *  magnitude.  Return != 0 for invalid regno.
251  */
252 static int
253 clcdfb_setcolreg(unsigned int regno, unsigned int red, unsigned int green,
254                  unsigned int blue, unsigned int transp, struct fb_info *info)
255 {
256         struct clcd_fb *fb = to_clcd(info);
257
258         if (regno < 16)
259                 fb->cmap[regno] = convert_bitfield(transp, &fb->fb.var.transp) |
260                                   convert_bitfield(blue, &fb->fb.var.blue) |
261                                   convert_bitfield(green, &fb->fb.var.green) |
262                                   convert_bitfield(red, &fb->fb.var.red);
263
264         if (fb->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR && regno < 256) {
265                 int hw_reg = CLCD_PALETTE + ((regno * 2) & ~3);
266                 u32 val, mask, newval;
267
268                 newval  = (red >> 11)  & 0x001f;
269                 newval |= (green >> 6) & 0x03e0;
270                 newval |= (blue >> 1)  & 0x7c00;
271
272                 /*
273                  * 3.2.11: if we're configured for big endian
274                  * byte order, the palette entries are swapped.
275                  */
276                 if (fb->clcd_cntl & CNTL_BEBO)
277                         regno ^= 1;
278
279                 if (regno & 1) {
280                         newval <<= 16;
281                         mask = 0x0000ffff;
282                 } else {
283                         mask = 0xffff0000;
284                 }
285
286                 val = readl(fb->regs + hw_reg) & mask;
287                 writel(val | newval, fb->regs + hw_reg);
288         }
289
290         return regno > 255;
291 }
292
293 /*
294  *  Blank the screen if blank_mode != 0, else unblank. If blank == NULL
295  *  then the caller blanks by setting the CLUT (Color Look Up Table) to all
296  *  black. Return 0 if blanking succeeded, != 0 if un-/blanking failed due
297  *  to e.g. a video mode which doesn't support it. Implements VESA suspend
298  *  and powerdown modes on hardware that supports disabling hsync/vsync:
299  *    blank_mode == 2: suspend vsync
300  *    blank_mode == 3: suspend hsync
301  *    blank_mode == 4: powerdown
302  */
303 static int clcdfb_blank(int blank_mode, struct fb_info *info)
304 {
305         struct clcd_fb *fb = to_clcd(info);
306
307         if (blank_mode != 0) {
308                 clcdfb_disable(fb);
309         } else {
310                 clcdfb_enable(fb, fb->clcd_cntl);
311         }
312         return 0;
313 }
314
315 static int clcdfb_mmap(struct fb_info *info,
316                        struct vm_area_struct *vma)
317 {
318         struct clcd_fb *fb = to_clcd(info);
319         unsigned long len, off = vma->vm_pgoff << PAGE_SHIFT;
320         int ret = -EINVAL;
321
322         len = info->fix.smem_len;
323
324         if (off <= len && vma->vm_end - vma->vm_start <= len - off &&
325             fb->board->mmap)
326                 ret = fb->board->mmap(fb, vma);
327
328         return ret;
329 }
330
331 static struct fb_ops clcdfb_ops = {
332         .owner          = THIS_MODULE,
333         .fb_check_var   = clcdfb_check_var,
334         .fb_set_par     = clcdfb_set_par,
335         .fb_setcolreg   = clcdfb_setcolreg,
336         .fb_blank       = clcdfb_blank,
337         .fb_fillrect    = cfb_fillrect,
338         .fb_copyarea    = cfb_copyarea,
339         .fb_imageblit   = cfb_imageblit,
340         .fb_mmap        = clcdfb_mmap,
341 };
342
343 static int clcdfb_register(struct clcd_fb *fb)
344 {
345         int ret;
346
347         fb->clk = clk_get(&fb->dev->dev, NULL);
348         if (IS_ERR(fb->clk)) {
349                 ret = PTR_ERR(fb->clk);
350                 goto out;
351         }
352
353         fb->fb.fix.mmio_start   = fb->dev->res.start;
354         fb->fb.fix.mmio_len     = resource_size(&fb->dev->res);
355
356         fb->regs = ioremap(fb->fb.fix.mmio_start, fb->fb.fix.mmio_len);
357         if (!fb->regs) {
358                 printk(KERN_ERR "CLCD: unable to remap registers\n");
359                 ret = -ENOMEM;
360                 goto free_clk;
361         }
362
363         fb->fb.fbops            = &clcdfb_ops;
364         fb->fb.flags            = FBINFO_FLAG_DEFAULT;
365         fb->fb.pseudo_palette   = fb->cmap;
366
367         strncpy(fb->fb.fix.id, clcd_name, sizeof(fb->fb.fix.id));
368         fb->fb.fix.type         = FB_TYPE_PACKED_PIXELS;
369         fb->fb.fix.type_aux     = 0;
370         fb->fb.fix.xpanstep     = 0;
371         fb->fb.fix.ypanstep     = 0;
372         fb->fb.fix.ywrapstep    = 0;
373         fb->fb.fix.accel        = FB_ACCEL_NONE;
374
375         fb->fb.var.xres         = fb->panel->mode.xres;
376         fb->fb.var.yres         = fb->panel->mode.yres;
377         fb->fb.var.xres_virtual = fb->panel->mode.xres;
378         fb->fb.var.yres_virtual = fb->panel->mode.yres;
379         fb->fb.var.bits_per_pixel = fb->panel->bpp;
380         fb->fb.var.grayscale    = fb->panel->grayscale;
381         fb->fb.var.pixclock     = fb->panel->mode.pixclock;
382         fb->fb.var.left_margin  = fb->panel->mode.left_margin;
383         fb->fb.var.right_margin = fb->panel->mode.right_margin;
384         fb->fb.var.upper_margin = fb->panel->mode.upper_margin;
385         fb->fb.var.lower_margin = fb->panel->mode.lower_margin;
386         fb->fb.var.hsync_len    = fb->panel->mode.hsync_len;
387         fb->fb.var.vsync_len    = fb->panel->mode.vsync_len;
388         fb->fb.var.sync         = fb->panel->mode.sync;
389         fb->fb.var.vmode        = fb->panel->mode.vmode;
390         fb->fb.var.activate     = FB_ACTIVATE_NOW;
391         fb->fb.var.nonstd       = 0;
392         fb->fb.var.height       = fb->panel->height;
393         fb->fb.var.width        = fb->panel->width;
394         fb->fb.var.accel_flags  = 0;
395
396         fb->fb.monspecs.hfmin   = 0;
397         fb->fb.monspecs.hfmax   = 100000;
398         fb->fb.monspecs.vfmin   = 0;
399         fb->fb.monspecs.vfmax   = 400;
400         fb->fb.monspecs.dclkmin = 1000000;
401         fb->fb.monspecs.dclkmax = 100000000;
402
403         /*
404          * Make sure that the bitfields are set appropriately.
405          */
406         clcdfb_set_bitfields(fb, &fb->fb.var);
407
408         /*
409          * Allocate colourmap.
410          */
411         ret = fb_alloc_cmap(&fb->fb.cmap, 256, 0);
412         if (ret)
413                 goto unmap;
414
415         /*
416          * Ensure interrupts are disabled.
417          */
418         writel(0, fb->regs + CLCD_IENB);
419
420         fb_set_var(&fb->fb, &fb->fb.var);
421
422         printk(KERN_INFO "CLCD: %s hardware, %s display\n",
423                fb->board->name, fb->panel->mode.name);
424
425         ret = register_framebuffer(&fb->fb);
426         if (ret == 0)
427                 goto out;
428
429         printk(KERN_ERR "CLCD: cannot register framebuffer (%d)\n", ret);
430
431         fb_dealloc_cmap(&fb->fb.cmap);
432  unmap:
433         iounmap(fb->regs);
434  free_clk:
435         clk_put(fb->clk);
436  out:
437         return ret;
438 }
439
440 static int clcdfb_probe(struct amba_device *dev, struct amba_id *id)
441 {
442         struct clcd_board *board = dev->dev.platform_data;
443         struct clcd_fb *fb;
444         int ret;
445
446         if (!board)
447                 return -EINVAL;
448
449         ret = amba_request_regions(dev, NULL);
450         if (ret) {
451                 printk(KERN_ERR "CLCD: unable to reserve regs region\n");
452                 goto out;
453         }
454
455         fb = kzalloc(sizeof(struct clcd_fb), GFP_KERNEL);
456         if (!fb) {
457                 printk(KERN_INFO "CLCD: could not allocate new clcd_fb struct\n");
458                 ret = -ENOMEM;
459                 goto free_region;
460         }
461
462         fb->dev = dev;
463         fb->board = board;
464
465         ret = fb->board->setup(fb);
466         if (ret)
467                 goto free_fb;
468
469         ret = clcdfb_register(fb); 
470         if (ret == 0) {
471                 amba_set_drvdata(dev, fb);
472                 goto out;
473         }
474
475         fb->board->remove(fb);
476  free_fb:
477         kfree(fb);
478  free_region:
479         amba_release_regions(dev);
480  out:
481         return ret;
482 }
483
484 static int clcdfb_remove(struct amba_device *dev)
485 {
486         struct clcd_fb *fb = amba_get_drvdata(dev);
487
488         amba_set_drvdata(dev, NULL);
489
490         clcdfb_disable(fb);
491         unregister_framebuffer(&fb->fb);
492         if (fb->fb.cmap.len)
493                 fb_dealloc_cmap(&fb->fb.cmap);
494         iounmap(fb->regs);
495         clk_put(fb->clk);
496
497         fb->board->remove(fb);
498
499         kfree(fb);
500
501         amba_release_regions(dev);
502
503         return 0;
504 }
505
506 static struct amba_id clcdfb_id_table[] = {
507         {
508                 .id     = 0x00041110,
509                 .mask   = 0x000ffffe,
510         },
511         { 0, 0 },
512 };
513
514 static struct amba_driver clcd_driver = {
515         .drv            = {
516                 .name   = "clcd-pl11x",
517         },
518         .probe          = clcdfb_probe,
519         .remove         = clcdfb_remove,
520         .id_table       = clcdfb_id_table,
521 };
522
523 static int __init amba_clcdfb_init(void)
524 {
525         if (fb_get_options("ambafb", NULL))
526                 return -ENODEV;
527
528         return amba_driver_register(&clcd_driver);
529 }
530
531 module_init(amba_clcdfb_init);
532
533 static void __exit amba_clcdfb_exit(void)
534 {
535         amba_driver_unregister(&clcd_driver);
536 }
537
538 module_exit(amba_clcdfb_exit);
539
540 MODULE_DESCRIPTION("ARM PrimeCell PL110 CLCD core driver");
541 MODULE_LICENSE("GPL");