Merge branch 'usb-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6
[linux-2.6.git] / drivers / usb / host / xhci.c
1 /*
2  * xHCI host controller driver
3  *
4  * Copyright (C) 2008 Intel Corp.
5  *
6  * Author: Sarah Sharp
7  * Some code borrowed from the Linux EHCI driver.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29
30 #include "xhci.h"
31
32 #define DRIVER_AUTHOR "Sarah Sharp"
33 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
34
35 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
36 static int link_quirk;
37 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
38 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
39
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
41 /*
42  * handshake - spin reading hc until handshake completes or fails
43  * @ptr: address of hc register to be read
44  * @mask: bits to look at in result of read
45  * @done: value of those bits when handshake succeeds
46  * @usec: timeout in microseconds
47  *
48  * Returns negative errno, or zero on success
49  *
50  * Success happens when the "mask" bits have the specified value (hardware
51  * handshake done).  There are two failure modes:  "usec" have passed (major
52  * hardware flakeout), or the register reads as all-ones (hardware removed).
53  */
54 static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
55                       u32 mask, u32 done, int usec)
56 {
57         u32     result;
58
59         do {
60                 result = xhci_readl(xhci, ptr);
61                 if (result == ~(u32)0)          /* card removed */
62                         return -ENODEV;
63                 result &= mask;
64                 if (result == done)
65                         return 0;
66                 udelay(1);
67                 usec--;
68         } while (usec > 0);
69         return -ETIMEDOUT;
70 }
71
72 /*
73  * Disable interrupts and begin the xHCI halting process.
74  */
75 void xhci_quiesce(struct xhci_hcd *xhci)
76 {
77         u32 halted;
78         u32 cmd;
79         u32 mask;
80
81         mask = ~(XHCI_IRQS);
82         halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
83         if (!halted)
84                 mask &= ~CMD_RUN;
85
86         cmd = xhci_readl(xhci, &xhci->op_regs->command);
87         cmd &= mask;
88         xhci_writel(xhci, cmd, &xhci->op_regs->command);
89 }
90
91 /*
92  * Force HC into halt state.
93  *
94  * Disable any IRQs and clear the run/stop bit.
95  * HC will complete any current and actively pipelined transactions, and
96  * should halt within 16 ms of the run/stop bit being cleared.
97  * Read HC Halted bit in the status register to see when the HC is finished.
98  */
99 int xhci_halt(struct xhci_hcd *xhci)
100 {
101         int ret;
102         xhci_dbg(xhci, "// Halt the HC\n");
103         xhci_quiesce(xhci);
104
105         ret = handshake(xhci, &xhci->op_regs->status,
106                         STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
107         if (!ret)
108                 xhci->xhc_state |= XHCI_STATE_HALTED;
109         return ret;
110 }
111
112 /*
113  * Set the run bit and wait for the host to be running.
114  */
115 static int xhci_start(struct xhci_hcd *xhci)
116 {
117         u32 temp;
118         int ret;
119
120         temp = xhci_readl(xhci, &xhci->op_regs->command);
121         temp |= (CMD_RUN);
122         xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
123                         temp);
124         xhci_writel(xhci, temp, &xhci->op_regs->command);
125
126         /*
127          * Wait for the HCHalted Status bit to be 0 to indicate the host is
128          * running.
129          */
130         ret = handshake(xhci, &xhci->op_regs->status,
131                         STS_HALT, 0, XHCI_MAX_HALT_USEC);
132         if (ret == -ETIMEDOUT)
133                 xhci_err(xhci, "Host took too long to start, "
134                                 "waited %u microseconds.\n",
135                                 XHCI_MAX_HALT_USEC);
136         if (!ret)
137                 xhci->xhc_state &= ~XHCI_STATE_HALTED;
138         return ret;
139 }
140
141 /*
142  * Reset a halted HC.
143  *
144  * This resets pipelines, timers, counters, state machines, etc.
145  * Transactions will be terminated immediately, and operational registers
146  * will be set to their defaults.
147  */
148 int xhci_reset(struct xhci_hcd *xhci)
149 {
150         u32 command;
151         u32 state;
152         int ret;
153
154         state = xhci_readl(xhci, &xhci->op_regs->status);
155         if ((state & STS_HALT) == 0) {
156                 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
157                 return 0;
158         }
159
160         xhci_dbg(xhci, "// Reset the HC\n");
161         command = xhci_readl(xhci, &xhci->op_regs->command);
162         command |= CMD_RESET;
163         xhci_writel(xhci, command, &xhci->op_regs->command);
164
165         ret = handshake(xhci, &xhci->op_regs->command,
166                         CMD_RESET, 0, 250 * 1000);
167         if (ret)
168                 return ret;
169
170         xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
171         /*
172          * xHCI cannot write to any doorbells or operational registers other
173          * than status until the "Controller Not Ready" flag is cleared.
174          */
175         return handshake(xhci, &xhci->op_regs->status, STS_CNR, 0, 250 * 1000);
176 }
177
178 /*
179  * Free IRQs
180  * free all IRQs request
181  */
182 static void xhci_free_irq(struct xhci_hcd *xhci)
183 {
184         int i;
185         struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
186
187         /* return if using legacy interrupt */
188         if (xhci_to_hcd(xhci)->irq >= 0)
189                 return;
190
191         if (xhci->msix_entries) {
192                 for (i = 0; i < xhci->msix_count; i++)
193                         if (xhci->msix_entries[i].vector)
194                                 free_irq(xhci->msix_entries[i].vector,
195                                                 xhci_to_hcd(xhci));
196         } else if (pdev->irq >= 0)
197                 free_irq(pdev->irq, xhci_to_hcd(xhci));
198
199         return;
200 }
201
202 /*
203  * Set up MSI
204  */
205 static int xhci_setup_msi(struct xhci_hcd *xhci)
206 {
207         int ret;
208         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
209
210         ret = pci_enable_msi(pdev);
211         if (ret) {
212                 xhci_err(xhci, "failed to allocate MSI entry\n");
213                 return ret;
214         }
215
216         ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
217                                 0, "xhci_hcd", xhci_to_hcd(xhci));
218         if (ret) {
219                 xhci_err(xhci, "disable MSI interrupt\n");
220                 pci_disable_msi(pdev);
221         }
222
223         return ret;
224 }
225
226 /*
227  * Set up MSI-X
228  */
229 static int xhci_setup_msix(struct xhci_hcd *xhci)
230 {
231         int i, ret = 0;
232         struct usb_hcd *hcd = xhci_to_hcd(xhci);
233         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
234
235         /*
236          * calculate number of msi-x vectors supported.
237          * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
238          *   with max number of interrupters based on the xhci HCSPARAMS1.
239          * - num_online_cpus: maximum msi-x vectors per CPUs core.
240          *   Add additional 1 vector to ensure always available interrupt.
241          */
242         xhci->msix_count = min(num_online_cpus() + 1,
243                                 HCS_MAX_INTRS(xhci->hcs_params1));
244
245         xhci->msix_entries =
246                 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
247                                 GFP_KERNEL);
248         if (!xhci->msix_entries) {
249                 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
250                 return -ENOMEM;
251         }
252
253         for (i = 0; i < xhci->msix_count; i++) {
254                 xhci->msix_entries[i].entry = i;
255                 xhci->msix_entries[i].vector = 0;
256         }
257
258         ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
259         if (ret) {
260                 xhci_err(xhci, "Failed to enable MSI-X\n");
261                 goto free_entries;
262         }
263
264         for (i = 0; i < xhci->msix_count; i++) {
265                 ret = request_irq(xhci->msix_entries[i].vector,
266                                 (irq_handler_t)xhci_msi_irq,
267                                 0, "xhci_hcd", xhci_to_hcd(xhci));
268                 if (ret)
269                         goto disable_msix;
270         }
271
272         hcd->msix_enabled = 1;
273         return ret;
274
275 disable_msix:
276         xhci_err(xhci, "disable MSI-X interrupt\n");
277         xhci_free_irq(xhci);
278         pci_disable_msix(pdev);
279 free_entries:
280         kfree(xhci->msix_entries);
281         xhci->msix_entries = NULL;
282         return ret;
283 }
284
285 /* Free any IRQs and disable MSI-X */
286 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
287 {
288         struct usb_hcd *hcd = xhci_to_hcd(xhci);
289         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
290
291         xhci_free_irq(xhci);
292
293         if (xhci->msix_entries) {
294                 pci_disable_msix(pdev);
295                 kfree(xhci->msix_entries);
296                 xhci->msix_entries = NULL;
297         } else {
298                 pci_disable_msi(pdev);
299         }
300
301         hcd->msix_enabled = 0;
302         return;
303 }
304
305 /*
306  * Initialize memory for HCD and xHC (one-time init).
307  *
308  * Program the PAGESIZE register, initialize the device context array, create
309  * device contexts (?), set up a command ring segment (or two?), create event
310  * ring (one for now).
311  */
312 int xhci_init(struct usb_hcd *hcd)
313 {
314         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
315         int retval = 0;
316
317         xhci_dbg(xhci, "xhci_init\n");
318         spin_lock_init(&xhci->lock);
319         if (link_quirk) {
320                 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
321                 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
322         } else {
323                 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
324         }
325         retval = xhci_mem_init(xhci, GFP_KERNEL);
326         xhci_dbg(xhci, "Finished xhci_init\n");
327
328         return retval;
329 }
330
331 /*-------------------------------------------------------------------------*/
332
333
334 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
335 static void xhci_event_ring_work(unsigned long arg)
336 {
337         unsigned long flags;
338         int temp;
339         u64 temp_64;
340         struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
341         int i, j;
342
343         xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
344
345         spin_lock_irqsave(&xhci->lock, flags);
346         temp = xhci_readl(xhci, &xhci->op_regs->status);
347         xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
348         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING)) {
349                 xhci_dbg(xhci, "HW died, polling stopped.\n");
350                 spin_unlock_irqrestore(&xhci->lock, flags);
351                 return;
352         }
353
354         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
355         xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
356         xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
357         xhci->error_bitmask = 0;
358         xhci_dbg(xhci, "Event ring:\n");
359         xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
360         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
361         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
362         temp_64 &= ~ERST_PTR_MASK;
363         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
364         xhci_dbg(xhci, "Command ring:\n");
365         xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
366         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
367         xhci_dbg_cmd_ptrs(xhci);
368         for (i = 0; i < MAX_HC_SLOTS; ++i) {
369                 if (!xhci->devs[i])
370                         continue;
371                 for (j = 0; j < 31; ++j) {
372                         xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
373                 }
374         }
375         spin_unlock_irqrestore(&xhci->lock, flags);
376
377         if (!xhci->zombie)
378                 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
379         else
380                 xhci_dbg(xhci, "Quit polling the event ring.\n");
381 }
382 #endif
383
384 static int xhci_run_finished(struct xhci_hcd *xhci)
385 {
386         if (xhci_start(xhci)) {
387                 xhci_halt(xhci);
388                 return -ENODEV;
389         }
390         xhci->shared_hcd->state = HC_STATE_RUNNING;
391
392         if (xhci->quirks & XHCI_NEC_HOST)
393                 xhci_ring_cmd_db(xhci);
394
395         xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
396         return 0;
397 }
398
399 /*
400  * Start the HC after it was halted.
401  *
402  * This function is called by the USB core when the HC driver is added.
403  * Its opposite is xhci_stop().
404  *
405  * xhci_init() must be called once before this function can be called.
406  * Reset the HC, enable device slot contexts, program DCBAAP, and
407  * set command ring pointer and event ring pointer.
408  *
409  * Setup MSI-X vectors and enable interrupts.
410  */
411 int xhci_run(struct usb_hcd *hcd)
412 {
413         u32 temp;
414         u64 temp_64;
415         u32 ret;
416         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
417         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
418
419         /* Start the xHCI host controller running only after the USB 2.0 roothub
420          * is setup.
421          */
422
423         hcd->uses_new_polling = 1;
424         if (!usb_hcd_is_primary_hcd(hcd))
425                 return xhci_run_finished(xhci);
426
427         xhci_dbg(xhci, "xhci_run\n");
428         /* unregister the legacy interrupt */
429         if (hcd->irq)
430                 free_irq(hcd->irq, hcd);
431         hcd->irq = -1;
432
433         /* Some Fresco Logic host controllers advertise MSI, but fail to
434          * generate interrupts.  Don't even try to enable MSI.
435          */
436         if (xhci->quirks & XHCI_BROKEN_MSI)
437                 goto legacy_irq;
438
439         ret = xhci_setup_msix(xhci);
440         if (ret)
441                 /* fall back to msi*/
442                 ret = xhci_setup_msi(xhci);
443
444         if (ret) {
445 legacy_irq:
446                 /* fall back to legacy interrupt*/
447                 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
448                                         hcd->irq_descr, hcd);
449                 if (ret) {
450                         xhci_err(xhci, "request interrupt %d failed\n",
451                                         pdev->irq);
452                         return ret;
453                 }
454                 hcd->irq = pdev->irq;
455         }
456
457 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
458         init_timer(&xhci->event_ring_timer);
459         xhci->event_ring_timer.data = (unsigned long) xhci;
460         xhci->event_ring_timer.function = xhci_event_ring_work;
461         /* Poll the event ring */
462         xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
463         xhci->zombie = 0;
464         xhci_dbg(xhci, "Setting event ring polling timer\n");
465         add_timer(&xhci->event_ring_timer);
466 #endif
467
468         xhci_dbg(xhci, "Command ring memory map follows:\n");
469         xhci_debug_ring(xhci, xhci->cmd_ring);
470         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
471         xhci_dbg_cmd_ptrs(xhci);
472
473         xhci_dbg(xhci, "ERST memory map follows:\n");
474         xhci_dbg_erst(xhci, &xhci->erst);
475         xhci_dbg(xhci, "Event ring:\n");
476         xhci_debug_ring(xhci, xhci->event_ring);
477         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
478         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
479         temp_64 &= ~ERST_PTR_MASK;
480         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
481
482         xhci_dbg(xhci, "// Set the interrupt modulation register\n");
483         temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
484         temp &= ~ER_IRQ_INTERVAL_MASK;
485         temp |= (u32) 160;
486         xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
487
488         /* Set the HCD state before we enable the irqs */
489         temp = xhci_readl(xhci, &xhci->op_regs->command);
490         temp |= (CMD_EIE);
491         xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
492                         temp);
493         xhci_writel(xhci, temp, &xhci->op_regs->command);
494
495         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
496         xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
497                         xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
498         xhci_writel(xhci, ER_IRQ_ENABLE(temp),
499                         &xhci->ir_set->irq_pending);
500         xhci_print_ir_set(xhci, 0);
501
502         if (xhci->quirks & XHCI_NEC_HOST)
503                 xhci_queue_vendor_command(xhci, 0, 0, 0,
504                                 TRB_TYPE(TRB_NEC_GET_FW));
505
506         xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
507         return 0;
508 }
509
510 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
511 {
512         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
513
514         spin_lock_irq(&xhci->lock);
515         xhci_halt(xhci);
516
517         /* The shared_hcd is going to be deallocated shortly (the USB core only
518          * calls this function when allocation fails in usb_add_hcd(), or
519          * usb_remove_hcd() is called).  So we need to unset xHCI's pointer.
520          */
521         xhci->shared_hcd = NULL;
522         spin_unlock_irq(&xhci->lock);
523 }
524
525 /*
526  * Stop xHCI driver.
527  *
528  * This function is called by the USB core when the HC driver is removed.
529  * Its opposite is xhci_run().
530  *
531  * Disable device contexts, disable IRQs, and quiesce the HC.
532  * Reset the HC, finish any completed transactions, and cleanup memory.
533  */
534 void xhci_stop(struct usb_hcd *hcd)
535 {
536         u32 temp;
537         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
538
539         if (!usb_hcd_is_primary_hcd(hcd)) {
540                 xhci_only_stop_hcd(xhci->shared_hcd);
541                 return;
542         }
543
544         spin_lock_irq(&xhci->lock);
545         /* Make sure the xHC is halted for a USB3 roothub
546          * (xhci_stop() could be called as part of failed init).
547          */
548         xhci_halt(xhci);
549         xhci_reset(xhci);
550         spin_unlock_irq(&xhci->lock);
551
552         xhci_cleanup_msix(xhci);
553
554 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
555         /* Tell the event ring poll function not to reschedule */
556         xhci->zombie = 1;
557         del_timer_sync(&xhci->event_ring_timer);
558 #endif
559
560         if (xhci->quirks & XHCI_AMD_PLL_FIX)
561                 usb_amd_dev_put();
562
563         xhci_dbg(xhci, "// Disabling event ring interrupts\n");
564         temp = xhci_readl(xhci, &xhci->op_regs->status);
565         xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
566         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
567         xhci_writel(xhci, ER_IRQ_DISABLE(temp),
568                         &xhci->ir_set->irq_pending);
569         xhci_print_ir_set(xhci, 0);
570
571         xhci_dbg(xhci, "cleaning up memory\n");
572         xhci_mem_cleanup(xhci);
573         xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
574                     xhci_readl(xhci, &xhci->op_regs->status));
575 }
576
577 /*
578  * Shutdown HC (not bus-specific)
579  *
580  * This is called when the machine is rebooting or halting.  We assume that the
581  * machine will be powered off, and the HC's internal state will be reset.
582  * Don't bother to free memory.
583  *
584  * This will only ever be called with the main usb_hcd (the USB3 roothub).
585  */
586 void xhci_shutdown(struct usb_hcd *hcd)
587 {
588         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
589
590         spin_lock_irq(&xhci->lock);
591         xhci_halt(xhci);
592         spin_unlock_irq(&xhci->lock);
593
594         xhci_cleanup_msix(xhci);
595
596         xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
597                     xhci_readl(xhci, &xhci->op_regs->status));
598 }
599
600 #ifdef CONFIG_PM
601 static void xhci_save_registers(struct xhci_hcd *xhci)
602 {
603         xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
604         xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
605         xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
606         xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
607         xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
608         xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
609         xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
610         xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
611         xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
612 }
613
614 static void xhci_restore_registers(struct xhci_hcd *xhci)
615 {
616         xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
617         xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
618         xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
619         xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
620         xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
621         xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
622         xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
623         xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
624 }
625
626 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
627 {
628         u64     val_64;
629
630         /* step 2: initialize command ring buffer */
631         val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
632         val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
633                 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
634                                       xhci->cmd_ring->dequeue) &
635                  (u64) ~CMD_RING_RSVD_BITS) |
636                 xhci->cmd_ring->cycle_state;
637         xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
638                         (long unsigned long) val_64);
639         xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
640 }
641
642 /*
643  * The whole command ring must be cleared to zero when we suspend the host.
644  *
645  * The host doesn't save the command ring pointer in the suspend well, so we
646  * need to re-program it on resume.  Unfortunately, the pointer must be 64-byte
647  * aligned, because of the reserved bits in the command ring dequeue pointer
648  * register.  Therefore, we can't just set the dequeue pointer back in the
649  * middle of the ring (TRBs are 16-byte aligned).
650  */
651 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
652 {
653         struct xhci_ring *ring;
654         struct xhci_segment *seg;
655
656         ring = xhci->cmd_ring;
657         seg = ring->deq_seg;
658         do {
659                 memset(seg->trbs, 0, SEGMENT_SIZE);
660                 seg = seg->next;
661         } while (seg != ring->deq_seg);
662
663         /* Reset the software enqueue and dequeue pointers */
664         ring->deq_seg = ring->first_seg;
665         ring->dequeue = ring->first_seg->trbs;
666         ring->enq_seg = ring->deq_seg;
667         ring->enqueue = ring->dequeue;
668
669         /*
670          * Ring is now zeroed, so the HW should look for change of ownership
671          * when the cycle bit is set to 1.
672          */
673         ring->cycle_state = 1;
674
675         /*
676          * Reset the hardware dequeue pointer.
677          * Yes, this will need to be re-written after resume, but we're paranoid
678          * and want to make sure the hardware doesn't access bogus memory
679          * because, say, the BIOS or an SMI started the host without changing
680          * the command ring pointers.
681          */
682         xhci_set_cmd_ring_deq(xhci);
683 }
684
685 /*
686  * Stop HC (not bus-specific)
687  *
688  * This is called when the machine transition into S3/S4 mode.
689  *
690  */
691 int xhci_suspend(struct xhci_hcd *xhci)
692 {
693         int                     rc = 0;
694         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
695         u32                     command;
696         int                     i;
697
698         spin_lock_irq(&xhci->lock);
699         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
700         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
701         /* step 1: stop endpoint */
702         /* skipped assuming that port suspend has done */
703
704         /* step 2: clear Run/Stop bit */
705         command = xhci_readl(xhci, &xhci->op_regs->command);
706         command &= ~CMD_RUN;
707         xhci_writel(xhci, command, &xhci->op_regs->command);
708         if (handshake(xhci, &xhci->op_regs->status,
709                       STS_HALT, STS_HALT, 100*100)) {
710                 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
711                 spin_unlock_irq(&xhci->lock);
712                 return -ETIMEDOUT;
713         }
714         xhci_clear_command_ring(xhci);
715
716         /* step 3: save registers */
717         xhci_save_registers(xhci);
718
719         /* step 4: set CSS flag */
720         command = xhci_readl(xhci, &xhci->op_regs->command);
721         command |= CMD_CSS;
722         xhci_writel(xhci, command, &xhci->op_regs->command);
723         if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10*100)) {
724                 xhci_warn(xhci, "WARN: xHC CMD_CSS timeout\n");
725                 spin_unlock_irq(&xhci->lock);
726                 return -ETIMEDOUT;
727         }
728         spin_unlock_irq(&xhci->lock);
729
730         /* step 5: remove core well power */
731         /* synchronize irq when using MSI-X */
732         if (xhci->msix_entries) {
733                 for (i = 0; i < xhci->msix_count; i++)
734                         synchronize_irq(xhci->msix_entries[i].vector);
735         }
736
737         return rc;
738 }
739
740 /*
741  * start xHC (not bus-specific)
742  *
743  * This is called when the machine transition from S3/S4 mode.
744  *
745  */
746 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
747 {
748         u32                     command, temp = 0;
749         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
750         struct usb_hcd          *secondary_hcd;
751         int                     retval;
752
753         /* Wait a bit if either of the roothubs need to settle from the
754          * transition into bus suspend.
755          */
756         if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
757                         time_before(jiffies,
758                                 xhci->bus_state[1].next_statechange))
759                 msleep(100);
760
761         spin_lock_irq(&xhci->lock);
762         if (xhci->quirks & XHCI_RESET_ON_RESUME)
763                 hibernated = true;
764
765         if (!hibernated) {
766                 /* step 1: restore register */
767                 xhci_restore_registers(xhci);
768                 /* step 2: initialize command ring buffer */
769                 xhci_set_cmd_ring_deq(xhci);
770                 /* step 3: restore state and start state*/
771                 /* step 3: set CRS flag */
772                 command = xhci_readl(xhci, &xhci->op_regs->command);
773                 command |= CMD_CRS;
774                 xhci_writel(xhci, command, &xhci->op_regs->command);
775                 if (handshake(xhci, &xhci->op_regs->status,
776                               STS_RESTORE, 0, 10*100)) {
777                         xhci_dbg(xhci, "WARN: xHC CMD_CSS timeout\n");
778                         spin_unlock_irq(&xhci->lock);
779                         return -ETIMEDOUT;
780                 }
781                 temp = xhci_readl(xhci, &xhci->op_regs->status);
782         }
783
784         /* If restore operation fails, re-initialize the HC during resume */
785         if ((temp & STS_SRE) || hibernated) {
786                 /* Let the USB core know _both_ roothubs lost power. */
787                 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
788                 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
789
790                 xhci_dbg(xhci, "Stop HCD\n");
791                 xhci_halt(xhci);
792                 xhci_reset(xhci);
793                 spin_unlock_irq(&xhci->lock);
794                 xhci_cleanup_msix(xhci);
795
796 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
797                 /* Tell the event ring poll function not to reschedule */
798                 xhci->zombie = 1;
799                 del_timer_sync(&xhci->event_ring_timer);
800 #endif
801
802                 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
803                 temp = xhci_readl(xhci, &xhci->op_regs->status);
804                 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
805                 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
806                 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
807                                 &xhci->ir_set->irq_pending);
808                 xhci_print_ir_set(xhci, 0);
809
810                 xhci_dbg(xhci, "cleaning up memory\n");
811                 xhci_mem_cleanup(xhci);
812                 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
813                             xhci_readl(xhci, &xhci->op_regs->status));
814
815                 /* USB core calls the PCI reinit and start functions twice:
816                  * first with the primary HCD, and then with the secondary HCD.
817                  * If we don't do the same, the host will never be started.
818                  */
819                 if (!usb_hcd_is_primary_hcd(hcd))
820                         secondary_hcd = hcd;
821                 else
822                         secondary_hcd = xhci->shared_hcd;
823
824                 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
825                 retval = xhci_init(hcd->primary_hcd);
826                 if (retval)
827                         return retval;
828                 xhci_dbg(xhci, "Start the primary HCD\n");
829                 retval = xhci_run(hcd->primary_hcd);
830                 if (retval)
831                         goto failed_restart;
832
833                 xhci_dbg(xhci, "Start the secondary HCD\n");
834                 retval = xhci_run(secondary_hcd);
835                 if (!retval) {
836                         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
837                         set_bit(HCD_FLAG_HW_ACCESSIBLE,
838                                         &xhci->shared_hcd->flags);
839                 }
840 failed_restart:
841                 hcd->state = HC_STATE_SUSPENDED;
842                 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
843                 return retval;
844         }
845
846         /* step 4: set Run/Stop bit */
847         command = xhci_readl(xhci, &xhci->op_regs->command);
848         command |= CMD_RUN;
849         xhci_writel(xhci, command, &xhci->op_regs->command);
850         handshake(xhci, &xhci->op_regs->status, STS_HALT,
851                   0, 250 * 1000);
852
853         /* step 5: walk topology and initialize portsc,
854          * portpmsc and portli
855          */
856         /* this is done in bus_resume */
857
858         /* step 6: restart each of the previously
859          * Running endpoints by ringing their doorbells
860          */
861
862         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
863         set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
864
865         spin_unlock_irq(&xhci->lock);
866         return 0;
867 }
868 #endif  /* CONFIG_PM */
869
870 /*-------------------------------------------------------------------------*/
871
872 /**
873  * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
874  * HCDs.  Find the index for an endpoint given its descriptor.  Use the return
875  * value to right shift 1 for the bitmask.
876  *
877  * Index  = (epnum * 2) + direction - 1,
878  * where direction = 0 for OUT, 1 for IN.
879  * For control endpoints, the IN index is used (OUT index is unused), so
880  * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
881  */
882 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
883 {
884         unsigned int index;
885         if (usb_endpoint_xfer_control(desc))
886                 index = (unsigned int) (usb_endpoint_num(desc)*2);
887         else
888                 index = (unsigned int) (usb_endpoint_num(desc)*2) +
889                         (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
890         return index;
891 }
892
893 /* Find the flag for this endpoint (for use in the control context).  Use the
894  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
895  * bit 1, etc.
896  */
897 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
898 {
899         return 1 << (xhci_get_endpoint_index(desc) + 1);
900 }
901
902 /* Find the flag for this endpoint (for use in the control context).  Use the
903  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
904  * bit 1, etc.
905  */
906 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
907 {
908         return 1 << (ep_index + 1);
909 }
910
911 /* Compute the last valid endpoint context index.  Basically, this is the
912  * endpoint index plus one.  For slot contexts with more than valid endpoint,
913  * we find the most significant bit set in the added contexts flags.
914  * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
915  * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
916  */
917 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
918 {
919         return fls(added_ctxs) - 1;
920 }
921
922 /* Returns 1 if the arguments are OK;
923  * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
924  */
925 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
926                 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
927                 const char *func) {
928         struct xhci_hcd *xhci;
929         struct xhci_virt_device *virt_dev;
930
931         if (!hcd || (check_ep && !ep) || !udev) {
932                 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
933                                 func);
934                 return -EINVAL;
935         }
936         if (!udev->parent) {
937                 printk(KERN_DEBUG "xHCI %s called for root hub\n",
938                                 func);
939                 return 0;
940         }
941
942         if (check_virt_dev) {
943                 xhci = hcd_to_xhci(hcd);
944                 if (!udev->slot_id || !xhci->devs
945                         || !xhci->devs[udev->slot_id]) {
946                         printk(KERN_DEBUG "xHCI %s called with unaddressed "
947                                                 "device\n", func);
948                         return -EINVAL;
949                 }
950
951                 virt_dev = xhci->devs[udev->slot_id];
952                 if (virt_dev->udev != udev) {
953                         printk(KERN_DEBUG "xHCI %s called with udev and "
954                                           "virt_dev does not match\n", func);
955                         return -EINVAL;
956                 }
957         }
958
959         return 1;
960 }
961
962 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
963                 struct usb_device *udev, struct xhci_command *command,
964                 bool ctx_change, bool must_succeed);
965
966 /*
967  * Full speed devices may have a max packet size greater than 8 bytes, but the
968  * USB core doesn't know that until it reads the first 8 bytes of the
969  * descriptor.  If the usb_device's max packet size changes after that point,
970  * we need to issue an evaluate context command and wait on it.
971  */
972 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
973                 unsigned int ep_index, struct urb *urb)
974 {
975         struct xhci_container_ctx *in_ctx;
976         struct xhci_container_ctx *out_ctx;
977         struct xhci_input_control_ctx *ctrl_ctx;
978         struct xhci_ep_ctx *ep_ctx;
979         int max_packet_size;
980         int hw_max_packet_size;
981         int ret = 0;
982
983         out_ctx = xhci->devs[slot_id]->out_ctx;
984         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
985         hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
986         max_packet_size = le16_to_cpu(urb->dev->ep0.desc.wMaxPacketSize);
987         if (hw_max_packet_size != max_packet_size) {
988                 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
989                 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
990                                 max_packet_size);
991                 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
992                                 hw_max_packet_size);
993                 xhci_dbg(xhci, "Issuing evaluate context command.\n");
994
995                 /* Set up the modified control endpoint 0 */
996                 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
997                                 xhci->devs[slot_id]->out_ctx, ep_index);
998                 in_ctx = xhci->devs[slot_id]->in_ctx;
999                 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1000                 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1001                 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1002
1003                 /* Set up the input context flags for the command */
1004                 /* FIXME: This won't work if a non-default control endpoint
1005                  * changes max packet sizes.
1006                  */
1007                 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1008                 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1009                 ctrl_ctx->drop_flags = 0;
1010
1011                 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1012                 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1013                 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1014                 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1015
1016                 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1017                                 true, false);
1018
1019                 /* Clean up the input context for later use by bandwidth
1020                  * functions.
1021                  */
1022                 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1023         }
1024         return ret;
1025 }
1026
1027 /*
1028  * non-error returns are a promise to giveback() the urb later
1029  * we drop ownership so next owner (or urb unlink) can get it
1030  */
1031 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1032 {
1033         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1034         unsigned long flags;
1035         int ret = 0;
1036         unsigned int slot_id, ep_index;
1037         struct urb_priv *urb_priv;
1038         int size, i;
1039
1040         if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1041                                         true, true, __func__) <= 0)
1042                 return -EINVAL;
1043
1044         slot_id = urb->dev->slot_id;
1045         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1046
1047         if (!HCD_HW_ACCESSIBLE(hcd)) {
1048                 if (!in_interrupt())
1049                         xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1050                 ret = -ESHUTDOWN;
1051                 goto exit;
1052         }
1053
1054         if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1055                 size = urb->number_of_packets;
1056         else
1057                 size = 1;
1058
1059         urb_priv = kzalloc(sizeof(struct urb_priv) +
1060                                   size * sizeof(struct xhci_td *), mem_flags);
1061         if (!urb_priv)
1062                 return -ENOMEM;
1063
1064         for (i = 0; i < size; i++) {
1065                 urb_priv->td[i] = kzalloc(sizeof(struct xhci_td), mem_flags);
1066                 if (!urb_priv->td[i]) {
1067                         urb_priv->length = i;
1068                         xhci_urb_free_priv(xhci, urb_priv);
1069                         return -ENOMEM;
1070                 }
1071         }
1072
1073         urb_priv->length = size;
1074         urb_priv->td_cnt = 0;
1075         urb->hcpriv = urb_priv;
1076
1077         if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1078                 /* Check to see if the max packet size for the default control
1079                  * endpoint changed during FS device enumeration
1080                  */
1081                 if (urb->dev->speed == USB_SPEED_FULL) {
1082                         ret = xhci_check_maxpacket(xhci, slot_id,
1083                                         ep_index, urb);
1084                         if (ret < 0)
1085                                 return ret;
1086                 }
1087
1088                 /* We have a spinlock and interrupts disabled, so we must pass
1089                  * atomic context to this function, which may allocate memory.
1090                  */
1091                 spin_lock_irqsave(&xhci->lock, flags);
1092                 if (xhci->xhc_state & XHCI_STATE_DYING)
1093                         goto dying;
1094                 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1095                                 slot_id, ep_index);
1096                 spin_unlock_irqrestore(&xhci->lock, flags);
1097         } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1098                 spin_lock_irqsave(&xhci->lock, flags);
1099                 if (xhci->xhc_state & XHCI_STATE_DYING)
1100                         goto dying;
1101                 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1102                                 EP_GETTING_STREAMS) {
1103                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1104                                         "is transitioning to using streams.\n");
1105                         ret = -EINVAL;
1106                 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1107                                 EP_GETTING_NO_STREAMS) {
1108                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1109                                         "is transitioning to "
1110                                         "not having streams.\n");
1111                         ret = -EINVAL;
1112                 } else {
1113                         ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1114                                         slot_id, ep_index);
1115                 }
1116                 spin_unlock_irqrestore(&xhci->lock, flags);
1117         } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1118                 spin_lock_irqsave(&xhci->lock, flags);
1119                 if (xhci->xhc_state & XHCI_STATE_DYING)
1120                         goto dying;
1121                 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1122                                 slot_id, ep_index);
1123                 spin_unlock_irqrestore(&xhci->lock, flags);
1124         } else {
1125                 spin_lock_irqsave(&xhci->lock, flags);
1126                 if (xhci->xhc_state & XHCI_STATE_DYING)
1127                         goto dying;
1128                 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1129                                 slot_id, ep_index);
1130                 spin_unlock_irqrestore(&xhci->lock, flags);
1131         }
1132 exit:
1133         return ret;
1134 dying:
1135         xhci_urb_free_priv(xhci, urb_priv);
1136         urb->hcpriv = NULL;
1137         xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1138                         "non-responsive xHCI host.\n",
1139                         urb->ep->desc.bEndpointAddress, urb);
1140         spin_unlock_irqrestore(&xhci->lock, flags);
1141         return -ESHUTDOWN;
1142 }
1143
1144 /* Get the right ring for the given URB.
1145  * If the endpoint supports streams, boundary check the URB's stream ID.
1146  * If the endpoint doesn't support streams, return the singular endpoint ring.
1147  */
1148 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1149                 struct urb *urb)
1150 {
1151         unsigned int slot_id;
1152         unsigned int ep_index;
1153         unsigned int stream_id;
1154         struct xhci_virt_ep *ep;
1155
1156         slot_id = urb->dev->slot_id;
1157         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1158         stream_id = urb->stream_id;
1159         ep = &xhci->devs[slot_id]->eps[ep_index];
1160         /* Common case: no streams */
1161         if (!(ep->ep_state & EP_HAS_STREAMS))
1162                 return ep->ring;
1163
1164         if (stream_id == 0) {
1165                 xhci_warn(xhci,
1166                                 "WARN: Slot ID %u, ep index %u has streams, "
1167                                 "but URB has no stream ID.\n",
1168                                 slot_id, ep_index);
1169                 return NULL;
1170         }
1171
1172         if (stream_id < ep->stream_info->num_streams)
1173                 return ep->stream_info->stream_rings[stream_id];
1174
1175         xhci_warn(xhci,
1176                         "WARN: Slot ID %u, ep index %u has "
1177                         "stream IDs 1 to %u allocated, "
1178                         "but stream ID %u is requested.\n",
1179                         slot_id, ep_index,
1180                         ep->stream_info->num_streams - 1,
1181                         stream_id);
1182         return NULL;
1183 }
1184
1185 /*
1186  * Remove the URB's TD from the endpoint ring.  This may cause the HC to stop
1187  * USB transfers, potentially stopping in the middle of a TRB buffer.  The HC
1188  * should pick up where it left off in the TD, unless a Set Transfer Ring
1189  * Dequeue Pointer is issued.
1190  *
1191  * The TRBs that make up the buffers for the canceled URB will be "removed" from
1192  * the ring.  Since the ring is a contiguous structure, they can't be physically
1193  * removed.  Instead, there are two options:
1194  *
1195  *  1) If the HC is in the middle of processing the URB to be canceled, we
1196  *     simply move the ring's dequeue pointer past those TRBs using the Set
1197  *     Transfer Ring Dequeue Pointer command.  This will be the common case,
1198  *     when drivers timeout on the last submitted URB and attempt to cancel.
1199  *
1200  *  2) If the HC is in the middle of a different TD, we turn the TRBs into a
1201  *     series of 1-TRB transfer no-op TDs.  (No-ops shouldn't be chained.)  The
1202  *     HC will need to invalidate the any TRBs it has cached after the stop
1203  *     endpoint command, as noted in the xHCI 0.95 errata.
1204  *
1205  *  3) The TD may have completed by the time the Stop Endpoint Command
1206  *     completes, so software needs to handle that case too.
1207  *
1208  * This function should protect against the TD enqueueing code ringing the
1209  * doorbell while this code is waiting for a Stop Endpoint command to complete.
1210  * It also needs to account for multiple cancellations on happening at the same
1211  * time for the same endpoint.
1212  *
1213  * Note that this function can be called in any context, or so says
1214  * usb_hcd_unlink_urb()
1215  */
1216 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1217 {
1218         unsigned long flags;
1219         int ret, i;
1220         u32 temp;
1221         struct xhci_hcd *xhci;
1222         struct urb_priv *urb_priv;
1223         struct xhci_td *td;
1224         unsigned int ep_index;
1225         struct xhci_ring *ep_ring;
1226         struct xhci_virt_ep *ep;
1227
1228         xhci = hcd_to_xhci(hcd);
1229         spin_lock_irqsave(&xhci->lock, flags);
1230         /* Make sure the URB hasn't completed or been unlinked already */
1231         ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1232         if (ret || !urb->hcpriv)
1233                 goto done;
1234         temp = xhci_readl(xhci, &xhci->op_regs->status);
1235         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1236                 xhci_dbg(xhci, "HW died, freeing TD.\n");
1237                 urb_priv = urb->hcpriv;
1238
1239                 usb_hcd_unlink_urb_from_ep(hcd, urb);
1240                 spin_unlock_irqrestore(&xhci->lock, flags);
1241                 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1242                 xhci_urb_free_priv(xhci, urb_priv);
1243                 return ret;
1244         }
1245         if (xhci->xhc_state & XHCI_STATE_DYING) {
1246                 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1247                                 "non-responsive xHCI host.\n",
1248                                 urb->ep->desc.bEndpointAddress, urb);
1249                 /* Let the stop endpoint command watchdog timer (which set this
1250                  * state) finish cleaning up the endpoint TD lists.  We must
1251                  * have caught it in the middle of dropping a lock and giving
1252                  * back an URB.
1253                  */
1254                 goto done;
1255         }
1256
1257         xhci_dbg(xhci, "Cancel URB %p\n", urb);
1258         xhci_dbg(xhci, "Event ring:\n");
1259         xhci_debug_ring(xhci, xhci->event_ring);
1260         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1261         ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1262         ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1263         if (!ep_ring) {
1264                 ret = -EINVAL;
1265                 goto done;
1266         }
1267
1268         xhci_dbg(xhci, "Endpoint ring:\n");
1269         xhci_debug_ring(xhci, ep_ring);
1270
1271         urb_priv = urb->hcpriv;
1272
1273         for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1274                 td = urb_priv->td[i];
1275                 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1276         }
1277
1278         /* Queue a stop endpoint command, but only if this is
1279          * the first cancellation to be handled.
1280          */
1281         if (!(ep->ep_state & EP_HALT_PENDING)) {
1282                 ep->ep_state |= EP_HALT_PENDING;
1283                 ep->stop_cmds_pending++;
1284                 ep->stop_cmd_timer.expires = jiffies +
1285                         XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1286                 add_timer(&ep->stop_cmd_timer);
1287                 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1288                 xhci_ring_cmd_db(xhci);
1289         }
1290 done:
1291         spin_unlock_irqrestore(&xhci->lock, flags);
1292         return ret;
1293 }
1294
1295 /* Drop an endpoint from a new bandwidth configuration for this device.
1296  * Only one call to this function is allowed per endpoint before
1297  * check_bandwidth() or reset_bandwidth() must be called.
1298  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1299  * add the endpoint to the schedule with possibly new parameters denoted by a
1300  * different endpoint descriptor in usb_host_endpoint.
1301  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1302  * not allowed.
1303  *
1304  * The USB core will not allow URBs to be queued to an endpoint that is being
1305  * disabled, so there's no need for mutual exclusion to protect
1306  * the xhci->devs[slot_id] structure.
1307  */
1308 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1309                 struct usb_host_endpoint *ep)
1310 {
1311         struct xhci_hcd *xhci;
1312         struct xhci_container_ctx *in_ctx, *out_ctx;
1313         struct xhci_input_control_ctx *ctrl_ctx;
1314         struct xhci_slot_ctx *slot_ctx;
1315         unsigned int last_ctx;
1316         unsigned int ep_index;
1317         struct xhci_ep_ctx *ep_ctx;
1318         u32 drop_flag;
1319         u32 new_add_flags, new_drop_flags, new_slot_info;
1320         int ret;
1321
1322         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1323         if (ret <= 0)
1324                 return ret;
1325         xhci = hcd_to_xhci(hcd);
1326         if (xhci->xhc_state & XHCI_STATE_DYING)
1327                 return -ENODEV;
1328
1329         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1330         drop_flag = xhci_get_endpoint_flag(&ep->desc);
1331         if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1332                 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1333                                 __func__, drop_flag);
1334                 return 0;
1335         }
1336
1337         in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1338         out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1339         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1340         ep_index = xhci_get_endpoint_index(&ep->desc);
1341         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1342         /* If the HC already knows the endpoint is disabled,
1343          * or the HCD has noted it is disabled, ignore this request
1344          */
1345         if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1346              cpu_to_le32(EP_STATE_DISABLED)) ||
1347             le32_to_cpu(ctrl_ctx->drop_flags) &
1348             xhci_get_endpoint_flag(&ep->desc)) {
1349                 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1350                                 __func__, ep);
1351                 return 0;
1352         }
1353
1354         ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1355         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1356
1357         ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1358         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1359
1360         last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1361         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1362         /* Update the last valid endpoint context, if we deleted the last one */
1363         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1364             LAST_CTX(last_ctx)) {
1365                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1366                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1367         }
1368         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1369
1370         xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1371
1372         xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1373                         (unsigned int) ep->desc.bEndpointAddress,
1374                         udev->slot_id,
1375                         (unsigned int) new_drop_flags,
1376                         (unsigned int) new_add_flags,
1377                         (unsigned int) new_slot_info);
1378         return 0;
1379 }
1380
1381 /* Add an endpoint to a new possible bandwidth configuration for this device.
1382  * Only one call to this function is allowed per endpoint before
1383  * check_bandwidth() or reset_bandwidth() must be called.
1384  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1385  * add the endpoint to the schedule with possibly new parameters denoted by a
1386  * different endpoint descriptor in usb_host_endpoint.
1387  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1388  * not allowed.
1389  *
1390  * The USB core will not allow URBs to be queued to an endpoint until the
1391  * configuration or alt setting is installed in the device, so there's no need
1392  * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1393  */
1394 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1395                 struct usb_host_endpoint *ep)
1396 {
1397         struct xhci_hcd *xhci;
1398         struct xhci_container_ctx *in_ctx, *out_ctx;
1399         unsigned int ep_index;
1400         struct xhci_ep_ctx *ep_ctx;
1401         struct xhci_slot_ctx *slot_ctx;
1402         struct xhci_input_control_ctx *ctrl_ctx;
1403         u32 added_ctxs;
1404         unsigned int last_ctx;
1405         u32 new_add_flags, new_drop_flags, new_slot_info;
1406         struct xhci_virt_device *virt_dev;
1407         int ret = 0;
1408
1409         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1410         if (ret <= 0) {
1411                 /* So we won't queue a reset ep command for a root hub */
1412                 ep->hcpriv = NULL;
1413                 return ret;
1414         }
1415         xhci = hcd_to_xhci(hcd);
1416         if (xhci->xhc_state & XHCI_STATE_DYING)
1417                 return -ENODEV;
1418
1419         added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1420         last_ctx = xhci_last_valid_endpoint(added_ctxs);
1421         if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1422                 /* FIXME when we have to issue an evaluate endpoint command to
1423                  * deal with ep0 max packet size changing once we get the
1424                  * descriptors
1425                  */
1426                 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1427                                 __func__, added_ctxs);
1428                 return 0;
1429         }
1430
1431         virt_dev = xhci->devs[udev->slot_id];
1432         in_ctx = virt_dev->in_ctx;
1433         out_ctx = virt_dev->out_ctx;
1434         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1435         ep_index = xhci_get_endpoint_index(&ep->desc);
1436         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1437
1438         /* If this endpoint is already in use, and the upper layers are trying
1439          * to add it again without dropping it, reject the addition.
1440          */
1441         if (virt_dev->eps[ep_index].ring &&
1442                         !(le32_to_cpu(ctrl_ctx->drop_flags) &
1443                                 xhci_get_endpoint_flag(&ep->desc))) {
1444                 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1445                                 "without dropping it.\n",
1446                                 (unsigned int) ep->desc.bEndpointAddress);
1447                 return -EINVAL;
1448         }
1449
1450         /* If the HCD has already noted the endpoint is enabled,
1451          * ignore this request.
1452          */
1453         if (le32_to_cpu(ctrl_ctx->add_flags) &
1454             xhci_get_endpoint_flag(&ep->desc)) {
1455                 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1456                                 __func__, ep);
1457                 return 0;
1458         }
1459
1460         /*
1461          * Configuration and alternate setting changes must be done in
1462          * process context, not interrupt context (or so documenation
1463          * for usb_set_interface() and usb_set_configuration() claim).
1464          */
1465         if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1466                 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1467                                 __func__, ep->desc.bEndpointAddress);
1468                 return -ENOMEM;
1469         }
1470
1471         ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1472         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1473
1474         /* If xhci_endpoint_disable() was called for this endpoint, but the
1475          * xHC hasn't been notified yet through the check_bandwidth() call,
1476          * this re-adds a new state for the endpoint from the new endpoint
1477          * descriptors.  We must drop and re-add this endpoint, so we leave the
1478          * drop flags alone.
1479          */
1480         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1481
1482         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1483         /* Update the last valid endpoint context, if we just added one past */
1484         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1485             LAST_CTX(last_ctx)) {
1486                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1487                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1488         }
1489         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1490
1491         /* Store the usb_device pointer for later use */
1492         ep->hcpriv = udev;
1493
1494         xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1495                         (unsigned int) ep->desc.bEndpointAddress,
1496                         udev->slot_id,
1497                         (unsigned int) new_drop_flags,
1498                         (unsigned int) new_add_flags,
1499                         (unsigned int) new_slot_info);
1500         return 0;
1501 }
1502
1503 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1504 {
1505         struct xhci_input_control_ctx *ctrl_ctx;
1506         struct xhci_ep_ctx *ep_ctx;
1507         struct xhci_slot_ctx *slot_ctx;
1508         int i;
1509
1510         /* When a device's add flag and drop flag are zero, any subsequent
1511          * configure endpoint command will leave that endpoint's state
1512          * untouched.  Make sure we don't leave any old state in the input
1513          * endpoint contexts.
1514          */
1515         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1516         ctrl_ctx->drop_flags = 0;
1517         ctrl_ctx->add_flags = 0;
1518         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1519         slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1520         /* Endpoint 0 is always valid */
1521         slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1522         for (i = 1; i < 31; ++i) {
1523                 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1524                 ep_ctx->ep_info = 0;
1525                 ep_ctx->ep_info2 = 0;
1526                 ep_ctx->deq = 0;
1527                 ep_ctx->tx_info = 0;
1528         }
1529 }
1530
1531 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1532                 struct usb_device *udev, u32 *cmd_status)
1533 {
1534         int ret;
1535
1536         switch (*cmd_status) {
1537         case COMP_ENOMEM:
1538                 dev_warn(&udev->dev, "Not enough host controller resources "
1539                                 "for new device state.\n");
1540                 ret = -ENOMEM;
1541                 /* FIXME: can we allocate more resources for the HC? */
1542                 break;
1543         case COMP_BW_ERR:
1544                 dev_warn(&udev->dev, "Not enough bandwidth "
1545                                 "for new device state.\n");
1546                 ret = -ENOSPC;
1547                 /* FIXME: can we go back to the old state? */
1548                 break;
1549         case COMP_TRB_ERR:
1550                 /* the HCD set up something wrong */
1551                 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1552                                 "add flag = 1, "
1553                                 "and endpoint is not disabled.\n");
1554                 ret = -EINVAL;
1555                 break;
1556         case COMP_DEV_ERR:
1557                 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1558                                 "configure command.\n");
1559                 ret = -ENODEV;
1560                 break;
1561         case COMP_SUCCESS:
1562                 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1563                 ret = 0;
1564                 break;
1565         default:
1566                 xhci_err(xhci, "ERROR: unexpected command completion "
1567                                 "code 0x%x.\n", *cmd_status);
1568                 ret = -EINVAL;
1569                 break;
1570         }
1571         return ret;
1572 }
1573
1574 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1575                 struct usb_device *udev, u32 *cmd_status)
1576 {
1577         int ret;
1578         struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1579
1580         switch (*cmd_status) {
1581         case COMP_EINVAL:
1582                 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1583                                 "context command.\n");
1584                 ret = -EINVAL;
1585                 break;
1586         case COMP_EBADSLT:
1587                 dev_warn(&udev->dev, "WARN: slot not enabled for"
1588                                 "evaluate context command.\n");
1589         case COMP_CTX_STATE:
1590                 dev_warn(&udev->dev, "WARN: invalid context state for "
1591                                 "evaluate context command.\n");
1592                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1593                 ret = -EINVAL;
1594                 break;
1595         case COMP_DEV_ERR:
1596                 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1597                                 "context command.\n");
1598                 ret = -ENODEV;
1599                 break;
1600         case COMP_MEL_ERR:
1601                 /* Max Exit Latency too large error */
1602                 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1603                 ret = -EINVAL;
1604                 break;
1605         case COMP_SUCCESS:
1606                 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1607                 ret = 0;
1608                 break;
1609         default:
1610                 xhci_err(xhci, "ERROR: unexpected command completion "
1611                                 "code 0x%x.\n", *cmd_status);
1612                 ret = -EINVAL;
1613                 break;
1614         }
1615         return ret;
1616 }
1617
1618 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1619                 struct xhci_container_ctx *in_ctx)
1620 {
1621         struct xhci_input_control_ctx *ctrl_ctx;
1622         u32 valid_add_flags;
1623         u32 valid_drop_flags;
1624
1625         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1626         /* Ignore the slot flag (bit 0), and the default control endpoint flag
1627          * (bit 1).  The default control endpoint is added during the Address
1628          * Device command and is never removed until the slot is disabled.
1629          */
1630         valid_add_flags = ctrl_ctx->add_flags >> 2;
1631         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1632
1633         /* Use hweight32 to count the number of ones in the add flags, or
1634          * number of endpoints added.  Don't count endpoints that are changed
1635          * (both added and dropped).
1636          */
1637         return hweight32(valid_add_flags) -
1638                 hweight32(valid_add_flags & valid_drop_flags);
1639 }
1640
1641 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1642                 struct xhci_container_ctx *in_ctx)
1643 {
1644         struct xhci_input_control_ctx *ctrl_ctx;
1645         u32 valid_add_flags;
1646         u32 valid_drop_flags;
1647
1648         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1649         valid_add_flags = ctrl_ctx->add_flags >> 2;
1650         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1651
1652         return hweight32(valid_drop_flags) -
1653                 hweight32(valid_add_flags & valid_drop_flags);
1654 }
1655
1656 /*
1657  * We need to reserve the new number of endpoints before the configure endpoint
1658  * command completes.  We can't subtract the dropped endpoints from the number
1659  * of active endpoints until the command completes because we can oversubscribe
1660  * the host in this case:
1661  *
1662  *  - the first configure endpoint command drops more endpoints than it adds
1663  *  - a second configure endpoint command that adds more endpoints is queued
1664  *  - the first configure endpoint command fails, so the config is unchanged
1665  *  - the second command may succeed, even though there isn't enough resources
1666  *
1667  * Must be called with xhci->lock held.
1668  */
1669 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1670                 struct xhci_container_ctx *in_ctx)
1671 {
1672         u32 added_eps;
1673
1674         added_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1675         if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1676                 xhci_dbg(xhci, "Not enough ep ctxs: "
1677                                 "%u active, need to add %u, limit is %u.\n",
1678                                 xhci->num_active_eps, added_eps,
1679                                 xhci->limit_active_eps);
1680                 return -ENOMEM;
1681         }
1682         xhci->num_active_eps += added_eps;
1683         xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1684                         xhci->num_active_eps);
1685         return 0;
1686 }
1687
1688 /*
1689  * The configure endpoint was failed by the xHC for some other reason, so we
1690  * need to revert the resources that failed configuration would have used.
1691  *
1692  * Must be called with xhci->lock held.
1693  */
1694 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1695                 struct xhci_container_ctx *in_ctx)
1696 {
1697         u32 num_failed_eps;
1698
1699         num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1700         xhci->num_active_eps -= num_failed_eps;
1701         xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1702                         num_failed_eps,
1703                         xhci->num_active_eps);
1704 }
1705
1706 /*
1707  * Now that the command has completed, clean up the active endpoint count by
1708  * subtracting out the endpoints that were dropped (but not changed).
1709  *
1710  * Must be called with xhci->lock held.
1711  */
1712 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1713                 struct xhci_container_ctx *in_ctx)
1714 {
1715         u32 num_dropped_eps;
1716
1717         num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx);
1718         xhci->num_active_eps -= num_dropped_eps;
1719         if (num_dropped_eps)
1720                 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
1721                                 num_dropped_eps,
1722                                 xhci->num_active_eps);
1723 }
1724
1725 /* Issue a configure endpoint command or evaluate context command
1726  * and wait for it to finish.
1727  */
1728 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1729                 struct usb_device *udev,
1730                 struct xhci_command *command,
1731                 bool ctx_change, bool must_succeed)
1732 {
1733         int ret;
1734         int timeleft;
1735         unsigned long flags;
1736         struct xhci_container_ctx *in_ctx;
1737         struct completion *cmd_completion;
1738         u32 *cmd_status;
1739         struct xhci_virt_device *virt_dev;
1740
1741         spin_lock_irqsave(&xhci->lock, flags);
1742         virt_dev = xhci->devs[udev->slot_id];
1743         if (command) {
1744                 in_ctx = command->in_ctx;
1745                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
1746                                 xhci_reserve_host_resources(xhci, in_ctx)) {
1747                         spin_unlock_irqrestore(&xhci->lock, flags);
1748                         xhci_warn(xhci, "Not enough host resources, "
1749                                         "active endpoint contexts = %u\n",
1750                                         xhci->num_active_eps);
1751                         return -ENOMEM;
1752                 }
1753
1754                 cmd_completion = command->completion;
1755                 cmd_status = &command->status;
1756                 command->command_trb = xhci->cmd_ring->enqueue;
1757
1758                 /* Enqueue pointer can be left pointing to the link TRB,
1759                  * we must handle that
1760                  */
1761                 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
1762                         command->command_trb =
1763                                 xhci->cmd_ring->enq_seg->next->trbs;
1764
1765                 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
1766         } else {
1767                 in_ctx = virt_dev->in_ctx;
1768                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
1769                                 xhci_reserve_host_resources(xhci, in_ctx)) {
1770                         spin_unlock_irqrestore(&xhci->lock, flags);
1771                         xhci_warn(xhci, "Not enough host resources, "
1772                                         "active endpoint contexts = %u\n",
1773                                         xhci->num_active_eps);
1774                         return -ENOMEM;
1775                 }
1776                 cmd_completion = &virt_dev->cmd_completion;
1777                 cmd_status = &virt_dev->cmd_status;
1778         }
1779         init_completion(cmd_completion);
1780
1781         if (!ctx_change)
1782                 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
1783                                 udev->slot_id, must_succeed);
1784         else
1785                 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
1786                                 udev->slot_id);
1787         if (ret < 0) {
1788                 if (command)
1789                         list_del(&command->cmd_list);
1790                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
1791                         xhci_free_host_resources(xhci, in_ctx);
1792                 spin_unlock_irqrestore(&xhci->lock, flags);
1793                 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
1794                 return -ENOMEM;
1795         }
1796         xhci_ring_cmd_db(xhci);
1797         spin_unlock_irqrestore(&xhci->lock, flags);
1798
1799         /* Wait for the configure endpoint command to complete */
1800         timeleft = wait_for_completion_interruptible_timeout(
1801                         cmd_completion,
1802                         USB_CTRL_SET_TIMEOUT);
1803         if (timeleft <= 0) {
1804                 xhci_warn(xhci, "%s while waiting for %s command\n",
1805                                 timeleft == 0 ? "Timeout" : "Signal",
1806                                 ctx_change == 0 ?
1807                                         "configure endpoint" :
1808                                         "evaluate context");
1809                 /* FIXME cancel the configure endpoint command */
1810                 return -ETIME;
1811         }
1812
1813         if (!ctx_change)
1814                 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
1815         else
1816                 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
1817
1818         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
1819                 spin_lock_irqsave(&xhci->lock, flags);
1820                 /* If the command failed, remove the reserved resources.
1821                  * Otherwise, clean up the estimate to include dropped eps.
1822                  */
1823                 if (ret)
1824                         xhci_free_host_resources(xhci, in_ctx);
1825                 else
1826                         xhci_finish_resource_reservation(xhci, in_ctx);
1827                 spin_unlock_irqrestore(&xhci->lock, flags);
1828         }
1829         return ret;
1830 }
1831
1832 /* Called after one or more calls to xhci_add_endpoint() or
1833  * xhci_drop_endpoint().  If this call fails, the USB core is expected
1834  * to call xhci_reset_bandwidth().
1835  *
1836  * Since we are in the middle of changing either configuration or
1837  * installing a new alt setting, the USB core won't allow URBs to be
1838  * enqueued for any endpoint on the old config or interface.  Nothing
1839  * else should be touching the xhci->devs[slot_id] structure, so we
1840  * don't need to take the xhci->lock for manipulating that.
1841  */
1842 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1843 {
1844         int i;
1845         int ret = 0;
1846         struct xhci_hcd *xhci;
1847         struct xhci_virt_device *virt_dev;
1848         struct xhci_input_control_ctx *ctrl_ctx;
1849         struct xhci_slot_ctx *slot_ctx;
1850
1851         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1852         if (ret <= 0)
1853                 return ret;
1854         xhci = hcd_to_xhci(hcd);
1855         if (xhci->xhc_state & XHCI_STATE_DYING)
1856                 return -ENODEV;
1857
1858         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1859         virt_dev = xhci->devs[udev->slot_id];
1860
1861         /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
1862         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1863         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
1864         ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
1865         ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
1866         xhci_dbg(xhci, "New Input Control Context:\n");
1867         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1868         xhci_dbg_ctx(xhci, virt_dev->in_ctx,
1869                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
1870
1871         ret = xhci_configure_endpoint(xhci, udev, NULL,
1872                         false, false);
1873         if (ret) {
1874                 /* Callee should call reset_bandwidth() */
1875                 return ret;
1876         }
1877
1878         xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
1879         xhci_dbg_ctx(xhci, virt_dev->out_ctx,
1880                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
1881
1882         /* Free any rings that were dropped, but not changed. */
1883         for (i = 1; i < 31; ++i) {
1884                 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
1885                     !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
1886                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
1887         }
1888         xhci_zero_in_ctx(xhci, virt_dev);
1889         /*
1890          * Install any rings for completely new endpoints or changed endpoints,
1891          * and free or cache any old rings from changed endpoints.
1892          */
1893         for (i = 1; i < 31; ++i) {
1894                 if (!virt_dev->eps[i].new_ring)
1895                         continue;
1896                 /* Only cache or free the old ring if it exists.
1897                  * It may not if this is the first add of an endpoint.
1898                  */
1899                 if (virt_dev->eps[i].ring) {
1900                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
1901                 }
1902                 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
1903                 virt_dev->eps[i].new_ring = NULL;
1904         }
1905
1906         return ret;
1907 }
1908
1909 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1910 {
1911         struct xhci_hcd *xhci;
1912         struct xhci_virt_device *virt_dev;
1913         int i, ret;
1914
1915         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1916         if (ret <= 0)
1917                 return;
1918         xhci = hcd_to_xhci(hcd);
1919
1920         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1921         virt_dev = xhci->devs[udev->slot_id];
1922         /* Free any rings allocated for added endpoints */
1923         for (i = 0; i < 31; ++i) {
1924                 if (virt_dev->eps[i].new_ring) {
1925                         xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
1926                         virt_dev->eps[i].new_ring = NULL;
1927                 }
1928         }
1929         xhci_zero_in_ctx(xhci, virt_dev);
1930 }
1931
1932 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
1933                 struct xhci_container_ctx *in_ctx,
1934                 struct xhci_container_ctx *out_ctx,
1935                 u32 add_flags, u32 drop_flags)
1936 {
1937         struct xhci_input_control_ctx *ctrl_ctx;
1938         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1939         ctrl_ctx->add_flags = cpu_to_le32(add_flags);
1940         ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
1941         xhci_slot_copy(xhci, in_ctx, out_ctx);
1942         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
1943
1944         xhci_dbg(xhci, "Input Context:\n");
1945         xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
1946 }
1947
1948 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
1949                 unsigned int slot_id, unsigned int ep_index,
1950                 struct xhci_dequeue_state *deq_state)
1951 {
1952         struct xhci_container_ctx *in_ctx;
1953         struct xhci_ep_ctx *ep_ctx;
1954         u32 added_ctxs;
1955         dma_addr_t addr;
1956
1957         xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1958                         xhci->devs[slot_id]->out_ctx, ep_index);
1959         in_ctx = xhci->devs[slot_id]->in_ctx;
1960         ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1961         addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
1962                         deq_state->new_deq_ptr);
1963         if (addr == 0) {
1964                 xhci_warn(xhci, "WARN Cannot submit config ep after "
1965                                 "reset ep command\n");
1966                 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
1967                                 deq_state->new_deq_seg,
1968                                 deq_state->new_deq_ptr);
1969                 return;
1970         }
1971         ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
1972
1973         added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
1974         xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
1975                         xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
1976 }
1977
1978 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
1979                 struct usb_device *udev, unsigned int ep_index)
1980 {
1981         struct xhci_dequeue_state deq_state;
1982         struct xhci_virt_ep *ep;
1983
1984         xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
1985         ep = &xhci->devs[udev->slot_id]->eps[ep_index];
1986         /* We need to move the HW's dequeue pointer past this TD,
1987          * or it will attempt to resend it on the next doorbell ring.
1988          */
1989         xhci_find_new_dequeue_state(xhci, udev->slot_id,
1990                         ep_index, ep->stopped_stream, ep->stopped_td,
1991                         &deq_state);
1992
1993         /* HW with the reset endpoint quirk will use the saved dequeue state to
1994          * issue a configure endpoint command later.
1995          */
1996         if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
1997                 xhci_dbg(xhci, "Queueing new dequeue state\n");
1998                 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
1999                                 ep_index, ep->stopped_stream, &deq_state);
2000         } else {
2001                 /* Better hope no one uses the input context between now and the
2002                  * reset endpoint completion!
2003                  * XXX: No idea how this hardware will react when stream rings
2004                  * are enabled.
2005                  */
2006                 xhci_dbg(xhci, "Setting up input context for "
2007                                 "configure endpoint command\n");
2008                 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2009                                 ep_index, &deq_state);
2010         }
2011 }
2012
2013 /* Deal with stalled endpoints.  The core should have sent the control message
2014  * to clear the halt condition.  However, we need to make the xHCI hardware
2015  * reset its sequence number, since a device will expect a sequence number of
2016  * zero after the halt condition is cleared.
2017  * Context: in_interrupt
2018  */
2019 void xhci_endpoint_reset(struct usb_hcd *hcd,
2020                 struct usb_host_endpoint *ep)
2021 {
2022         struct xhci_hcd *xhci;
2023         struct usb_device *udev;
2024         unsigned int ep_index;
2025         unsigned long flags;
2026         int ret;
2027         struct xhci_virt_ep *virt_ep;
2028
2029         xhci = hcd_to_xhci(hcd);
2030         udev = (struct usb_device *) ep->hcpriv;
2031         /* Called with a root hub endpoint (or an endpoint that wasn't added
2032          * with xhci_add_endpoint()
2033          */
2034         if (!ep->hcpriv)
2035                 return;
2036         ep_index = xhci_get_endpoint_index(&ep->desc);
2037         virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2038         if (!virt_ep->stopped_td) {
2039                 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2040                                 ep->desc.bEndpointAddress);
2041                 return;
2042         }
2043         if (usb_endpoint_xfer_control(&ep->desc)) {
2044                 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2045                 return;
2046         }
2047
2048         xhci_dbg(xhci, "Queueing reset endpoint command\n");
2049         spin_lock_irqsave(&xhci->lock, flags);
2050         ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2051         /*
2052          * Can't change the ring dequeue pointer until it's transitioned to the
2053          * stopped state, which is only upon a successful reset endpoint
2054          * command.  Better hope that last command worked!
2055          */
2056         if (!ret) {
2057                 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2058                 kfree(virt_ep->stopped_td);
2059                 xhci_ring_cmd_db(xhci);
2060         }
2061         virt_ep->stopped_td = NULL;
2062         virt_ep->stopped_trb = NULL;
2063         virt_ep->stopped_stream = 0;
2064         spin_unlock_irqrestore(&xhci->lock, flags);
2065
2066         if (ret)
2067                 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2068 }
2069
2070 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2071                 struct usb_device *udev, struct usb_host_endpoint *ep,
2072                 unsigned int slot_id)
2073 {
2074         int ret;
2075         unsigned int ep_index;
2076         unsigned int ep_state;
2077
2078         if (!ep)
2079                 return -EINVAL;
2080         ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2081         if (ret <= 0)
2082                 return -EINVAL;
2083         if (ep->ss_ep_comp.bmAttributes == 0) {
2084                 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2085                                 " descriptor for ep 0x%x does not support streams\n",
2086                                 ep->desc.bEndpointAddress);
2087                 return -EINVAL;
2088         }
2089
2090         ep_index = xhci_get_endpoint_index(&ep->desc);
2091         ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2092         if (ep_state & EP_HAS_STREAMS ||
2093                         ep_state & EP_GETTING_STREAMS) {
2094                 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2095                                 "already has streams set up.\n",
2096                                 ep->desc.bEndpointAddress);
2097                 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2098                                 "dynamic stream context array reallocation.\n");
2099                 return -EINVAL;
2100         }
2101         if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2102                 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2103                                 "endpoint 0x%x; URBs are pending.\n",
2104                                 ep->desc.bEndpointAddress);
2105                 return -EINVAL;
2106         }
2107         return 0;
2108 }
2109
2110 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2111                 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2112 {
2113         unsigned int max_streams;
2114
2115         /* The stream context array size must be a power of two */
2116         *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2117         /*
2118          * Find out how many primary stream array entries the host controller
2119          * supports.  Later we may use secondary stream arrays (similar to 2nd
2120          * level page entries), but that's an optional feature for xHCI host
2121          * controllers. xHCs must support at least 4 stream IDs.
2122          */
2123         max_streams = HCC_MAX_PSA(xhci->hcc_params);
2124         if (*num_stream_ctxs > max_streams) {
2125                 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2126                                 max_streams);
2127                 *num_stream_ctxs = max_streams;
2128                 *num_streams = max_streams;
2129         }
2130 }
2131
2132 /* Returns an error code if one of the endpoint already has streams.
2133  * This does not change any data structures, it only checks and gathers
2134  * information.
2135  */
2136 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2137                 struct usb_device *udev,
2138                 struct usb_host_endpoint **eps, unsigned int num_eps,
2139                 unsigned int *num_streams, u32 *changed_ep_bitmask)
2140 {
2141         unsigned int max_streams;
2142         unsigned int endpoint_flag;
2143         int i;
2144         int ret;
2145
2146         for (i = 0; i < num_eps; i++) {
2147                 ret = xhci_check_streams_endpoint(xhci, udev,
2148                                 eps[i], udev->slot_id);
2149                 if (ret < 0)
2150                         return ret;
2151
2152                 max_streams = USB_SS_MAX_STREAMS(
2153                                 eps[i]->ss_ep_comp.bmAttributes);
2154                 if (max_streams < (*num_streams - 1)) {
2155                         xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2156                                         eps[i]->desc.bEndpointAddress,
2157                                         max_streams);
2158                         *num_streams = max_streams+1;
2159                 }
2160
2161                 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
2162                 if (*changed_ep_bitmask & endpoint_flag)
2163                         return -EINVAL;
2164                 *changed_ep_bitmask |= endpoint_flag;
2165         }
2166         return 0;
2167 }
2168
2169 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
2170                 struct usb_device *udev,
2171                 struct usb_host_endpoint **eps, unsigned int num_eps)
2172 {
2173         u32 changed_ep_bitmask = 0;
2174         unsigned int slot_id;
2175         unsigned int ep_index;
2176         unsigned int ep_state;
2177         int i;
2178
2179         slot_id = udev->slot_id;
2180         if (!xhci->devs[slot_id])
2181                 return 0;
2182
2183         for (i = 0; i < num_eps; i++) {
2184                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2185                 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2186                 /* Are streams already being freed for the endpoint? */
2187                 if (ep_state & EP_GETTING_NO_STREAMS) {
2188                         xhci_warn(xhci, "WARN Can't disable streams for "
2189                                         "endpoint 0x%x\n, "
2190                                         "streams are being disabled already.",
2191                                         eps[i]->desc.bEndpointAddress);
2192                         return 0;
2193                 }
2194                 /* Are there actually any streams to free? */
2195                 if (!(ep_state & EP_HAS_STREAMS) &&
2196                                 !(ep_state & EP_GETTING_STREAMS)) {
2197                         xhci_warn(xhci, "WARN Can't disable streams for "
2198                                         "endpoint 0x%x\n, "
2199                                         "streams are already disabled!",
2200                                         eps[i]->desc.bEndpointAddress);
2201                         xhci_warn(xhci, "WARN xhci_free_streams() called "
2202                                         "with non-streams endpoint\n");
2203                         return 0;
2204                 }
2205                 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
2206         }
2207         return changed_ep_bitmask;
2208 }
2209
2210 /*
2211  * The USB device drivers use this function (though the HCD interface in USB
2212  * core) to prepare a set of bulk endpoints to use streams.  Streams are used to
2213  * coordinate mass storage command queueing across multiple endpoints (basically
2214  * a stream ID == a task ID).
2215  *
2216  * Setting up streams involves allocating the same size stream context array
2217  * for each endpoint and issuing a configure endpoint command for all endpoints.
2218  *
2219  * Don't allow the call to succeed if one endpoint only supports one stream
2220  * (which means it doesn't support streams at all).
2221  *
2222  * Drivers may get less stream IDs than they asked for, if the host controller
2223  * hardware or endpoints claim they can't support the number of requested
2224  * stream IDs.
2225  */
2226 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
2227                 struct usb_host_endpoint **eps, unsigned int num_eps,
2228                 unsigned int num_streams, gfp_t mem_flags)
2229 {
2230         int i, ret;
2231         struct xhci_hcd *xhci;
2232         struct xhci_virt_device *vdev;
2233         struct xhci_command *config_cmd;
2234         unsigned int ep_index;
2235         unsigned int num_stream_ctxs;
2236         unsigned long flags;
2237         u32 changed_ep_bitmask = 0;
2238
2239         if (!eps)
2240                 return -EINVAL;
2241
2242         /* Add one to the number of streams requested to account for
2243          * stream 0 that is reserved for xHCI usage.
2244          */
2245         num_streams += 1;
2246         xhci = hcd_to_xhci(hcd);
2247         xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
2248                         num_streams);
2249
2250         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2251         if (!config_cmd) {
2252                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2253                 return -ENOMEM;
2254         }
2255
2256         /* Check to make sure all endpoints are not already configured for
2257          * streams.  While we're at it, find the maximum number of streams that
2258          * all the endpoints will support and check for duplicate endpoints.
2259          */
2260         spin_lock_irqsave(&xhci->lock, flags);
2261         ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
2262                         num_eps, &num_streams, &changed_ep_bitmask);
2263         if (ret < 0) {
2264                 xhci_free_command(xhci, config_cmd);
2265                 spin_unlock_irqrestore(&xhci->lock, flags);
2266                 return ret;
2267         }
2268         if (num_streams <= 1) {
2269                 xhci_warn(xhci, "WARN: endpoints can't handle "
2270                                 "more than one stream.\n");
2271                 xhci_free_command(xhci, config_cmd);
2272                 spin_unlock_irqrestore(&xhci->lock, flags);
2273                 return -EINVAL;
2274         }
2275         vdev = xhci->devs[udev->slot_id];
2276         /* Mark each endpoint as being in transition, so
2277          * xhci_urb_enqueue() will reject all URBs.
2278          */
2279         for (i = 0; i < num_eps; i++) {
2280                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2281                 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
2282         }
2283         spin_unlock_irqrestore(&xhci->lock, flags);
2284
2285         /* Setup internal data structures and allocate HW data structures for
2286          * streams (but don't install the HW structures in the input context
2287          * until we're sure all memory allocation succeeded).
2288          */
2289         xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
2290         xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
2291                         num_stream_ctxs, num_streams);
2292
2293         for (i = 0; i < num_eps; i++) {
2294                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2295                 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
2296                                 num_stream_ctxs,
2297                                 num_streams, mem_flags);
2298                 if (!vdev->eps[ep_index].stream_info)
2299                         goto cleanup;
2300                 /* Set maxPstreams in endpoint context and update deq ptr to
2301                  * point to stream context array. FIXME
2302                  */
2303         }
2304
2305         /* Set up the input context for a configure endpoint command. */
2306         for (i = 0; i < num_eps; i++) {
2307                 struct xhci_ep_ctx *ep_ctx;
2308
2309                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2310                 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
2311
2312                 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
2313                                 vdev->out_ctx, ep_index);
2314                 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
2315                                 vdev->eps[ep_index].stream_info);
2316         }
2317         /* Tell the HW to drop its old copy of the endpoint context info
2318          * and add the updated copy from the input context.
2319          */
2320         xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
2321                         vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2322
2323         /* Issue and wait for the configure endpoint command */
2324         ret = xhci_configure_endpoint(xhci, udev, config_cmd,
2325                         false, false);
2326
2327         /* xHC rejected the configure endpoint command for some reason, so we
2328          * leave the old ring intact and free our internal streams data
2329          * structure.
2330          */
2331         if (ret < 0)
2332                 goto cleanup;
2333
2334         spin_lock_irqsave(&xhci->lock, flags);
2335         for (i = 0; i < num_eps; i++) {
2336                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2337                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2338                 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
2339                          udev->slot_id, ep_index);
2340                 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
2341         }
2342         xhci_free_command(xhci, config_cmd);
2343         spin_unlock_irqrestore(&xhci->lock, flags);
2344
2345         /* Subtract 1 for stream 0, which drivers can't use */
2346         return num_streams - 1;
2347
2348 cleanup:
2349         /* If it didn't work, free the streams! */
2350         for (i = 0; i < num_eps; i++) {
2351                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2352                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2353                 vdev->eps[ep_index].stream_info = NULL;
2354                 /* FIXME Unset maxPstreams in endpoint context and
2355                  * update deq ptr to point to normal string ring.
2356                  */
2357                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2358                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2359                 xhci_endpoint_zero(xhci, vdev, eps[i]);
2360         }
2361         xhci_free_command(xhci, config_cmd);
2362         return -ENOMEM;
2363 }
2364
2365 /* Transition the endpoint from using streams to being a "normal" endpoint
2366  * without streams.
2367  *
2368  * Modify the endpoint context state, submit a configure endpoint command,
2369  * and free all endpoint rings for streams if that completes successfully.
2370  */
2371 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
2372                 struct usb_host_endpoint **eps, unsigned int num_eps,
2373                 gfp_t mem_flags)
2374 {
2375         int i, ret;
2376         struct xhci_hcd *xhci;
2377         struct xhci_virt_device *vdev;
2378         struct xhci_command *command;
2379         unsigned int ep_index;
2380         unsigned long flags;
2381         u32 changed_ep_bitmask;
2382
2383         xhci = hcd_to_xhci(hcd);
2384         vdev = xhci->devs[udev->slot_id];
2385
2386         /* Set up a configure endpoint command to remove the streams rings */
2387         spin_lock_irqsave(&xhci->lock, flags);
2388         changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
2389                         udev, eps, num_eps);
2390         if (changed_ep_bitmask == 0) {
2391                 spin_unlock_irqrestore(&xhci->lock, flags);
2392                 return -EINVAL;
2393         }
2394
2395         /* Use the xhci_command structure from the first endpoint.  We may have
2396          * allocated too many, but the driver may call xhci_free_streams() for
2397          * each endpoint it grouped into one call to xhci_alloc_streams().
2398          */
2399         ep_index = xhci_get_endpoint_index(&eps[0]->desc);
2400         command = vdev->eps[ep_index].stream_info->free_streams_command;
2401         for (i = 0; i < num_eps; i++) {
2402                 struct xhci_ep_ctx *ep_ctx;
2403
2404                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2405                 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
2406                 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
2407                         EP_GETTING_NO_STREAMS;
2408
2409                 xhci_endpoint_copy(xhci, command->in_ctx,
2410                                 vdev->out_ctx, ep_index);
2411                 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
2412                                 &vdev->eps[ep_index]);
2413         }
2414         xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
2415                         vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2416         spin_unlock_irqrestore(&xhci->lock, flags);
2417
2418         /* Issue and wait for the configure endpoint command,
2419          * which must succeed.
2420          */
2421         ret = xhci_configure_endpoint(xhci, udev, command,
2422                         false, true);
2423
2424         /* xHC rejected the configure endpoint command for some reason, so we
2425          * leave the streams rings intact.
2426          */
2427         if (ret < 0)
2428                 return ret;
2429
2430         spin_lock_irqsave(&xhci->lock, flags);
2431         for (i = 0; i < num_eps; i++) {
2432                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2433                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2434                 vdev->eps[ep_index].stream_info = NULL;
2435                 /* FIXME Unset maxPstreams in endpoint context and
2436                  * update deq ptr to point to normal string ring.
2437                  */
2438                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
2439                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2440         }
2441         spin_unlock_irqrestore(&xhci->lock, flags);
2442
2443         return 0;
2444 }
2445
2446 /*
2447  * Deletes endpoint resources for endpoints that were active before a Reset
2448  * Device command, or a Disable Slot command.  The Reset Device command leaves
2449  * the control endpoint intact, whereas the Disable Slot command deletes it.
2450  *
2451  * Must be called with xhci->lock held.
2452  */
2453 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
2454         struct xhci_virt_device *virt_dev, bool drop_control_ep)
2455 {
2456         int i;
2457         unsigned int num_dropped_eps = 0;
2458         unsigned int drop_flags = 0;
2459
2460         for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
2461                 if (virt_dev->eps[i].ring) {
2462                         drop_flags |= 1 << i;
2463                         num_dropped_eps++;
2464                 }
2465         }
2466         xhci->num_active_eps -= num_dropped_eps;
2467         if (num_dropped_eps)
2468                 xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, "
2469                                 "%u now active.\n",
2470                                 num_dropped_eps, drop_flags,
2471                                 xhci->num_active_eps);
2472 }
2473
2474 /*
2475  * This submits a Reset Device Command, which will set the device state to 0,
2476  * set the device address to 0, and disable all the endpoints except the default
2477  * control endpoint.  The USB core should come back and call
2478  * xhci_address_device(), and then re-set up the configuration.  If this is
2479  * called because of a usb_reset_and_verify_device(), then the old alternate
2480  * settings will be re-installed through the normal bandwidth allocation
2481  * functions.
2482  *
2483  * Wait for the Reset Device command to finish.  Remove all structures
2484  * associated with the endpoints that were disabled.  Clear the input device
2485  * structure?  Cache the rings?  Reset the control endpoint 0 max packet size?
2486  *
2487  * If the virt_dev to be reset does not exist or does not match the udev,
2488  * it means the device is lost, possibly due to the xHC restore error and
2489  * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
2490  * re-allocate the device.
2491  */
2492 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
2493 {
2494         int ret, i;
2495         unsigned long flags;
2496         struct xhci_hcd *xhci;
2497         unsigned int slot_id;
2498         struct xhci_virt_device *virt_dev;
2499         struct xhci_command *reset_device_cmd;
2500         int timeleft;
2501         int last_freed_endpoint;
2502         struct xhci_slot_ctx *slot_ctx;
2503
2504         ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
2505         if (ret <= 0)
2506                 return ret;
2507         xhci = hcd_to_xhci(hcd);
2508         slot_id = udev->slot_id;
2509         virt_dev = xhci->devs[slot_id];
2510         if (!virt_dev) {
2511                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
2512                                 "not exist. Re-allocate the device\n", slot_id);
2513                 ret = xhci_alloc_dev(hcd, udev);
2514                 if (ret == 1)
2515                         return 0;
2516                 else
2517                         return -EINVAL;
2518         }
2519
2520         if (virt_dev->udev != udev) {
2521                 /* If the virt_dev and the udev does not match, this virt_dev
2522                  * may belong to another udev.
2523                  * Re-allocate the device.
2524                  */
2525                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
2526                                 "not match the udev. Re-allocate the device\n",
2527                                 slot_id);
2528                 ret = xhci_alloc_dev(hcd, udev);
2529                 if (ret == 1)
2530                         return 0;
2531                 else
2532                         return -EINVAL;
2533         }
2534
2535         /* If device is not setup, there is no point in resetting it */
2536         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
2537         if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
2538                                                 SLOT_STATE_DISABLED)
2539                 return 0;
2540
2541         xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
2542         /* Allocate the command structure that holds the struct completion.
2543          * Assume we're in process context, since the normal device reset
2544          * process has to wait for the device anyway.  Storage devices are
2545          * reset as part of error handling, so use GFP_NOIO instead of
2546          * GFP_KERNEL.
2547          */
2548         reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
2549         if (!reset_device_cmd) {
2550                 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
2551                 return -ENOMEM;
2552         }
2553
2554         /* Attempt to submit the Reset Device command to the command ring */
2555         spin_lock_irqsave(&xhci->lock, flags);
2556         reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
2557
2558         /* Enqueue pointer can be left pointing to the link TRB,
2559          * we must handle that
2560          */
2561         if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control))
2562                 reset_device_cmd->command_trb =
2563                         xhci->cmd_ring->enq_seg->next->trbs;
2564
2565         list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
2566         ret = xhci_queue_reset_device(xhci, slot_id);
2567         if (ret) {
2568                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2569                 list_del(&reset_device_cmd->cmd_list);
2570                 spin_unlock_irqrestore(&xhci->lock, flags);
2571                 goto command_cleanup;
2572         }
2573         xhci_ring_cmd_db(xhci);
2574         spin_unlock_irqrestore(&xhci->lock, flags);
2575
2576         /* Wait for the Reset Device command to finish */
2577         timeleft = wait_for_completion_interruptible_timeout(
2578                         reset_device_cmd->completion,
2579                         USB_CTRL_SET_TIMEOUT);
2580         if (timeleft <= 0) {
2581                 xhci_warn(xhci, "%s while waiting for reset device command\n",
2582                                 timeleft == 0 ? "Timeout" : "Signal");
2583                 spin_lock_irqsave(&xhci->lock, flags);
2584                 /* The timeout might have raced with the event ring handler, so
2585                  * only delete from the list if the item isn't poisoned.
2586                  */
2587                 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
2588                         list_del(&reset_device_cmd->cmd_list);
2589                 spin_unlock_irqrestore(&xhci->lock, flags);
2590                 ret = -ETIME;
2591                 goto command_cleanup;
2592         }
2593
2594         /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
2595          * unless we tried to reset a slot ID that wasn't enabled,
2596          * or the device wasn't in the addressed or configured state.
2597          */
2598         ret = reset_device_cmd->status;
2599         switch (ret) {
2600         case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
2601         case COMP_CTX_STATE: /* 0.96 completion code for same thing */
2602                 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
2603                                 slot_id,
2604                                 xhci_get_slot_state(xhci, virt_dev->out_ctx));
2605                 xhci_info(xhci, "Not freeing device rings.\n");
2606                 /* Don't treat this as an error.  May change my mind later. */
2607                 ret = 0;
2608                 goto command_cleanup;
2609         case COMP_SUCCESS:
2610                 xhci_dbg(xhci, "Successful reset device command.\n");
2611                 break;
2612         default:
2613                 if (xhci_is_vendor_info_code(xhci, ret))
2614                         break;
2615                 xhci_warn(xhci, "Unknown completion code %u for "
2616                                 "reset device command.\n", ret);
2617                 ret = -EINVAL;
2618                 goto command_cleanup;
2619         }
2620
2621         /* Free up host controller endpoint resources */
2622         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2623                 spin_lock_irqsave(&xhci->lock, flags);
2624                 /* Don't delete the default control endpoint resources */
2625                 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
2626                 spin_unlock_irqrestore(&xhci->lock, flags);
2627         }
2628
2629         /* Everything but endpoint 0 is disabled, so free or cache the rings. */
2630         last_freed_endpoint = 1;
2631         for (i = 1; i < 31; ++i) {
2632                 struct xhci_virt_ep *ep = &virt_dev->eps[i];
2633
2634                 if (ep->ep_state & EP_HAS_STREAMS) {
2635                         xhci_free_stream_info(xhci, ep->stream_info);
2636                         ep->stream_info = NULL;
2637                         ep->ep_state &= ~EP_HAS_STREAMS;
2638                 }
2639
2640                 if (ep->ring) {
2641                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2642                         last_freed_endpoint = i;
2643                 }
2644         }
2645         xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
2646         xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
2647         ret = 0;
2648
2649 command_cleanup:
2650         xhci_free_command(xhci, reset_device_cmd);
2651         return ret;
2652 }
2653
2654 /*
2655  * At this point, the struct usb_device is about to go away, the device has
2656  * disconnected, and all traffic has been stopped and the endpoints have been
2657  * disabled.  Free any HC data structures associated with that device.
2658  */
2659 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
2660 {
2661         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2662         struct xhci_virt_device *virt_dev;
2663         unsigned long flags;
2664         u32 state;
2665         int i, ret;
2666
2667         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2668         if (ret <= 0)
2669                 return;
2670
2671         virt_dev = xhci->devs[udev->slot_id];
2672
2673         /* Stop any wayward timer functions (which may grab the lock) */
2674         for (i = 0; i < 31; ++i) {
2675                 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
2676                 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
2677         }
2678
2679         spin_lock_irqsave(&xhci->lock, flags);
2680         /* Don't disable the slot if the host controller is dead. */
2681         state = xhci_readl(xhci, &xhci->op_regs->status);
2682         if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING)) {
2683                 xhci_free_virt_device(xhci, udev->slot_id);
2684                 spin_unlock_irqrestore(&xhci->lock, flags);
2685                 return;
2686         }
2687
2688         if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
2689                 spin_unlock_irqrestore(&xhci->lock, flags);
2690                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2691                 return;
2692         }
2693         xhci_ring_cmd_db(xhci);
2694         spin_unlock_irqrestore(&xhci->lock, flags);
2695         /*
2696          * Event command completion handler will free any data structures
2697          * associated with the slot.  XXX Can free sleep?
2698          */
2699 }
2700
2701 /*
2702  * Checks if we have enough host controller resources for the default control
2703  * endpoint.
2704  *
2705  * Must be called with xhci->lock held.
2706  */
2707 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
2708 {
2709         if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
2710                 xhci_dbg(xhci, "Not enough ep ctxs: "
2711                                 "%u active, need to add 1, limit is %u.\n",
2712                                 xhci->num_active_eps, xhci->limit_active_eps);
2713                 return -ENOMEM;
2714         }
2715         xhci->num_active_eps += 1;
2716         xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n",
2717                         xhci->num_active_eps);
2718         return 0;
2719 }
2720
2721
2722 /*
2723  * Returns 0 if the xHC ran out of device slots, the Enable Slot command
2724  * timed out, or allocating memory failed.  Returns 1 on success.
2725  */
2726 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
2727 {
2728         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2729         unsigned long flags;
2730         int timeleft;
2731         int ret;
2732
2733         spin_lock_irqsave(&xhci->lock, flags);
2734         ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
2735         if (ret) {
2736                 spin_unlock_irqrestore(&xhci->lock, flags);
2737                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2738                 return 0;
2739         }
2740         xhci_ring_cmd_db(xhci);
2741         spin_unlock_irqrestore(&xhci->lock, flags);
2742
2743         /* XXX: how much time for xHC slot assignment? */
2744         timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2745                         USB_CTRL_SET_TIMEOUT);
2746         if (timeleft <= 0) {
2747                 xhci_warn(xhci, "%s while waiting for a slot\n",
2748                                 timeleft == 0 ? "Timeout" : "Signal");
2749                 /* FIXME cancel the enable slot request */
2750                 return 0;
2751         }
2752
2753         if (!xhci->slot_id) {
2754                 xhci_err(xhci, "Error while assigning device slot ID\n");
2755                 return 0;
2756         }
2757
2758         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2759                 spin_lock_irqsave(&xhci->lock, flags);
2760                 ret = xhci_reserve_host_control_ep_resources(xhci);
2761                 if (ret) {
2762                         spin_unlock_irqrestore(&xhci->lock, flags);
2763                         xhci_warn(xhci, "Not enough host resources, "
2764                                         "active endpoint contexts = %u\n",
2765                                         xhci->num_active_eps);
2766                         goto disable_slot;
2767                 }
2768                 spin_unlock_irqrestore(&xhci->lock, flags);
2769         }
2770         /* Use GFP_NOIO, since this function can be called from
2771          * xhci_discover_or_reset_device(), which may be called as part of
2772          * mass storage driver error handling.
2773          */
2774         if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
2775                 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
2776                 goto disable_slot;
2777         }
2778         udev->slot_id = xhci->slot_id;
2779         /* Is this a LS or FS device under a HS hub? */
2780         /* Hub or peripherial? */
2781         return 1;
2782
2783 disable_slot:
2784         /* Disable slot, if we can do it without mem alloc */
2785         spin_lock_irqsave(&xhci->lock, flags);
2786         if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
2787                 xhci_ring_cmd_db(xhci);
2788         spin_unlock_irqrestore(&xhci->lock, flags);
2789         return 0;
2790 }
2791
2792 /*
2793  * Issue an Address Device command (which will issue a SetAddress request to
2794  * the device).
2795  * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
2796  * we should only issue and wait on one address command at the same time.
2797  *
2798  * We add one to the device address issued by the hardware because the USB core
2799  * uses address 1 for the root hubs (even though they're not really devices).
2800  */
2801 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
2802 {
2803         unsigned long flags;
2804         int timeleft;
2805         struct xhci_virt_device *virt_dev;
2806         int ret = 0;
2807         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2808         struct xhci_slot_ctx *slot_ctx;
2809         struct xhci_input_control_ctx *ctrl_ctx;
2810         u64 temp_64;
2811
2812         if (!udev->slot_id) {
2813                 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
2814                 return -EINVAL;
2815         }
2816
2817         virt_dev = xhci->devs[udev->slot_id];
2818
2819         if (WARN_ON(!virt_dev)) {
2820                 /*
2821                  * In plug/unplug torture test with an NEC controller,
2822                  * a zero-dereference was observed once due to virt_dev = 0.
2823                  * Print useful debug rather than crash if it is observed again!
2824                  */
2825                 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
2826                         udev->slot_id);
2827                 return -EINVAL;
2828         }
2829
2830         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2831         /*
2832          * If this is the first Set Address since device plug-in or
2833          * virt_device realloaction after a resume with an xHCI power loss,
2834          * then set up the slot context.
2835          */
2836         if (!slot_ctx->dev_info)
2837                 xhci_setup_addressable_virt_dev(xhci, udev);
2838         /* Otherwise, update the control endpoint ring enqueue pointer. */
2839         else
2840                 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
2841         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2842         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2843
2844         spin_lock_irqsave(&xhci->lock, flags);
2845         ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
2846                                         udev->slot_id);
2847         if (ret) {
2848                 spin_unlock_irqrestore(&xhci->lock, flags);
2849                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2850                 return ret;
2851         }
2852         xhci_ring_cmd_db(xhci);
2853         spin_unlock_irqrestore(&xhci->lock, flags);
2854
2855         /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
2856         timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2857                         USB_CTRL_SET_TIMEOUT);
2858         /* FIXME: From section 4.3.4: "Software shall be responsible for timing
2859          * the SetAddress() "recovery interval" required by USB and aborting the
2860          * command on a timeout.
2861          */
2862         if (timeleft <= 0) {
2863                 xhci_warn(xhci, "%s while waiting for a slot\n",
2864                                 timeleft == 0 ? "Timeout" : "Signal");
2865                 /* FIXME cancel the address device command */
2866                 return -ETIME;
2867         }
2868
2869         switch (virt_dev->cmd_status) {
2870         case COMP_CTX_STATE:
2871         case COMP_EBADSLT:
2872                 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
2873                                 udev->slot_id);
2874                 ret = -EINVAL;
2875                 break;
2876         case COMP_TX_ERR:
2877                 dev_warn(&udev->dev, "Device not responding to set address.\n");
2878                 ret = -EPROTO;
2879                 break;
2880         case COMP_DEV_ERR:
2881                 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
2882                                 "device command.\n");
2883                 ret = -ENODEV;
2884                 break;
2885         case COMP_SUCCESS:
2886                 xhci_dbg(xhci, "Successful Address Device command\n");
2887                 break;
2888         default:
2889                 xhci_err(xhci, "ERROR: unexpected command completion "
2890                                 "code 0x%x.\n", virt_dev->cmd_status);
2891                 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2892                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2893                 ret = -EINVAL;
2894                 break;
2895         }
2896         if (ret) {
2897                 return ret;
2898         }
2899         temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
2900         xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
2901         xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
2902                  udev->slot_id,
2903                  &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
2904                  (unsigned long long)
2905                  le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
2906         xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
2907                         (unsigned long long)virt_dev->out_ctx->dma);
2908         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2909         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2910         xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2911         xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2912         /*
2913          * USB core uses address 1 for the roothubs, so we add one to the
2914          * address given back to us by the HC.
2915          */
2916         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
2917         /* Use kernel assigned address for devices; store xHC assigned
2918          * address locally. */
2919         virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
2920                 + 1;
2921         /* Zero the input context control for later use */
2922         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2923         ctrl_ctx->add_flags = 0;
2924         ctrl_ctx->drop_flags = 0;
2925
2926         xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
2927
2928         return 0;
2929 }
2930
2931 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
2932  * internal data structures for the device.
2933  */
2934 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
2935                         struct usb_tt *tt, gfp_t mem_flags)
2936 {
2937         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2938         struct xhci_virt_device *vdev;
2939         struct xhci_command *config_cmd;
2940         struct xhci_input_control_ctx *ctrl_ctx;
2941         struct xhci_slot_ctx *slot_ctx;
2942         unsigned long flags;
2943         unsigned think_time;
2944         int ret;
2945
2946         /* Ignore root hubs */
2947         if (!hdev->parent)
2948                 return 0;
2949
2950         vdev = xhci->devs[hdev->slot_id];
2951         if (!vdev) {
2952                 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
2953                 return -EINVAL;
2954         }
2955         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2956         if (!config_cmd) {
2957                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2958                 return -ENOMEM;
2959         }
2960
2961         spin_lock_irqsave(&xhci->lock, flags);
2962         xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
2963         ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
2964         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2965         slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
2966         slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
2967         if (tt->multi)
2968                 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
2969         if (xhci->hci_version > 0x95) {
2970                 xhci_dbg(xhci, "xHCI version %x needs hub "
2971                                 "TT think time and number of ports\n",
2972                                 (unsigned int) xhci->hci_version);
2973                 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
2974                 /* Set TT think time - convert from ns to FS bit times.
2975                  * 0 = 8 FS bit times, 1 = 16 FS bit times,
2976                  * 2 = 24 FS bit times, 3 = 32 FS bit times.
2977                  *
2978                  * xHCI 1.0: this field shall be 0 if the device is not a
2979                  * High-spped hub.
2980                  */
2981                 think_time = tt->think_time;
2982                 if (think_time != 0)
2983                         think_time = (think_time / 666) - 1;
2984                 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
2985                         slot_ctx->tt_info |=
2986                                 cpu_to_le32(TT_THINK_TIME(think_time));
2987         } else {
2988                 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
2989                                 "TT think time or number of ports\n",
2990                                 (unsigned int) xhci->hci_version);
2991         }
2992         slot_ctx->dev_state = 0;
2993         spin_unlock_irqrestore(&xhci->lock, flags);
2994
2995         xhci_dbg(xhci, "Set up %s for hub device.\n",
2996                         (xhci->hci_version > 0x95) ?
2997                         "configure endpoint" : "evaluate context");
2998         xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
2999         xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
3000
3001         /* Issue and wait for the configure endpoint or
3002          * evaluate context command.
3003          */
3004         if (xhci->hci_version > 0x95)
3005                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
3006                                 false, false);
3007         else
3008                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
3009                                 true, false);
3010
3011         xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
3012         xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
3013
3014         xhci_free_command(xhci, config_cmd);
3015         return ret;
3016 }
3017
3018 int xhci_get_frame(struct usb_hcd *hcd)
3019 {
3020         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3021         /* EHCI mods by the periodic size.  Why? */
3022         return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
3023 }
3024
3025 MODULE_DESCRIPTION(DRIVER_DESC);
3026 MODULE_AUTHOR(DRIVER_AUTHOR);
3027 MODULE_LICENSE("GPL");
3028
3029 static int __init xhci_hcd_init(void)
3030 {
3031 #ifdef CONFIG_PCI
3032         int retval = 0;
3033
3034         retval = xhci_register_pci();
3035
3036         if (retval < 0) {
3037                 printk(KERN_DEBUG "Problem registering PCI driver.");
3038                 return retval;
3039         }
3040 #endif
3041         /*
3042          * Check the compiler generated sizes of structures that must be laid
3043          * out in specific ways for hardware access.
3044          */
3045         BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
3046         BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
3047         BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
3048         /* xhci_device_control has eight fields, and also
3049          * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
3050          */
3051         BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
3052         BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
3053         BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
3054         BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
3055         BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
3056         /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
3057         BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
3058         BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
3059         return 0;
3060 }
3061 module_init(xhci_hcd_init);
3062
3063 static void __exit xhci_hcd_cleanup(void)
3064 {
3065 #ifdef CONFIG_PCI
3066         xhci_unregister_pci();
3067 #endif
3068 }
3069 module_exit(xhci_hcd_cleanup);