xhci: Avoid "dead ports", add roothub port polling.
[linux-2.6.git] / drivers / usb / host / xhci-hub.c
1 /*
2  * xHCI host controller driver
3  *
4  * Copyright (C) 2008 Intel Corp.
5  *
6  * Author: Sarah Sharp
7  * Some code borrowed from the Linux EHCI driver.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/gfp.h>
24 #include <asm/unaligned.h>
25
26 #include "xhci.h"
27
28 #define PORT_WAKE_BITS  (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
29 #define PORT_RWC_BITS   (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
30                          PORT_RC | PORT_PLC | PORT_PE)
31
32 /* usb 1.1 root hub device descriptor */
33 static u8 usb_bos_descriptor [] = {
34         USB_DT_BOS_SIZE,                /*  __u8 bLength, 5 bytes */
35         USB_DT_BOS,                     /*  __u8 bDescriptorType */
36         0x0F, 0x00,                     /*  __le16 wTotalLength, 15 bytes */
37         0x1,                            /*  __u8 bNumDeviceCaps */
38         /* First device capability */
39         USB_DT_USB_SS_CAP_SIZE,         /*  __u8 bLength, 10 bytes */
40         USB_DT_DEVICE_CAPABILITY,       /* Device Capability */
41         USB_SS_CAP_TYPE,                /* bDevCapabilityType, SUPERSPEED_USB */
42         0x00,                           /* bmAttributes, LTM off by default */
43         USB_5GBPS_OPERATION, 0x00,      /* wSpeedsSupported, 5Gbps only */
44         0x03,                           /* bFunctionalitySupport,
45                                            USB 3.0 speed only */
46         0x00,                           /* bU1DevExitLat, set later. */
47         0x00, 0x00                      /* __le16 bU2DevExitLat, set later. */
48 };
49
50
51 static void xhci_common_hub_descriptor(struct xhci_hcd *xhci,
52                 struct usb_hub_descriptor *desc, int ports)
53 {
54         u16 temp;
55
56         desc->bPwrOn2PwrGood = 10;      /* xhci section 5.4.9 says 20ms max */
57         desc->bHubContrCurrent = 0;
58
59         desc->bNbrPorts = ports;
60         temp = 0;
61         /* Bits 1:0 - support per-port power switching, or power always on */
62         if (HCC_PPC(xhci->hcc_params))
63                 temp |= HUB_CHAR_INDV_PORT_LPSM;
64         else
65                 temp |= HUB_CHAR_NO_LPSM;
66         /* Bit  2 - root hubs are not part of a compound device */
67         /* Bits 4:3 - individual port over current protection */
68         temp |= HUB_CHAR_INDV_PORT_OCPM;
69         /* Bits 6:5 - no TTs in root ports */
70         /* Bit  7 - no port indicators */
71         desc->wHubCharacteristics = cpu_to_le16(temp);
72 }
73
74 /* Fill in the USB 2.0 roothub descriptor */
75 static void xhci_usb2_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
76                 struct usb_hub_descriptor *desc)
77 {
78         int ports;
79         u16 temp;
80         __u8 port_removable[(USB_MAXCHILDREN + 1 + 7) / 8];
81         u32 portsc;
82         unsigned int i;
83
84         ports = xhci->num_usb2_ports;
85
86         xhci_common_hub_descriptor(xhci, desc, ports);
87         desc->bDescriptorType = USB_DT_HUB;
88         temp = 1 + (ports / 8);
89         desc->bDescLength = USB_DT_HUB_NONVAR_SIZE + 2 * temp;
90
91         /* The Device Removable bits are reported on a byte granularity.
92          * If the port doesn't exist within that byte, the bit is set to 0.
93          */
94         memset(port_removable, 0, sizeof(port_removable));
95         for (i = 0; i < ports; i++) {
96                 portsc = xhci_readl(xhci, xhci->usb2_ports[i]);
97                 /* If a device is removable, PORTSC reports a 0, same as in the
98                  * hub descriptor DeviceRemovable bits.
99                  */
100                 if (portsc & PORT_DEV_REMOVE)
101                         /* This math is hairy because bit 0 of DeviceRemovable
102                          * is reserved, and bit 1 is for port 1, etc.
103                          */
104                         port_removable[(i + 1) / 8] |= 1 << ((i + 1) % 8);
105         }
106
107         /* ch11.h defines a hub descriptor that has room for USB_MAXCHILDREN
108          * ports on it.  The USB 2.0 specification says that there are two
109          * variable length fields at the end of the hub descriptor:
110          * DeviceRemovable and PortPwrCtrlMask.  But since we can have less than
111          * USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array
112          * to set PortPwrCtrlMask bits.  PortPwrCtrlMask must always be set to
113          * 0xFF, so we initialize the both arrays (DeviceRemovable and
114          * PortPwrCtrlMask) to 0xFF.  Then we set the DeviceRemovable for each
115          * set of ports that actually exist.
116          */
117         memset(desc->u.hs.DeviceRemovable, 0xff,
118                         sizeof(desc->u.hs.DeviceRemovable));
119         memset(desc->u.hs.PortPwrCtrlMask, 0xff,
120                         sizeof(desc->u.hs.PortPwrCtrlMask));
121
122         for (i = 0; i < (ports + 1 + 7) / 8; i++)
123                 memset(&desc->u.hs.DeviceRemovable[i], port_removable[i],
124                                 sizeof(__u8));
125 }
126
127 /* Fill in the USB 3.0 roothub descriptor */
128 static void xhci_usb3_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
129                 struct usb_hub_descriptor *desc)
130 {
131         int ports;
132         u16 port_removable;
133         u32 portsc;
134         unsigned int i;
135
136         ports = xhci->num_usb3_ports;
137         xhci_common_hub_descriptor(xhci, desc, ports);
138         desc->bDescriptorType = USB_DT_SS_HUB;
139         desc->bDescLength = USB_DT_SS_HUB_SIZE;
140
141         /* header decode latency should be zero for roothubs,
142          * see section 4.23.5.2.
143          */
144         desc->u.ss.bHubHdrDecLat = 0;
145         desc->u.ss.wHubDelay = 0;
146
147         port_removable = 0;
148         /* bit 0 is reserved, bit 1 is for port 1, etc. */
149         for (i = 0; i < ports; i++) {
150                 portsc = xhci_readl(xhci, xhci->usb3_ports[i]);
151                 if (portsc & PORT_DEV_REMOVE)
152                         port_removable |= 1 << (i + 1);
153         }
154         memset(&desc->u.ss.DeviceRemovable,
155                         (__force __u16) cpu_to_le16(port_removable),
156                         sizeof(__u16));
157 }
158
159 static void xhci_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
160                 struct usb_hub_descriptor *desc)
161 {
162
163         if (hcd->speed == HCD_USB3)
164                 xhci_usb3_hub_descriptor(hcd, xhci, desc);
165         else
166                 xhci_usb2_hub_descriptor(hcd, xhci, desc);
167
168 }
169
170 static unsigned int xhci_port_speed(unsigned int port_status)
171 {
172         if (DEV_LOWSPEED(port_status))
173                 return USB_PORT_STAT_LOW_SPEED;
174         if (DEV_HIGHSPEED(port_status))
175                 return USB_PORT_STAT_HIGH_SPEED;
176         /*
177          * FIXME: Yes, we should check for full speed, but the core uses that as
178          * a default in portspeed() in usb/core/hub.c (which is the only place
179          * USB_PORT_STAT_*_SPEED is used).
180          */
181         return 0;
182 }
183
184 /*
185  * These bits are Read Only (RO) and should be saved and written to the
186  * registers: 0, 3, 10:13, 30
187  * connect status, over-current status, port speed, and device removable.
188  * connect status and port speed are also sticky - meaning they're in
189  * the AUX well and they aren't changed by a hot, warm, or cold reset.
190  */
191 #define XHCI_PORT_RO    ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
192 /*
193  * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
194  * bits 5:8, 9, 14:15, 25:27
195  * link state, port power, port indicator state, "wake on" enable state
196  */
197 #define XHCI_PORT_RWS   ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
198 /*
199  * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
200  * bit 4 (port reset)
201  */
202 #define XHCI_PORT_RW1S  ((1<<4))
203 /*
204  * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
205  * bits 1, 17, 18, 19, 20, 21, 22, 23
206  * port enable/disable, and
207  * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
208  * over-current, reset, link state, and L1 change
209  */
210 #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
211 /*
212  * Bit 16 is RW, and writing a '1' to it causes the link state control to be
213  * latched in
214  */
215 #define XHCI_PORT_RW    ((1<<16))
216 /*
217  * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
218  * bits 2, 24, 28:31
219  */
220 #define XHCI_PORT_RZ    ((1<<2) | (1<<24) | (0xf<<28))
221
222 /*
223  * Given a port state, this function returns a value that would result in the
224  * port being in the same state, if the value was written to the port status
225  * control register.
226  * Save Read Only (RO) bits and save read/write bits where
227  * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
228  * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
229  */
230 u32 xhci_port_state_to_neutral(u32 state)
231 {
232         /* Save read-only status and port state */
233         return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
234 }
235
236 /*
237  * find slot id based on port number.
238  * @port: The one-based port number from one of the two split roothubs.
239  */
240 int xhci_find_slot_id_by_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
241                 u16 port)
242 {
243         int slot_id;
244         int i;
245         enum usb_device_speed speed;
246
247         slot_id = 0;
248         for (i = 0; i < MAX_HC_SLOTS; i++) {
249                 if (!xhci->devs[i])
250                         continue;
251                 speed = xhci->devs[i]->udev->speed;
252                 if (((speed == USB_SPEED_SUPER) == (hcd->speed == HCD_USB3))
253                                 && xhci->devs[i]->fake_port == port) {
254                         slot_id = i;
255                         break;
256                 }
257         }
258
259         return slot_id;
260 }
261
262 /*
263  * Stop device
264  * It issues stop endpoint command for EP 0 to 30. And wait the last command
265  * to complete.
266  * suspend will set to 1, if suspend bit need to set in command.
267  */
268 static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
269 {
270         struct xhci_virt_device *virt_dev;
271         struct xhci_command *cmd;
272         unsigned long flags;
273         int timeleft;
274         int ret;
275         int i;
276
277         ret = 0;
278         virt_dev = xhci->devs[slot_id];
279         cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
280         if (!cmd) {
281                 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
282                 return -ENOMEM;
283         }
284
285         spin_lock_irqsave(&xhci->lock, flags);
286         for (i = LAST_EP_INDEX; i > 0; i--) {
287                 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
288                         xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
289         }
290         cmd->command_trb = xhci->cmd_ring->enqueue;
291         list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
292         xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
293         xhci_ring_cmd_db(xhci);
294         spin_unlock_irqrestore(&xhci->lock, flags);
295
296         /* Wait for last stop endpoint command to finish */
297         timeleft = wait_for_completion_interruptible_timeout(
298                         cmd->completion,
299                         USB_CTRL_SET_TIMEOUT);
300         if (timeleft <= 0) {
301                 xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
302                                 timeleft == 0 ? "Timeout" : "Signal");
303                 spin_lock_irqsave(&xhci->lock, flags);
304                 /* The timeout might have raced with the event ring handler, so
305                  * only delete from the list if the item isn't poisoned.
306                  */
307                 if (cmd->cmd_list.next != LIST_POISON1)
308                         list_del(&cmd->cmd_list);
309                 spin_unlock_irqrestore(&xhci->lock, flags);
310                 ret = -ETIME;
311                 goto command_cleanup;
312         }
313
314 command_cleanup:
315         xhci_free_command(xhci, cmd);
316         return ret;
317 }
318
319 /*
320  * Ring device, it rings the all doorbells unconditionally.
321  */
322 void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
323 {
324         int i;
325
326         for (i = 0; i < LAST_EP_INDEX + 1; i++)
327                 if (xhci->devs[slot_id]->eps[i].ring &&
328                     xhci->devs[slot_id]->eps[i].ring->dequeue)
329                         xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
330
331         return;
332 }
333
334 static void xhci_disable_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
335                 u16 wIndex, __le32 __iomem *addr, u32 port_status)
336 {
337         /* Don't allow the USB core to disable SuperSpeed ports. */
338         if (hcd->speed == HCD_USB3) {
339                 xhci_dbg(xhci, "Ignoring request to disable "
340                                 "SuperSpeed port.\n");
341                 return;
342         }
343
344         /* Write 1 to disable the port */
345         xhci_writel(xhci, port_status | PORT_PE, addr);
346         port_status = xhci_readl(xhci, addr);
347         xhci_dbg(xhci, "disable port, actual port %d status  = 0x%x\n",
348                         wIndex, port_status);
349 }
350
351 static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
352                 u16 wIndex, __le32 __iomem *addr, u32 port_status)
353 {
354         char *port_change_bit;
355         u32 status;
356
357         switch (wValue) {
358         case USB_PORT_FEAT_C_RESET:
359                 status = PORT_RC;
360                 port_change_bit = "reset";
361                 break;
362         case USB_PORT_FEAT_C_BH_PORT_RESET:
363                 status = PORT_WRC;
364                 port_change_bit = "warm(BH) reset";
365                 break;
366         case USB_PORT_FEAT_C_CONNECTION:
367                 status = PORT_CSC;
368                 port_change_bit = "connect";
369                 break;
370         case USB_PORT_FEAT_C_OVER_CURRENT:
371                 status = PORT_OCC;
372                 port_change_bit = "over-current";
373                 break;
374         case USB_PORT_FEAT_C_ENABLE:
375                 status = PORT_PEC;
376                 port_change_bit = "enable/disable";
377                 break;
378         case USB_PORT_FEAT_C_SUSPEND:
379                 status = PORT_PLC;
380                 port_change_bit = "suspend/resume";
381                 break;
382         case USB_PORT_FEAT_C_PORT_LINK_STATE:
383                 status = PORT_PLC;
384                 port_change_bit = "link state";
385                 break;
386         default:
387                 /* Should never happen */
388                 return;
389         }
390         /* Change bits are all write 1 to clear */
391         xhci_writel(xhci, port_status | status, addr);
392         port_status = xhci_readl(xhci, addr);
393         xhci_dbg(xhci, "clear port %s change, actual port %d status  = 0x%x\n",
394                         port_change_bit, wIndex, port_status);
395 }
396
397 static int xhci_get_ports(struct usb_hcd *hcd, __le32 __iomem ***port_array)
398 {
399         int max_ports;
400         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
401
402         if (hcd->speed == HCD_USB3) {
403                 max_ports = xhci->num_usb3_ports;
404                 *port_array = xhci->usb3_ports;
405         } else {
406                 max_ports = xhci->num_usb2_ports;
407                 *port_array = xhci->usb2_ports;
408         }
409
410         return max_ports;
411 }
412
413 void xhci_set_link_state(struct xhci_hcd *xhci, __le32 __iomem **port_array,
414                                 int port_id, u32 link_state)
415 {
416         u32 temp;
417
418         temp = xhci_readl(xhci, port_array[port_id]);
419         temp = xhci_port_state_to_neutral(temp);
420         temp &= ~PORT_PLS_MASK;
421         temp |= PORT_LINK_STROBE | link_state;
422         xhci_writel(xhci, temp, port_array[port_id]);
423 }
424
425 void xhci_set_remote_wake_mask(struct xhci_hcd *xhci,
426                 __le32 __iomem **port_array, int port_id, u16 wake_mask)
427 {
428         u32 temp;
429
430         temp = xhci_readl(xhci, port_array[port_id]);
431         temp = xhci_port_state_to_neutral(temp);
432
433         if (wake_mask & USB_PORT_FEAT_REMOTE_WAKE_CONNECT)
434                 temp |= PORT_WKCONN_E;
435         else
436                 temp &= ~PORT_WKCONN_E;
437
438         if (wake_mask & USB_PORT_FEAT_REMOTE_WAKE_DISCONNECT)
439                 temp |= PORT_WKDISC_E;
440         else
441                 temp &= ~PORT_WKDISC_E;
442
443         if (wake_mask & USB_PORT_FEAT_REMOTE_WAKE_OVER_CURRENT)
444                 temp |= PORT_WKOC_E;
445         else
446                 temp &= ~PORT_WKOC_E;
447
448         xhci_writel(xhci, temp, port_array[port_id]);
449 }
450
451 /* Test and clear port RWC bit */
452 void xhci_test_and_clear_bit(struct xhci_hcd *xhci, __le32 __iomem **port_array,
453                                 int port_id, u32 port_bit)
454 {
455         u32 temp;
456
457         temp = xhci_readl(xhci, port_array[port_id]);
458         if (temp & port_bit) {
459                 temp = xhci_port_state_to_neutral(temp);
460                 temp |= port_bit;
461                 xhci_writel(xhci, temp, port_array[port_id]);
462         }
463 }
464
465 /* Updates Link Status for super Speed port */
466 static void xhci_hub_report_link_state(u32 *status, u32 status_reg)
467 {
468         u32 pls = status_reg & PORT_PLS_MASK;
469
470         /* resume state is a xHCI internal state.
471          * Do not report it to usb core.
472          */
473         if (pls == XDEV_RESUME)
474                 return;
475
476         /* When the CAS bit is set then warm reset
477          * should be performed on port
478          */
479         if (status_reg & PORT_CAS) {
480                 /* The CAS bit can be set while the port is
481                  * in any link state.
482                  * Only roothubs have CAS bit, so we
483                  * pretend to be in compliance mode
484                  * unless we're already in compliance
485                  * or the inactive state.
486                  */
487                 if (pls != USB_SS_PORT_LS_COMP_MOD &&
488                     pls != USB_SS_PORT_LS_SS_INACTIVE) {
489                         pls = USB_SS_PORT_LS_COMP_MOD;
490                 }
491                 /* Return also connection bit -
492                  * hub state machine resets port
493                  * when this bit is set.
494                  */
495                 pls |= USB_PORT_STAT_CONNECTION;
496         } else {
497                 /*
498                  * If CAS bit isn't set but the Port is already at
499                  * Compliance Mode, fake a connection so the USB core
500                  * notices the Compliance state and resets the port.
501                  * This resolves an issue generated by the SN65LVPE502CP
502                  * in which sometimes the port enters compliance mode
503                  * caused by a delay on the host-device negotiation.
504                  */
505                 if (pls == USB_SS_PORT_LS_COMP_MOD)
506                         pls |= USB_PORT_STAT_CONNECTION;
507         }
508
509         /* update status field */
510         *status |= pls;
511 }
512
513 /*
514  * Function for Compliance Mode Quirk.
515  *
516  * This Function verifies if all xhc USB3 ports have entered U0, if so,
517  * the compliance mode timer is deleted. A port won't enter
518  * compliance mode if it has previously entered U0.
519  */
520 void xhci_del_comp_mod_timer(struct xhci_hcd *xhci, u32 status, u16 wIndex)
521 {
522         u32 all_ports_seen_u0 = ((1 << xhci->num_usb3_ports)-1);
523         bool port_in_u0 = ((status & PORT_PLS_MASK) == XDEV_U0);
524
525         if (!(xhci->quirks & XHCI_COMP_MODE_QUIRK))
526                 return;
527
528         if ((xhci->port_status_u0 != all_ports_seen_u0) && port_in_u0) {
529                 xhci->port_status_u0 |= 1 << wIndex;
530                 if (xhci->port_status_u0 == all_ports_seen_u0) {
531                         del_timer_sync(&xhci->comp_mode_recovery_timer);
532                         xhci_dbg(xhci, "All USB3 ports have entered U0 already!\n");
533                         xhci_dbg(xhci, "Compliance Mode Recovery Timer Deleted.\n");
534                 }
535         }
536 }
537
538 int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
539                 u16 wIndex, char *buf, u16 wLength)
540 {
541         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
542         int max_ports;
543         unsigned long flags;
544         u32 temp, status;
545         int retval = 0;
546         __le32 __iomem **port_array;
547         int slot_id;
548         struct xhci_bus_state *bus_state;
549         u16 link_state = 0;
550         u16 wake_mask = 0;
551
552         max_ports = xhci_get_ports(hcd, &port_array);
553         bus_state = &xhci->bus_state[hcd_index(hcd)];
554
555         spin_lock_irqsave(&xhci->lock, flags);
556         switch (typeReq) {
557         case GetHubStatus:
558                 /* No power source, over-current reported per port */
559                 memset(buf, 0, 4);
560                 break;
561         case GetHubDescriptor:
562                 /* Check to make sure userspace is asking for the USB 3.0 hub
563                  * descriptor for the USB 3.0 roothub.  If not, we stall the
564                  * endpoint, like external hubs do.
565                  */
566                 if (hcd->speed == HCD_USB3 &&
567                                 (wLength < USB_DT_SS_HUB_SIZE ||
568                                  wValue != (USB_DT_SS_HUB << 8))) {
569                         xhci_dbg(xhci, "Wrong hub descriptor type for "
570                                         "USB 3.0 roothub.\n");
571                         goto error;
572                 }
573                 xhci_hub_descriptor(hcd, xhci,
574                                 (struct usb_hub_descriptor *) buf);
575                 break;
576         case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
577                 if ((wValue & 0xff00) != (USB_DT_BOS << 8))
578                         goto error;
579
580                 if (hcd->speed != HCD_USB3)
581                         goto error;
582
583                 memcpy(buf, &usb_bos_descriptor,
584                                 USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE);
585                 temp = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
586                 buf[12] = HCS_U1_LATENCY(temp);
587                 put_unaligned_le16(HCS_U2_LATENCY(temp), &buf[13]);
588
589                 spin_unlock_irqrestore(&xhci->lock, flags);
590                 return USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE;
591         case GetPortStatus:
592                 if (!wIndex || wIndex > max_ports)
593                         goto error;
594                 wIndex--;
595                 status = 0;
596                 temp = xhci_readl(xhci, port_array[wIndex]);
597                 if (temp == 0xffffffff) {
598                         retval = -ENODEV;
599                         break;
600                 }
601                 xhci_dbg(xhci, "get port status, actual port %d status  = 0x%x\n", wIndex, temp);
602
603                 /* wPortChange bits */
604                 if (temp & PORT_CSC)
605                         status |= USB_PORT_STAT_C_CONNECTION << 16;
606                 if (temp & PORT_PEC)
607                         status |= USB_PORT_STAT_C_ENABLE << 16;
608                 if ((temp & PORT_OCC))
609                         status |= USB_PORT_STAT_C_OVERCURRENT << 16;
610                 if ((temp & PORT_RC))
611                         status |= USB_PORT_STAT_C_RESET << 16;
612                 /* USB3.0 only */
613                 if (hcd->speed == HCD_USB3) {
614                         if ((temp & PORT_PLC))
615                                 status |= USB_PORT_STAT_C_LINK_STATE << 16;
616                         if ((temp & PORT_WRC))
617                                 status |= USB_PORT_STAT_C_BH_RESET << 16;
618                 }
619
620                 if (hcd->speed != HCD_USB3) {
621                         if ((temp & PORT_PLS_MASK) == XDEV_U3
622                                         && (temp & PORT_POWER))
623                                 status |= USB_PORT_STAT_SUSPEND;
624                 }
625                 if ((temp & PORT_PLS_MASK) == XDEV_RESUME &&
626                                 !DEV_SUPERSPEED(temp)) {
627                         if ((temp & PORT_RESET) || !(temp & PORT_PE))
628                                 goto error;
629                         if (time_after_eq(jiffies,
630                                         bus_state->resume_done[wIndex])) {
631                                 xhci_dbg(xhci, "Resume USB2 port %d\n",
632                                         wIndex + 1);
633                                 bus_state->resume_done[wIndex] = 0;
634                                 clear_bit(wIndex, &bus_state->resuming_ports);
635                                 xhci_set_link_state(xhci, port_array, wIndex,
636                                                         XDEV_U0);
637                                 xhci_dbg(xhci, "set port %d resume\n",
638                                         wIndex + 1);
639                                 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
640                                                                  wIndex + 1);
641                                 if (!slot_id) {
642                                         xhci_dbg(xhci, "slot_id is zero\n");
643                                         goto error;
644                                 }
645                                 xhci_ring_device(xhci, slot_id);
646                                 bus_state->port_c_suspend |= 1 << wIndex;
647                                 bus_state->suspended_ports &= ~(1 << wIndex);
648                         } else {
649                                 /*
650                                  * The resume has been signaling for less than
651                                  * 20ms. Report the port status as SUSPEND,
652                                  * let the usbcore check port status again
653                                  * and clear resume signaling later.
654                                  */
655                                 status |= USB_PORT_STAT_SUSPEND;
656                         }
657                 }
658                 if ((temp & PORT_PLS_MASK) == XDEV_U0
659                         && (temp & PORT_POWER)
660                         && (bus_state->suspended_ports & (1 << wIndex))) {
661                         bus_state->suspended_ports &= ~(1 << wIndex);
662                         if (hcd->speed != HCD_USB3)
663                                 bus_state->port_c_suspend |= 1 << wIndex;
664                 }
665                 if (temp & PORT_CONNECT) {
666                         status |= USB_PORT_STAT_CONNECTION;
667                         status |= xhci_port_speed(temp);
668                 }
669                 if (temp & PORT_PE)
670                         status |= USB_PORT_STAT_ENABLE;
671                 if (temp & PORT_OC)
672                         status |= USB_PORT_STAT_OVERCURRENT;
673                 if (temp & PORT_RESET)
674                         status |= USB_PORT_STAT_RESET;
675                 if (temp & PORT_POWER) {
676                         if (hcd->speed == HCD_USB3)
677                                 status |= USB_SS_PORT_STAT_POWER;
678                         else
679                                 status |= USB_PORT_STAT_POWER;
680                 }
681                 /* Update Port Link State for super speed ports*/
682                 if (hcd->speed == HCD_USB3) {
683                         xhci_hub_report_link_state(&status, temp);
684                         /*
685                          * Verify if all USB3 Ports Have entered U0 already.
686                          * Delete Compliance Mode Timer if so.
687                          */
688                         xhci_del_comp_mod_timer(xhci, temp, wIndex);
689                 }
690                 if (bus_state->port_c_suspend & (1 << wIndex))
691                         status |= 1 << USB_PORT_FEAT_C_SUSPEND;
692                 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
693                 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
694                 break;
695         case SetPortFeature:
696                 if (wValue == USB_PORT_FEAT_LINK_STATE)
697                         link_state = (wIndex & 0xff00) >> 3;
698                 if (wValue == USB_PORT_FEAT_REMOTE_WAKE_MASK)
699                         wake_mask = wIndex & 0xff00;
700                 wIndex &= 0xff;
701                 if (!wIndex || wIndex > max_ports)
702                         goto error;
703                 wIndex--;
704                 temp = xhci_readl(xhci, port_array[wIndex]);
705                 if (temp == 0xffffffff) {
706                         retval = -ENODEV;
707                         break;
708                 }
709                 temp = xhci_port_state_to_neutral(temp);
710                 /* FIXME: What new port features do we need to support? */
711                 switch (wValue) {
712                 case USB_PORT_FEAT_SUSPEND:
713                         temp = xhci_readl(xhci, port_array[wIndex]);
714                         if ((temp & PORT_PLS_MASK) != XDEV_U0) {
715                                 /* Resume the port to U0 first */
716                                 xhci_set_link_state(xhci, port_array, wIndex,
717                                                         XDEV_U0);
718                                 spin_unlock_irqrestore(&xhci->lock, flags);
719                                 msleep(10);
720                                 spin_lock_irqsave(&xhci->lock, flags);
721                         }
722                         /* In spec software should not attempt to suspend
723                          * a port unless the port reports that it is in the
724                          * enabled (PED = ‘1’,PLS < ‘3’) state.
725                          */
726                         temp = xhci_readl(xhci, port_array[wIndex]);
727                         if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
728                                 || (temp & PORT_PLS_MASK) >= XDEV_U3) {
729                                 xhci_warn(xhci, "USB core suspending device "
730                                           "not in U0/U1/U2.\n");
731                                 goto error;
732                         }
733
734                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
735                                         wIndex + 1);
736                         if (!slot_id) {
737                                 xhci_warn(xhci, "slot_id is zero\n");
738                                 goto error;
739                         }
740                         /* unlock to execute stop endpoint commands */
741                         spin_unlock_irqrestore(&xhci->lock, flags);
742                         xhci_stop_device(xhci, slot_id, 1);
743                         spin_lock_irqsave(&xhci->lock, flags);
744
745                         xhci_set_link_state(xhci, port_array, wIndex, XDEV_U3);
746
747                         spin_unlock_irqrestore(&xhci->lock, flags);
748                         msleep(10); /* wait device to enter */
749                         spin_lock_irqsave(&xhci->lock, flags);
750
751                         temp = xhci_readl(xhci, port_array[wIndex]);
752                         bus_state->suspended_ports |= 1 << wIndex;
753                         break;
754                 case USB_PORT_FEAT_LINK_STATE:
755                         temp = xhci_readl(xhci, port_array[wIndex]);
756
757                         /* Disable port */
758                         if (link_state == USB_SS_PORT_LS_SS_DISABLED) {
759                                 xhci_dbg(xhci, "Disable port %d\n", wIndex);
760                                 temp = xhci_port_state_to_neutral(temp);
761                                 /*
762                                  * Clear all change bits, so that we get a new
763                                  * connection event.
764                                  */
765                                 temp |= PORT_CSC | PORT_PEC | PORT_WRC |
766                                         PORT_OCC | PORT_RC | PORT_PLC |
767                                         PORT_CEC;
768                                 xhci_writel(xhci, temp | PORT_PE,
769                                         port_array[wIndex]);
770                                 temp = xhci_readl(xhci, port_array[wIndex]);
771                                 break;
772                         }
773
774                         /* Put link in RxDetect (enable port) */
775                         if (link_state == USB_SS_PORT_LS_RX_DETECT) {
776                                 xhci_dbg(xhci, "Enable port %d\n", wIndex);
777                                 xhci_set_link_state(xhci, port_array, wIndex,
778                                                 link_state);
779                                 temp = xhci_readl(xhci, port_array[wIndex]);
780                                 break;
781                         }
782
783                         /* Software should not attempt to set
784                          * port link state above '3' (U3) and the port
785                          * must be enabled.
786                          */
787                         if ((temp & PORT_PE) == 0 ||
788                                 (link_state > USB_SS_PORT_LS_U3)) {
789                                 xhci_warn(xhci, "Cannot set link state.\n");
790                                 goto error;
791                         }
792
793                         if (link_state == USB_SS_PORT_LS_U3) {
794                                 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
795                                                 wIndex + 1);
796                                 if (slot_id) {
797                                         /* unlock to execute stop endpoint
798                                          * commands */
799                                         spin_unlock_irqrestore(&xhci->lock,
800                                                                 flags);
801                                         xhci_stop_device(xhci, slot_id, 1);
802                                         spin_lock_irqsave(&xhci->lock, flags);
803                                 }
804                         }
805
806                         xhci_set_link_state(xhci, port_array, wIndex,
807                                                 link_state);
808
809                         spin_unlock_irqrestore(&xhci->lock, flags);
810                         msleep(20); /* wait device to enter */
811                         spin_lock_irqsave(&xhci->lock, flags);
812
813                         temp = xhci_readl(xhci, port_array[wIndex]);
814                         if (link_state == USB_SS_PORT_LS_U3)
815                                 bus_state->suspended_ports |= 1 << wIndex;
816                         break;
817                 case USB_PORT_FEAT_POWER:
818                         /*
819                          * Turn on ports, even if there isn't per-port switching.
820                          * HC will report connect events even before this is set.
821                          * However, khubd will ignore the roothub events until
822                          * the roothub is registered.
823                          */
824                         xhci_writel(xhci, temp | PORT_POWER,
825                                         port_array[wIndex]);
826
827                         temp = xhci_readl(xhci, port_array[wIndex]);
828                         xhci_dbg(xhci, "set port power, actual port %d status  = 0x%x\n", wIndex, temp);
829                         break;
830                 case USB_PORT_FEAT_RESET:
831                         temp = (temp | PORT_RESET);
832                         xhci_writel(xhci, temp, port_array[wIndex]);
833
834                         temp = xhci_readl(xhci, port_array[wIndex]);
835                         xhci_dbg(xhci, "set port reset, actual port %d status  = 0x%x\n", wIndex, temp);
836                         break;
837                 case USB_PORT_FEAT_REMOTE_WAKE_MASK:
838                         xhci_set_remote_wake_mask(xhci, port_array,
839                                         wIndex, wake_mask);
840                         temp = xhci_readl(xhci, port_array[wIndex]);
841                         xhci_dbg(xhci, "set port remote wake mask, "
842                                         "actual port %d status  = 0x%x\n",
843                                         wIndex, temp);
844                         break;
845                 case USB_PORT_FEAT_BH_PORT_RESET:
846                         temp |= PORT_WR;
847                         xhci_writel(xhci, temp, port_array[wIndex]);
848
849                         temp = xhci_readl(xhci, port_array[wIndex]);
850                         break;
851                 default:
852                         goto error;
853                 }
854                 /* unblock any posted writes */
855                 temp = xhci_readl(xhci, port_array[wIndex]);
856                 break;
857         case ClearPortFeature:
858                 if (!wIndex || wIndex > max_ports)
859                         goto error;
860                 wIndex--;
861                 temp = xhci_readl(xhci, port_array[wIndex]);
862                 if (temp == 0xffffffff) {
863                         retval = -ENODEV;
864                         break;
865                 }
866                 /* FIXME: What new port features do we need to support? */
867                 temp = xhci_port_state_to_neutral(temp);
868                 switch (wValue) {
869                 case USB_PORT_FEAT_SUSPEND:
870                         temp = xhci_readl(xhci, port_array[wIndex]);
871                         xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
872                         xhci_dbg(xhci, "PORTSC %04x\n", temp);
873                         if (temp & PORT_RESET)
874                                 goto error;
875                         if ((temp & PORT_PLS_MASK) == XDEV_U3) {
876                                 if ((temp & PORT_PE) == 0)
877                                         goto error;
878
879                                 xhci_set_link_state(xhci, port_array, wIndex,
880                                                         XDEV_RESUME);
881                                 spin_unlock_irqrestore(&xhci->lock, flags);
882                                 msleep(20);
883                                 spin_lock_irqsave(&xhci->lock, flags);
884                                 xhci_set_link_state(xhci, port_array, wIndex,
885                                                         XDEV_U0);
886                         }
887                         bus_state->port_c_suspend |= 1 << wIndex;
888
889                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
890                                         wIndex + 1);
891                         if (!slot_id) {
892                                 xhci_dbg(xhci, "slot_id is zero\n");
893                                 goto error;
894                         }
895                         xhci_ring_device(xhci, slot_id);
896                         break;
897                 case USB_PORT_FEAT_C_SUSPEND:
898                         bus_state->port_c_suspend &= ~(1 << wIndex);
899                 case USB_PORT_FEAT_C_RESET:
900                 case USB_PORT_FEAT_C_BH_PORT_RESET:
901                 case USB_PORT_FEAT_C_CONNECTION:
902                 case USB_PORT_FEAT_C_OVER_CURRENT:
903                 case USB_PORT_FEAT_C_ENABLE:
904                 case USB_PORT_FEAT_C_PORT_LINK_STATE:
905                         xhci_clear_port_change_bit(xhci, wValue, wIndex,
906                                         port_array[wIndex], temp);
907                         break;
908                 case USB_PORT_FEAT_ENABLE:
909                         xhci_disable_port(hcd, xhci, wIndex,
910                                         port_array[wIndex], temp);
911                         break;
912                 default:
913                         goto error;
914                 }
915                 break;
916         default:
917 error:
918                 /* "stall" on error */
919                 retval = -EPIPE;
920         }
921         spin_unlock_irqrestore(&xhci->lock, flags);
922         return retval;
923 }
924
925 /*
926  * Returns 0 if the status hasn't changed, or the number of bytes in buf.
927  * Ports are 0-indexed from the HCD point of view,
928  * and 1-indexed from the USB core pointer of view.
929  *
930  * Note that the status change bits will be cleared as soon as a port status
931  * change event is generated, so we use the saved status from that event.
932  */
933 int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
934 {
935         unsigned long flags;
936         u32 temp, status;
937         u32 mask;
938         int i, retval;
939         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
940         int max_ports;
941         __le32 __iomem **port_array;
942         struct xhci_bus_state *bus_state;
943         bool reset_change = false;
944
945         max_ports = xhci_get_ports(hcd, &port_array);
946         bus_state = &xhci->bus_state[hcd_index(hcd)];
947
948         /* Initial status is no changes */
949         retval = (max_ports + 8) / 8;
950         memset(buf, 0, retval);
951
952         /*
953          * Inform the usbcore about resume-in-progress by returning
954          * a non-zero value even if there are no status changes.
955          */
956         status = bus_state->resuming_ports;
957
958         mask = PORT_CSC | PORT_PEC | PORT_OCC | PORT_PLC | PORT_WRC;
959
960         spin_lock_irqsave(&xhci->lock, flags);
961         /* For each port, did anything change?  If so, set that bit in buf. */
962         for (i = 0; i < max_ports; i++) {
963                 temp = xhci_readl(xhci, port_array[i]);
964                 if (temp == 0xffffffff) {
965                         retval = -ENODEV;
966                         break;
967                 }
968                 if ((temp & mask) != 0 ||
969                         (bus_state->port_c_suspend & 1 << i) ||
970                         (bus_state->resume_done[i] && time_after_eq(
971                             jiffies, bus_state->resume_done[i]))) {
972                         buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
973                         status = 1;
974                 }
975                 if ((temp & PORT_RC))
976                         reset_change = true;
977         }
978         if (!status && !reset_change) {
979                 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
980                 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
981         }
982         spin_unlock_irqrestore(&xhci->lock, flags);
983         return status ? retval : 0;
984 }
985
986 #ifdef CONFIG_PM
987
988 int xhci_bus_suspend(struct usb_hcd *hcd)
989 {
990         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
991         int max_ports, port_index;
992         __le32 __iomem **port_array;
993         struct xhci_bus_state *bus_state;
994         unsigned long flags;
995
996         max_ports = xhci_get_ports(hcd, &port_array);
997         bus_state = &xhci->bus_state[hcd_index(hcd)];
998
999         spin_lock_irqsave(&xhci->lock, flags);
1000
1001         if (hcd->self.root_hub->do_remote_wakeup) {
1002                 if (bus_state->resuming_ports) {
1003                         spin_unlock_irqrestore(&xhci->lock, flags);
1004                         xhci_dbg(xhci, "suspend failed because "
1005                                                 "a port is resuming\n");
1006                         return -EBUSY;
1007                 }
1008         }
1009
1010         port_index = max_ports;
1011         bus_state->bus_suspended = 0;
1012         while (port_index--) {
1013                 /* suspend the port if the port is not suspended */
1014                 u32 t1, t2;
1015                 int slot_id;
1016
1017                 t1 = xhci_readl(xhci, port_array[port_index]);
1018                 t2 = xhci_port_state_to_neutral(t1);
1019
1020                 if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {
1021                         xhci_dbg(xhci, "port %d not suspended\n", port_index);
1022                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
1023                                         port_index + 1);
1024                         if (slot_id) {
1025                                 spin_unlock_irqrestore(&xhci->lock, flags);
1026                                 xhci_stop_device(xhci, slot_id, 1);
1027                                 spin_lock_irqsave(&xhci->lock, flags);
1028                         }
1029                         t2 &= ~PORT_PLS_MASK;
1030                         t2 |= PORT_LINK_STROBE | XDEV_U3;
1031                         set_bit(port_index, &bus_state->bus_suspended);
1032                 }
1033                 /* USB core sets remote wake mask for USB 3.0 hubs,
1034                  * including the USB 3.0 roothub, but only if CONFIG_USB_SUSPEND
1035                  * is enabled, so also enable remote wake here.
1036                  */
1037                 if (hcd->self.root_hub->do_remote_wakeup) {
1038                         if (t1 & PORT_CONNECT) {
1039                                 t2 |= PORT_WKOC_E | PORT_WKDISC_E;
1040                                 t2 &= ~PORT_WKCONN_E;
1041                         } else {
1042                                 t2 |= PORT_WKOC_E | PORT_WKCONN_E;
1043                                 t2 &= ~PORT_WKDISC_E;
1044                         }
1045                 } else
1046                         t2 &= ~PORT_WAKE_BITS;
1047
1048                 t1 = xhci_port_state_to_neutral(t1);
1049                 if (t1 != t2)
1050                         xhci_writel(xhci, t2, port_array[port_index]);
1051
1052                 if (hcd->speed != HCD_USB3) {
1053                         /* enable remote wake up for USB 2.0 */
1054                         __le32 __iomem *addr;
1055                         u32 tmp;
1056
1057                         /* Add one to the port status register address to get
1058                          * the port power control register address.
1059                          */
1060                         addr = port_array[port_index] + 1;
1061                         tmp = xhci_readl(xhci, addr);
1062                         tmp |= PORT_RWE;
1063                         xhci_writel(xhci, tmp, addr);
1064                 }
1065         }
1066         hcd->state = HC_STATE_SUSPENDED;
1067         bus_state->next_statechange = jiffies + msecs_to_jiffies(10);
1068         spin_unlock_irqrestore(&xhci->lock, flags);
1069         return 0;
1070 }
1071
1072 int xhci_bus_resume(struct usb_hcd *hcd)
1073 {
1074         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1075         int max_ports, port_index;
1076         __le32 __iomem **port_array;
1077         struct xhci_bus_state *bus_state;
1078         u32 temp;
1079         unsigned long flags;
1080
1081         max_ports = xhci_get_ports(hcd, &port_array);
1082         bus_state = &xhci->bus_state[hcd_index(hcd)];
1083
1084         if (time_before(jiffies, bus_state->next_statechange))
1085                 msleep(5);
1086
1087         spin_lock_irqsave(&xhci->lock, flags);
1088         if (!HCD_HW_ACCESSIBLE(hcd)) {
1089                 spin_unlock_irqrestore(&xhci->lock, flags);
1090                 return -ESHUTDOWN;
1091         }
1092
1093         /* delay the irqs */
1094         temp = xhci_readl(xhci, &xhci->op_regs->command);
1095         temp &= ~CMD_EIE;
1096         xhci_writel(xhci, temp, &xhci->op_regs->command);
1097
1098         port_index = max_ports;
1099         while (port_index--) {
1100                 /* Check whether need resume ports. If needed
1101                    resume port and disable remote wakeup */
1102                 u32 temp;
1103                 int slot_id;
1104
1105                 temp = xhci_readl(xhci, port_array[port_index]);
1106                 if (DEV_SUPERSPEED(temp))
1107                         temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
1108                 else
1109                         temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
1110                 if (test_bit(port_index, &bus_state->bus_suspended) &&
1111                     (temp & PORT_PLS_MASK)) {
1112                         if (DEV_SUPERSPEED(temp)) {
1113                                 xhci_set_link_state(xhci, port_array,
1114                                                         port_index, XDEV_U0);
1115                         } else {
1116                                 xhci_set_link_state(xhci, port_array,
1117                                                 port_index, XDEV_RESUME);
1118
1119                                 spin_unlock_irqrestore(&xhci->lock, flags);
1120                                 msleep(20);
1121                                 spin_lock_irqsave(&xhci->lock, flags);
1122
1123                                 xhci_set_link_state(xhci, port_array,
1124                                                         port_index, XDEV_U0);
1125                         }
1126                         /* wait for the port to enter U0 and report port link
1127                          * state change.
1128                          */
1129                         spin_unlock_irqrestore(&xhci->lock, flags);
1130                         msleep(20);
1131                         spin_lock_irqsave(&xhci->lock, flags);
1132
1133                         /* Clear PLC */
1134                         xhci_test_and_clear_bit(xhci, port_array, port_index,
1135                                                 PORT_PLC);
1136
1137                         slot_id = xhci_find_slot_id_by_port(hcd,
1138                                         xhci, port_index + 1);
1139                         if (slot_id)
1140                                 xhci_ring_device(xhci, slot_id);
1141                 } else
1142                         xhci_writel(xhci, temp, port_array[port_index]);
1143
1144                 if (hcd->speed != HCD_USB3) {
1145                         /* disable remote wake up for USB 2.0 */
1146                         __le32 __iomem *addr;
1147                         u32 tmp;
1148
1149                         /* Add one to the port status register address to get
1150                          * the port power control register address.
1151                          */
1152                         addr = port_array[port_index] + 1;
1153                         tmp = xhci_readl(xhci, addr);
1154                         tmp &= ~PORT_RWE;
1155                         xhci_writel(xhci, tmp, addr);
1156                 }
1157         }
1158
1159         (void) xhci_readl(xhci, &xhci->op_regs->command);
1160
1161         bus_state->next_statechange = jiffies + msecs_to_jiffies(5);
1162         /* re-enable irqs */
1163         temp = xhci_readl(xhci, &xhci->op_regs->command);
1164         temp |= CMD_EIE;
1165         xhci_writel(xhci, temp, &xhci->op_regs->command);
1166         temp = xhci_readl(xhci, &xhci->op_regs->command);
1167
1168         spin_unlock_irqrestore(&xhci->lock, flags);
1169         return 0;
1170 }
1171
1172 #endif  /* CONFIG_PM */