Merge branch 'usb-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6
[linux-2.6.git] / drivers / usb / host / ehci-hcd.c
1 /*
2  * Enhanced Host Controller Interface (EHCI) driver for USB.
3  *
4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
5  *
6  * Copyright (c) 2000-2004 by David Brownell
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of the GNU General Public License as published by the
10  * Free Software Foundation; either version 2 of the License, or (at your
11  * option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/dmapool.h>
26 #include <linux/kernel.h>
27 #include <linux/delay.h>
28 #include <linux/ioport.h>
29 #include <linux/sched.h>
30 #include <linux/vmalloc.h>
31 #include <linux/errno.h>
32 #include <linux/init.h>
33 #include <linux/timer.h>
34 #include <linux/ktime.h>
35 #include <linux/list.h>
36 #include <linux/interrupt.h>
37 #include <linux/usb.h>
38 #include <linux/usb/hcd.h>
39 #include <linux/moduleparam.h>
40 #include <linux/dma-mapping.h>
41 #include <linux/debugfs.h>
42 #include <linux/slab.h>
43 #include <linux/uaccess.h>
44
45 #include <asm/byteorder.h>
46 #include <asm/io.h>
47 #include <asm/irq.h>
48 #include <asm/system.h>
49 #include <asm/unaligned.h>
50
51 /*-------------------------------------------------------------------------*/
52
53 /*
54  * EHCI hc_driver implementation ... experimental, incomplete.
55  * Based on the final 1.0 register interface specification.
56  *
57  * USB 2.0 shows up in upcoming www.pcmcia.org technology.
58  * First was PCMCIA, like ISA; then CardBus, which is PCI.
59  * Next comes "CardBay", using USB 2.0 signals.
60  *
61  * Contains additional contributions by Brad Hards, Rory Bolt, and others.
62  * Special thanks to Intel and VIA for providing host controllers to
63  * test this driver on, and Cypress (including In-System Design) for
64  * providing early devices for those host controllers to talk to!
65  */
66
67 #define DRIVER_AUTHOR "David Brownell"
68 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
69
70 static const char       hcd_name [] = "ehci_hcd";
71
72
73 #undef VERBOSE_DEBUG
74 #undef EHCI_URB_TRACE
75
76 #ifdef DEBUG
77 #define EHCI_STATS
78 #endif
79
80 /* magic numbers that can affect system performance */
81 #define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
82 #define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
83 #define EHCI_TUNE_RL_TT         0
84 #define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
85 #define EHCI_TUNE_MULT_TT       1
86 /*
87  * Some drivers think it's safe to schedule isochronous transfers more than
88  * 256 ms into the future (partly as a result of an old bug in the scheduling
89  * code).  In an attempt to avoid trouble, we will use a minimum scheduling
90  * length of 512 frames instead of 256.
91  */
92 #define EHCI_TUNE_FLS           1       /* (medium) 512-frame schedule */
93
94 #define EHCI_IAA_MSECS          10              /* arbitrary */
95 #define EHCI_IO_JIFFIES         (HZ/10)         /* io watchdog > irq_thresh */
96 #define EHCI_ASYNC_JIFFIES      (HZ/20)         /* async idle timeout */
97 #define EHCI_SHRINK_JIFFIES     (DIV_ROUND_UP(HZ, 200) + 1)
98                                                 /* 200-ms async qh unlink delay */
99
100 /* Initial IRQ latency:  faster than hw default */
101 static int log2_irq_thresh = 0;         // 0 to 6
102 module_param (log2_irq_thresh, int, S_IRUGO);
103 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
104
105 /* initial park setting:  slower than hw default */
106 static unsigned park = 0;
107 module_param (park, uint, S_IRUGO);
108 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
109
110 /* for flakey hardware, ignore overcurrent indicators */
111 static int ignore_oc = 0;
112 module_param (ignore_oc, bool, S_IRUGO);
113 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
114
115 /* for link power management(LPM) feature */
116 static unsigned int hird;
117 module_param(hird, int, S_IRUGO);
118 MODULE_PARM_DESC(hird, "host initiated resume duration, +1 for each 75us");
119
120 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
121
122 /*-------------------------------------------------------------------------*/
123
124 #include "ehci.h"
125 #include "ehci-dbg.c"
126 #include "pci-quirks.h"
127
128 /*-------------------------------------------------------------------------*/
129
130 static void
131 timer_action(struct ehci_hcd *ehci, enum ehci_timer_action action)
132 {
133         /* Don't override timeouts which shrink or (later) disable
134          * the async ring; just the I/O watchdog.  Note that if a
135          * SHRINK were pending, OFF would never be requested.
136          */
137         if (timer_pending(&ehci->watchdog)
138                         && ((BIT(TIMER_ASYNC_SHRINK) | BIT(TIMER_ASYNC_OFF))
139                                 & ehci->actions))
140                 return;
141
142         if (!test_and_set_bit(action, &ehci->actions)) {
143                 unsigned long t;
144
145                 switch (action) {
146                 case TIMER_IO_WATCHDOG:
147                         if (!ehci->need_io_watchdog)
148                                 return;
149                         t = EHCI_IO_JIFFIES;
150                         break;
151                 case TIMER_ASYNC_OFF:
152                         t = EHCI_ASYNC_JIFFIES;
153                         break;
154                 /* case TIMER_ASYNC_SHRINK: */
155                 default:
156                         t = EHCI_SHRINK_JIFFIES;
157                         break;
158                 }
159                 mod_timer(&ehci->watchdog, t + jiffies);
160         }
161 }
162
163 /*-------------------------------------------------------------------------*/
164
165 /*
166  * handshake - spin reading hc until handshake completes or fails
167  * @ptr: address of hc register to be read
168  * @mask: bits to look at in result of read
169  * @done: value of those bits when handshake succeeds
170  * @usec: timeout in microseconds
171  *
172  * Returns negative errno, or zero on success
173  *
174  * Success happens when the "mask" bits have the specified value (hardware
175  * handshake done).  There are two failure modes:  "usec" have passed (major
176  * hardware flakeout), or the register reads as all-ones (hardware removed).
177  *
178  * That last failure should_only happen in cases like physical cardbus eject
179  * before driver shutdown. But it also seems to be caused by bugs in cardbus
180  * bridge shutdown:  shutting down the bridge before the devices using it.
181  */
182 static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
183                       u32 mask, u32 done, int usec)
184 {
185         u32     result;
186
187         do {
188                 result = ehci_readl(ehci, ptr);
189                 if (result == ~(u32)0)          /* card removed */
190                         return -ENODEV;
191                 result &= mask;
192                 if (result == done)
193                         return 0;
194                 udelay (1);
195                 usec--;
196         } while (usec > 0);
197         return -ETIMEDOUT;
198 }
199
200 /* check TDI/ARC silicon is in host mode */
201 static int tdi_in_host_mode (struct ehci_hcd *ehci)
202 {
203         u32 __iomem     *reg_ptr;
204         u32             tmp;
205
206         reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
207         tmp = ehci_readl(ehci, reg_ptr);
208         return (tmp & 3) == USBMODE_CM_HC;
209 }
210
211 /* force HC to halt state from unknown (EHCI spec section 2.3) */
212 static int ehci_halt (struct ehci_hcd *ehci)
213 {
214         u32     temp = ehci_readl(ehci, &ehci->regs->status);
215
216         /* disable any irqs left enabled by previous code */
217         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
218
219         if (ehci_is_TDI(ehci) && tdi_in_host_mode(ehci) == 0) {
220                 return 0;
221         }
222
223         if ((temp & STS_HALT) != 0)
224                 return 0;
225
226         temp = ehci_readl(ehci, &ehci->regs->command);
227         temp &= ~CMD_RUN;
228         ehci_writel(ehci, temp, &ehci->regs->command);
229         return handshake (ehci, &ehci->regs->status,
230                           STS_HALT, STS_HALT, 16 * 125);
231 }
232
233 static int handshake_on_error_set_halt(struct ehci_hcd *ehci, void __iomem *ptr,
234                                        u32 mask, u32 done, int usec)
235 {
236         int error;
237
238         error = handshake(ehci, ptr, mask, done, usec);
239         if (error) {
240                 ehci_halt(ehci);
241                 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
242                 ehci_err(ehci, "force halt; handshake %p %08x %08x -> %d\n",
243                         ptr, mask, done, error);
244         }
245
246         return error;
247 }
248
249 /* put TDI/ARC silicon into EHCI mode */
250 static void tdi_reset (struct ehci_hcd *ehci)
251 {
252         u32 __iomem     *reg_ptr;
253         u32             tmp;
254
255         reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
256         tmp = ehci_readl(ehci, reg_ptr);
257         tmp |= USBMODE_CM_HC;
258         /* The default byte access to MMR space is LE after
259          * controller reset. Set the required endian mode
260          * for transfer buffers to match the host microprocessor
261          */
262         if (ehci_big_endian_mmio(ehci))
263                 tmp |= USBMODE_BE;
264         ehci_writel(ehci, tmp, reg_ptr);
265 }
266
267 /* reset a non-running (STS_HALT == 1) controller */
268 static int ehci_reset (struct ehci_hcd *ehci)
269 {
270         int     retval;
271         u32     command = ehci_readl(ehci, &ehci->regs->command);
272
273         /* If the EHCI debug controller is active, special care must be
274          * taken before and after a host controller reset */
275         if (ehci->debug && !dbgp_reset_prep())
276                 ehci->debug = NULL;
277
278         command |= CMD_RESET;
279         dbg_cmd (ehci, "reset", command);
280         ehci_writel(ehci, command, &ehci->regs->command);
281         ehci_to_hcd(ehci)->state = HC_STATE_HALT;
282         ehci->next_statechange = jiffies;
283         retval = handshake (ehci, &ehci->regs->command,
284                             CMD_RESET, 0, 250 * 1000);
285
286         if (ehci->has_hostpc) {
287                 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
288                         (u32 __iomem *)(((u8 *)ehci->regs) + USBMODE_EX));
289                 ehci_writel(ehci, TXFIFO_DEFAULT,
290                         (u32 __iomem *)(((u8 *)ehci->regs) + TXFILLTUNING));
291         }
292         if (retval)
293                 return retval;
294
295         if (ehci_is_TDI(ehci))
296                 tdi_reset (ehci);
297
298         if (ehci->debug)
299                 dbgp_external_startup();
300
301         return retval;
302 }
303
304 /* idle the controller (from running) */
305 static void ehci_quiesce (struct ehci_hcd *ehci)
306 {
307         u32     temp;
308
309 #ifdef DEBUG
310         if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
311                 BUG ();
312 #endif
313
314         /* wait for any schedule enables/disables to take effect */
315         temp = ehci_readl(ehci, &ehci->regs->command) << 10;
316         temp &= STS_ASS | STS_PSS;
317         if (handshake_on_error_set_halt(ehci, &ehci->regs->status,
318                                         STS_ASS | STS_PSS, temp, 16 * 125))
319                 return;
320
321         /* then disable anything that's still active */
322         temp = ehci_readl(ehci, &ehci->regs->command);
323         temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
324         ehci_writel(ehci, temp, &ehci->regs->command);
325
326         /* hardware can take 16 microframes to turn off ... */
327         handshake_on_error_set_halt(ehci, &ehci->regs->status,
328                                     STS_ASS | STS_PSS, 0, 16 * 125);
329 }
330
331 /*-------------------------------------------------------------------------*/
332
333 static void end_unlink_async(struct ehci_hcd *ehci);
334 static void ehci_work(struct ehci_hcd *ehci);
335
336 #include "ehci-hub.c"
337 #include "ehci-lpm.c"
338 #include "ehci-mem.c"
339 #include "ehci-q.c"
340 #include "ehci-sched.c"
341 #include "ehci-sysfs.c"
342
343 /*-------------------------------------------------------------------------*/
344
345 static void ehci_iaa_watchdog(unsigned long param)
346 {
347         struct ehci_hcd         *ehci = (struct ehci_hcd *) param;
348         unsigned long           flags;
349
350         spin_lock_irqsave (&ehci->lock, flags);
351
352         /* Lost IAA irqs wedge things badly; seen first with a vt8235.
353          * So we need this watchdog, but must protect it against both
354          * (a) SMP races against real IAA firing and retriggering, and
355          * (b) clean HC shutdown, when IAA watchdog was pending.
356          */
357         if (ehci->reclaim
358                         && !timer_pending(&ehci->iaa_watchdog)
359                         && HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
360                 u32 cmd, status;
361
362                 /* If we get here, IAA is *REALLY* late.  It's barely
363                  * conceivable that the system is so busy that CMD_IAAD
364                  * is still legitimately set, so let's be sure it's
365                  * clear before we read STS_IAA.  (The HC should clear
366                  * CMD_IAAD when it sets STS_IAA.)
367                  */
368                 cmd = ehci_readl(ehci, &ehci->regs->command);
369                 if (cmd & CMD_IAAD)
370                         ehci_writel(ehci, cmd & ~CMD_IAAD,
371                                         &ehci->regs->command);
372
373                 /* If IAA is set here it either legitimately triggered
374                  * before we cleared IAAD above (but _way_ late, so we'll
375                  * still count it as lost) ... or a silicon erratum:
376                  * - VIA seems to set IAA without triggering the IRQ;
377                  * - IAAD potentially cleared without setting IAA.
378                  */
379                 status = ehci_readl(ehci, &ehci->regs->status);
380                 if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
381                         COUNT (ehci->stats.lost_iaa);
382                         ehci_writel(ehci, STS_IAA, &ehci->regs->status);
383                 }
384
385                 ehci_vdbg(ehci, "IAA watchdog: status %x cmd %x\n",
386                                 status, cmd);
387                 end_unlink_async(ehci);
388         }
389
390         spin_unlock_irqrestore(&ehci->lock, flags);
391 }
392
393 static void ehci_watchdog(unsigned long param)
394 {
395         struct ehci_hcd         *ehci = (struct ehci_hcd *) param;
396         unsigned long           flags;
397
398         spin_lock_irqsave(&ehci->lock, flags);
399
400         /* stop async processing after it's idled a bit */
401         if (test_bit (TIMER_ASYNC_OFF, &ehci->actions))
402                 start_unlink_async (ehci, ehci->async);
403
404         /* ehci could run by timer, without IRQs ... */
405         ehci_work (ehci);
406
407         spin_unlock_irqrestore (&ehci->lock, flags);
408 }
409
410 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
411  * The firmware seems to think that powering off is a wakeup event!
412  * This routine turns off remote wakeup and everything else, on all ports.
413  */
414 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
415 {
416         int     port = HCS_N_PORTS(ehci->hcs_params);
417
418         while (port--)
419                 ehci_writel(ehci, PORT_RWC_BITS,
420                                 &ehci->regs->port_status[port]);
421 }
422
423 /*
424  * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
425  * Should be called with ehci->lock held.
426  */
427 static void ehci_silence_controller(struct ehci_hcd *ehci)
428 {
429         ehci_halt(ehci);
430         ehci_turn_off_all_ports(ehci);
431
432         /* make BIOS/etc use companion controller during reboot */
433         ehci_writel(ehci, 0, &ehci->regs->configured_flag);
434
435         /* unblock posted writes */
436         ehci_readl(ehci, &ehci->regs->configured_flag);
437 }
438
439 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
440  * This forcibly disables dma and IRQs, helping kexec and other cases
441  * where the next system software may expect clean state.
442  */
443 static void ehci_shutdown(struct usb_hcd *hcd)
444 {
445         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
446
447         del_timer_sync(&ehci->watchdog);
448         del_timer_sync(&ehci->iaa_watchdog);
449
450         spin_lock_irq(&ehci->lock);
451         ehci_silence_controller(ehci);
452         spin_unlock_irq(&ehci->lock);
453 }
454
455 static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
456 {
457         unsigned port;
458
459         if (!HCS_PPC (ehci->hcs_params))
460                 return;
461
462         ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down");
463         for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; )
464                 (void) ehci_hub_control(ehci_to_hcd(ehci),
465                                 is_on ? SetPortFeature : ClearPortFeature,
466                                 USB_PORT_FEAT_POWER,
467                                 port--, NULL, 0);
468         /* Flush those writes */
469         ehci_readl(ehci, &ehci->regs->command);
470         msleep(20);
471 }
472
473 /*-------------------------------------------------------------------------*/
474
475 /*
476  * ehci_work is called from some interrupts, timers, and so on.
477  * it calls driver completion functions, after dropping ehci->lock.
478  */
479 static void ehci_work (struct ehci_hcd *ehci)
480 {
481         timer_action_done (ehci, TIMER_IO_WATCHDOG);
482
483         /* another CPU may drop ehci->lock during a schedule scan while
484          * it reports urb completions.  this flag guards against bogus
485          * attempts at re-entrant schedule scanning.
486          */
487         if (ehci->scanning)
488                 return;
489         ehci->scanning = 1;
490         scan_async (ehci);
491         if (ehci->next_uframe != -1)
492                 scan_periodic (ehci);
493         ehci->scanning = 0;
494
495         /* the IO watchdog guards against hardware or driver bugs that
496          * misplace IRQs, and should let us run completely without IRQs.
497          * such lossage has been observed on both VT6202 and VT8235.
498          */
499         if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
500                         (ehci->async->qh_next.ptr != NULL ||
501                          ehci->periodic_sched != 0))
502                 timer_action (ehci, TIMER_IO_WATCHDOG);
503 }
504
505 /*
506  * Called when the ehci_hcd module is removed.
507  */
508 static void ehci_stop (struct usb_hcd *hcd)
509 {
510         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
511
512         ehci_dbg (ehci, "stop\n");
513
514         /* no more interrupts ... */
515         del_timer_sync (&ehci->watchdog);
516         del_timer_sync(&ehci->iaa_watchdog);
517
518         spin_lock_irq(&ehci->lock);
519         if (HC_IS_RUNNING (hcd->state))
520                 ehci_quiesce (ehci);
521
522         ehci_silence_controller(ehci);
523         ehci_reset (ehci);
524         spin_unlock_irq(&ehci->lock);
525
526         remove_sysfs_files(ehci);
527         remove_debug_files (ehci);
528
529         /* root hub is shut down separately (first, when possible) */
530         spin_lock_irq (&ehci->lock);
531         if (ehci->async)
532                 ehci_work (ehci);
533         spin_unlock_irq (&ehci->lock);
534         ehci_mem_cleanup (ehci);
535
536         if (ehci->amd_pll_fix == 1)
537                 usb_amd_dev_put();
538
539 #ifdef  EHCI_STATS
540         ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
541                 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
542                 ehci->stats.lost_iaa);
543         ehci_dbg (ehci, "complete %ld unlink %ld\n",
544                 ehci->stats.complete, ehci->stats.unlink);
545 #endif
546
547         dbg_status (ehci, "ehci_stop completed",
548                     ehci_readl(ehci, &ehci->regs->status));
549 }
550
551 /* one-time init, only for memory state */
552 static int ehci_init(struct usb_hcd *hcd)
553 {
554         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
555         u32                     temp;
556         int                     retval;
557         u32                     hcc_params;
558         struct ehci_qh_hw       *hw;
559
560         spin_lock_init(&ehci->lock);
561
562         /*
563          * keep io watchdog by default, those good HCDs could turn off it later
564          */
565         ehci->need_io_watchdog = 1;
566         init_timer(&ehci->watchdog);
567         ehci->watchdog.function = ehci_watchdog;
568         ehci->watchdog.data = (unsigned long) ehci;
569
570         init_timer(&ehci->iaa_watchdog);
571         ehci->iaa_watchdog.function = ehci_iaa_watchdog;
572         ehci->iaa_watchdog.data = (unsigned long) ehci;
573
574         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
575
576         /*
577          * by default set standard 80% (== 100 usec/uframe) max periodic
578          * bandwidth as required by USB 2.0
579          */
580         ehci->uframe_periodic_max = 100;
581
582         /*
583          * hw default: 1K periodic list heads, one per frame.
584          * periodic_size can shrink by USBCMD update if hcc_params allows.
585          */
586         ehci->periodic_size = DEFAULT_I_TDPS;
587         INIT_LIST_HEAD(&ehci->cached_itd_list);
588         INIT_LIST_HEAD(&ehci->cached_sitd_list);
589
590         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
591                 /* periodic schedule size can be smaller than default */
592                 switch (EHCI_TUNE_FLS) {
593                 case 0: ehci->periodic_size = 1024; break;
594                 case 1: ehci->periodic_size = 512; break;
595                 case 2: ehci->periodic_size = 256; break;
596                 default:        BUG();
597                 }
598         }
599         if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
600                 return retval;
601
602         /* controllers may cache some of the periodic schedule ... */
603         if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
604                 ehci->i_thresh = 2 + 8;
605         else                                    // N microframes cached
606                 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
607
608         ehci->reclaim = NULL;
609         ehci->next_uframe = -1;
610         ehci->clock_frame = -1;
611
612         /*
613          * dedicate a qh for the async ring head, since we couldn't unlink
614          * a 'real' qh without stopping the async schedule [4.8].  use it
615          * as the 'reclamation list head' too.
616          * its dummy is used in hw_alt_next of many tds, to prevent the qh
617          * from automatically advancing to the next td after short reads.
618          */
619         ehci->async->qh_next.qh = NULL;
620         hw = ehci->async->hw;
621         hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
622         hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
623         hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
624         hw->hw_qtd_next = EHCI_LIST_END(ehci);
625         ehci->async->qh_state = QH_STATE_LINKED;
626         hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
627
628         /* clear interrupt enables, set irq latency */
629         if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
630                 log2_irq_thresh = 0;
631         temp = 1 << (16 + log2_irq_thresh);
632         if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
633                 ehci->has_ppcd = 1;
634                 ehci_dbg(ehci, "enable per-port change event\n");
635                 temp |= CMD_PPCEE;
636         }
637         if (HCC_CANPARK(hcc_params)) {
638                 /* HW default park == 3, on hardware that supports it (like
639                  * NVidia and ALI silicon), maximizes throughput on the async
640                  * schedule by avoiding QH fetches between transfers.
641                  *
642                  * With fast usb storage devices and NForce2, "park" seems to
643                  * make problems:  throughput reduction (!), data errors...
644                  */
645                 if (park) {
646                         park = min(park, (unsigned) 3);
647                         temp |= CMD_PARK;
648                         temp |= park << 8;
649                 }
650                 ehci_dbg(ehci, "park %d\n", park);
651         }
652         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
653                 /* periodic schedule size can be smaller than default */
654                 temp &= ~(3 << 2);
655                 temp |= (EHCI_TUNE_FLS << 2);
656         }
657         if (HCC_LPM(hcc_params)) {
658                 /* support link power management EHCI 1.1 addendum */
659                 ehci_dbg(ehci, "support lpm\n");
660                 ehci->has_lpm = 1;
661                 if (hird > 0xf) {
662                         ehci_dbg(ehci, "hird %d invalid, use default 0",
663                         hird);
664                         hird = 0;
665                 }
666                 temp |= hird << 24;
667         }
668         ehci->command = temp;
669
670         /* Accept arbitrarily long scatter-gather lists */
671         if (!(hcd->driver->flags & HCD_LOCAL_MEM))
672                 hcd->self.sg_tablesize = ~0;
673         return 0;
674 }
675
676 /* start HC running; it's halted, ehci_init() has been run (once) */
677 static int ehci_run (struct usb_hcd *hcd)
678 {
679         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
680         int                     retval;
681         u32                     temp;
682         u32                     hcc_params;
683
684         hcd->uses_new_polling = 1;
685
686         /* EHCI spec section 4.1 */
687         /*
688          * TDI driver does the ehci_reset in their reset callback.
689          * Don't reset here, because configuration settings will
690          * vanish.
691          */
692         if (!ehci_is_TDI(ehci) && (retval = ehci_reset(ehci)) != 0) {
693                 ehci_mem_cleanup(ehci);
694                 return retval;
695         }
696         ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
697         ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
698
699         /*
700          * hcc_params controls whether ehci->regs->segment must (!!!)
701          * be used; it constrains QH/ITD/SITD and QTD locations.
702          * pci_pool consistent memory always uses segment zero.
703          * streaming mappings for I/O buffers, like pci_map_single(),
704          * can return segments above 4GB, if the device allows.
705          *
706          * NOTE:  the dma mask is visible through dma_supported(), so
707          * drivers can pass this info along ... like NETIF_F_HIGHDMA,
708          * Scsi_Host.highmem_io, and so forth.  It's readonly to all
709          * host side drivers though.
710          */
711         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
712         if (HCC_64BIT_ADDR(hcc_params)) {
713                 ehci_writel(ehci, 0, &ehci->regs->segment);
714 #if 0
715 // this is deeply broken on almost all architectures
716                 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
717                         ehci_info(ehci, "enabled 64bit DMA\n");
718 #endif
719         }
720
721
722         // Philips, Intel, and maybe others need CMD_RUN before the
723         // root hub will detect new devices (why?); NEC doesn't
724         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
725         ehci->command |= CMD_RUN;
726         ehci_writel(ehci, ehci->command, &ehci->regs->command);
727         dbg_cmd (ehci, "init", ehci->command);
728
729         /*
730          * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
731          * are explicitly handed to companion controller(s), so no TT is
732          * involved with the root hub.  (Except where one is integrated,
733          * and there's no companion controller unless maybe for USB OTG.)
734          *
735          * Turning on the CF flag will transfer ownership of all ports
736          * from the companions to the EHCI controller.  If any of the
737          * companions are in the middle of a port reset at the time, it
738          * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
739          * guarantees that no resets are in progress.  After we set CF,
740          * a short delay lets the hardware catch up; new resets shouldn't
741          * be started before the port switching actions could complete.
742          */
743         down_write(&ehci_cf_port_reset_rwsem);
744         hcd->state = HC_STATE_RUNNING;
745         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
746         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
747         msleep(5);
748         up_write(&ehci_cf_port_reset_rwsem);
749         ehci->last_periodic_enable = ktime_get_real();
750
751         temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
752         ehci_info (ehci,
753                 "USB %x.%x started, EHCI %x.%02x%s\n",
754                 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
755                 temp >> 8, temp & 0xff,
756                 ignore_oc ? ", overcurrent ignored" : "");
757
758         ehci_writel(ehci, INTR_MASK,
759                     &ehci->regs->intr_enable); /* Turn On Interrupts */
760
761         /* GRR this is run-once init(), being done every time the HC starts.
762          * So long as they're part of class devices, we can't do it init()
763          * since the class device isn't created that early.
764          */
765         create_debug_files(ehci);
766         create_sysfs_files(ehci);
767
768         return 0;
769 }
770
771 /*-------------------------------------------------------------------------*/
772
773 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
774 {
775         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
776         u32                     status, masked_status, pcd_status = 0, cmd;
777         int                     bh;
778
779         spin_lock (&ehci->lock);
780
781         status = ehci_readl(ehci, &ehci->regs->status);
782
783         /* e.g. cardbus physical eject */
784         if (status == ~(u32) 0) {
785                 ehci_dbg (ehci, "device removed\n");
786                 goto dead;
787         }
788
789         /* Shared IRQ? */
790         masked_status = status & INTR_MASK;
791         if (!masked_status || unlikely(hcd->state == HC_STATE_HALT)) {
792                 spin_unlock(&ehci->lock);
793                 return IRQ_NONE;
794         }
795
796         /* clear (just) interrupts */
797         ehci_writel(ehci, masked_status, &ehci->regs->status);
798         cmd = ehci_readl(ehci, &ehci->regs->command);
799         bh = 0;
800
801 #ifdef  VERBOSE_DEBUG
802         /* unrequested/ignored: Frame List Rollover */
803         dbg_status (ehci, "irq", status);
804 #endif
805
806         /* INT, ERR, and IAA interrupt rates can be throttled */
807
808         /* normal [4.15.1.2] or error [4.15.1.1] completion */
809         if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
810                 if (likely ((status & STS_ERR) == 0))
811                         COUNT (ehci->stats.normal);
812                 else
813                         COUNT (ehci->stats.error);
814                 bh = 1;
815         }
816
817         /* complete the unlinking of some qh [4.15.2.3] */
818         if (status & STS_IAA) {
819                 /* guard against (alleged) silicon errata */
820                 if (cmd & CMD_IAAD) {
821                         ehci_writel(ehci, cmd & ~CMD_IAAD,
822                                         &ehci->regs->command);
823                         ehci_dbg(ehci, "IAA with IAAD still set?\n");
824                 }
825                 if (ehci->reclaim) {
826                         COUNT(ehci->stats.reclaim);
827                         end_unlink_async(ehci);
828                 } else
829                         ehci_dbg(ehci, "IAA with nothing to reclaim?\n");
830         }
831
832         /* remote wakeup [4.3.1] */
833         if (status & STS_PCD) {
834                 unsigned        i = HCS_N_PORTS (ehci->hcs_params);
835                 u32             ppcd = 0;
836
837                 /* kick root hub later */
838                 pcd_status = status;
839
840                 /* resume root hub? */
841                 if (!(cmd & CMD_RUN))
842                         usb_hcd_resume_root_hub(hcd);
843
844                 /* get per-port change detect bits */
845                 if (ehci->has_ppcd)
846                         ppcd = status >> 16;
847
848                 while (i--) {
849                         int pstatus;
850
851                         /* leverage per-port change bits feature */
852                         if (ehci->has_ppcd && !(ppcd & (1 << i)))
853                                 continue;
854                         pstatus = ehci_readl(ehci,
855                                          &ehci->regs->port_status[i]);
856
857                         if (pstatus & PORT_OWNER)
858                                 continue;
859                         if (!(test_bit(i, &ehci->suspended_ports) &&
860                                         ((pstatus & PORT_RESUME) ||
861                                                 !(pstatus & PORT_SUSPEND)) &&
862                                         (pstatus & PORT_PE) &&
863                                         ehci->reset_done[i] == 0))
864                                 continue;
865
866                         /* start 20 msec resume signaling from this port,
867                          * and make khubd collect PORT_STAT_C_SUSPEND to
868                          * stop that signaling.  Use 5 ms extra for safety,
869                          * like usb_port_resume() does.
870                          */
871                         ehci->reset_done[i] = jiffies + msecs_to_jiffies(25);
872                         ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
873                         mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
874                 }
875         }
876
877         /* PCI errors [4.15.2.4] */
878         if (unlikely ((status & STS_FATAL) != 0)) {
879                 ehci_err(ehci, "fatal error\n");
880                 dbg_cmd(ehci, "fatal", cmd);
881                 dbg_status(ehci, "fatal", status);
882                 ehci_halt(ehci);
883 dead:
884                 ehci_reset(ehci);
885                 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
886                 usb_hc_died(hcd);
887                 /* generic layer kills/unlinks all urbs, then
888                  * uses ehci_stop to clean up the rest
889                  */
890                 bh = 1;
891         }
892
893         if (bh)
894                 ehci_work (ehci);
895         spin_unlock (&ehci->lock);
896         if (pcd_status)
897                 usb_hcd_poll_rh_status(hcd);
898         return IRQ_HANDLED;
899 }
900
901 /*-------------------------------------------------------------------------*/
902
903 /*
904  * non-error returns are a promise to giveback() the urb later
905  * we drop ownership so next owner (or urb unlink) can get it
906  *
907  * urb + dev is in hcd.self.controller.urb_list
908  * we're queueing TDs onto software and hardware lists
909  *
910  * hcd-specific init for hcpriv hasn't been done yet
911  *
912  * NOTE:  control, bulk, and interrupt share the same code to append TDs
913  * to a (possibly active) QH, and the same QH scanning code.
914  */
915 static int ehci_urb_enqueue (
916         struct usb_hcd  *hcd,
917         struct urb      *urb,
918         gfp_t           mem_flags
919 ) {
920         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
921         struct list_head        qtd_list;
922
923         INIT_LIST_HEAD (&qtd_list);
924
925         switch (usb_pipetype (urb->pipe)) {
926         case PIPE_CONTROL:
927                 /* qh_completions() code doesn't handle all the fault cases
928                  * in multi-TD control transfers.  Even 1KB is rare anyway.
929                  */
930                 if (urb->transfer_buffer_length > (16 * 1024))
931                         return -EMSGSIZE;
932                 /* FALLTHROUGH */
933         /* case PIPE_BULK: */
934         default:
935                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
936                         return -ENOMEM;
937                 return submit_async(ehci, urb, &qtd_list, mem_flags);
938
939         case PIPE_INTERRUPT:
940                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
941                         return -ENOMEM;
942                 return intr_submit(ehci, urb, &qtd_list, mem_flags);
943
944         case PIPE_ISOCHRONOUS:
945                 if (urb->dev->speed == USB_SPEED_HIGH)
946                         return itd_submit (ehci, urb, mem_flags);
947                 else
948                         return sitd_submit (ehci, urb, mem_flags);
949         }
950 }
951
952 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
953 {
954         /* failfast */
955         if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state) && ehci->reclaim)
956                 end_unlink_async(ehci);
957
958         /* If the QH isn't linked then there's nothing we can do
959          * unless we were called during a giveback, in which case
960          * qh_completions() has to deal with it.
961          */
962         if (qh->qh_state != QH_STATE_LINKED) {
963                 if (qh->qh_state == QH_STATE_COMPLETING)
964                         qh->needs_rescan = 1;
965                 return;
966         }
967
968         /* defer till later if busy */
969         if (ehci->reclaim) {
970                 struct ehci_qh          *last;
971
972                 for (last = ehci->reclaim;
973                                 last->reclaim;
974                                 last = last->reclaim)
975                         continue;
976                 qh->qh_state = QH_STATE_UNLINK_WAIT;
977                 last->reclaim = qh;
978
979         /* start IAA cycle */
980         } else
981                 start_unlink_async (ehci, qh);
982 }
983
984 /* remove from hardware lists
985  * completions normally happen asynchronously
986  */
987
988 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
989 {
990         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
991         struct ehci_qh          *qh;
992         unsigned long           flags;
993         int                     rc;
994
995         spin_lock_irqsave (&ehci->lock, flags);
996         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
997         if (rc)
998                 goto done;
999
1000         switch (usb_pipetype (urb->pipe)) {
1001         // case PIPE_CONTROL:
1002         // case PIPE_BULK:
1003         default:
1004                 qh = (struct ehci_qh *) urb->hcpriv;
1005                 if (!qh)
1006                         break;
1007                 switch (qh->qh_state) {
1008                 case QH_STATE_LINKED:
1009                 case QH_STATE_COMPLETING:
1010                         unlink_async(ehci, qh);
1011                         break;
1012                 case QH_STATE_UNLINK:
1013                 case QH_STATE_UNLINK_WAIT:
1014                         /* already started */
1015                         break;
1016                 case QH_STATE_IDLE:
1017                         /* QH might be waiting for a Clear-TT-Buffer */
1018                         qh_completions(ehci, qh);
1019                         break;
1020                 }
1021                 break;
1022
1023         case PIPE_INTERRUPT:
1024                 qh = (struct ehci_qh *) urb->hcpriv;
1025                 if (!qh)
1026                         break;
1027                 switch (qh->qh_state) {
1028                 case QH_STATE_LINKED:
1029                 case QH_STATE_COMPLETING:
1030                         intr_deschedule (ehci, qh);
1031                         break;
1032                 case QH_STATE_IDLE:
1033                         qh_completions (ehci, qh);
1034                         break;
1035                 default:
1036                         ehci_dbg (ehci, "bogus qh %p state %d\n",
1037                                         qh, qh->qh_state);
1038                         goto done;
1039                 }
1040                 break;
1041
1042         case PIPE_ISOCHRONOUS:
1043                 // itd or sitd ...
1044
1045                 // wait till next completion, do it then.
1046                 // completion irqs can wait up to 1024 msec,
1047                 break;
1048         }
1049 done:
1050         spin_unlock_irqrestore (&ehci->lock, flags);
1051         return rc;
1052 }
1053
1054 /*-------------------------------------------------------------------------*/
1055
1056 // bulk qh holds the data toggle
1057
1058 static void
1059 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1060 {
1061         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1062         unsigned long           flags;
1063         struct ehci_qh          *qh, *tmp;
1064
1065         /* ASSERT:  any requests/urbs are being unlinked */
1066         /* ASSERT:  nobody can be submitting urbs for this any more */
1067
1068 rescan:
1069         spin_lock_irqsave (&ehci->lock, flags);
1070         qh = ep->hcpriv;
1071         if (!qh)
1072                 goto done;
1073
1074         /* endpoints can be iso streams.  for now, we don't
1075          * accelerate iso completions ... so spin a while.
1076          */
1077         if (qh->hw == NULL) {
1078                 ehci_vdbg (ehci, "iso delay\n");
1079                 goto idle_timeout;
1080         }
1081
1082         if (!HC_IS_RUNNING (hcd->state))
1083                 qh->qh_state = QH_STATE_IDLE;
1084         switch (qh->qh_state) {
1085         case QH_STATE_LINKED:
1086         case QH_STATE_COMPLETING:
1087                 for (tmp = ehci->async->qh_next.qh;
1088                                 tmp && tmp != qh;
1089                                 tmp = tmp->qh_next.qh)
1090                         continue;
1091                 /* periodic qh self-unlinks on empty, and a COMPLETING qh
1092                  * may already be unlinked.
1093                  */
1094                 if (tmp)
1095                         unlink_async(ehci, qh);
1096                 /* FALL THROUGH */
1097         case QH_STATE_UNLINK:           /* wait for hw to finish? */
1098         case QH_STATE_UNLINK_WAIT:
1099 idle_timeout:
1100                 spin_unlock_irqrestore (&ehci->lock, flags);
1101                 schedule_timeout_uninterruptible(1);
1102                 goto rescan;
1103         case QH_STATE_IDLE:             /* fully unlinked */
1104                 if (qh->clearing_tt)
1105                         goto idle_timeout;
1106                 if (list_empty (&qh->qtd_list)) {
1107                         qh_put (qh);
1108                         break;
1109                 }
1110                 /* else FALL THROUGH */
1111         default:
1112                 /* caller was supposed to have unlinked any requests;
1113                  * that's not our job.  just leak this memory.
1114                  */
1115                 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1116                         qh, ep->desc.bEndpointAddress, qh->qh_state,
1117                         list_empty (&qh->qtd_list) ? "" : "(has tds)");
1118                 break;
1119         }
1120         ep->hcpriv = NULL;
1121 done:
1122         spin_unlock_irqrestore (&ehci->lock, flags);
1123 }
1124
1125 static void
1126 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1127 {
1128         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1129         struct ehci_qh          *qh;
1130         int                     eptype = usb_endpoint_type(&ep->desc);
1131         int                     epnum = usb_endpoint_num(&ep->desc);
1132         int                     is_out = usb_endpoint_dir_out(&ep->desc);
1133         unsigned long           flags;
1134
1135         if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1136                 return;
1137
1138         spin_lock_irqsave(&ehci->lock, flags);
1139         qh = ep->hcpriv;
1140
1141         /* For Bulk and Interrupt endpoints we maintain the toggle state
1142          * in the hardware; the toggle bits in udev aren't used at all.
1143          * When an endpoint is reset by usb_clear_halt() we must reset
1144          * the toggle bit in the QH.
1145          */
1146         if (qh) {
1147                 usb_settoggle(qh->dev, epnum, is_out, 0);
1148                 if (!list_empty(&qh->qtd_list)) {
1149                         WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1150                 } else if (qh->qh_state == QH_STATE_LINKED ||
1151                                 qh->qh_state == QH_STATE_COMPLETING) {
1152
1153                         /* The toggle value in the QH can't be updated
1154                          * while the QH is active.  Unlink it now;
1155                          * re-linking will call qh_refresh().
1156                          */
1157                         if (eptype == USB_ENDPOINT_XFER_BULK)
1158                                 unlink_async(ehci, qh);
1159                         else
1160                                 intr_deschedule(ehci, qh);
1161                 }
1162         }
1163         spin_unlock_irqrestore(&ehci->lock, flags);
1164 }
1165
1166 static int ehci_get_frame (struct usb_hcd *hcd)
1167 {
1168         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1169         return (ehci_readl(ehci, &ehci->regs->frame_index) >> 3) %
1170                 ehci->periodic_size;
1171 }
1172
1173 /*-------------------------------------------------------------------------*/
1174
1175 MODULE_DESCRIPTION(DRIVER_DESC);
1176 MODULE_AUTHOR (DRIVER_AUTHOR);
1177 MODULE_LICENSE ("GPL");
1178
1179 #ifdef CONFIG_PCI
1180 #include "ehci-pci.c"
1181 #define PCI_DRIVER              ehci_pci_driver
1182 #endif
1183
1184 #ifdef CONFIG_USB_EHCI_FSL
1185 #include "ehci-fsl.c"
1186 #define PLATFORM_DRIVER         ehci_fsl_driver
1187 #endif
1188
1189 #ifdef CONFIG_USB_EHCI_MXC
1190 #include "ehci-mxc.c"
1191 #define PLATFORM_DRIVER         ehci_mxc_driver
1192 #endif
1193
1194 #ifdef CONFIG_USB_EHCI_SH
1195 #include "ehci-sh.c"
1196 #define PLATFORM_DRIVER         ehci_hcd_sh_driver
1197 #endif
1198
1199 #ifdef CONFIG_SOC_AU1200
1200 #include "ehci-au1xxx.c"
1201 #define PLATFORM_DRIVER         ehci_hcd_au1xxx_driver
1202 #endif
1203
1204 #ifdef CONFIG_USB_EHCI_HCD_OMAP
1205 #include "ehci-omap.c"
1206 #define        PLATFORM_DRIVER         ehci_hcd_omap_driver
1207 #endif
1208
1209 #ifdef CONFIG_PPC_PS3
1210 #include "ehci-ps3.c"
1211 #define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1212 #endif
1213
1214 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1215 #include "ehci-ppc-of.c"
1216 #define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1217 #endif
1218
1219 #ifdef CONFIG_XPS_USB_HCD_XILINX
1220 #include "ehci-xilinx-of.c"
1221 #define XILINX_OF_PLATFORM_DRIVER       ehci_hcd_xilinx_of_driver
1222 #endif
1223
1224 #ifdef CONFIG_PLAT_ORION
1225 #include "ehci-orion.c"
1226 #define PLATFORM_DRIVER         ehci_orion_driver
1227 #endif
1228
1229 #ifdef CONFIG_ARCH_IXP4XX
1230 #include "ehci-ixp4xx.c"
1231 #define PLATFORM_DRIVER         ixp4xx_ehci_driver
1232 #endif
1233
1234 #ifdef CONFIG_USB_W90X900_EHCI
1235 #include "ehci-w90x900.c"
1236 #define PLATFORM_DRIVER         ehci_hcd_w90x900_driver
1237 #endif
1238
1239 #ifdef CONFIG_ARCH_AT91
1240 #include "ehci-atmel.c"
1241 #define PLATFORM_DRIVER         ehci_atmel_driver
1242 #endif
1243
1244 #ifdef CONFIG_USB_OCTEON_EHCI
1245 #include "ehci-octeon.c"
1246 #define PLATFORM_DRIVER         ehci_octeon_driver
1247 #endif
1248
1249 #ifdef CONFIG_USB_CNS3XXX_EHCI
1250 #include "ehci-cns3xxx.c"
1251 #define PLATFORM_DRIVER         cns3xxx_ehci_driver
1252 #endif
1253
1254 #ifdef CONFIG_ARCH_VT8500
1255 #include "ehci-vt8500.c"
1256 #define PLATFORM_DRIVER         vt8500_ehci_driver
1257 #endif
1258
1259 #ifdef CONFIG_PLAT_SPEAR
1260 #include "ehci-spear.c"
1261 #define PLATFORM_DRIVER         spear_ehci_hcd_driver
1262 #endif
1263
1264 #ifdef CONFIG_USB_EHCI_MSM
1265 #include "ehci-msm.c"
1266 #define PLATFORM_DRIVER         ehci_msm_driver
1267 #endif
1268
1269 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1270 #include "ehci-pmcmsp.c"
1271 #define PLATFORM_DRIVER         ehci_hcd_msp_driver
1272 #endif
1273
1274 #ifdef CONFIG_USB_EHCI_TEGRA
1275 #include "ehci-tegra.c"
1276 #define PLATFORM_DRIVER         tegra_ehci_driver
1277 #endif
1278
1279 #ifdef CONFIG_USB_EHCI_S5P
1280 #include "ehci-s5p.c"
1281 #define PLATFORM_DRIVER         s5p_ehci_driver
1282 #endif
1283
1284 #ifdef CONFIG_USB_EHCI_ATH79
1285 #include "ehci-ath79.c"
1286 #define PLATFORM_DRIVER         ehci_ath79_driver
1287 #endif
1288
1289 #ifdef CONFIG_SPARC_LEON
1290 #include "ehci-grlib.c"
1291 #define PLATFORM_DRIVER         ehci_grlib_driver
1292 #endif
1293
1294 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1295     !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
1296     !defined(XILINX_OF_PLATFORM_DRIVER)
1297 #error "missing bus glue for ehci-hcd"
1298 #endif
1299
1300 static int __init ehci_hcd_init(void)
1301 {
1302         int retval = 0;
1303
1304         if (usb_disabled())
1305                 return -ENODEV;
1306
1307         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1308         set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1309         if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1310                         test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1311                 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1312                                 " before uhci_hcd and ohci_hcd, not after\n");
1313
1314         pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1315                  hcd_name,
1316                  sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1317                  sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1318
1319 #ifdef DEBUG
1320         ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1321         if (!ehci_debug_root) {
1322                 retval = -ENOENT;
1323                 goto err_debug;
1324         }
1325 #endif
1326
1327 #ifdef PLATFORM_DRIVER
1328         retval = platform_driver_register(&PLATFORM_DRIVER);
1329         if (retval < 0)
1330                 goto clean0;
1331 #endif
1332
1333 #ifdef PCI_DRIVER
1334         retval = pci_register_driver(&PCI_DRIVER);
1335         if (retval < 0)
1336                 goto clean1;
1337 #endif
1338
1339 #ifdef PS3_SYSTEM_BUS_DRIVER
1340         retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1341         if (retval < 0)
1342                 goto clean2;
1343 #endif
1344
1345 #ifdef OF_PLATFORM_DRIVER
1346         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1347         if (retval < 0)
1348                 goto clean3;
1349 #endif
1350
1351 #ifdef XILINX_OF_PLATFORM_DRIVER
1352         retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1353         if (retval < 0)
1354                 goto clean4;
1355 #endif
1356         return retval;
1357
1358 #ifdef XILINX_OF_PLATFORM_DRIVER
1359         /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1360 clean4:
1361 #endif
1362 #ifdef OF_PLATFORM_DRIVER
1363         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1364 clean3:
1365 #endif
1366 #ifdef PS3_SYSTEM_BUS_DRIVER
1367         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1368 clean2:
1369 #endif
1370 #ifdef PCI_DRIVER
1371         pci_unregister_driver(&PCI_DRIVER);
1372 clean1:
1373 #endif
1374 #ifdef PLATFORM_DRIVER
1375         platform_driver_unregister(&PLATFORM_DRIVER);
1376 clean0:
1377 #endif
1378 #ifdef DEBUG
1379         debugfs_remove(ehci_debug_root);
1380         ehci_debug_root = NULL;
1381 err_debug:
1382 #endif
1383         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1384         return retval;
1385 }
1386 module_init(ehci_hcd_init);
1387
1388 static void __exit ehci_hcd_cleanup(void)
1389 {
1390 #ifdef XILINX_OF_PLATFORM_DRIVER
1391         platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1392 #endif
1393 #ifdef OF_PLATFORM_DRIVER
1394         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1395 #endif
1396 #ifdef PLATFORM_DRIVER
1397         platform_driver_unregister(&PLATFORM_DRIVER);
1398 #endif
1399 #ifdef PCI_DRIVER
1400         pci_unregister_driver(&PCI_DRIVER);
1401 #endif
1402 #ifdef PS3_SYSTEM_BUS_DRIVER
1403         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1404 #endif
1405 #ifdef DEBUG
1406         debugfs_remove(ehci_debug_root);
1407 #endif
1408         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1409 }
1410 module_exit(ehci_hcd_cleanup);
1411