[PATCH] USB: fix up remaining pm_message_t usages
[linux-2.6.git] / drivers / usb / gadget / omap_udc.c
1 /*
2  * omap_udc.c -- for OMAP full speed udc; most chips support OTG.
3  *
4  * Copyright (C) 2004 Texas Instruments, Inc.
5  * Copyright (C) 2004-2005 David Brownell
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
20  */
21
22 #undef  DEBUG
23 #undef  VERBOSE
24
25 #include <linux/config.h>
26 #include <linux/module.h>
27 #include <linux/kernel.h>
28 #include <linux/ioport.h>
29 #include <linux/types.h>
30 #include <linux/errno.h>
31 #include <linux/delay.h>
32 #include <linux/sched.h>
33 #include <linux/slab.h>
34 #include <linux/init.h>
35 #include <linux/timer.h>
36 #include <linux/list.h>
37 #include <linux/interrupt.h>
38 #include <linux/proc_fs.h>
39 #include <linux/mm.h>
40 #include <linux/moduleparam.h>
41 #include <linux/device.h>
42 #include <linux/usb_ch9.h>
43 #include <linux/usb_gadget.h>
44 #include <linux/usb_otg.h>
45 #include <linux/dma-mapping.h>
46
47 #include <asm/byteorder.h>
48 #include <asm/io.h>
49 #include <asm/irq.h>
50 #include <asm/system.h>
51 #include <asm/unaligned.h>
52 #include <asm/mach-types.h>
53
54 #include <asm/arch/dma.h>
55 #include <asm/arch/mux.h>
56 #include <asm/arch/usb.h>
57
58 #include "omap_udc.h"
59
60 #undef  USB_TRACE
61
62 /* bulk DMA seems to be behaving for both IN and OUT */
63 #define USE_DMA
64
65 /* ISO too */
66 #define USE_ISO
67
68 #define DRIVER_DESC     "OMAP UDC driver"
69 #define DRIVER_VERSION  "4 October 2004"
70
71 #define DMA_ADDR_INVALID        (~(dma_addr_t)0)
72
73
74 /*
75  * The OMAP UDC needs _very_ early endpoint setup:  before enabling the
76  * D+ pullup to allow enumeration.  That's too early for the gadget
77  * framework to use from usb_endpoint_enable(), which happens after
78  * enumeration as part of activating an interface.  (But if we add an
79  * optional new "UDC not yet running" state to the gadget driver model,
80  * even just during driver binding, the endpoint autoconfig logic is the
81  * natural spot to manufacture new endpoints.)
82  *
83  * So instead of using endpoint enable calls to control the hardware setup,
84  * this driver defines a "fifo mode" parameter.  It's used during driver
85  * initialization to choose among a set of pre-defined endpoint configs.
86  * See omap_udc_setup() for available modes, or to add others.  That code
87  * lives in an init section, so use this driver as a module if you need
88  * to change the fifo mode after the kernel boots.
89  *
90  * Gadget drivers normally ignore endpoints they don't care about, and
91  * won't include them in configuration descriptors.  That means only
92  * misbehaving hosts would even notice they exist.
93  */
94 #ifdef  USE_ISO
95 static unsigned fifo_mode = 3;
96 #else
97 static unsigned fifo_mode = 0;
98 #endif
99
100 /* "modprobe omap_udc fifo_mode=42", or else as a kernel
101  * boot parameter "omap_udc:fifo_mode=42"
102  */
103 module_param (fifo_mode, uint, 0);
104 MODULE_PARM_DESC (fifo_mode, "endpoint setup (0 == default)");
105
106 #ifdef  USE_DMA
107 static unsigned use_dma = 1;
108
109 /* "modprobe omap_udc use_dma=y", or else as a kernel
110  * boot parameter "omap_udc:use_dma=y"
111  */
112 module_param (use_dma, bool, 0);
113 MODULE_PARM_DESC (use_dma, "enable/disable DMA");
114 #else   /* !USE_DMA */
115
116 /* save a bit of code */
117 #define use_dma         0
118 #endif  /* !USE_DMA */
119
120
121 static const char driver_name [] = "omap_udc";
122 static const char driver_desc [] = DRIVER_DESC;
123
124 /*-------------------------------------------------------------------------*/
125
126 /* there's a notion of "current endpoint" for modifying endpoint
127  * state, and PIO access to its FIFO.  
128  */
129
130 static void use_ep(struct omap_ep *ep, u16 select)
131 {
132         u16     num = ep->bEndpointAddress & 0x0f;
133
134         if (ep->bEndpointAddress & USB_DIR_IN)
135                 num |= UDC_EP_DIR;
136         UDC_EP_NUM_REG = num | select;
137         /* when select, MUST deselect later !! */
138 }
139
140 static inline void deselect_ep(void)
141 {
142         UDC_EP_NUM_REG &= ~UDC_EP_SEL;
143         /* 6 wait states before TX will happen */
144 }
145
146 static void dma_channel_claim(struct omap_ep *ep, unsigned preferred);
147
148 /*-------------------------------------------------------------------------*/
149
150 static int omap_ep_enable(struct usb_ep *_ep,
151                 const struct usb_endpoint_descriptor *desc)
152 {
153         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
154         struct omap_udc *udc;
155         unsigned long   flags;
156         u16             maxp;
157
158         /* catch various bogus parameters */
159         if (!_ep || !desc || ep->desc
160                         || desc->bDescriptorType != USB_DT_ENDPOINT
161                         || ep->bEndpointAddress != desc->bEndpointAddress
162                         || ep->maxpacket < le16_to_cpu
163                                                 (desc->wMaxPacketSize)) {
164                 DBG("%s, bad ep or descriptor\n", __FUNCTION__);
165                 return -EINVAL;
166         }
167         maxp = le16_to_cpu (desc->wMaxPacketSize);
168         if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
169                                 && maxp != ep->maxpacket)
170                         || desc->wMaxPacketSize > ep->maxpacket
171                         || !desc->wMaxPacketSize) {
172                 DBG("%s, bad %s maxpacket\n", __FUNCTION__, _ep->name);
173                 return -ERANGE;
174         }
175
176 #ifdef  USE_ISO
177         if ((desc->bmAttributes == USB_ENDPOINT_XFER_ISOC
178                                 && desc->bInterval != 1)) {
179                 /* hardware wants period = 1; USB allows 2^(Interval-1) */
180                 DBG("%s, unsupported ISO period %dms\n", _ep->name,
181                                 1 << (desc->bInterval - 1));
182                 return -EDOM;
183         }
184 #else
185         if (desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
186                 DBG("%s, ISO nyet\n", _ep->name);
187                 return -EDOM;
188         }
189 #endif
190
191         /* xfer types must match, except that interrupt ~= bulk */
192         if (ep->bmAttributes != desc->bmAttributes
193                         && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
194                         && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
195                 DBG("%s, %s type mismatch\n", __FUNCTION__, _ep->name);
196                 return -EINVAL;
197         }
198
199         udc = ep->udc;
200         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
201                 DBG("%s, bogus device state\n", __FUNCTION__);
202                 return -ESHUTDOWN;
203         }
204
205         spin_lock_irqsave(&udc->lock, flags);
206
207         ep->desc = desc;
208         ep->irqs = 0;
209         ep->stopped = 0;
210         ep->ep.maxpacket = maxp;
211
212         /* set endpoint to initial state */
213         ep->dma_channel = 0;
214         ep->has_dma = 0;
215         ep->lch = -1;
216         use_ep(ep, UDC_EP_SEL);
217         UDC_CTRL_REG = UDC_RESET_EP;
218         ep->ackwait = 0;
219         deselect_ep();
220
221         if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
222                 list_add(&ep->iso, &udc->iso);
223
224         /* maybe assign a DMA channel to this endpoint */
225         if (use_dma && desc->bmAttributes == USB_ENDPOINT_XFER_BULK)
226                 /* FIXME ISO can dma, but prefers first channel */
227                 dma_channel_claim(ep, 0);
228
229         /* PIO OUT may RX packets */
230         if (desc->bmAttributes != USB_ENDPOINT_XFER_ISOC
231                         && !ep->has_dma
232                         && !(ep->bEndpointAddress & USB_DIR_IN)) {
233                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
234                 ep->ackwait = 1 + ep->double_buf;
235         }
236
237         spin_unlock_irqrestore(&udc->lock, flags);
238         VDBG("%s enabled\n", _ep->name);
239         return 0;
240 }
241
242 static void nuke(struct omap_ep *, int status);
243
244 static int omap_ep_disable(struct usb_ep *_ep)
245 {
246         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
247         unsigned long   flags;
248
249         if (!_ep || !ep->desc) {
250                 DBG("%s, %s not enabled\n", __FUNCTION__,
251                         _ep ? ep->ep.name : NULL);
252                 return -EINVAL;
253         }
254
255         spin_lock_irqsave(&ep->udc->lock, flags);
256         ep->desc = 0;
257         nuke (ep, -ESHUTDOWN);
258         ep->ep.maxpacket = ep->maxpacket;
259         ep->has_dma = 0;
260         UDC_CTRL_REG = UDC_SET_HALT;
261         list_del_init(&ep->iso);
262         del_timer(&ep->timer);
263
264         spin_unlock_irqrestore(&ep->udc->lock, flags);
265
266         VDBG("%s disabled\n", _ep->name);
267         return 0;
268 }
269
270 /*-------------------------------------------------------------------------*/
271
272 static struct usb_request *
273 omap_alloc_request(struct usb_ep *ep, int gfp_flags)
274 {
275         struct omap_req *req;
276
277         req = kmalloc(sizeof *req, gfp_flags);
278         if (req) {
279                 memset (req, 0, sizeof *req);
280                 req->req.dma = DMA_ADDR_INVALID;
281                 INIT_LIST_HEAD (&req->queue);
282         }
283         return &req->req;
284 }
285
286 static void
287 omap_free_request(struct usb_ep *ep, struct usb_request *_req)
288 {
289         struct omap_req *req = container_of(_req, struct omap_req, req);
290
291         if (_req)
292                 kfree (req);
293 }
294
295 /*-------------------------------------------------------------------------*/
296
297 static void *
298 omap_alloc_buffer(
299         struct usb_ep   *_ep,
300         unsigned        bytes,
301         dma_addr_t      *dma,
302         int             gfp_flags
303 )
304 {
305         void            *retval;
306         struct omap_ep  *ep;
307
308         ep = container_of(_ep, struct omap_ep, ep);
309         if (use_dma && ep->has_dma) {
310                 static int      warned;
311                 if (!warned && bytes < PAGE_SIZE) {
312                         dev_warn(ep->udc->gadget.dev.parent,
313                                 "using dma_alloc_coherent for "
314                                 "small allocations wastes memory\n");
315                         warned++;
316                 }
317                 return dma_alloc_coherent(ep->udc->gadget.dev.parent,
318                                 bytes, dma, gfp_flags);
319         }
320
321         retval = kmalloc(bytes, gfp_flags);
322         if (retval)
323                 *dma = virt_to_phys(retval);
324         return retval;
325 }
326
327 static void omap_free_buffer(
328         struct usb_ep   *_ep,
329         void            *buf,
330         dma_addr_t      dma,
331         unsigned        bytes
332 )
333 {
334         struct omap_ep  *ep;
335
336         ep = container_of(_ep, struct omap_ep, ep);
337         if (use_dma && _ep && ep->has_dma)
338                 dma_free_coherent(ep->udc->gadget.dev.parent, bytes, buf, dma);
339         else
340                 kfree (buf);
341 }
342
343 /*-------------------------------------------------------------------------*/
344
345 static void
346 done(struct omap_ep *ep, struct omap_req *req, int status)
347 {
348         unsigned                stopped = ep->stopped;
349
350         list_del_init(&req->queue);
351
352         if (req->req.status == -EINPROGRESS)
353                 req->req.status = status;
354         else
355                 status = req->req.status;
356
357         if (use_dma && ep->has_dma) {
358                 if (req->mapped) {
359                         dma_unmap_single(ep->udc->gadget.dev.parent,
360                                 req->req.dma, req->req.length,
361                                 (ep->bEndpointAddress & USB_DIR_IN)
362                                         ? DMA_TO_DEVICE
363                                         : DMA_FROM_DEVICE);
364                         req->req.dma = DMA_ADDR_INVALID;
365                         req->mapped = 0;
366                 } else
367                         dma_sync_single_for_cpu(ep->udc->gadget.dev.parent,
368                                 req->req.dma, req->req.length,
369                                 (ep->bEndpointAddress & USB_DIR_IN)
370                                         ? DMA_TO_DEVICE
371                                         : DMA_FROM_DEVICE);
372         }
373
374 #ifndef USB_TRACE
375         if (status && status != -ESHUTDOWN)
376 #endif
377                 VDBG("complete %s req %p stat %d len %u/%u\n",
378                         ep->ep.name, &req->req, status,
379                         req->req.actual, req->req.length);
380
381         /* don't modify queue heads during completion callback */
382         ep->stopped = 1;
383         spin_unlock(&ep->udc->lock);
384         req->req.complete(&ep->ep, &req->req);
385         spin_lock(&ep->udc->lock);
386         ep->stopped = stopped;
387 }
388
389 /*-------------------------------------------------------------------------*/
390
391 #define FIFO_FULL       (UDC_NON_ISO_FIFO_FULL | UDC_ISO_FIFO_FULL)
392 #define FIFO_UNWRITABLE (UDC_EP_HALTED | FIFO_FULL)
393
394 #define FIFO_EMPTY      (UDC_NON_ISO_FIFO_EMPTY | UDC_ISO_FIFO_EMPTY)
395 #define FIFO_UNREADABLE (UDC_EP_HALTED | FIFO_EMPTY)
396
397 static inline int 
398 write_packet(u8 *buf, struct omap_req *req, unsigned max)
399 {
400         unsigned        len;
401         u16             *wp;
402
403         len = min(req->req.length - req->req.actual, max);
404         req->req.actual += len;
405
406         max = len;
407         if (likely((((int)buf) & 1) == 0)) {
408                 wp = (u16 *)buf;
409                 while (max >= 2) {
410                         UDC_DATA_REG = *wp++;
411                         max -= 2;
412                 }
413                 buf = (u8 *)wp;
414         }
415         while (max--)
416                 *(volatile u8 *)&UDC_DATA_REG = *buf++;
417         return len;
418 }
419
420 // FIXME change r/w fifo calling convention
421
422
423 // return:  0 = still running, 1 = completed, negative = errno
424 static int write_fifo(struct omap_ep *ep, struct omap_req *req)
425 {
426         u8              *buf;
427         unsigned        count;
428         int             is_last;
429         u16             ep_stat;
430
431         buf = req->req.buf + req->req.actual;
432         prefetch(buf);
433
434         /* PIO-IN isn't double buffered except for iso */
435         ep_stat = UDC_STAT_FLG_REG;
436         if (ep_stat & FIFO_UNWRITABLE)
437                 return 0;
438
439         count = ep->ep.maxpacket;
440         count = write_packet(buf, req, count);
441         UDC_CTRL_REG = UDC_SET_FIFO_EN;
442         ep->ackwait = 1;
443
444         /* last packet is often short (sometimes a zlp) */
445         if (count != ep->ep.maxpacket)
446                 is_last = 1;
447         else if (req->req.length == req->req.actual
448                         && !req->req.zero)
449                 is_last = 1;
450         else
451                 is_last = 0;
452
453         /* NOTE:  requests complete when all IN data is in a
454          * FIFO (or sometimes later, if a zlp was needed).
455          * Use usb_ep_fifo_status() where needed.
456          */
457         if (is_last)
458                 done(ep, req, 0);
459         return is_last;
460 }
461
462 static inline int 
463 read_packet(u8 *buf, struct omap_req *req, unsigned avail)
464 {
465         unsigned        len;
466         u16             *wp;
467
468         len = min(req->req.length - req->req.actual, avail);
469         req->req.actual += len;
470         avail = len;
471
472         if (likely((((int)buf) & 1) == 0)) {
473                 wp = (u16 *)buf;
474                 while (avail >= 2) {
475                         *wp++ = UDC_DATA_REG;
476                         avail -= 2;
477                 }
478                 buf = (u8 *)wp;
479         }
480         while (avail--)
481                 *buf++ = *(volatile u8 *)&UDC_DATA_REG;
482         return len;
483 }
484
485 // return:  0 = still running, 1 = queue empty, negative = errno
486 static int read_fifo(struct omap_ep *ep, struct omap_req *req)
487 {
488         u8              *buf;
489         unsigned        count, avail;
490         int             is_last;
491
492         buf = req->req.buf + req->req.actual;
493         prefetchw(buf);
494
495         for (;;) {
496                 u16     ep_stat = UDC_STAT_FLG_REG;
497
498                 is_last = 0;
499                 if (ep_stat & FIFO_EMPTY) {
500                         if (!ep->double_buf)
501                                 break;
502                         ep->fnf = 1;
503                 }
504                 if (ep_stat & UDC_EP_HALTED)
505                         break;
506
507                 if (ep_stat & FIFO_FULL)
508                         avail = ep->ep.maxpacket;
509                 else  {
510                         avail = UDC_RXFSTAT_REG;
511                         ep->fnf = ep->double_buf;
512                 }
513                 count = read_packet(buf, req, avail);
514
515                 /* partial packet reads may not be errors */
516                 if (count < ep->ep.maxpacket) {
517                         is_last = 1;
518                         /* overflowed this request?  flush extra data */
519                         if (count != avail) {
520                                 req->req.status = -EOVERFLOW;
521                                 avail -= count;
522                                 while (avail--)
523                                         (void) *(volatile u8 *)&UDC_DATA_REG;
524                         }
525                 } else if (req->req.length == req->req.actual)
526                         is_last = 1;
527                 else
528                         is_last = 0;
529
530                 if (!ep->bEndpointAddress)
531                         break;
532                 if (is_last)
533                         done(ep, req, 0);
534                 break;
535         }
536         return is_last;
537 }
538
539 /*-------------------------------------------------------------------------*/
540
541 static u16 dma_src_len(struct omap_ep *ep, dma_addr_t start)
542 {
543         dma_addr_t      end;
544
545         /* IN-DMA needs this on fault/cancel paths, so 15xx misreports
546          * the last transfer's bytecount by more than a FIFO's worth.
547          */
548         if (cpu_is_omap15xx())
549                 return 0;
550
551         end = omap_readw(OMAP_DMA_CSAC(ep->lch));
552         if (end == ep->dma_counter)
553                 return 0;
554
555         end |= start & (0xffff << 16);
556         if (end < start)
557                 end += 0x10000;
558         return end - start;
559 }
560
561 #define DMA_DEST_LAST(x) (cpu_is_omap15xx() \
562                 ? OMAP_DMA_CSAC(x) /* really: CPC */ \
563                 : OMAP_DMA_CDAC(x))
564
565 static u16 dma_dest_len(struct omap_ep *ep, dma_addr_t start)
566 {
567         dma_addr_t      end;
568
569         end = omap_readw(DMA_DEST_LAST(ep->lch));
570         if (end == ep->dma_counter)
571                 return 0;
572
573         end |= start & (0xffff << 16);
574         if (cpu_is_omap15xx())
575                 end++;
576         if (end < start)
577                 end += 0x10000;
578         return end - start;
579 }
580
581
582 /* Each USB transfer request using DMA maps to one or more DMA transfers.
583  * When DMA completion isn't request completion, the UDC continues with
584  * the next DMA transfer for that USB transfer.
585  */
586
587 static void next_in_dma(struct omap_ep *ep, struct omap_req *req)
588 {
589         u16             txdma_ctrl;
590         unsigned        length = req->req.length - req->req.actual;
591         const int       sync_mode = cpu_is_omap15xx()
592                                 ? OMAP_DMA_SYNC_FRAME
593                                 : OMAP_DMA_SYNC_ELEMENT;
594
595         /* measure length in either bytes or packets */
596         if ((cpu_is_omap16xx() && length <= (UDC_TXN_TSC + 1))
597                         || (cpu_is_omap15xx() && length < ep->maxpacket)) {
598                 txdma_ctrl = UDC_TXN_EOT | length;
599                 omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S8,
600                                 length, 1, sync_mode);
601         } else {
602                 length = min(length / ep->maxpacket,
603                                 (unsigned) UDC_TXN_TSC + 1);
604                 txdma_ctrl = length;
605                 omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S8,
606                                 ep->ep.maxpacket, length, sync_mode);
607                 length *= ep->maxpacket;
608         }
609         omap_set_dma_src_params(ep->lch, OMAP_DMA_PORT_EMIFF,
610                 OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual);
611
612         omap_start_dma(ep->lch);
613         ep->dma_counter = omap_readw(OMAP_DMA_CSAC(ep->lch));
614         UDC_DMA_IRQ_EN_REG |= UDC_TX_DONE_IE(ep->dma_channel);
615         UDC_TXDMA_REG(ep->dma_channel) = UDC_TXN_START | txdma_ctrl;
616         req->dma_bytes = length;
617 }
618
619 static void finish_in_dma(struct omap_ep *ep, struct omap_req *req, int status)
620 {
621         if (status == 0) {
622                 req->req.actual += req->dma_bytes;
623
624                 /* return if this request needs to send data or zlp */
625                 if (req->req.actual < req->req.length)
626                         return;
627                 if (req->req.zero
628                                 && req->dma_bytes != 0
629                                 && (req->req.actual % ep->maxpacket) == 0)
630                         return;
631         } else
632                 req->req.actual += dma_src_len(ep, req->req.dma
633                                                         + req->req.actual);
634
635         /* tx completion */
636         omap_stop_dma(ep->lch);
637         UDC_DMA_IRQ_EN_REG &= ~UDC_TX_DONE_IE(ep->dma_channel);
638         done(ep, req, status);
639 }
640
641 static void next_out_dma(struct omap_ep *ep, struct omap_req *req)
642 {
643         unsigned packets;
644
645         /* NOTE:  we filtered out "short reads" before, so we know
646          * the buffer has only whole numbers of packets.
647          */
648
649         /* set up this DMA transfer, enable the fifo, start */
650         packets = (req->req.length - req->req.actual) / ep->ep.maxpacket;
651         packets = min(packets, (unsigned)UDC_RXN_TC + 1);
652         req->dma_bytes = packets * ep->ep.maxpacket;
653         omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S8,
654                         ep->ep.maxpacket, packets,
655                         OMAP_DMA_SYNC_ELEMENT);
656         omap_set_dma_dest_params(ep->lch, OMAP_DMA_PORT_EMIFF,
657                 OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual);
658         ep->dma_counter = omap_readw(DMA_DEST_LAST(ep->lch));
659
660         UDC_RXDMA_REG(ep->dma_channel) = UDC_RXN_STOP | (packets - 1);
661         UDC_DMA_IRQ_EN_REG |= UDC_RX_EOT_IE(ep->dma_channel);
662         UDC_EP_NUM_REG = (ep->bEndpointAddress & 0xf);
663         UDC_CTRL_REG = UDC_SET_FIFO_EN;
664
665         omap_start_dma(ep->lch);
666 }
667
668 static void
669 finish_out_dma(struct omap_ep *ep, struct omap_req *req, int status)
670 {
671         u16     count;
672
673         if (status == 0)
674                 ep->dma_counter = (u16) (req->req.dma + req->req.actual);
675         count = dma_dest_len(ep, req->req.dma + req->req.actual);
676         count += req->req.actual;
677         if (count <= req->req.length)
678                 req->req.actual = count;
679
680         if (count != req->dma_bytes || status)
681                 omap_stop_dma(ep->lch);
682
683         /* if this wasn't short, request may need another transfer */
684         else if (req->req.actual < req->req.length)
685                 return;
686
687         /* rx completion */
688         UDC_DMA_IRQ_EN_REG &= ~UDC_RX_EOT_IE(ep->dma_channel);
689         done(ep, req, status);
690 }
691
692 static void dma_irq(struct omap_udc *udc, u16 irq_src)
693 {
694         u16             dman_stat = UDC_DMAN_STAT_REG;
695         struct omap_ep  *ep;
696         struct omap_req *req;
697
698         /* IN dma: tx to host */
699         if (irq_src & UDC_TXN_DONE) {
700                 ep = &udc->ep[16 + UDC_DMA_TX_SRC(dman_stat)];
701                 ep->irqs++;
702                 /* can see TXN_DONE after dma abort */
703                 if (!list_empty(&ep->queue)) {
704                         req = container_of(ep->queue.next,
705                                                 struct omap_req, queue);
706                         finish_in_dma(ep, req, 0);
707                 }
708                 UDC_IRQ_SRC_REG = UDC_TXN_DONE;
709
710                 if (!list_empty (&ep->queue)) {
711                         req = container_of(ep->queue.next,
712                                         struct omap_req, queue);
713                         next_in_dma(ep, req);
714                 }
715         }
716
717         /* OUT dma: rx from host */
718         if (irq_src & UDC_RXN_EOT) {
719                 ep = &udc->ep[UDC_DMA_RX_SRC(dman_stat)];
720                 ep->irqs++;
721                 /* can see RXN_EOT after dma abort */
722                 if (!list_empty(&ep->queue)) {
723                         req = container_of(ep->queue.next,
724                                         struct omap_req, queue);
725                         finish_out_dma(ep, req, 0);
726                 }
727                 UDC_IRQ_SRC_REG = UDC_RXN_EOT;
728
729                 if (!list_empty (&ep->queue)) {
730                         req = container_of(ep->queue.next,
731                                         struct omap_req, queue);
732                         next_out_dma(ep, req);
733                 }
734         }
735
736         if (irq_src & UDC_RXN_CNT) {
737                 ep = &udc->ep[UDC_DMA_RX_SRC(dman_stat)];
738                 ep->irqs++;
739                 /* omap15xx does this unasked... */
740                 VDBG("%s, RX_CNT irq?\n", ep->ep.name);
741                 UDC_IRQ_SRC_REG = UDC_RXN_CNT;
742         }
743 }
744
745 static void dma_error(int lch, u16 ch_status, void *data)
746 {
747         struct omap_ep  *ep = data;
748
749         /* if ch_status & OMAP_DMA_DROP_IRQ ... */
750         /* if ch_status & OMAP_DMA_TOUT_IRQ ... */
751         ERR("%s dma error, lch %d status %02x\n", ep->ep.name, lch, ch_status);
752
753         /* complete current transfer ... */
754 }
755
756 static void dma_channel_claim(struct omap_ep *ep, unsigned channel)
757 {
758         u16     reg;
759         int     status, restart, is_in;
760
761         is_in = ep->bEndpointAddress & USB_DIR_IN;
762         if (is_in)
763                 reg = UDC_TXDMA_CFG_REG;
764         else
765                 reg = UDC_RXDMA_CFG_REG;
766         reg |= 1 << 12;         /* "pulse" activated */
767
768         ep->dma_channel = 0;
769         ep->lch = -1;
770         if (channel == 0 || channel > 3) {
771                 if ((reg & 0x0f00) == 0)
772                         channel = 3;
773                 else if ((reg & 0x00f0) == 0)
774                         channel = 2;
775                 else if ((reg & 0x000f) == 0)   /* preferred for ISO */
776                         channel = 1;
777                 else {
778                         status = -EMLINK;
779                         goto just_restart;
780                 }
781         }
782         reg |= (0x0f & ep->bEndpointAddress) << (4 * (channel - 1));
783         ep->dma_channel = channel;
784
785         if (is_in) {
786                 status = omap_request_dma(OMAP_DMA_USB_W2FC_TX0 - 1 + channel,
787                         ep->ep.name, dma_error, ep, &ep->lch);
788                 if (status == 0) {
789                         UDC_TXDMA_CFG_REG = reg;
790                         omap_set_dma_dest_params(ep->lch,
791                                 OMAP_DMA_PORT_TIPB,
792                                 OMAP_DMA_AMODE_CONSTANT,
793                                 (unsigned long) io_v2p((u32)&UDC_DATA_DMA_REG));
794                 }
795         } else {
796                 status = omap_request_dma(OMAP_DMA_USB_W2FC_RX0 - 1 + channel,
797                         ep->ep.name, dma_error, ep, &ep->lch);
798                 if (status == 0) {
799                         UDC_RXDMA_CFG_REG = reg;
800                         omap_set_dma_src_params(ep->lch,
801                                 OMAP_DMA_PORT_TIPB,
802                                 OMAP_DMA_AMODE_CONSTANT,
803                                 (unsigned long) io_v2p((u32)&UDC_DATA_DMA_REG));
804                 }
805         }
806         if (status)
807                 ep->dma_channel = 0;
808         else {
809                 ep->has_dma = 1;
810                 omap_disable_dma_irq(ep->lch, OMAP_DMA_BLOCK_IRQ);
811
812                 /* channel type P: hw synch (fifo) */
813                 if (!cpu_is_omap15xx())
814                         omap_writew(2, OMAP_DMA_LCH_CTRL(ep->lch));
815         }
816
817 just_restart:
818         /* restart any queue, even if the claim failed  */
819         restart = !ep->stopped && !list_empty(&ep->queue);
820
821         if (status)
822                 DBG("%s no dma channel: %d%s\n", ep->ep.name, status,
823                         restart ? " (restart)" : "");
824         else
825                 DBG("%s claimed %cxdma%d lch %d%s\n", ep->ep.name,
826                         is_in ? 't' : 'r',
827                         ep->dma_channel - 1, ep->lch,
828                         restart ? " (restart)" : "");
829
830         if (restart) {
831                 struct omap_req *req;
832                 req = container_of(ep->queue.next, struct omap_req, queue);
833                 if (ep->has_dma)
834                         (is_in ? next_in_dma : next_out_dma)(ep, req);
835                 else {
836                         use_ep(ep, UDC_EP_SEL);
837                         (is_in ? write_fifo : read_fifo)(ep, req);
838                         deselect_ep();
839                         if (!is_in) {
840                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
841                                 ep->ackwait = 1 + ep->double_buf;
842                         }
843                         /* IN: 6 wait states before it'll tx */
844                 }
845         }
846 }
847
848 static void dma_channel_release(struct omap_ep *ep)
849 {
850         int             shift = 4 * (ep->dma_channel - 1);
851         u16             mask = 0x0f << shift;
852         struct omap_req *req;
853         int             active;
854
855         /* abort any active usb transfer request */
856         if (!list_empty(&ep->queue))
857                 req = container_of(ep->queue.next, struct omap_req, queue);
858         else
859                 req = 0;
860
861         active = ((1 << 7) & omap_readl(OMAP_DMA_CCR(ep->lch))) != 0;
862
863         DBG("%s release %s %cxdma%d %p\n", ep->ep.name,
864                         active ? "active" : "idle",
865                         (ep->bEndpointAddress & USB_DIR_IN) ? 't' : 'r',
866                         ep->dma_channel - 1, req);
867
868         /* wait till current packet DMA finishes, and fifo empties */
869         if (ep->bEndpointAddress & USB_DIR_IN) {
870                 UDC_TXDMA_CFG_REG &= ~mask;
871
872                 if (req) {
873                         finish_in_dma(ep, req, -ECONNRESET);
874
875                         /* clear FIFO; hosts probably won't empty it */
876                         use_ep(ep, UDC_EP_SEL);
877                         UDC_CTRL_REG = UDC_CLR_EP;
878                         deselect_ep();
879                 }
880                 while (UDC_TXDMA_CFG_REG & mask)
881                         udelay(10);
882         } else {
883                 UDC_RXDMA_CFG_REG &= ~mask;
884
885                 /* dma empties the fifo */
886                 while (UDC_RXDMA_CFG_REG & mask)
887                         udelay(10);
888                 if (req)
889                         finish_out_dma(ep, req, -ECONNRESET);
890         }
891         omap_free_dma(ep->lch);
892         ep->dma_channel = 0;
893         ep->lch = -1;
894         /* has_dma still set, till endpoint is fully quiesced */
895 }
896
897
898 /*-------------------------------------------------------------------------*/
899
900 static int
901 omap_ep_queue(struct usb_ep *_ep, struct usb_request *_req, int gfp_flags)
902 {
903         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
904         struct omap_req *req = container_of(_req, struct omap_req, req);
905         struct omap_udc *udc;
906         unsigned long   flags;
907         int             is_iso = 0;
908
909         /* catch various bogus parameters */
910         if (!_req || !req->req.complete || !req->req.buf
911                         || !list_empty(&req->queue)) {
912                 DBG("%s, bad params\n", __FUNCTION__);
913                 return -EINVAL;
914         }
915         if (!_ep || (!ep->desc && ep->bEndpointAddress)) {
916                 DBG("%s, bad ep\n", __FUNCTION__);
917                 return -EINVAL;
918         }
919         if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
920                 if (req->req.length > ep->ep.maxpacket)
921                         return -EMSGSIZE;
922                 is_iso = 1;
923         }
924
925         /* this isn't bogus, but OMAP DMA isn't the only hardware to
926          * have a hard time with partial packet reads...  reject it.
927          */
928         if (use_dma
929                         && ep->has_dma
930                         && ep->bEndpointAddress != 0
931                         && (ep->bEndpointAddress & USB_DIR_IN) == 0
932                         && (req->req.length % ep->ep.maxpacket) != 0) {
933                 DBG("%s, no partial packet OUT reads\n", __FUNCTION__);
934                 return -EMSGSIZE;
935         }
936
937         udc = ep->udc;
938         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
939                 return -ESHUTDOWN;
940
941         if (use_dma && ep->has_dma) {
942                 if (req->req.dma == DMA_ADDR_INVALID) {
943                         req->req.dma = dma_map_single(
944                                 ep->udc->gadget.dev.parent,
945                                 req->req.buf,
946                                 req->req.length,
947                                 (ep->bEndpointAddress & USB_DIR_IN)
948                                         ? DMA_TO_DEVICE
949                                         : DMA_FROM_DEVICE);
950                         req->mapped = 1;
951                 } else {
952                         dma_sync_single_for_device(
953                                 ep->udc->gadget.dev.parent,
954                                 req->req.dma, req->req.length,
955                                 (ep->bEndpointAddress & USB_DIR_IN)
956                                         ? DMA_TO_DEVICE
957                                         : DMA_FROM_DEVICE);
958                         req->mapped = 0;
959                 }
960         }
961
962         VDBG("%s queue req %p, len %d buf %p\n",
963                 ep->ep.name, _req, _req->length, _req->buf);
964
965         spin_lock_irqsave(&udc->lock, flags);
966
967         req->req.status = -EINPROGRESS;
968         req->req.actual = 0;
969
970         /* maybe kickstart non-iso i/o queues */
971         if (is_iso)
972                 UDC_IRQ_EN_REG |= UDC_SOF_IE;
973         else if (list_empty(&ep->queue) && !ep->stopped && !ep->ackwait) {
974                 int     is_in;
975
976                 if (ep->bEndpointAddress == 0) {
977                         if (!udc->ep0_pending || !list_empty (&ep->queue)) {
978                                 spin_unlock_irqrestore(&udc->lock, flags);
979                                 return -EL2HLT;
980                         }
981
982                         /* empty DATA stage? */
983                         is_in = udc->ep0_in;
984                         if (!req->req.length) {
985
986                                 /* chip became CONFIGURED or ADDRESSED
987                                  * earlier; drivers may already have queued
988                                  * requests to non-control endpoints
989                                  */
990                                 if (udc->ep0_set_config) {
991                                         u16     irq_en = UDC_IRQ_EN_REG;
992
993                                         irq_en |= UDC_DS_CHG_IE | UDC_EP0_IE;
994                                         if (!udc->ep0_reset_config)
995                                                 irq_en |= UDC_EPN_RX_IE
996                                                         | UDC_EPN_TX_IE;
997                                         UDC_IRQ_EN_REG = irq_en;
998                                 }
999
1000                                 /* STATUS is reverse direction */
1001                                 UDC_EP_NUM_REG = is_in
1002                                                 ? UDC_EP_SEL
1003                                                 : (UDC_EP_SEL|UDC_EP_DIR);
1004                                 UDC_CTRL_REG = UDC_CLR_EP;
1005                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1006                                 UDC_EP_NUM_REG = udc->ep0_in ? 0 : UDC_EP_DIR;
1007
1008                                 /* cleanup */
1009                                 udc->ep0_pending = 0;
1010                                 done(ep, req, 0);
1011                                 req = 0;
1012
1013                         /* non-empty DATA stage */
1014                         } else if (is_in) {
1015                                 UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1016                         } else {
1017                                 if (udc->ep0_setup)
1018                                         goto irq_wait;
1019                                 UDC_EP_NUM_REG = UDC_EP_SEL;
1020                         }
1021                 } else {
1022                         is_in = ep->bEndpointAddress & USB_DIR_IN;
1023                         if (!ep->has_dma)
1024                                 use_ep(ep, UDC_EP_SEL);
1025                         /* if ISO: SOF IRQs must be enabled/disabled! */
1026                 }
1027
1028                 if (ep->has_dma)
1029                         (is_in ? next_in_dma : next_out_dma)(ep, req);
1030                 else if (req) {
1031                         if ((is_in ? write_fifo : read_fifo)(ep, req) == 1)
1032                                 req = 0;
1033                         deselect_ep();
1034                         if (!is_in) {
1035                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1036                                 ep->ackwait = 1 + ep->double_buf;
1037                         }
1038                         /* IN: 6 wait states before it'll tx */
1039                 }
1040         }
1041
1042 irq_wait:
1043         /* irq handler advances the queue */
1044         if (req != 0)
1045                 list_add_tail(&req->queue, &ep->queue);
1046         spin_unlock_irqrestore(&udc->lock, flags);
1047
1048         return 0;
1049 }
1050
1051 static int omap_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1052 {
1053         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
1054         struct omap_req *req;
1055         unsigned long   flags;
1056
1057         if (!_ep || !_req)
1058                 return -EINVAL;
1059
1060         spin_lock_irqsave(&ep->udc->lock, flags);
1061
1062         /* make sure it's actually queued on this endpoint */
1063         list_for_each_entry (req, &ep->queue, queue) {
1064                 if (&req->req == _req)
1065                         break;
1066         }
1067         if (&req->req != _req) {
1068                 spin_unlock_irqrestore(&ep->udc->lock, flags);
1069                 return -EINVAL;
1070         }
1071
1072         if (use_dma && ep->dma_channel && ep->queue.next == &req->queue) {
1073                 int channel = ep->dma_channel;
1074
1075                 /* releasing the channel cancels the request,
1076                  * reclaiming the channel restarts the queue
1077                  */
1078                 dma_channel_release(ep);
1079                 dma_channel_claim(ep, channel);
1080         } else 
1081                 done(ep, req, -ECONNRESET);
1082         spin_unlock_irqrestore(&ep->udc->lock, flags);
1083         return 0;
1084 }
1085
1086 /*-------------------------------------------------------------------------*/
1087
1088 static int omap_ep_set_halt(struct usb_ep *_ep, int value)
1089 {
1090         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
1091         unsigned long   flags;
1092         int             status = -EOPNOTSUPP;
1093
1094         spin_lock_irqsave(&ep->udc->lock, flags);
1095
1096         /* just use protocol stalls for ep0; real halts are annoying */
1097         if (ep->bEndpointAddress == 0) {
1098                 if (!ep->udc->ep0_pending)
1099                         status = -EINVAL;
1100                 else if (value) {
1101                         if (ep->udc->ep0_set_config) {
1102                                 WARN("error changing config?\n");
1103                                 UDC_SYSCON2_REG = UDC_CLR_CFG;
1104                         }
1105                         UDC_SYSCON2_REG = UDC_STALL_CMD;
1106                         ep->udc->ep0_pending = 0;
1107                         status = 0;
1108                 } else /* NOP */
1109                         status = 0;
1110
1111         /* otherwise, all active non-ISO endpoints can halt */
1112         } else if (ep->bmAttributes != USB_ENDPOINT_XFER_ISOC && ep->desc) {
1113
1114                 /* IN endpoints must already be idle */
1115                 if ((ep->bEndpointAddress & USB_DIR_IN)
1116                                 && !list_empty(&ep->queue)) { 
1117                         status = -EAGAIN;
1118                         goto done;
1119                 }
1120
1121                 if (value) {
1122                         int     channel;
1123
1124                         if (use_dma && ep->dma_channel
1125                                         && !list_empty(&ep->queue)) {
1126                                 channel = ep->dma_channel;
1127                                 dma_channel_release(ep);
1128                         } else
1129                                 channel = 0;
1130
1131                         use_ep(ep, UDC_EP_SEL);
1132                         if (UDC_STAT_FLG_REG & UDC_NON_ISO_FIFO_EMPTY) {
1133                                 UDC_CTRL_REG = UDC_SET_HALT;
1134                                 status = 0;
1135                         } else
1136                                 status = -EAGAIN;
1137                         deselect_ep();
1138
1139                         if (channel)
1140                                 dma_channel_claim(ep, channel);
1141                 } else {
1142                         use_ep(ep, 0);
1143                         UDC_CTRL_REG = UDC_RESET_EP;
1144                         ep->ackwait = 0;
1145                         if (!(ep->bEndpointAddress & USB_DIR_IN)) {
1146                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1147                                 ep->ackwait = 1 + ep->double_buf;
1148                         }
1149                 }
1150         }
1151 done:
1152         VDBG("%s %s halt stat %d\n", ep->ep.name,
1153                 value ? "set" : "clear", status);
1154
1155         spin_unlock_irqrestore(&ep->udc->lock, flags);
1156         return status;
1157 }
1158
1159 static struct usb_ep_ops omap_ep_ops = {
1160         .enable         = omap_ep_enable,
1161         .disable        = omap_ep_disable,
1162
1163         .alloc_request  = omap_alloc_request,
1164         .free_request   = omap_free_request,
1165
1166         .alloc_buffer   = omap_alloc_buffer,
1167         .free_buffer    = omap_free_buffer,
1168
1169         .queue          = omap_ep_queue,
1170         .dequeue        = omap_ep_dequeue,
1171
1172         .set_halt       = omap_ep_set_halt,
1173         // fifo_status ... report bytes in fifo
1174         // fifo_flush ... flush fifo
1175 };
1176
1177 /*-------------------------------------------------------------------------*/
1178
1179 static int omap_get_frame(struct usb_gadget *gadget)
1180 {
1181         u16     sof = UDC_SOF_REG;
1182         return (sof & UDC_TS_OK) ? (sof & UDC_TS) : -EL2NSYNC;
1183 }
1184
1185 static int omap_wakeup(struct usb_gadget *gadget)
1186 {
1187         struct omap_udc *udc;
1188         unsigned long   flags;
1189         int             retval = -EHOSTUNREACH;
1190
1191         udc = container_of(gadget, struct omap_udc, gadget);
1192
1193         spin_lock_irqsave(&udc->lock, flags);
1194         if (udc->devstat & UDC_SUS) {
1195                 /* NOTE:  OTG spec erratum says that OTG devices may
1196                  * issue wakeups without host enable.
1197                  */
1198                 if (udc->devstat & (UDC_B_HNP_ENABLE|UDC_R_WK_OK)) {
1199                         DBG("remote wakeup...\n");
1200                         UDC_SYSCON2_REG = UDC_RMT_WKP;
1201                         retval = 0;
1202                 }
1203
1204         /* NOTE:  non-OTG systems may use SRP TOO... */
1205         } else if (!(udc->devstat & UDC_ATT)) {
1206                 if (udc->transceiver)
1207                         retval = otg_start_srp(udc->transceiver);
1208         }
1209         spin_unlock_irqrestore(&udc->lock, flags);
1210
1211         return retval;
1212 }
1213
1214 static int
1215 omap_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
1216 {
1217         struct omap_udc *udc;
1218         unsigned long   flags;
1219         u16             syscon1;
1220
1221         udc = container_of(gadget, struct omap_udc, gadget);
1222         spin_lock_irqsave(&udc->lock, flags);
1223         syscon1 = UDC_SYSCON1_REG;
1224         if (is_selfpowered)
1225                 syscon1 |= UDC_SELF_PWR;
1226         else
1227                 syscon1 &= ~UDC_SELF_PWR;
1228         UDC_SYSCON1_REG = syscon1;
1229         spin_unlock_irqrestore(&udc->lock, flags);
1230
1231         return 0;
1232 }
1233
1234 static int can_pullup(struct omap_udc *udc)
1235 {
1236         return udc->driver && udc->softconnect && udc->vbus_active;
1237 }
1238
1239 static void pullup_enable(struct omap_udc *udc)
1240 {
1241         UDC_SYSCON1_REG |= UDC_PULLUP_EN;
1242 #ifndef CONFIG_USB_OTG
1243         if (!cpu_is_omap15xx())
1244                 OTG_CTRL_REG |= OTG_BSESSVLD;
1245 #endif
1246         UDC_IRQ_EN_REG = UDC_DS_CHG_IE;
1247 }
1248
1249 static void pullup_disable(struct omap_udc *udc)
1250 {
1251 #ifndef CONFIG_USB_OTG
1252         if (!cpu_is_omap15xx())
1253                 OTG_CTRL_REG &= ~OTG_BSESSVLD;
1254 #endif
1255         UDC_IRQ_EN_REG = UDC_DS_CHG_IE;
1256         UDC_SYSCON1_REG &= ~UDC_PULLUP_EN;
1257 }
1258
1259 /*
1260  * Called by whatever detects VBUS sessions:  external transceiver
1261  * driver, or maybe GPIO0 VBUS IRQ.  May request 48 MHz clock.
1262  */
1263 static int omap_vbus_session(struct usb_gadget *gadget, int is_active)
1264 {
1265         struct omap_udc *udc;
1266         unsigned long   flags;
1267
1268         udc = container_of(gadget, struct omap_udc, gadget);
1269         spin_lock_irqsave(&udc->lock, flags);
1270         VDBG("VBUS %s\n", is_active ? "on" : "off");
1271         udc->vbus_active = (is_active != 0);
1272         if (cpu_is_omap15xx()) {
1273                 /* "software" detect, ignored if !VBUS_MODE_1510 */
1274                 if (is_active)
1275                         FUNC_MUX_CTRL_0_REG |= VBUS_CTRL_1510;
1276                 else
1277                         FUNC_MUX_CTRL_0_REG &= ~VBUS_CTRL_1510;
1278         }
1279         if (can_pullup(udc))
1280                 pullup_enable(udc);
1281         else
1282                 pullup_disable(udc);
1283         spin_unlock_irqrestore(&udc->lock, flags);
1284         return 0;
1285 }
1286
1287 static int omap_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1288 {
1289         struct omap_udc *udc;
1290
1291         udc = container_of(gadget, struct omap_udc, gadget);
1292         if (udc->transceiver)
1293                 return otg_set_power(udc->transceiver, mA);
1294         return -EOPNOTSUPP;
1295 }
1296
1297 static int omap_pullup(struct usb_gadget *gadget, int is_on)
1298 {
1299         struct omap_udc *udc;
1300         unsigned long   flags;
1301
1302         udc = container_of(gadget, struct omap_udc, gadget);
1303         spin_lock_irqsave(&udc->lock, flags);
1304         udc->softconnect = (is_on != 0);
1305         if (can_pullup(udc))
1306                 pullup_enable(udc);
1307         else
1308                 pullup_disable(udc);
1309         spin_unlock_irqrestore(&udc->lock, flags);
1310         return 0;
1311 }
1312
1313 static struct usb_gadget_ops omap_gadget_ops = {
1314         .get_frame              = omap_get_frame,
1315         .wakeup                 = omap_wakeup,
1316         .set_selfpowered        = omap_set_selfpowered,
1317         .vbus_session           = omap_vbus_session,
1318         .vbus_draw              = omap_vbus_draw,
1319         .pullup                 = omap_pullup,
1320 };
1321
1322 /*-------------------------------------------------------------------------*/
1323
1324 /* dequeue ALL requests; caller holds udc->lock */
1325 static void nuke(struct omap_ep *ep, int status)
1326 {
1327         struct omap_req *req;
1328
1329         ep->stopped = 1;
1330
1331         if (use_dma && ep->dma_channel)
1332                 dma_channel_release(ep);
1333
1334         use_ep(ep, 0);
1335         UDC_CTRL_REG = UDC_CLR_EP;
1336         if (ep->bEndpointAddress && ep->bmAttributes != USB_ENDPOINT_XFER_ISOC)
1337                 UDC_CTRL_REG = UDC_SET_HALT;
1338
1339         while (!list_empty(&ep->queue)) {
1340                 req = list_entry(ep->queue.next, struct omap_req, queue);
1341                 done(ep, req, status);
1342         }
1343 }
1344
1345 /* caller holds udc->lock */
1346 static void udc_quiesce(struct omap_udc *udc)
1347 {
1348         struct omap_ep  *ep;
1349
1350         udc->gadget.speed = USB_SPEED_UNKNOWN;
1351         nuke(&udc->ep[0], -ESHUTDOWN);
1352         list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list)
1353                 nuke(ep, -ESHUTDOWN);
1354 }
1355
1356 /*-------------------------------------------------------------------------*/
1357
1358 static void update_otg(struct omap_udc *udc)
1359 {
1360         u16     devstat;
1361
1362         if (!udc->gadget.is_otg)
1363                 return;
1364
1365         if (OTG_CTRL_REG & OTG_ID)
1366                 devstat = UDC_DEVSTAT_REG;
1367         else
1368                 devstat = 0;
1369
1370         udc->gadget.b_hnp_enable = !!(devstat & UDC_B_HNP_ENABLE);
1371         udc->gadget.a_hnp_support = !!(devstat & UDC_A_HNP_SUPPORT);
1372         udc->gadget.a_alt_hnp_support = !!(devstat & UDC_A_ALT_HNP_SUPPORT);
1373
1374         /* Enable HNP early, avoiding races on suspend irq path.
1375          * ASSUMES OTG state machine B_BUS_REQ input is true.
1376          */
1377         if (udc->gadget.b_hnp_enable)
1378                 OTG_CTRL_REG = (OTG_CTRL_REG | OTG_B_HNPEN | OTG_B_BUSREQ)
1379                                 & ~OTG_PULLUP;
1380 }
1381
1382 static void ep0_irq(struct omap_udc *udc, u16 irq_src)
1383 {
1384         struct omap_ep  *ep0 = &udc->ep[0];
1385         struct omap_req *req = 0;
1386
1387         ep0->irqs++;
1388
1389         /* Clear any pending requests and then scrub any rx/tx state
1390          * before starting to handle the SETUP request.
1391          */
1392         if (irq_src & UDC_SETUP) {
1393                 u16     ack = irq_src & (UDC_EP0_TX|UDC_EP0_RX);
1394
1395                 nuke(ep0, 0);
1396                 if (ack) {
1397                         UDC_IRQ_SRC_REG = ack;
1398                         irq_src = UDC_SETUP;
1399                 }
1400         }
1401
1402         /* IN/OUT packets mean we're in the DATA or STATUS stage.  
1403          * This driver uses only uses protocol stalls (ep0 never halts),
1404          * and if we got this far the gadget driver already had a
1405          * chance to stall.  Tries to be forgiving of host oddities.
1406          *
1407          * NOTE:  the last chance gadget drivers have to stall control
1408          * requests is during their request completion callback.
1409          */
1410         if (!list_empty(&ep0->queue))
1411                 req = container_of(ep0->queue.next, struct omap_req, queue);
1412
1413         /* IN == TX to host */
1414         if (irq_src & UDC_EP0_TX) {
1415                 int     stat;
1416
1417                 UDC_IRQ_SRC_REG = UDC_EP0_TX;
1418                 UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1419                 stat = UDC_STAT_FLG_REG;
1420                 if (stat & UDC_ACK) {
1421                         if (udc->ep0_in) {
1422                                 /* write next IN packet from response,
1423                                  * or set up the status stage.
1424                                  */
1425                                 if (req)
1426                                         stat = write_fifo(ep0, req);
1427                                 UDC_EP_NUM_REG = UDC_EP_DIR;
1428                                 if (!req && udc->ep0_pending) {
1429                                         UDC_EP_NUM_REG = UDC_EP_SEL;
1430                                         UDC_CTRL_REG = UDC_CLR_EP;
1431                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1432                                         UDC_EP_NUM_REG = 0;
1433                                         udc->ep0_pending = 0;
1434                                 } /* else:  6 wait states before it'll tx */
1435                         } else {
1436                                 /* ack status stage of OUT transfer */
1437                                 UDC_EP_NUM_REG = UDC_EP_DIR;
1438                                 if (req)
1439                                         done(ep0, req, 0);
1440                         }
1441                         req = 0;
1442                 } else if (stat & UDC_STALL) {
1443                         UDC_CTRL_REG = UDC_CLR_HALT;
1444                         UDC_EP_NUM_REG = UDC_EP_DIR;
1445                 } else {
1446                         UDC_EP_NUM_REG = UDC_EP_DIR;
1447                 }
1448         }
1449
1450         /* OUT == RX from host */
1451         if (irq_src & UDC_EP0_RX) {
1452                 int     stat;
1453
1454                 UDC_IRQ_SRC_REG = UDC_EP0_RX;
1455                 UDC_EP_NUM_REG = UDC_EP_SEL;
1456                 stat = UDC_STAT_FLG_REG;
1457                 if (stat & UDC_ACK) {
1458                         if (!udc->ep0_in) {
1459                                 stat = 0;
1460                                 /* read next OUT packet of request, maybe
1461                                  * reactiviting the fifo; stall on errors.
1462                                  */
1463                                 if (!req || (stat = read_fifo(ep0, req)) < 0) {
1464                                         UDC_SYSCON2_REG = UDC_STALL_CMD;
1465                                         udc->ep0_pending = 0;
1466                                         stat = 0;
1467                                 } else if (stat == 0)
1468                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1469                                 UDC_EP_NUM_REG = 0;
1470                                 
1471                                 /* activate status stage */
1472                                 if (stat == 1) {
1473                                         done(ep0, req, 0);
1474                                         /* that may have STALLed ep0... */
1475                                         UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1476                                         UDC_CTRL_REG = UDC_CLR_EP;
1477                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1478                                         UDC_EP_NUM_REG = UDC_EP_DIR;
1479                                         udc->ep0_pending = 0;
1480                                 }
1481                         } else {
1482                                 /* ack status stage of IN transfer */
1483                                 UDC_EP_NUM_REG = 0;
1484                                 if (req)
1485                                         done(ep0, req, 0);
1486                         }
1487                 } else if (stat & UDC_STALL) {
1488                         UDC_CTRL_REG = UDC_CLR_HALT;
1489                         UDC_EP_NUM_REG = 0;
1490                 } else {
1491                         UDC_EP_NUM_REG = 0;
1492                 }
1493         }
1494
1495         /* SETUP starts all control transfers */
1496         if (irq_src & UDC_SETUP) {
1497                 union u {
1498                         u16                     word[4];
1499                         struct usb_ctrlrequest  r;
1500                 } u;
1501                 int                     status = -EINVAL;
1502                 struct omap_ep          *ep;
1503
1504                 /* read the (latest) SETUP message */
1505                 do {
1506                         UDC_EP_NUM_REG = UDC_SETUP_SEL;
1507                         /* two bytes at a time */
1508                         u.word[0] = UDC_DATA_REG;
1509                         u.word[1] = UDC_DATA_REG;
1510                         u.word[2] = UDC_DATA_REG;
1511                         u.word[3] = UDC_DATA_REG;
1512                         UDC_EP_NUM_REG = 0;
1513                 } while (UDC_IRQ_SRC_REG & UDC_SETUP);
1514                 le16_to_cpus (&u.r.wValue);
1515                 le16_to_cpus (&u.r.wIndex);
1516                 le16_to_cpus (&u.r.wLength);
1517
1518                 /* Delegate almost all control requests to the gadget driver,
1519                  * except for a handful of ch9 status/feature requests that
1520                  * hardware doesn't autodecode _and_ the gadget API hides.
1521                  */
1522                 udc->ep0_in = (u.r.bRequestType & USB_DIR_IN) != 0;
1523                 udc->ep0_set_config = 0;
1524                 udc->ep0_pending = 1;
1525                 ep0->stopped = 0;
1526                 ep0->ackwait = 0;
1527                 switch (u.r.bRequest) {
1528                 case USB_REQ_SET_CONFIGURATION:
1529                         /* udc needs to know when ep != 0 is valid */
1530                         if (u.r.bRequestType != USB_RECIP_DEVICE)
1531                                 goto delegate;
1532                         if (u.r.wLength != 0)
1533                                 goto do_stall;
1534                         udc->ep0_set_config = 1;
1535                         udc->ep0_reset_config = (u.r.wValue == 0);
1536                         VDBG("set config %d\n", u.r.wValue);
1537
1538                         /* update udc NOW since gadget driver may start
1539                          * queueing requests immediately; clear config
1540                          * later if it fails the request.
1541                          */
1542                         if (udc->ep0_reset_config)
1543                                 UDC_SYSCON2_REG = UDC_CLR_CFG;
1544                         else
1545                                 UDC_SYSCON2_REG = UDC_DEV_CFG;
1546                         update_otg(udc);
1547                         goto delegate;
1548                 case USB_REQ_CLEAR_FEATURE:
1549                         /* clear endpoint halt */
1550                         if (u.r.bRequestType != USB_RECIP_ENDPOINT)
1551                                 goto delegate;
1552                         if (u.r.wValue != USB_ENDPOINT_HALT
1553                                         || u.r.wLength != 0)
1554                                 goto do_stall;
1555                         ep = &udc->ep[u.r.wIndex & 0xf];
1556                         if (ep != ep0) {
1557                                 if (u.r.wIndex & USB_DIR_IN)
1558                                         ep += 16;
1559                                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
1560                                                 || !ep->desc)
1561                                         goto do_stall;
1562                                 use_ep(ep, 0);
1563                                 UDC_CTRL_REG = UDC_RESET_EP;
1564                                 ep->ackwait = 0;
1565                                 if (!(ep->bEndpointAddress & USB_DIR_IN)) {
1566                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1567                                         ep->ackwait = 1 + ep->double_buf;
1568                                 }
1569                         }
1570                         VDBG("%s halt cleared by host\n", ep->name);
1571                         goto ep0out_status_stage;
1572                 case USB_REQ_SET_FEATURE:
1573                         /* set endpoint halt */
1574                         if (u.r.bRequestType != USB_RECIP_ENDPOINT)
1575                                 goto delegate;
1576                         if (u.r.wValue != USB_ENDPOINT_HALT
1577                                         || u.r.wLength != 0)
1578                                 goto do_stall;
1579                         ep = &udc->ep[u.r.wIndex & 0xf];
1580                         if (u.r.wIndex & USB_DIR_IN)
1581                                 ep += 16;
1582                         if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
1583                                         || ep == ep0 || !ep->desc)
1584                                 goto do_stall;
1585                         if (use_dma && ep->has_dma) {
1586                                 /* this has rude side-effects (aborts) and
1587                                  * can't really work if DMA-IN is active
1588                                  */
1589                                 DBG("%s host set_halt, NYET \n", ep->name);
1590                                 goto do_stall;
1591                         }
1592                         use_ep(ep, 0);
1593                         /* can't halt if fifo isn't empty... */
1594                         UDC_CTRL_REG = UDC_CLR_EP;
1595                         UDC_CTRL_REG = UDC_SET_HALT;
1596                         VDBG("%s halted by host\n", ep->name);
1597 ep0out_status_stage:
1598                         status = 0;
1599                         UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1600                         UDC_CTRL_REG = UDC_CLR_EP;
1601                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1602                         UDC_EP_NUM_REG = UDC_EP_DIR;
1603                         udc->ep0_pending = 0;
1604                         break;
1605                 case USB_REQ_GET_STATUS:
1606                         /* return interface status.  if we were pedantic,
1607                          * we'd detect non-existent interfaces, and stall.
1608                          */
1609                         if (u.r.bRequestType
1610                                         != (USB_DIR_IN|USB_RECIP_INTERFACE))
1611                                 goto delegate;
1612                         /* return two zero bytes */
1613                         UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1614                         UDC_DATA_REG = 0;
1615                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1616                         UDC_EP_NUM_REG = UDC_EP_DIR;
1617                         status = 0;
1618                         VDBG("GET_STATUS, interface %d\n", u.r.wIndex);
1619                         /* next, status stage */
1620                         break;
1621                 default:
1622 delegate:
1623                         /* activate the ep0out fifo right away */
1624                         if (!udc->ep0_in && u.r.wLength) {
1625                                 UDC_EP_NUM_REG = 0;
1626                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1627                         }
1628
1629                         /* gadget drivers see class/vendor specific requests,
1630                          * {SET,GET}_{INTERFACE,DESCRIPTOR,CONFIGURATION},
1631                          * and more
1632                          */
1633                         VDBG("SETUP %02x.%02x v%04x i%04x l%04x\n",
1634                                 u.r.bRequestType, u.r.bRequest,
1635                                 u.r.wValue, u.r.wIndex, u.r.wLength);
1636
1637                         /* The gadget driver may return an error here,
1638                          * causing an immediate protocol stall.
1639                          *
1640                          * Else it must issue a response, either queueing a
1641                          * response buffer for the DATA stage, or halting ep0
1642                          * (causing a protocol stall, not a real halt).  A
1643                          * zero length buffer means no DATA stage.
1644                          *
1645                          * It's fine to issue that response after the setup()
1646                          * call returns, and this IRQ was handled.
1647                          */
1648                         udc->ep0_setup = 1;
1649                         spin_unlock(&udc->lock);
1650                         status = udc->driver->setup (&udc->gadget, &u.r);
1651                         spin_lock(&udc->lock);
1652                         udc->ep0_setup = 0;
1653                 }
1654
1655                 if (status < 0) {
1656 do_stall:
1657                         VDBG("req %02x.%02x protocol STALL; stat %d\n",
1658                                         u.r.bRequestType, u.r.bRequest, status);
1659                         if (udc->ep0_set_config) {
1660                                 if (udc->ep0_reset_config)
1661                                         WARN("error resetting config?\n");
1662                                 else
1663                                         UDC_SYSCON2_REG = UDC_CLR_CFG;
1664                         }
1665                         UDC_SYSCON2_REG = UDC_STALL_CMD;
1666                         udc->ep0_pending = 0;
1667                 }
1668         }
1669 }
1670
1671 /*-------------------------------------------------------------------------*/
1672
1673 #define OTG_FLAGS (UDC_B_HNP_ENABLE|UDC_A_HNP_SUPPORT|UDC_A_ALT_HNP_SUPPORT)
1674
1675 static void devstate_irq(struct omap_udc *udc, u16 irq_src)
1676 {
1677         u16     devstat, change;
1678
1679         devstat = UDC_DEVSTAT_REG;
1680         change = devstat ^ udc->devstat;
1681         udc->devstat = devstat;
1682
1683         if (change & (UDC_USB_RESET|UDC_ATT)) {
1684                 udc_quiesce(udc);
1685
1686                 if (change & UDC_ATT) {
1687                         /* driver for any external transceiver will
1688                          * have called omap_vbus_session() already
1689                          */
1690                         if (devstat & UDC_ATT) {
1691                                 udc->gadget.speed = USB_SPEED_FULL;
1692                                 VDBG("connect\n");
1693                                 if (!udc->transceiver)
1694                                         pullup_enable(udc);
1695                                 // if (driver->connect) call it
1696                         } else if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1697                                 udc->gadget.speed = USB_SPEED_UNKNOWN;
1698                                 if (!udc->transceiver)
1699                                         pullup_disable(udc);
1700                                 DBG("disconnect, gadget %s\n",
1701                                         udc->driver->driver.name);
1702                                 if (udc->driver->disconnect) {
1703                                         spin_unlock(&udc->lock);
1704                                         udc->driver->disconnect(&udc->gadget);
1705                                         spin_lock(&udc->lock);
1706                                 }
1707                         }
1708                         change &= ~UDC_ATT;
1709                 }
1710
1711                 if (change & UDC_USB_RESET) {
1712                         if (devstat & UDC_USB_RESET) {
1713                                 VDBG("RESET=1\n");
1714                         } else {
1715                                 udc->gadget.speed = USB_SPEED_FULL;
1716                                 INFO("USB reset done, gadget %s\n",
1717                                         udc->driver->driver.name);
1718                                 /* ep0 traffic is legal from now on */
1719                                 UDC_IRQ_EN_REG = UDC_DS_CHG_IE | UDC_EP0_IE;
1720                         }
1721                         change &= ~UDC_USB_RESET;
1722                 }
1723         }
1724         if (change & UDC_SUS) {
1725                 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1726                         // FIXME tell isp1301 to suspend/resume (?)
1727                         if (devstat & UDC_SUS) {
1728                                 VDBG("suspend\n");
1729                                 update_otg(udc);
1730                                 /* HNP could be under way already */
1731                                 if (udc->gadget.speed == USB_SPEED_FULL
1732                                                 && udc->driver->suspend) {
1733                                         spin_unlock(&udc->lock);
1734                                         udc->driver->suspend(&udc->gadget);
1735                                         spin_lock(&udc->lock);
1736                                 }
1737                         } else {
1738                                 VDBG("resume\n");
1739                                 if (udc->gadget.speed == USB_SPEED_FULL
1740                                                 && udc->driver->resume) {
1741                                         spin_unlock(&udc->lock);
1742                                         udc->driver->resume(&udc->gadget);
1743                                         spin_lock(&udc->lock);
1744                                 }
1745                         }
1746                 }
1747                 change &= ~UDC_SUS;
1748         }
1749         if (!cpu_is_omap15xx() && (change & OTG_FLAGS)) {
1750                 update_otg(udc);
1751                 change &= ~OTG_FLAGS;
1752         }
1753
1754         change &= ~(UDC_CFG|UDC_DEF|UDC_ADD);
1755         if (change)
1756                 VDBG("devstat %03x, ignore change %03x\n",
1757                         devstat,  change);
1758
1759         UDC_IRQ_SRC_REG = UDC_DS_CHG;
1760 }
1761
1762 static irqreturn_t
1763 omap_udc_irq(int irq, void *_udc, struct pt_regs *r)
1764 {
1765         struct omap_udc *udc = _udc;
1766         u16             irq_src;
1767         irqreturn_t     status = IRQ_NONE;
1768         unsigned long   flags;
1769
1770         spin_lock_irqsave(&udc->lock, flags);
1771         irq_src = UDC_IRQ_SRC_REG;
1772
1773         /* Device state change (usb ch9 stuff) */
1774         if (irq_src & UDC_DS_CHG) {
1775                 devstate_irq(_udc, irq_src);
1776                 status = IRQ_HANDLED;
1777                 irq_src &= ~UDC_DS_CHG;
1778         }
1779
1780         /* EP0 control transfers */
1781         if (irq_src & (UDC_EP0_RX|UDC_SETUP|UDC_EP0_TX)) {
1782                 ep0_irq(_udc, irq_src);
1783                 status = IRQ_HANDLED;
1784                 irq_src &= ~(UDC_EP0_RX|UDC_SETUP|UDC_EP0_TX);
1785         }
1786
1787         /* DMA transfer completion */
1788         if (use_dma && (irq_src & (UDC_TXN_DONE|UDC_RXN_CNT|UDC_RXN_EOT))) {
1789                 dma_irq(_udc, irq_src);
1790                 status = IRQ_HANDLED;
1791                 irq_src &= ~(UDC_TXN_DONE|UDC_RXN_CNT|UDC_RXN_EOT);
1792         }
1793
1794         irq_src &= ~(UDC_SOF|UDC_EPN_TX|UDC_EPN_RX);
1795         if (irq_src)
1796                 DBG("udc_irq, unhandled %03x\n", irq_src);
1797         spin_unlock_irqrestore(&udc->lock, flags);
1798
1799         return status;
1800 }
1801
1802 /* workaround for seemingly-lost IRQs for RX ACKs... */
1803 #define PIO_OUT_TIMEOUT (jiffies + HZ/3)
1804 #define HALF_FULL(f)    (!((f)&(UDC_NON_ISO_FIFO_FULL|UDC_NON_ISO_FIFO_EMPTY)))
1805
1806 static void pio_out_timer(unsigned long _ep)
1807 {
1808         struct omap_ep  *ep = (void *) _ep;
1809         unsigned long   flags;
1810         u16             stat_flg;
1811
1812         spin_lock_irqsave(&ep->udc->lock, flags);
1813         if (!list_empty(&ep->queue) && ep->ackwait) {
1814                 use_ep(ep, 0);
1815                 stat_flg = UDC_STAT_FLG_REG;
1816
1817                 if ((stat_flg & UDC_ACK) && (!(stat_flg & UDC_FIFO_EN)
1818                                 || (ep->double_buf && HALF_FULL(stat_flg)))) {
1819                         struct omap_req *req;
1820
1821                         VDBG("%s: lose, %04x\n", ep->ep.name, stat_flg);
1822                         req = container_of(ep->queue.next,
1823                                         struct omap_req, queue);
1824                         UDC_EP_NUM_REG = ep->bEndpointAddress | UDC_EP_SEL;
1825                         (void) read_fifo(ep, req);
1826                         UDC_EP_NUM_REG = ep->bEndpointAddress;
1827                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1828                         ep->ackwait = 1 + ep->double_buf;
1829                 }
1830         }
1831         mod_timer(&ep->timer, PIO_OUT_TIMEOUT);
1832         spin_unlock_irqrestore(&ep->udc->lock, flags);
1833 }
1834
1835 static irqreturn_t
1836 omap_udc_pio_irq(int irq, void *_dev, struct pt_regs *r)
1837 {
1838         u16             epn_stat, irq_src;
1839         irqreturn_t     status = IRQ_NONE;
1840         struct omap_ep  *ep;
1841         int             epnum;
1842         struct omap_udc *udc = _dev;
1843         struct omap_req *req;
1844         unsigned long   flags;
1845
1846         spin_lock_irqsave(&udc->lock, flags);
1847         epn_stat = UDC_EPN_STAT_REG;
1848         irq_src = UDC_IRQ_SRC_REG;
1849
1850         /* handle OUT first, to avoid some wasteful NAKs */
1851         if (irq_src & UDC_EPN_RX) {
1852                 epnum = (epn_stat >> 8) & 0x0f;
1853                 UDC_IRQ_SRC_REG = UDC_EPN_RX;
1854                 status = IRQ_HANDLED;
1855                 ep = &udc->ep[epnum];
1856                 ep->irqs++;
1857
1858                 UDC_EP_NUM_REG = epnum | UDC_EP_SEL;
1859                 ep->fnf = 0;
1860                 if ((UDC_STAT_FLG_REG & UDC_ACK)) {
1861                         ep->ackwait--;
1862                         if (!list_empty(&ep->queue)) {
1863                                 int stat;
1864                                 req = container_of(ep->queue.next,
1865                                                 struct omap_req, queue);
1866                                 stat = read_fifo(ep, req);
1867                                 if (!ep->double_buf)
1868                                         ep->fnf = 1;
1869                         }
1870                 }
1871                 /* min 6 clock delay before clearing EP_SEL ... */
1872                 epn_stat = UDC_EPN_STAT_REG;
1873                 epn_stat = UDC_EPN_STAT_REG;
1874                 UDC_EP_NUM_REG = epnum;
1875
1876                 /* enabling fifo _after_ clearing ACK, contrary to docs,
1877                  * reduces lossage; timer still needed though (sigh).
1878                  */
1879                 if (ep->fnf) {
1880                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1881                         ep->ackwait = 1 + ep->double_buf;
1882                 }
1883                 mod_timer(&ep->timer, PIO_OUT_TIMEOUT);
1884         }
1885
1886         /* then IN transfers */
1887         else if (irq_src & UDC_EPN_TX) {
1888                 epnum = epn_stat & 0x0f;
1889                 UDC_IRQ_SRC_REG = UDC_EPN_TX;
1890                 status = IRQ_HANDLED;
1891                 ep = &udc->ep[16 + epnum];
1892                 ep->irqs++;
1893
1894                 UDC_EP_NUM_REG = epnum | UDC_EP_DIR | UDC_EP_SEL;
1895                 if ((UDC_STAT_FLG_REG & UDC_ACK)) {
1896                         ep->ackwait = 0;
1897                         if (!list_empty(&ep->queue)) {
1898                                 req = container_of(ep->queue.next,
1899                                                 struct omap_req, queue);
1900                                 (void) write_fifo(ep, req);
1901                         }
1902                 }
1903                 /* min 6 clock delay before clearing EP_SEL ... */
1904                 epn_stat = UDC_EPN_STAT_REG;
1905                 epn_stat = UDC_EPN_STAT_REG;
1906                 UDC_EP_NUM_REG = epnum | UDC_EP_DIR;
1907                 /* then 6 clocks before it'd tx */
1908         }
1909
1910         spin_unlock_irqrestore(&udc->lock, flags);
1911         return status;
1912 }
1913
1914 #ifdef  USE_ISO
1915 static irqreturn_t
1916 omap_udc_iso_irq(int irq, void *_dev, struct pt_regs *r)
1917 {
1918         struct omap_udc *udc = _dev;
1919         struct omap_ep  *ep;
1920         int             pending = 0;
1921         unsigned long   flags;
1922
1923         spin_lock_irqsave(&udc->lock, flags);
1924
1925         /* handle all non-DMA ISO transfers */
1926         list_for_each_entry (ep, &udc->iso, iso) {
1927                 u16             stat;
1928                 struct omap_req *req;
1929
1930                 if (ep->has_dma || list_empty(&ep->queue))
1931                         continue;
1932                 req = list_entry(ep->queue.next, struct omap_req, queue);
1933
1934                 use_ep(ep, UDC_EP_SEL);
1935                 stat = UDC_STAT_FLG_REG;
1936
1937                 /* NOTE: like the other controller drivers, this isn't
1938                  * currently reporting lost or damaged frames.
1939                  */
1940                 if (ep->bEndpointAddress & USB_DIR_IN) {
1941                         if (stat & UDC_MISS_IN)
1942                                 /* done(ep, req, -EPROTO) */;
1943                         else
1944                                 write_fifo(ep, req);
1945                 } else {
1946                         int     status = 0;
1947
1948                         if (stat & UDC_NO_RXPACKET)
1949                                 status = -EREMOTEIO;
1950                         else if (stat & UDC_ISO_ERR)
1951                                 status = -EILSEQ;
1952                         else if (stat & UDC_DATA_FLUSH)
1953                                 status = -ENOSR;
1954
1955                         if (status)
1956                                 /* done(ep, req, status) */;
1957                         else
1958                                 read_fifo(ep, req);
1959                 }
1960                 deselect_ep();
1961                 /* 6 wait states before next EP */
1962
1963                 ep->irqs++;
1964                 if (!list_empty(&ep->queue))
1965                         pending = 1;
1966         }
1967         if (!pending)
1968                 UDC_IRQ_EN_REG &= ~UDC_SOF_IE;
1969         UDC_IRQ_SRC_REG = UDC_SOF;
1970
1971         spin_unlock_irqrestore(&udc->lock, flags);
1972         return IRQ_HANDLED;
1973 }
1974 #endif
1975
1976 /*-------------------------------------------------------------------------*/
1977
1978 static struct omap_udc *udc;
1979
1980 int usb_gadget_register_driver (struct usb_gadget_driver *driver)
1981 {
1982         int             status = -ENODEV;
1983         struct omap_ep  *ep;
1984         unsigned long   flags;
1985
1986         /* basic sanity tests */
1987         if (!udc)
1988                 return -ENODEV;
1989         if (!driver
1990                         // FIXME if otg, check:  driver->is_otg
1991                         || driver->speed < USB_SPEED_FULL
1992                         || !driver->bind
1993                         || !driver->unbind
1994                         || !driver->setup)
1995                 return -EINVAL;
1996
1997         spin_lock_irqsave(&udc->lock, flags);
1998         if (udc->driver) {
1999                 spin_unlock_irqrestore(&udc->lock, flags);
2000                 return -EBUSY;
2001         }
2002
2003         /* reset state */
2004         list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
2005                 ep->irqs = 0;
2006                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
2007                         continue;
2008                 use_ep(ep, 0);
2009                 UDC_CTRL_REG = UDC_SET_HALT;
2010         }
2011         udc->ep0_pending = 0;
2012         udc->ep[0].irqs = 0;
2013         udc->softconnect = 1;
2014
2015         /* hook up the driver */
2016         driver->driver.bus = 0;
2017         udc->driver = driver;
2018         udc->gadget.dev.driver = &driver->driver;
2019         spin_unlock_irqrestore(&udc->lock, flags);
2020
2021         status = driver->bind (&udc->gadget);
2022         if (status) {
2023                 DBG("bind to %s --> %d\n", driver->driver.name, status);
2024                 udc->gadget.dev.driver = 0;
2025                 udc->driver = 0;
2026                 goto done;
2027         }
2028         DBG("bound to driver %s\n", driver->driver.name);
2029
2030         UDC_IRQ_SRC_REG = UDC_IRQ_SRC_MASK;
2031
2032         /* connect to bus through transceiver */
2033         if (udc->transceiver) {
2034                 status = otg_set_peripheral(udc->transceiver, &udc->gadget);
2035                 if (status < 0) {
2036                         ERR("can't bind to transceiver\n");
2037                         driver->unbind (&udc->gadget);
2038                         udc->gadget.dev.driver = 0;
2039                         udc->driver = 0;
2040                         goto done;
2041                 }
2042         } else {
2043                 if (can_pullup(udc))
2044                         pullup_enable (udc);
2045                 else
2046                         pullup_disable (udc);
2047         }
2048
2049         /* boards that don't have VBUS sensing can't autogate 48MHz;
2050          * can't enter deep sleep while a gadget driver is active.
2051          */
2052         if (machine_is_omap_innovator() || machine_is_omap_osk())
2053                 omap_vbus_session(&udc->gadget, 1);
2054
2055 done:
2056         return status;
2057 }
2058 EXPORT_SYMBOL(usb_gadget_register_driver);
2059
2060 int usb_gadget_unregister_driver (struct usb_gadget_driver *driver)
2061 {
2062         unsigned long   flags;
2063         int             status = -ENODEV;
2064
2065         if (!udc)
2066                 return -ENODEV;
2067         if (!driver || driver != udc->driver)
2068                 return -EINVAL;
2069
2070         if (machine_is_omap_innovator() || machine_is_omap_osk())
2071                 omap_vbus_session(&udc->gadget, 0);
2072
2073         if (udc->transceiver)
2074                 (void) otg_set_peripheral(udc->transceiver, 0);
2075         else
2076                 pullup_disable(udc);
2077
2078         spin_lock_irqsave(&udc->lock, flags);
2079         udc_quiesce(udc);
2080         spin_unlock_irqrestore(&udc->lock, flags);
2081
2082         driver->unbind(&udc->gadget);
2083         udc->gadget.dev.driver = 0;
2084         udc->driver = 0;
2085
2086
2087         DBG("unregistered driver '%s'\n", driver->driver.name);
2088         return status;
2089 }
2090 EXPORT_SYMBOL(usb_gadget_unregister_driver);
2091
2092
2093 /*-------------------------------------------------------------------------*/
2094
2095 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
2096
2097 #include <linux/seq_file.h>
2098
2099 static const char proc_filename[] = "driver/udc";
2100
2101 #define FOURBITS "%s%s%s%s"
2102 #define EIGHTBITS FOURBITS FOURBITS
2103
2104 static void proc_ep_show(struct seq_file *s, struct omap_ep *ep)
2105 {
2106         u16             stat_flg;
2107         struct omap_req *req;
2108         char            buf[20];
2109
2110         use_ep(ep, 0);
2111
2112         if (use_dma && ep->has_dma)
2113                 snprintf(buf, sizeof buf, "(%cxdma%d lch%d) ",
2114                         (ep->bEndpointAddress & USB_DIR_IN) ? 't' : 'r',
2115                         ep->dma_channel - 1, ep->lch);
2116         else
2117                 buf[0] = 0;
2118
2119         stat_flg = UDC_STAT_FLG_REG;
2120         seq_printf(s,
2121                 "\n%s %s%s%sirqs %ld stat %04x " EIGHTBITS FOURBITS "%s\n",
2122                 ep->name, buf,
2123                 ep->double_buf ? "dbuf " : "",
2124                 ({char *s; switch(ep->ackwait){
2125                 case 0: s = ""; break;
2126                 case 1: s = "(ackw) "; break;
2127                 case 2: s = "(ackw2) "; break;
2128                 default: s = "(?) "; break;
2129                 } s;}),
2130                 ep->irqs, stat_flg,
2131                 (stat_flg & UDC_NO_RXPACKET) ? "no_rxpacket " : "",
2132                 (stat_flg & UDC_MISS_IN) ? "miss_in " : "",
2133                 (stat_flg & UDC_DATA_FLUSH) ? "data_flush " : "",
2134                 (stat_flg & UDC_ISO_ERR) ? "iso_err " : "",
2135                 (stat_flg & UDC_ISO_FIFO_EMPTY) ? "iso_fifo_empty " : "",
2136                 (stat_flg & UDC_ISO_FIFO_FULL) ? "iso_fifo_full " : "",
2137                 (stat_flg & UDC_EP_HALTED) ? "HALT " : "",
2138                 (stat_flg & UDC_STALL) ? "STALL " : "",
2139                 (stat_flg & UDC_NAK) ? "NAK " : "",
2140                 (stat_flg & UDC_ACK) ? "ACK " : "",
2141                 (stat_flg & UDC_FIFO_EN) ? "fifo_en " : "",
2142                 (stat_flg & UDC_NON_ISO_FIFO_EMPTY) ? "fifo_empty " : "",
2143                 (stat_flg & UDC_NON_ISO_FIFO_FULL) ? "fifo_full " : "");
2144
2145         if (list_empty (&ep->queue))
2146                 seq_printf(s, "\t(queue empty)\n");
2147         else
2148                 list_for_each_entry (req, &ep->queue, queue) {
2149                         unsigned        length = req->req.actual;
2150
2151                         if (use_dma && buf[0]) {
2152                                 length += ((ep->bEndpointAddress & USB_DIR_IN)
2153                                                 ? dma_src_len : dma_dest_len)
2154                                         (ep, req->req.dma + length);
2155                                 buf[0] = 0;
2156                         }
2157                         seq_printf(s, "\treq %p len %d/%d buf %p\n",
2158                                         &req->req, length,
2159                                         req->req.length, req->req.buf);
2160                 }
2161 }
2162
2163 static char *trx_mode(unsigned m, int enabled)
2164 {
2165         switch (m) {
2166         case 0:         return enabled ? "*6wire" : "unused";
2167         case 1:         return "4wire";
2168         case 2:         return "3wire";
2169         case 3:         return "6wire";
2170         default:        return "unknown";
2171         }
2172 }
2173
2174 static int proc_otg_show(struct seq_file *s)
2175 {
2176         u32             tmp;
2177         u32             trans;
2178
2179         tmp = OTG_REV_REG;
2180         trans = USB_TRANSCEIVER_CTRL_REG;
2181         seq_printf(s, "OTG rev %d.%d, transceiver_ctrl %03x\n",
2182                 tmp >> 4, tmp & 0xf, trans);
2183         tmp = OTG_SYSCON_1_REG;
2184         seq_printf(s, "otg_syscon1 %08x usb2 %s, usb1 %s, usb0 %s,"
2185                         FOURBITS "\n", tmp,
2186                 trx_mode(USB2_TRX_MODE(tmp), trans & CONF_USB2_UNI_R),
2187                 trx_mode(USB1_TRX_MODE(tmp), trans & CONF_USB1_UNI_R),
2188                 (USB0_TRX_MODE(tmp) == 0)
2189                         ? "internal"
2190                         : trx_mode(USB0_TRX_MODE(tmp), 1),
2191                 (tmp & OTG_IDLE_EN) ? " !otg" : "",
2192                 (tmp & HST_IDLE_EN) ? " !host" : "",
2193                 (tmp & DEV_IDLE_EN) ? " !dev" : "",
2194                 (tmp & OTG_RESET_DONE) ? " reset_done" : " reset_active");
2195         tmp = OTG_SYSCON_2_REG;
2196         seq_printf(s, "otg_syscon2 %08x%s" EIGHTBITS
2197                         " b_ase_brst=%d hmc=%d\n", tmp,
2198                 (tmp & OTG_EN) ? " otg_en" : "",
2199                 (tmp & USBX_SYNCHRO) ? " synchro" : "",
2200                 // much more SRP stuff
2201                 (tmp & SRP_DATA) ? " srp_data" : "",
2202                 (tmp & SRP_VBUS) ? " srp_vbus" : "",
2203                 (tmp & OTG_PADEN) ? " otg_paden" : "",
2204                 (tmp & HMC_PADEN) ? " hmc_paden" : "",
2205                 (tmp & UHOST_EN) ? " uhost_en" : "",
2206                 (tmp & HMC_TLLSPEED) ? " tllspeed" : "",
2207                 (tmp & HMC_TLLATTACH) ? " tllattach" : "",
2208                 B_ASE_BRST(tmp),
2209                 OTG_HMC(tmp));
2210         tmp = OTG_CTRL_REG;
2211         seq_printf(s, "otg_ctrl    %06x" EIGHTBITS EIGHTBITS "%s\n", tmp,
2212                 (tmp & OTG_ASESSVLD) ? " asess" : "",
2213                 (tmp & OTG_BSESSEND) ? " bsess_end" : "",
2214                 (tmp & OTG_BSESSVLD) ? " bsess" : "",
2215                 (tmp & OTG_VBUSVLD) ? " vbus" : "",
2216                 (tmp & OTG_ID) ? " id" : "",
2217                 (tmp & OTG_DRIVER_SEL) ? " DEVICE" : " HOST",
2218                 (tmp & OTG_A_SETB_HNPEN) ? " a_setb_hnpen" : "",
2219                 (tmp & OTG_A_BUSREQ) ? " a_bus" : "",
2220                 (tmp & OTG_B_HNPEN) ? " b_hnpen" : "",
2221                 (tmp & OTG_B_BUSREQ) ? " b_bus" : "",
2222                 (tmp & OTG_BUSDROP) ? " busdrop" : "",
2223                 (tmp & OTG_PULLDOWN) ? " down" : "",
2224                 (tmp & OTG_PULLUP) ? " up" : "",
2225                 (tmp & OTG_DRV_VBUS) ? " drv" : "",
2226                 (tmp & OTG_PD_VBUS) ? " pd_vb" : "",
2227                 (tmp & OTG_PU_VBUS) ? " pu_vb" : "",
2228                 (tmp & OTG_PU_ID) ? " pu_id" : ""
2229                 );
2230         tmp = OTG_IRQ_EN_REG;
2231         seq_printf(s, "otg_irq_en  %04x" "\n", tmp);
2232         tmp = OTG_IRQ_SRC_REG;
2233         seq_printf(s, "otg_irq_src %04x" "\n", tmp);
2234         tmp = OTG_OUTCTRL_REG;
2235         seq_printf(s, "otg_outctrl %04x" "\n", tmp);
2236         tmp = OTG_TEST_REG;
2237         seq_printf(s, "otg_test    %04x" "\n", tmp);
2238 }
2239
2240 static int proc_udc_show(struct seq_file *s, void *_)
2241 {
2242         u32             tmp;
2243         struct omap_ep  *ep;
2244         unsigned long   flags;
2245
2246         spin_lock_irqsave(&udc->lock, flags);
2247
2248         seq_printf(s, "%s, version: " DRIVER_VERSION
2249 #ifdef  USE_ISO
2250                 " (iso)"
2251 #endif
2252                 "%s\n",
2253                 driver_desc,
2254                 use_dma ?  " (dma)" : "");
2255
2256         tmp = UDC_REV_REG & 0xff; 
2257         seq_printf(s,
2258                 "UDC rev %d.%d, fifo mode %d, gadget %s\n"
2259                 "hmc %d, transceiver %s\n",
2260                 tmp >> 4, tmp & 0xf,
2261                 fifo_mode,
2262                 udc->driver ? udc->driver->driver.name : "(none)",
2263                 HMC,
2264                 udc->transceiver ? udc->transceiver->label : "(none)");
2265         seq_printf(s, "ULPD control %04x req %04x status %04x\n",
2266                 __REG16(ULPD_CLOCK_CTRL),
2267                 __REG16(ULPD_SOFT_REQ),
2268                 __REG16(ULPD_STATUS_REQ));
2269
2270         /* OTG controller registers */
2271         if (!cpu_is_omap15xx())
2272                 proc_otg_show(s);
2273
2274         tmp = UDC_SYSCON1_REG;
2275         seq_printf(s, "\nsyscon1     %04x" EIGHTBITS "\n", tmp,
2276                 (tmp & UDC_CFG_LOCK) ? " cfg_lock" : "",
2277                 (tmp & UDC_DATA_ENDIAN) ? " data_endian" : "",
2278                 (tmp & UDC_DMA_ENDIAN) ? " dma_endian" : "",
2279                 (tmp & UDC_NAK_EN) ? " nak" : "",
2280                 (tmp & UDC_AUTODECODE_DIS) ? " autodecode_dis" : "",
2281                 (tmp & UDC_SELF_PWR) ? " self_pwr" : "",
2282                 (tmp & UDC_SOFF_DIS) ? " soff_dis" : "",
2283                 (tmp & UDC_PULLUP_EN) ? " PULLUP" : "");
2284         // syscon2 is write-only
2285
2286         /* UDC controller registers */
2287         if (!(tmp & UDC_PULLUP_EN)) {
2288                 seq_printf(s, "(suspended)\n");
2289                 spin_unlock_irqrestore(&udc->lock, flags);
2290                 return 0;
2291         }
2292
2293         tmp = UDC_DEVSTAT_REG;
2294         seq_printf(s, "devstat     %04x" EIGHTBITS "%s%s\n", tmp,
2295                 (tmp & UDC_B_HNP_ENABLE) ? " b_hnp" : "",
2296                 (tmp & UDC_A_HNP_SUPPORT) ? " a_hnp" : "",
2297                 (tmp & UDC_A_ALT_HNP_SUPPORT) ? " a_alt_hnp" : "",
2298                 (tmp & UDC_R_WK_OK) ? " r_wk_ok" : "",
2299                 (tmp & UDC_USB_RESET) ? " usb_reset" : "",
2300                 (tmp & UDC_SUS) ? " SUS" : "",
2301                 (tmp & UDC_CFG) ? " CFG" : "",
2302                 (tmp & UDC_ADD) ? " ADD" : "",
2303                 (tmp & UDC_DEF) ? " DEF" : "",
2304                 (tmp & UDC_ATT) ? " ATT" : "");
2305         seq_printf(s, "sof         %04x\n", UDC_SOF_REG);
2306         tmp = UDC_IRQ_EN_REG;
2307         seq_printf(s, "irq_en      %04x" FOURBITS "%s\n", tmp,
2308                 (tmp & UDC_SOF_IE) ? " sof" : "",
2309                 (tmp & UDC_EPN_RX_IE) ? " epn_rx" : "",
2310                 (tmp & UDC_EPN_TX_IE) ? " epn_tx" : "",
2311                 (tmp & UDC_DS_CHG_IE) ? " ds_chg" : "",
2312                 (tmp & UDC_EP0_IE) ? " ep0" : "");
2313         tmp = UDC_IRQ_SRC_REG;
2314         seq_printf(s, "irq_src     %04x" EIGHTBITS "%s%s\n", tmp,
2315                 (tmp & UDC_TXN_DONE) ? " txn_done" : "",
2316                 (tmp & UDC_RXN_CNT) ? " rxn_cnt" : "",
2317                 (tmp & UDC_RXN_EOT) ? " rxn_eot" : "",
2318                 (tmp & UDC_SOF) ? " sof" : "",
2319                 (tmp & UDC_EPN_RX) ? " epn_rx" : "",
2320                 (tmp & UDC_EPN_TX) ? " epn_tx" : "",
2321                 (tmp & UDC_DS_CHG) ? " ds_chg" : "",
2322                 (tmp & UDC_SETUP) ? " setup" : "",
2323                 (tmp & UDC_EP0_RX) ? " ep0out" : "",
2324                 (tmp & UDC_EP0_TX) ? " ep0in" : "");
2325         if (use_dma) {
2326                 unsigned i;
2327
2328                 tmp = UDC_DMA_IRQ_EN_REG;
2329                 seq_printf(s, "dma_irq_en  %04x%s" EIGHTBITS "\n", tmp,
2330                         (tmp & UDC_TX_DONE_IE(3)) ? " tx2_done" : "",
2331                         (tmp & UDC_RX_CNT_IE(3)) ? " rx2_cnt" : "",
2332                         (tmp & UDC_RX_EOT_IE(3)) ? " rx2_eot" : "",
2333
2334                         (tmp & UDC_TX_DONE_IE(2)) ? " tx1_done" : "",
2335                         (tmp & UDC_RX_CNT_IE(2)) ? " rx1_cnt" : "",
2336                         (tmp & UDC_RX_EOT_IE(2)) ? " rx1_eot" : "",
2337
2338                         (tmp & UDC_TX_DONE_IE(1)) ? " tx0_done" : "",
2339                         (tmp & UDC_RX_CNT_IE(1)) ? " rx0_cnt" : "",
2340                         (tmp & UDC_RX_EOT_IE(1)) ? " rx0_eot" : "");
2341
2342                 tmp = UDC_RXDMA_CFG_REG;
2343                 seq_printf(s, "rxdma_cfg   %04x\n", tmp);
2344                 if (tmp) {
2345                         for (i = 0; i < 3; i++) {
2346                                 if ((tmp & (0x0f << (i * 4))) == 0)
2347                                         continue;
2348                                 seq_printf(s, "rxdma[%d]    %04x\n", i,
2349                                                 UDC_RXDMA_REG(i + 1));
2350                         }
2351                 }
2352                 tmp = UDC_TXDMA_CFG_REG;
2353                 seq_printf(s, "txdma_cfg   %04x\n", tmp);
2354                 if (tmp) {
2355                         for (i = 0; i < 3; i++) {
2356                                 if (!(tmp & (0x0f << (i * 4))))
2357                                         continue;
2358                                 seq_printf(s, "txdma[%d]    %04x\n", i,
2359                                                 UDC_TXDMA_REG(i + 1));
2360                         }
2361                 }
2362         }
2363
2364         tmp = UDC_DEVSTAT_REG;
2365         if (tmp & UDC_ATT) {
2366                 proc_ep_show(s, &udc->ep[0]);
2367                 if (tmp & UDC_ADD) {
2368                         list_for_each_entry (ep, &udc->gadget.ep_list,
2369                                         ep.ep_list) {
2370                                 if (ep->desc)
2371                                         proc_ep_show(s, ep);
2372                         }
2373                 }
2374         }
2375         spin_unlock_irqrestore(&udc->lock, flags);
2376         return 0;
2377 }
2378
2379 static int proc_udc_open(struct inode *inode, struct file *file)
2380 {
2381         return single_open(file, proc_udc_show, 0);
2382 }
2383
2384 static struct file_operations proc_ops = {
2385         .open           = proc_udc_open,
2386         .read           = seq_read,
2387         .llseek         = seq_lseek,
2388         .release        = single_release,
2389 };
2390
2391 static void create_proc_file(void)
2392 {
2393         struct proc_dir_entry *pde;
2394
2395         pde = create_proc_entry (proc_filename, 0, NULL);
2396         if (pde)
2397                 pde->proc_fops = &proc_ops;
2398 }
2399
2400 static void remove_proc_file(void)
2401 {
2402         remove_proc_entry(proc_filename, 0);
2403 }
2404
2405 #else
2406
2407 static inline void create_proc_file(void) {}
2408 static inline void remove_proc_file(void) {}
2409
2410 #endif
2411
2412 /*-------------------------------------------------------------------------*/
2413
2414 /* Before this controller can enumerate, we need to pick an endpoint
2415  * configuration, or "fifo_mode"  That involves allocating 2KB of packet
2416  * buffer space among the endpoints we'll be operating.
2417  */
2418 static unsigned __init
2419 omap_ep_setup(char *name, u8 addr, u8 type,
2420                 unsigned buf, unsigned maxp, int dbuf)
2421 {
2422         struct omap_ep  *ep;
2423         u16             epn_rxtx = 0;
2424
2425         /* OUT endpoints first, then IN */
2426         ep = &udc->ep[addr & 0xf];
2427         if (addr & USB_DIR_IN)
2428                 ep += 16;
2429
2430         /* in case of ep init table bugs */
2431         BUG_ON(ep->name[0]);
2432
2433         /* chip setup ... bit values are same for IN, OUT */
2434         if (type == USB_ENDPOINT_XFER_ISOC) {
2435                 switch (maxp) {
2436                 case 8:         epn_rxtx = 0 << 12; break;
2437                 case 16:        epn_rxtx = 1 << 12; break;
2438                 case 32:        epn_rxtx = 2 << 12; break;
2439                 case 64:        epn_rxtx = 3 << 12; break;
2440                 case 128:       epn_rxtx = 4 << 12; break;
2441                 case 256:       epn_rxtx = 5 << 12; break;
2442                 case 512:       epn_rxtx = 6 << 12; break;
2443                 default:        BUG();
2444                 }
2445                 epn_rxtx |= UDC_EPN_RX_ISO;
2446                 dbuf = 1;
2447         } else {
2448                 /* double-buffering "not supported" on 15xx,
2449                  * and ignored for PIO-IN on 16xx
2450                  */
2451                 if (!use_dma || cpu_is_omap15xx())
2452                         dbuf = 0;
2453
2454                 switch (maxp) {
2455                 case 8:         epn_rxtx = 0 << 12; break;
2456                 case 16:        epn_rxtx = 1 << 12; break;
2457                 case 32:        epn_rxtx = 2 << 12; break;
2458                 case 64:        epn_rxtx = 3 << 12; break;
2459                 default:        BUG();
2460                 }
2461                 if (dbuf && addr)
2462                         epn_rxtx |= UDC_EPN_RX_DB;
2463                 init_timer(&ep->timer);
2464                 ep->timer.function = pio_out_timer;
2465                 ep->timer.data = (unsigned long) ep;
2466         }
2467         if (addr)
2468                 epn_rxtx |= UDC_EPN_RX_VALID;
2469         BUG_ON(buf & 0x07);
2470         epn_rxtx |= buf >> 3;
2471
2472         DBG("%s addr %02x rxtx %04x maxp %d%s buf %d\n",
2473                 name, addr, epn_rxtx, maxp, dbuf ? "x2" : "", buf);
2474
2475         if (addr & USB_DIR_IN)
2476                 UDC_EP_TX_REG(addr & 0xf) = epn_rxtx;
2477         else
2478                 UDC_EP_RX_REG(addr) = epn_rxtx;
2479
2480         /* next endpoint's buffer starts after this one's */
2481         buf += maxp;
2482         if (dbuf)
2483                 buf += maxp;
2484         BUG_ON(buf > 2048);
2485
2486         /* set up driver data structures */
2487         BUG_ON(strlen(name) >= sizeof ep->name);
2488         strlcpy(ep->name, name, sizeof ep->name);
2489         INIT_LIST_HEAD(&ep->queue);
2490         INIT_LIST_HEAD(&ep->iso);
2491         ep->bEndpointAddress = addr;
2492         ep->bmAttributes = type;
2493         ep->double_buf = dbuf;
2494         ep->udc = udc; 
2495
2496         ep->ep.name = ep->name;
2497         ep->ep.ops = &omap_ep_ops;
2498         ep->ep.maxpacket = ep->maxpacket = maxp;
2499         list_add_tail (&ep->ep.ep_list, &udc->gadget.ep_list);
2500
2501         return buf;
2502 }
2503
2504 static void omap_udc_release(struct device *dev)
2505 {
2506         complete(udc->done);
2507         kfree (udc);
2508         udc = 0;
2509 }
2510
2511 static int __init
2512 omap_udc_setup(struct platform_device *odev, struct otg_transceiver *xceiv)
2513 {
2514         unsigned        tmp, buf;
2515
2516         /* abolish any previous hardware state */
2517         UDC_SYSCON1_REG = 0;
2518         UDC_IRQ_EN_REG = 0;
2519         UDC_IRQ_SRC_REG = UDC_IRQ_SRC_MASK;
2520         UDC_DMA_IRQ_EN_REG = 0;
2521         UDC_RXDMA_CFG_REG = 0;
2522         UDC_TXDMA_CFG_REG = 0;
2523
2524         /* UDC_PULLUP_EN gates the chip clock */
2525         // OTG_SYSCON_1_REG |= DEV_IDLE_EN;
2526
2527         udc = kmalloc (sizeof *udc, SLAB_KERNEL);
2528         if (!udc)
2529                 return -ENOMEM;
2530
2531         memset(udc, 0, sizeof *udc);
2532         spin_lock_init (&udc->lock);
2533
2534         udc->gadget.ops = &omap_gadget_ops;
2535         udc->gadget.ep0 = &udc->ep[0].ep;
2536         INIT_LIST_HEAD(&udc->gadget.ep_list);
2537         INIT_LIST_HEAD(&udc->iso);
2538         udc->gadget.speed = USB_SPEED_UNKNOWN;
2539         udc->gadget.name = driver_name;
2540
2541         device_initialize(&udc->gadget.dev);
2542         strcpy (udc->gadget.dev.bus_id, "gadget");
2543         udc->gadget.dev.release = omap_udc_release;
2544         udc->gadget.dev.parent = &odev->dev;
2545         if (use_dma)
2546                 udc->gadget.dev.dma_mask = odev->dev.dma_mask;
2547
2548         udc->transceiver = xceiv;
2549
2550         /* ep0 is special; put it right after the SETUP buffer */
2551         buf = omap_ep_setup("ep0", 0, USB_ENDPOINT_XFER_CONTROL,
2552                         8 /* after SETUP */, 64 /* maxpacket */, 0);
2553         list_del_init(&udc->ep[0].ep.ep_list);
2554
2555         /* initially disable all non-ep0 endpoints */
2556         for (tmp = 1; tmp < 15; tmp++) {
2557                 UDC_EP_RX_REG(tmp) = 0;
2558                 UDC_EP_TX_REG(tmp) = 0;
2559         }
2560
2561 #define OMAP_BULK_EP(name,addr) \
2562         buf = omap_ep_setup(name "-bulk", addr, \
2563                         USB_ENDPOINT_XFER_BULK, buf, 64, 1);
2564 #define OMAP_INT_EP(name,addr, maxp) \
2565         buf = omap_ep_setup(name "-int", addr, \
2566                         USB_ENDPOINT_XFER_INT, buf, maxp, 0);
2567 #define OMAP_ISO_EP(name,addr, maxp) \
2568         buf = omap_ep_setup(name "-iso", addr, \
2569                         USB_ENDPOINT_XFER_ISOC, buf, maxp, 1);
2570
2571         switch (fifo_mode) {
2572         case 0:
2573                 OMAP_BULK_EP("ep1in",  USB_DIR_IN  | 1);
2574                 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2575                 OMAP_INT_EP("ep3in",   USB_DIR_IN  | 3, 16);
2576                 break;
2577         case 1:
2578                 OMAP_BULK_EP("ep1in",  USB_DIR_IN  | 1);
2579                 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2580                 OMAP_BULK_EP("ep3in",  USB_DIR_IN  | 3);
2581                 OMAP_BULK_EP("ep4out", USB_DIR_OUT | 4);
2582
2583                 OMAP_BULK_EP("ep5in",  USB_DIR_IN  | 5);
2584                 OMAP_BULK_EP("ep5out", USB_DIR_OUT | 5);
2585                 OMAP_BULK_EP("ep6in",  USB_DIR_IN  | 6);
2586                 OMAP_BULK_EP("ep6out", USB_DIR_OUT | 6);
2587
2588                 OMAP_BULK_EP("ep7in",  USB_DIR_IN  | 7);
2589                 OMAP_BULK_EP("ep7out", USB_DIR_OUT | 7);
2590                 OMAP_BULK_EP("ep8in",  USB_DIR_IN  | 8);
2591                 OMAP_BULK_EP("ep8out", USB_DIR_OUT | 8);
2592
2593                 OMAP_INT_EP("ep9in",   USB_DIR_IN  | 9, 16);
2594                 OMAP_INT_EP("ep10out", USB_DIR_IN  | 10, 16);
2595                 OMAP_INT_EP("ep11in",  USB_DIR_IN  | 9, 16);
2596                 OMAP_INT_EP("ep12out", USB_DIR_IN  | 10, 16);
2597                 break;
2598
2599 #ifdef  USE_ISO
2600         case 2:                 /* mixed iso/bulk */
2601                 OMAP_ISO_EP("ep1in",   USB_DIR_IN  | 1, 256);
2602                 OMAP_ISO_EP("ep2out",  USB_DIR_OUT | 2, 256);
2603                 OMAP_ISO_EP("ep3in",   USB_DIR_IN  | 3, 128);
2604                 OMAP_ISO_EP("ep4out",  USB_DIR_OUT | 4, 128);
2605
2606                 OMAP_INT_EP("ep5in",   USB_DIR_IN  | 5, 16);
2607
2608                 OMAP_BULK_EP("ep6in",  USB_DIR_IN  | 6);
2609                 OMAP_BULK_EP("ep7out", USB_DIR_OUT | 7);
2610                 OMAP_INT_EP("ep8in",   USB_DIR_IN  | 8, 16);
2611                 break;
2612         case 3:                 /* mixed bulk/iso */
2613                 OMAP_BULK_EP("ep1in",  USB_DIR_IN  | 1);
2614                 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2615                 OMAP_INT_EP("ep3in",   USB_DIR_IN  | 3, 16);
2616
2617                 OMAP_BULK_EP("ep4in",  USB_DIR_IN  | 4);
2618                 OMAP_BULK_EP("ep5out", USB_DIR_OUT | 5);
2619                 OMAP_INT_EP("ep6in",   USB_DIR_IN  | 6, 16);
2620
2621                 OMAP_ISO_EP("ep7in",   USB_DIR_IN  | 7, 256);
2622                 OMAP_ISO_EP("ep8out",  USB_DIR_OUT | 8, 256);
2623                 OMAP_INT_EP("ep9in",   USB_DIR_IN  | 9, 16);
2624                 break;
2625 #endif
2626
2627         /* add more modes as needed */
2628
2629         default:
2630                 ERR("unsupported fifo_mode #%d\n", fifo_mode);
2631                 return -ENODEV;
2632         }
2633         UDC_SYSCON1_REG = UDC_CFG_LOCK|UDC_SELF_PWR;
2634         INFO("fifo mode %d, %d bytes not used\n", fifo_mode, 2048 - buf);
2635         return 0;
2636 }
2637
2638 static int __init omap_udc_probe(struct device *dev)
2639 {
2640         struct platform_device  *odev = to_platform_device(dev);
2641         int                     status = -ENODEV;
2642         int                     hmc;
2643         struct otg_transceiver  *xceiv = 0;
2644         const char              *type = 0;
2645         struct omap_usb_config  *config = dev->platform_data;
2646
2647         /* NOTE:  "knows" the order of the resources! */
2648         if (!request_mem_region(odev->resource[0].start, 
2649                         odev->resource[0].end - odev->resource[0].start + 1,
2650                         driver_name)) {
2651                 DBG("request_mem_region failed\n");
2652                 return -EBUSY;
2653         }
2654
2655         INFO("OMAP UDC rev %d.%d%s\n",
2656                 UDC_REV_REG >> 4, UDC_REV_REG & 0xf,
2657                 config->otg ? ", Mini-AB" : "");
2658
2659         /* use the mode given to us by board init code */
2660         if (cpu_is_omap15xx()) {
2661                 hmc = HMC_1510;
2662                 type = "(unknown)";
2663
2664                 if (machine_is_omap_innovator()) {
2665                         /* just set up software VBUS detect, and then
2666                          * later rig it so we always report VBUS.
2667                          * FIXME without really sensing VBUS, we can't
2668                          * know when to turn PULLUP_EN on/off; and that
2669                          * means we always "need" the 48MHz clock.
2670                          */
2671                         u32 tmp = FUNC_MUX_CTRL_0_REG;
2672
2673                         FUNC_MUX_CTRL_0_REG &= ~VBUS_CTRL_1510;
2674                         tmp |= VBUS_MODE_1510;
2675                         tmp &= ~VBUS_CTRL_1510;
2676                         FUNC_MUX_CTRL_0_REG = tmp;
2677                 }
2678         } else {
2679                 hmc = HMC_1610;
2680                 switch (hmc) {
2681                 case 3:
2682                 case 11:
2683                 case 16:
2684                 case 19:
2685                 case 25:
2686                         xceiv = otg_get_transceiver();
2687                         if (!xceiv) {
2688                                 DBG("external transceiver not registered!\n");
2689                                 if (config->otg)
2690                                         goto cleanup0;
2691                                 type = "(unknown external)";
2692                         } else
2693                                 type = xceiv->label;
2694                         break;
2695                 case 0:                 /* POWERUP DEFAULT == 0 */
2696                 case 4:
2697                 case 12:
2698                 case 20:
2699                         type = "INTEGRATED";
2700                         break;
2701                 case 21:                        /* internal loopback */
2702                         type = "(loopback)";
2703                         break;
2704                 case 14:                        /* transceiverless */
2705                         type = "(none)";
2706                         break;
2707
2708                 default:
2709                         ERR("unrecognized UDC HMC mode %d\n", hmc);
2710                         return -ENODEV;
2711                 }
2712         }
2713         INFO("hmc mode %d, transceiver %s\n", hmc, type);
2714
2715         /* a "gadget" abstracts/virtualizes the controller */
2716         status = omap_udc_setup(odev, xceiv);
2717         if (status) {
2718                 goto cleanup0;
2719         }
2720         xceiv = 0;
2721         // "udc" is now valid
2722         pullup_disable(udc);
2723 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
2724         udc->gadget.is_otg = (config->otg != 0);
2725 #endif
2726
2727         /* USB general purpose IRQ:  ep0, state changes, dma, etc */
2728         status = request_irq(odev->resource[1].start, omap_udc_irq,
2729                         SA_SAMPLE_RANDOM, driver_name, udc);
2730         if (status != 0) {
2731                 ERR( "can't get irq %ld, err %d\n",
2732                         odev->resource[1].start, status);
2733                 goto cleanup1;
2734         }
2735
2736         /* USB "non-iso" IRQ (PIO for all but ep0) */
2737         status = request_irq(odev->resource[2].start, omap_udc_pio_irq,
2738                         SA_SAMPLE_RANDOM, "omap_udc pio", udc);
2739         if (status != 0) {
2740                 ERR( "can't get irq %ld, err %d\n",
2741                         odev->resource[2].start, status);
2742                 goto cleanup2;
2743         }
2744 #ifdef  USE_ISO
2745         status = request_irq(odev->resource[3].start, omap_udc_iso_irq,
2746                         SA_INTERRUPT, "omap_udc iso", udc);
2747         if (status != 0) {
2748                 ERR("can't get irq %ld, err %d\n",
2749                         odev->resource[3].start, status);
2750                 goto cleanup3;
2751         }
2752 #endif
2753
2754         create_proc_file();
2755         device_add(&udc->gadget.dev);
2756         return 0;
2757
2758 #ifdef  USE_ISO
2759 cleanup3:
2760         free_irq(odev->resource[2].start, udc);
2761 #endif
2762
2763 cleanup2:
2764         free_irq(odev->resource[1].start, udc);
2765
2766 cleanup1:
2767         kfree (udc);
2768         udc = 0;
2769
2770 cleanup0:
2771         if (xceiv)
2772                 put_device(xceiv->dev);
2773         release_mem_region(odev->resource[0].start,
2774                         odev->resource[0].end - odev->resource[0].start + 1);
2775         return status;
2776 }
2777
2778 static int __exit omap_udc_remove(struct device *dev)
2779 {
2780         struct platform_device  *odev = to_platform_device(dev);
2781         DECLARE_COMPLETION(done);
2782
2783         if (!udc)
2784                 return -ENODEV;
2785
2786         udc->done = &done;
2787
2788         pullup_disable(udc);
2789         if (udc->transceiver) {
2790                 put_device(udc->transceiver->dev);
2791                 udc->transceiver = 0;
2792         }
2793         UDC_SYSCON1_REG = 0;
2794
2795         remove_proc_file();
2796
2797 #ifdef  USE_ISO
2798         free_irq(odev->resource[3].start, udc);
2799 #endif
2800         free_irq(odev->resource[2].start, udc);
2801         free_irq(odev->resource[1].start, udc);
2802
2803         release_mem_region(odev->resource[0].start,
2804                         odev->resource[0].end - odev->resource[0].start + 1);
2805
2806         device_unregister(&udc->gadget.dev);
2807         wait_for_completion(&done);
2808
2809         return 0;
2810 }
2811
2812 static int omap_udc_suspend(struct device *dev, pm_message_t state, u32 level)
2813 {
2814         if (level != 0)
2815                 return 0;
2816
2817         DBG("suspend, state %d\n", state);
2818         omap_pullup(&udc->gadget, 0);
2819         udc->gadget.dev.power.power_state = PMSG_SUSPEND;
2820         udc->gadget.dev.parent->power.power_state = PMSG_SUSPEND;
2821         return 0;
2822 }
2823
2824 static int omap_udc_resume(struct device *dev, u32 level)
2825 {
2826         if (level != 0)
2827                 return 0;
2828
2829         DBG("resume + wakeup/SRP\n");
2830         udc->gadget.dev.parent->power.power_state = PMSG_ON;
2831         udc->gadget.dev.power.power_state = PMSG_ON;
2832         omap_pullup(&udc->gadget, 1);
2833
2834         /* maybe the host would enumerate us if we nudged it */
2835         msleep(100);
2836         return omap_wakeup(&udc->gadget);
2837 }
2838
2839 /*-------------------------------------------------------------------------*/
2840
2841 static struct device_driver udc_driver = {
2842         .name           = (char *) driver_name,
2843         .bus            = &platform_bus_type,
2844         .probe          = omap_udc_probe,
2845         .remove         = __exit_p(omap_udc_remove),
2846         .suspend        = omap_udc_suspend,
2847         .resume         = omap_udc_resume,
2848 };
2849
2850 static int __init udc_init(void)
2851 {
2852         INFO("%s, version: " DRIVER_VERSION
2853 #ifdef  USE_ISO
2854                 " (iso)"
2855 #endif
2856                 "%s\n", driver_desc,
2857                 use_dma ?  " (dma)" : "");
2858         return driver_register(&udc_driver);
2859 }
2860 module_init(udc_init);
2861
2862 static void __exit udc_exit(void)
2863 {
2864         driver_unregister(&udc_driver);
2865 }
2866 module_exit(udc_exit);
2867
2868 MODULE_DESCRIPTION(DRIVER_DESC);
2869 MODULE_LICENSE("GPL");
2870