USB: move <linux/usb_gadget.h> to <linux/usb/gadget.h>
[linux-2.6.git] / drivers / usb / gadget / fsl_usb2_udc.c
1 /*
2  * Copyright (C) 2004-2007 Freescale Semicondutor, Inc. All rights reserved.
3  *
4  * Author: Li Yang <leoli@freescale.com>
5  *         Jiang Bo <tanya.jiang@freescale.com>
6  *
7  * Description:
8  * Freescale high-speed USB SOC DR module device controller driver.
9  * This can be found on MPC8349E/MPC8313E cpus.
10  * The driver is previously named as mpc_udc.  Based on bare board
11  * code from Dave Liu and Shlomi Gridish.
12  *
13  * This program is free software; you can redistribute  it and/or modify it
14  * under  the terms of  the GNU General  Public License as published by the
15  * Free Software Foundation;  either version 2 of the  License, or (at your
16  * option) any later version.
17  */
18
19 #undef VERBOSE
20
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/ioport.h>
24 #include <linux/types.h>
25 #include <linux/errno.h>
26 #include <linux/delay.h>
27 #include <linux/sched.h>
28 #include <linux/slab.h>
29 #include <linux/init.h>
30 #include <linux/timer.h>
31 #include <linux/list.h>
32 #include <linux/interrupt.h>
33 #include <linux/proc_fs.h>
34 #include <linux/mm.h>
35 #include <linux/moduleparam.h>
36 #include <linux/device.h>
37 #include <linux/usb/ch9.h>
38 #include <linux/usb/gadget.h>
39 #include <linux/usb/otg.h>
40 #include <linux/dma-mapping.h>
41 #include <linux/platform_device.h>
42 #include <linux/fsl_devices.h>
43 #include <linux/dmapool.h>
44
45 #include <asm/byteorder.h>
46 #include <asm/io.h>
47 #include <asm/irq.h>
48 #include <asm/system.h>
49 #include <asm/unaligned.h>
50 #include <asm/dma.h>
51 #include <asm/cacheflush.h>
52
53 #include "fsl_usb2_udc.h"
54
55 #define DRIVER_DESC     "Freescale High-Speed USB SOC Device Controller driver"
56 #define DRIVER_AUTHOR   "Li Yang/Jiang Bo"
57 #define DRIVER_VERSION  "Apr 20, 2007"
58
59 #define DMA_ADDR_INVALID        (~(dma_addr_t)0)
60
61 static const char driver_name[] = "fsl-usb2-udc";
62 static const char driver_desc[] = DRIVER_DESC;
63
64 volatile static struct usb_dr_device *dr_regs = NULL;
65 volatile static struct usb_sys_interface *usb_sys_regs = NULL;
66
67 /* it is initialized in probe()  */
68 static struct fsl_udc *udc_controller = NULL;
69
70 static const struct usb_endpoint_descriptor
71 fsl_ep0_desc = {
72         .bLength =              USB_DT_ENDPOINT_SIZE,
73         .bDescriptorType =      USB_DT_ENDPOINT,
74         .bEndpointAddress =     0,
75         .bmAttributes =         USB_ENDPOINT_XFER_CONTROL,
76         .wMaxPacketSize =       USB_MAX_CTRL_PAYLOAD,
77 };
78
79 static int fsl_udc_suspend(struct platform_device *pdev, pm_message_t state);
80 static int fsl_udc_resume(struct platform_device *pdev);
81 static void fsl_ep_fifo_flush(struct usb_ep *_ep);
82
83 #ifdef CONFIG_PPC32
84 #define fsl_readl(addr)         in_le32(addr)
85 #define fsl_writel(addr, val32) out_le32(val32, addr)
86 #else
87 #define fsl_readl(addr)         readl(addr)
88 #define fsl_writel(addr, val32) writel(addr, val32)
89 #endif
90
91 /********************************************************************
92  *      Internal Used Function
93 ********************************************************************/
94 /*-----------------------------------------------------------------
95  * done() - retire a request; caller blocked irqs
96  * @status : request status to be set, only works when
97  *      request is still in progress.
98  *--------------------------------------------------------------*/
99 static void done(struct fsl_ep *ep, struct fsl_req *req, int status)
100 {
101         struct fsl_udc *udc = NULL;
102         unsigned char stopped = ep->stopped;
103         struct ep_td_struct *curr_td, *next_td;
104         int j;
105
106         udc = (struct fsl_udc *)ep->udc;
107         /* Removed the req from fsl_ep->queue */
108         list_del_init(&req->queue);
109
110         /* req.status should be set as -EINPROGRESS in ep_queue() */
111         if (req->req.status == -EINPROGRESS)
112                 req->req.status = status;
113         else
114                 status = req->req.status;
115
116         /* Free dtd for the request */
117         next_td = req->head;
118         for (j = 0; j < req->dtd_count; j++) {
119                 curr_td = next_td;
120                 if (j != req->dtd_count - 1) {
121                         next_td = curr_td->next_td_virt;
122                 }
123                 dma_pool_free(udc->td_pool, curr_td, curr_td->td_dma);
124         }
125
126         if (req->mapped) {
127                 dma_unmap_single(ep->udc->gadget.dev.parent,
128                         req->req.dma, req->req.length,
129                         ep_is_in(ep)
130                                 ? DMA_TO_DEVICE
131                                 : DMA_FROM_DEVICE);
132                 req->req.dma = DMA_ADDR_INVALID;
133                 req->mapped = 0;
134         } else
135                 dma_sync_single_for_cpu(ep->udc->gadget.dev.parent,
136                         req->req.dma, req->req.length,
137                         ep_is_in(ep)
138                                 ? DMA_TO_DEVICE
139                                 : DMA_FROM_DEVICE);
140
141         if (status && (status != -ESHUTDOWN))
142                 VDBG("complete %s req %p stat %d len %u/%u",
143                         ep->ep.name, &req->req, status,
144                         req->req.actual, req->req.length);
145
146         ep->stopped = 1;
147
148         spin_unlock(&ep->udc->lock);
149         /* complete() is from gadget layer,
150          * eg fsg->bulk_in_complete() */
151         if (req->req.complete)
152                 req->req.complete(&ep->ep, &req->req);
153
154         spin_lock(&ep->udc->lock);
155         ep->stopped = stopped;
156 }
157
158 /*-----------------------------------------------------------------
159  * nuke(): delete all requests related to this ep
160  * called with spinlock held
161  *--------------------------------------------------------------*/
162 static void nuke(struct fsl_ep *ep, int status)
163 {
164         ep->stopped = 1;
165
166         /* Flush fifo */
167         fsl_ep_fifo_flush(&ep->ep);
168
169         /* Whether this eq has request linked */
170         while (!list_empty(&ep->queue)) {
171                 struct fsl_req *req = NULL;
172
173                 req = list_entry(ep->queue.next, struct fsl_req, queue);
174                 done(ep, req, status);
175         }
176 }
177
178 /*------------------------------------------------------------------
179         Internal Hardware related function
180  ------------------------------------------------------------------*/
181
182 static int dr_controller_setup(struct fsl_udc *udc)
183 {
184         unsigned int tmp = 0, portctrl = 0, ctrl = 0;
185         unsigned long timeout;
186 #define FSL_UDC_RESET_TIMEOUT 1000
187
188         /* before here, make sure dr_regs has been initialized */
189         if (!udc)
190                 return -EINVAL;
191
192         /* Stop and reset the usb controller */
193         tmp = fsl_readl(&dr_regs->usbcmd);
194         tmp &= ~USB_CMD_RUN_STOP;
195         fsl_writel(tmp, &dr_regs->usbcmd);
196
197         tmp = fsl_readl(&dr_regs->usbcmd);
198         tmp |= USB_CMD_CTRL_RESET;
199         fsl_writel(tmp, &dr_regs->usbcmd);
200
201         /* Wait for reset to complete */
202         timeout = jiffies + FSL_UDC_RESET_TIMEOUT;
203         while (fsl_readl(&dr_regs->usbcmd) & USB_CMD_CTRL_RESET) {
204                 if (time_after(jiffies, timeout)) {
205                         ERR("udc reset timeout! \n");
206                         return -ETIMEDOUT;
207                 }
208                 cpu_relax();
209         }
210
211         /* Set the controller as device mode */
212         tmp = fsl_readl(&dr_regs->usbmode);
213         tmp |= USB_MODE_CTRL_MODE_DEVICE;
214         /* Disable Setup Lockout */
215         tmp |= USB_MODE_SETUP_LOCK_OFF;
216         fsl_writel(tmp, &dr_regs->usbmode);
217
218         /* Clear the setup status */
219         fsl_writel(0, &dr_regs->usbsts);
220
221         tmp = udc->ep_qh_dma;
222         tmp &= USB_EP_LIST_ADDRESS_MASK;
223         fsl_writel(tmp, &dr_regs->endpointlistaddr);
224
225         VDBG("vir[qh_base] is %p phy[qh_base] is 0x%8x reg is 0x%8x",
226                 (int)udc->ep_qh, (int)tmp,
227                 fsl_readl(&dr_regs->endpointlistaddr));
228
229         /* Config PHY interface */
230         portctrl = fsl_readl(&dr_regs->portsc1);
231         portctrl &= ~(PORTSCX_PHY_TYPE_SEL | PORTSCX_PORT_WIDTH);
232         switch (udc->phy_mode) {
233         case FSL_USB2_PHY_ULPI:
234                 portctrl |= PORTSCX_PTS_ULPI;
235                 break;
236         case FSL_USB2_PHY_UTMI_WIDE:
237                 portctrl |= PORTSCX_PTW_16BIT;
238                 /* fall through */
239         case FSL_USB2_PHY_UTMI:
240                 portctrl |= PORTSCX_PTS_UTMI;
241                 break;
242         case FSL_USB2_PHY_SERIAL:
243                 portctrl |= PORTSCX_PTS_FSLS;
244                 break;
245         default:
246                 return -EINVAL;
247         }
248         fsl_writel(portctrl, &dr_regs->portsc1);
249
250         /* Config control enable i/o output, cpu endian register */
251         ctrl = __raw_readl(&usb_sys_regs->control);
252         ctrl |= USB_CTRL_IOENB;
253         __raw_writel(ctrl, &usb_sys_regs->control);
254
255 #if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
256         /* Turn on cache snooping hardware, since some PowerPC platforms
257          * wholly rely on hardware to deal with cache coherent. */
258
259         /* Setup Snooping for all the 4GB space */
260         tmp = SNOOP_SIZE_2GB;   /* starts from 0x0, size 2G */
261         __raw_writel(tmp, &usb_sys_regs->snoop1);
262         tmp |= 0x80000000;      /* starts from 0x8000000, size 2G */
263         __raw_writel(tmp, &usb_sys_regs->snoop2);
264 #endif
265
266         return 0;
267 }
268
269 /* Enable DR irq and set controller to run state */
270 static void dr_controller_run(struct fsl_udc *udc)
271 {
272         u32 temp;
273
274         /* Enable DR irq reg */
275         temp = USB_INTR_INT_EN | USB_INTR_ERR_INT_EN
276                 | USB_INTR_PTC_DETECT_EN | USB_INTR_RESET_EN
277                 | USB_INTR_DEVICE_SUSPEND | USB_INTR_SYS_ERR_EN;
278
279         fsl_writel(temp, &dr_regs->usbintr);
280
281         /* Clear stopped bit */
282         udc->stopped = 0;
283
284         /* Set the controller as device mode */
285         temp = fsl_readl(&dr_regs->usbmode);
286         temp |= USB_MODE_CTRL_MODE_DEVICE;
287         fsl_writel(temp, &dr_regs->usbmode);
288
289         /* Set controller to Run */
290         temp = fsl_readl(&dr_regs->usbcmd);
291         temp |= USB_CMD_RUN_STOP;
292         fsl_writel(temp, &dr_regs->usbcmd);
293
294         return;
295 }
296
297 static void dr_controller_stop(struct fsl_udc *udc)
298 {
299         unsigned int tmp;
300
301         /* disable all INTR */
302         fsl_writel(0, &dr_regs->usbintr);
303
304         /* Set stopped bit for isr */
305         udc->stopped = 1;
306
307         /* disable IO output */
308 /*      usb_sys_regs->control = 0; */
309
310         /* set controller to Stop */
311         tmp = fsl_readl(&dr_regs->usbcmd);
312         tmp &= ~USB_CMD_RUN_STOP;
313         fsl_writel(tmp, &dr_regs->usbcmd);
314
315         return;
316 }
317
318 void dr_ep_setup(unsigned char ep_num, unsigned char dir, unsigned char ep_type)
319 {
320         unsigned int tmp_epctrl = 0;
321
322         tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
323         if (dir) {
324                 if (ep_num)
325                         tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
326                 tmp_epctrl |= EPCTRL_TX_ENABLE;
327                 tmp_epctrl |= ((unsigned int)(ep_type)
328                                 << EPCTRL_TX_EP_TYPE_SHIFT);
329         } else {
330                 if (ep_num)
331                         tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
332                 tmp_epctrl |= EPCTRL_RX_ENABLE;
333                 tmp_epctrl |= ((unsigned int)(ep_type)
334                                 << EPCTRL_RX_EP_TYPE_SHIFT);
335         }
336
337         fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
338 }
339
340 static void
341 dr_ep_change_stall(unsigned char ep_num, unsigned char dir, int value)
342 {
343         u32 tmp_epctrl = 0;
344
345         tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
346
347         if (value) {
348                 /* set the stall bit */
349                 if (dir)
350                         tmp_epctrl |= EPCTRL_TX_EP_STALL;
351                 else
352                         tmp_epctrl |= EPCTRL_RX_EP_STALL;
353         } else {
354                 /* clear the stall bit and reset data toggle */
355                 if (dir) {
356                         tmp_epctrl &= ~EPCTRL_TX_EP_STALL;
357                         tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
358                 } else {
359                         tmp_epctrl &= ~EPCTRL_RX_EP_STALL;
360                         tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
361                 }
362         }
363         fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
364 }
365
366 /* Get stall status of a specific ep
367    Return: 0: not stalled; 1:stalled */
368 static int dr_ep_get_stall(unsigned char ep_num, unsigned char dir)
369 {
370         u32 epctrl;
371
372         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
373         if (dir)
374                 return (epctrl & EPCTRL_TX_EP_STALL) ? 1 : 0;
375         else
376                 return (epctrl & EPCTRL_RX_EP_STALL) ? 1 : 0;
377 }
378
379 /********************************************************************
380         Internal Structure Build up functions
381 ********************************************************************/
382
383 /*------------------------------------------------------------------
384 * struct_ep_qh_setup(): set the Endpoint Capabilites field of QH
385  * @zlt: Zero Length Termination Select (1: disable; 0: enable)
386  * @mult: Mult field
387  ------------------------------------------------------------------*/
388 static void struct_ep_qh_setup(struct fsl_udc *udc, unsigned char ep_num,
389                 unsigned char dir, unsigned char ep_type,
390                 unsigned int max_pkt_len,
391                 unsigned int zlt, unsigned char mult)
392 {
393         struct ep_queue_head *p_QH = &udc->ep_qh[2 * ep_num + dir];
394         unsigned int tmp = 0;
395
396         /* set the Endpoint Capabilites in QH */
397         switch (ep_type) {
398         case USB_ENDPOINT_XFER_CONTROL:
399                 /* Interrupt On Setup (IOS). for control ep  */
400                 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
401                         | EP_QUEUE_HEAD_IOS;
402                 break;
403         case USB_ENDPOINT_XFER_ISOC:
404                 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
405                         | (mult << EP_QUEUE_HEAD_MULT_POS);
406                 break;
407         case USB_ENDPOINT_XFER_BULK:
408         case USB_ENDPOINT_XFER_INT:
409                 tmp = max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS;
410                 break;
411         default:
412                 VDBG("error ep type is %d", ep_type);
413                 return;
414         }
415         if (zlt)
416                 tmp |= EP_QUEUE_HEAD_ZLT_SEL;
417         p_QH->max_pkt_length = cpu_to_le32(tmp);
418
419         return;
420 }
421
422 /* Setup qh structure and ep register for ep0. */
423 static void ep0_setup(struct fsl_udc *udc)
424 {
425         /* the intialization of an ep includes: fields in QH, Regs,
426          * fsl_ep struct */
427         struct_ep_qh_setup(udc, 0, USB_RECV, USB_ENDPOINT_XFER_CONTROL,
428                         USB_MAX_CTRL_PAYLOAD, 0, 0);
429         struct_ep_qh_setup(udc, 0, USB_SEND, USB_ENDPOINT_XFER_CONTROL,
430                         USB_MAX_CTRL_PAYLOAD, 0, 0);
431         dr_ep_setup(0, USB_RECV, USB_ENDPOINT_XFER_CONTROL);
432         dr_ep_setup(0, USB_SEND, USB_ENDPOINT_XFER_CONTROL);
433
434         return;
435
436 }
437
438 /***********************************************************************
439                 Endpoint Management Functions
440 ***********************************************************************/
441
442 /*-------------------------------------------------------------------------
443  * when configurations are set, or when interface settings change
444  * for example the do_set_interface() in gadget layer,
445  * the driver will enable or disable the relevant endpoints
446  * ep0 doesn't use this routine. It is always enabled.
447 -------------------------------------------------------------------------*/
448 static int fsl_ep_enable(struct usb_ep *_ep,
449                 const struct usb_endpoint_descriptor *desc)
450 {
451         struct fsl_udc *udc = NULL;
452         struct fsl_ep *ep = NULL;
453         unsigned short max = 0;
454         unsigned char mult = 0, zlt;
455         int retval = -EINVAL;
456         unsigned long flags = 0;
457
458         ep = container_of(_ep, struct fsl_ep, ep);
459
460         /* catch various bogus parameters */
461         if (!_ep || !desc || ep->desc
462                         || (desc->bDescriptorType != USB_DT_ENDPOINT))
463                 return -EINVAL;
464
465         udc = ep->udc;
466
467         if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
468                 return -ESHUTDOWN;
469
470         max = le16_to_cpu(desc->wMaxPacketSize);
471
472         /* Disable automatic zlp generation.  Driver is reponsible to indicate
473          * explicitly through req->req.zero.  This is needed to enable multi-td
474          * request. */
475         zlt = 1;
476
477         /* Assume the max packet size from gadget is always correct */
478         switch (desc->bmAttributes & 0x03) {
479         case USB_ENDPOINT_XFER_CONTROL:
480         case USB_ENDPOINT_XFER_BULK:
481         case USB_ENDPOINT_XFER_INT:
482                 /* mult = 0.  Execute N Transactions as demonstrated by
483                  * the USB variable length packet protocol where N is
484                  * computed using the Maximum Packet Length (dQH) and
485                  * the Total Bytes field (dTD) */
486                 mult = 0;
487                 break;
488         case USB_ENDPOINT_XFER_ISOC:
489                 /* Calculate transactions needed for high bandwidth iso */
490                 mult = (unsigned char)(1 + ((max >> 11) & 0x03));
491                 max = max & 0x8ff;      /* bit 0~10 */
492                 /* 3 transactions at most */
493                 if (mult > 3)
494                         goto en_done;
495                 break;
496         default:
497                 goto en_done;
498         }
499
500         spin_lock_irqsave(&udc->lock, flags);
501         ep->ep.maxpacket = max;
502         ep->desc = desc;
503         ep->stopped = 0;
504
505         /* Controller related setup */
506         /* Init EPx Queue Head (Ep Capabilites field in QH
507          * according to max, zlt, mult) */
508         struct_ep_qh_setup(udc, (unsigned char) ep_index(ep),
509                         (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
510                                         ?  USB_SEND : USB_RECV),
511                         (unsigned char) (desc->bmAttributes
512                                         & USB_ENDPOINT_XFERTYPE_MASK),
513                         max, zlt, mult);
514
515         /* Init endpoint ctrl register */
516         dr_ep_setup((unsigned char) ep_index(ep),
517                         (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
518                                         ? USB_SEND : USB_RECV),
519                         (unsigned char) (desc->bmAttributes
520                                         & USB_ENDPOINT_XFERTYPE_MASK));
521
522         spin_unlock_irqrestore(&udc->lock, flags);
523         retval = 0;
524
525         VDBG("enabled %s (ep%d%s) maxpacket %d",ep->ep.name,
526                         ep->desc->bEndpointAddress & 0x0f,
527                         (desc->bEndpointAddress & USB_DIR_IN)
528                                 ? "in" : "out", max);
529 en_done:
530         return retval;
531 }
532
533 /*---------------------------------------------------------------------
534  * @ep : the ep being unconfigured. May not be ep0
535  * Any pending and uncomplete req will complete with status (-ESHUTDOWN)
536 *---------------------------------------------------------------------*/
537 static int fsl_ep_disable(struct usb_ep *_ep)
538 {
539         struct fsl_udc *udc = NULL;
540         struct fsl_ep *ep = NULL;
541         unsigned long flags = 0;
542         u32 epctrl;
543         int ep_num;
544
545         ep = container_of(_ep, struct fsl_ep, ep);
546         if (!_ep || !ep->desc) {
547                 VDBG("%s not enabled", _ep ? ep->ep.name : NULL);
548                 return -EINVAL;
549         }
550
551         /* disable ep on controller */
552         ep_num = ep_index(ep);
553         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
554         if (ep_is_in(ep))
555                 epctrl &= ~EPCTRL_TX_ENABLE;
556         else
557                 epctrl &= ~EPCTRL_RX_ENABLE;
558         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
559
560         udc = (struct fsl_udc *)ep->udc;
561         spin_lock_irqsave(&udc->lock, flags);
562
563         /* nuke all pending requests (does flush) */
564         nuke(ep, -ESHUTDOWN);
565
566         ep->desc = 0;
567         ep->stopped = 1;
568         spin_unlock_irqrestore(&udc->lock, flags);
569
570         VDBG("disabled %s OK", _ep->name);
571         return 0;
572 }
573
574 /*---------------------------------------------------------------------
575  * allocate a request object used by this endpoint
576  * the main operation is to insert the req->queue to the eq->queue
577  * Returns the request, or null if one could not be allocated
578 *---------------------------------------------------------------------*/
579 static struct usb_request *
580 fsl_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
581 {
582         struct fsl_req *req = NULL;
583
584         req = kzalloc(sizeof *req, gfp_flags);
585         if (!req)
586                 return NULL;
587
588         req->req.dma = DMA_ADDR_INVALID;
589         INIT_LIST_HEAD(&req->queue);
590
591         return &req->req;
592 }
593
594 static void fsl_free_request(struct usb_ep *_ep, struct usb_request *_req)
595 {
596         struct fsl_req *req = NULL;
597
598         req = container_of(_req, struct fsl_req, req);
599
600         if (_req)
601                 kfree(req);
602 }
603
604 /*-------------------------------------------------------------------------*/
605 static int fsl_queue_td(struct fsl_ep *ep, struct fsl_req *req)
606 {
607         int i = ep_index(ep) * 2 + ep_is_in(ep);
608         u32 temp, bitmask, tmp_stat;
609         struct ep_queue_head *dQH = &ep->udc->ep_qh[i];
610
611         /* VDBG("QH addr Register 0x%8x", dr_regs->endpointlistaddr);
612         VDBG("ep_qh[%d] addr is 0x%8x", i, (u32)&(ep->udc->ep_qh[i])); */
613
614         bitmask = ep_is_in(ep)
615                 ? (1 << (ep_index(ep) + 16))
616                 : (1 << (ep_index(ep)));
617
618         /* check if the pipe is empty */
619         if (!(list_empty(&ep->queue))) {
620                 /* Add td to the end */
621                 struct fsl_req *lastreq;
622                 lastreq = list_entry(ep->queue.prev, struct fsl_req, queue);
623                 lastreq->tail->next_td_ptr =
624                         cpu_to_le32(req->head->td_dma & DTD_ADDR_MASK);
625                 /* Read prime bit, if 1 goto done */
626                 if (fsl_readl(&dr_regs->endpointprime) & bitmask)
627                         goto out;
628
629                 do {
630                         /* Set ATDTW bit in USBCMD */
631                         temp = fsl_readl(&dr_regs->usbcmd);
632                         fsl_writel(temp | USB_CMD_ATDTW, &dr_regs->usbcmd);
633
634                         /* Read correct status bit */
635                         tmp_stat = fsl_readl(&dr_regs->endptstatus) & bitmask;
636
637                 } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_ATDTW));
638
639                 /* Write ATDTW bit to 0 */
640                 temp = fsl_readl(&dr_regs->usbcmd);
641                 fsl_writel(temp & ~USB_CMD_ATDTW, &dr_regs->usbcmd);
642
643                 if (tmp_stat)
644                         goto out;
645         }
646
647         /* Write dQH next pointer and terminate bit to 0 */
648         temp = req->head->td_dma & EP_QUEUE_HEAD_NEXT_POINTER_MASK;
649         dQH->next_dtd_ptr = cpu_to_le32(temp);
650
651         /* Clear active and halt bit */
652         temp = cpu_to_le32(~(EP_QUEUE_HEAD_STATUS_ACTIVE
653                         | EP_QUEUE_HEAD_STATUS_HALT));
654         dQH->size_ioc_int_sts &= temp;
655
656         /* Prime endpoint by writing 1 to ENDPTPRIME */
657         temp = ep_is_in(ep)
658                 ? (1 << (ep_index(ep) + 16))
659                 : (1 << (ep_index(ep)));
660         fsl_writel(temp, &dr_regs->endpointprime);
661 out:
662         return 0;
663 }
664
665 /* Fill in the dTD structure
666  * @req: request that the transfer belongs to
667  * @length: return actually data length of the dTD
668  * @dma: return dma address of the dTD
669  * @is_last: return flag if it is the last dTD of the request
670  * return: pointer to the built dTD */
671 static struct ep_td_struct *fsl_build_dtd(struct fsl_req *req, unsigned *length,
672                 dma_addr_t *dma, int *is_last)
673 {
674         u32 swap_temp;
675         struct ep_td_struct *dtd;
676
677         /* how big will this transfer be? */
678         *length = min(req->req.length - req->req.actual,
679                         (unsigned)EP_MAX_LENGTH_TRANSFER);
680
681         dtd = dma_pool_alloc(udc_controller->td_pool, GFP_KERNEL, dma);
682         if (dtd == NULL)
683                 return dtd;
684
685         dtd->td_dma = *dma;
686         /* Clear reserved field */
687         swap_temp = cpu_to_le32(dtd->size_ioc_sts);
688         swap_temp &= ~DTD_RESERVED_FIELDS;
689         dtd->size_ioc_sts = cpu_to_le32(swap_temp);
690
691         /* Init all of buffer page pointers */
692         swap_temp = (u32) (req->req.dma + req->req.actual);
693         dtd->buff_ptr0 = cpu_to_le32(swap_temp);
694         dtd->buff_ptr1 = cpu_to_le32(swap_temp + 0x1000);
695         dtd->buff_ptr2 = cpu_to_le32(swap_temp + 0x2000);
696         dtd->buff_ptr3 = cpu_to_le32(swap_temp + 0x3000);
697         dtd->buff_ptr4 = cpu_to_le32(swap_temp + 0x4000);
698
699         req->req.actual += *length;
700
701         /* zlp is needed if req->req.zero is set */
702         if (req->req.zero) {
703                 if (*length == 0 || (*length % req->ep->ep.maxpacket) != 0)
704                         *is_last = 1;
705                 else
706                         *is_last = 0;
707         } else if (req->req.length == req->req.actual)
708                 *is_last = 1;
709         else
710                 *is_last = 0;
711
712         if ((*is_last) == 0)
713                 VDBG("multi-dtd request!\n");
714         /* Fill in the transfer size; set active bit */
715         swap_temp = ((*length << DTD_LENGTH_BIT_POS) | DTD_STATUS_ACTIVE);
716
717         /* Enable interrupt for the last dtd of a request */
718         if (*is_last && !req->req.no_interrupt)
719                 swap_temp |= DTD_IOC;
720
721         dtd->size_ioc_sts = cpu_to_le32(swap_temp);
722
723         mb();
724
725         VDBG("length = %d address= 0x%x", *length, (int)*dma);
726
727         return dtd;
728 }
729
730 /* Generate dtd chain for a request */
731 static int fsl_req_to_dtd(struct fsl_req *req)
732 {
733         unsigned        count;
734         int             is_last;
735         int             is_first =1;
736         struct ep_td_struct     *last_dtd = NULL, *dtd;
737         dma_addr_t dma;
738
739         do {
740                 dtd = fsl_build_dtd(req, &count, &dma, &is_last);
741                 if (dtd == NULL)
742                         return -ENOMEM;
743
744                 if (is_first) {
745                         is_first = 0;
746                         req->head = dtd;
747                 } else {
748                         last_dtd->next_td_ptr = cpu_to_le32(dma);
749                         last_dtd->next_td_virt = dtd;
750                 }
751                 last_dtd = dtd;
752
753                 req->dtd_count++;
754         } while (!is_last);
755
756         dtd->next_td_ptr = cpu_to_le32(DTD_NEXT_TERMINATE);
757
758         req->tail = dtd;
759
760         return 0;
761 }
762
763 /* queues (submits) an I/O request to an endpoint */
764 static int
765 fsl_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
766 {
767         struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
768         struct fsl_req *req = container_of(_req, struct fsl_req, req);
769         struct fsl_udc *udc;
770         unsigned long flags;
771         int is_iso = 0;
772
773         /* catch various bogus parameters */
774         if (!_req || !req->req.complete || !req->req.buf
775                         || !list_empty(&req->queue)) {
776                 VDBG("%s, bad params\n", __FUNCTION__);
777                 return -EINVAL;
778         }
779         if (!_ep || (!ep->desc && ep_index(ep))) {
780                 VDBG("%s, bad ep\n", __FUNCTION__);
781                 return -EINVAL;
782         }
783         if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
784                 if (req->req.length > ep->ep.maxpacket)
785                         return -EMSGSIZE;
786                 is_iso = 1;
787         }
788
789         udc = ep->udc;
790         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
791                 return -ESHUTDOWN;
792
793         req->ep = ep;
794
795         /* map virtual address to hardware */
796         if (req->req.dma == DMA_ADDR_INVALID) {
797                 req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
798                                         req->req.buf,
799                                         req->req.length, ep_is_in(ep)
800                                                 ? DMA_TO_DEVICE
801                                                 : DMA_FROM_DEVICE);
802                 req->mapped = 1;
803         } else {
804                 dma_sync_single_for_device(ep->udc->gadget.dev.parent,
805                                         req->req.dma, req->req.length,
806                                         ep_is_in(ep)
807                                                 ? DMA_TO_DEVICE
808                                                 : DMA_FROM_DEVICE);
809                 req->mapped = 0;
810         }
811
812         req->req.status = -EINPROGRESS;
813         req->req.actual = 0;
814         req->dtd_count = 0;
815
816         spin_lock_irqsave(&udc->lock, flags);
817
818         /* build dtds and push them to device queue */
819         if (!fsl_req_to_dtd(req)) {
820                 fsl_queue_td(ep, req);
821         } else {
822                 spin_unlock_irqrestore(&udc->lock, flags);
823                 return -ENOMEM;
824         }
825
826         /* Update ep0 state */
827         if ((ep_index(ep) == 0))
828                 udc->ep0_state = DATA_STATE_XMIT;
829
830         /* irq handler advances the queue */
831         if (req != NULL)
832                 list_add_tail(&req->queue, &ep->queue);
833         spin_unlock_irqrestore(&udc->lock, flags);
834
835         return 0;
836 }
837
838 /* dequeues (cancels, unlinks) an I/O request from an endpoint */
839 static int fsl_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
840 {
841         struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
842         struct fsl_req *req;
843         unsigned long flags;
844         int ep_num, stopped, ret = 0;
845         u32 epctrl;
846
847         if (!_ep || !_req)
848                 return -EINVAL;
849
850         spin_lock_irqsave(&ep->udc->lock, flags);
851         stopped = ep->stopped;
852
853         /* Stop the ep before we deal with the queue */
854         ep->stopped = 1;
855         ep_num = ep_index(ep);
856         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
857         if (ep_is_in(ep))
858                 epctrl &= ~EPCTRL_TX_ENABLE;
859         else
860                 epctrl &= ~EPCTRL_RX_ENABLE;
861         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
862
863         /* make sure it's actually queued on this endpoint */
864         list_for_each_entry(req, &ep->queue, queue) {
865                 if (&req->req == _req)
866                         break;
867         }
868         if (&req->req != _req) {
869                 ret = -EINVAL;
870                 goto out;
871         }
872
873         /* The request is in progress, or completed but not dequeued */
874         if (ep->queue.next == &req->queue) {
875                 _req->status = -ECONNRESET;
876                 fsl_ep_fifo_flush(_ep); /* flush current transfer */
877
878                 /* The request isn't the last request in this ep queue */
879                 if (req->queue.next != &ep->queue) {
880                         struct ep_queue_head *qh;
881                         struct fsl_req *next_req;
882
883                         qh = ep->qh;
884                         next_req = list_entry(req->queue.next, struct fsl_req,
885                                         queue);
886
887                         /* Point the QH to the first TD of next request */
888                         fsl_writel((u32) next_req->head, &qh->curr_dtd_ptr);
889                 }
890
891                 /* The request hasn't been processed, patch up the TD chain */
892         } else {
893                 struct fsl_req *prev_req;
894
895                 prev_req = list_entry(req->queue.prev, struct fsl_req, queue);
896                 fsl_writel(fsl_readl(&req->tail->next_td_ptr),
897                                 &prev_req->tail->next_td_ptr);
898
899         }
900
901         done(ep, req, -ECONNRESET);
902
903         /* Enable EP */
904 out:    epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
905         if (ep_is_in(ep))
906                 epctrl |= EPCTRL_TX_ENABLE;
907         else
908                 epctrl |= EPCTRL_RX_ENABLE;
909         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
910         ep->stopped = stopped;
911
912         spin_unlock_irqrestore(&ep->udc->lock, flags);
913         return ret;
914 }
915
916 /*-------------------------------------------------------------------------*/
917
918 /*-----------------------------------------------------------------
919  * modify the endpoint halt feature
920  * @ep: the non-isochronous endpoint being stalled
921  * @value: 1--set halt  0--clear halt
922  * Returns zero, or a negative error code.
923 *----------------------------------------------------------------*/
924 static int fsl_ep_set_halt(struct usb_ep *_ep, int value)
925 {
926         struct fsl_ep *ep = NULL;
927         unsigned long flags = 0;
928         int status = -EOPNOTSUPP;       /* operation not supported */
929         unsigned char ep_dir = 0, ep_num = 0;
930         struct fsl_udc *udc = NULL;
931
932         ep = container_of(_ep, struct fsl_ep, ep);
933         udc = ep->udc;
934         if (!_ep || !ep->desc) {
935                 status = -EINVAL;
936                 goto out;
937         }
938
939         if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
940                 status = -EOPNOTSUPP;
941                 goto out;
942         }
943
944         /* Attempt to halt IN ep will fail if any transfer requests
945          * are still queue */
946         if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
947                 status = -EAGAIN;
948                 goto out;
949         }
950
951         status = 0;
952         ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
953         ep_num = (unsigned char)(ep_index(ep));
954         spin_lock_irqsave(&ep->udc->lock, flags);
955         dr_ep_change_stall(ep_num, ep_dir, value);
956         spin_unlock_irqrestore(&ep->udc->lock, flags);
957
958         if (ep_index(ep) == 0) {
959                 udc->ep0_state = WAIT_FOR_SETUP;
960                 udc->ep0_dir = 0;
961         }
962 out:
963         VDBG(" %s %s halt stat %d", ep->ep.name,
964                         value ?  "set" : "clear", status);
965
966         return status;
967 }
968
969 static void fsl_ep_fifo_flush(struct usb_ep *_ep)
970 {
971         struct fsl_ep *ep;
972         int ep_num, ep_dir;
973         u32 bits;
974         unsigned long timeout;
975 #define FSL_UDC_FLUSH_TIMEOUT 1000
976
977         if (!_ep) {
978                 return;
979         } else {
980                 ep = container_of(_ep, struct fsl_ep, ep);
981                 if (!ep->desc)
982                         return;
983         }
984         ep_num = ep_index(ep);
985         ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
986
987         if (ep_num == 0)
988                 bits = (1 << 16) | 1;
989         else if (ep_dir == USB_SEND)
990                 bits = 1 << (16 + ep_num);
991         else
992                 bits = 1 << ep_num;
993
994         timeout = jiffies + FSL_UDC_FLUSH_TIMEOUT;
995         do {
996                 fsl_writel(bits, &dr_regs->endptflush);
997
998                 /* Wait until flush complete */
999                 while (fsl_readl(&dr_regs->endptflush)) {
1000                         if (time_after(jiffies, timeout)) {
1001                                 ERR("ep flush timeout\n");
1002                                 return;
1003                         }
1004                         cpu_relax();
1005                 }
1006                 /* See if we need to flush again */
1007         } while (fsl_readl(&dr_regs->endptstatus) & bits);
1008 }
1009
1010 static struct usb_ep_ops fsl_ep_ops = {
1011         .enable = fsl_ep_enable,
1012         .disable = fsl_ep_disable,
1013
1014         .alloc_request = fsl_alloc_request,
1015         .free_request = fsl_free_request,
1016
1017         .queue = fsl_ep_queue,
1018         .dequeue = fsl_ep_dequeue,
1019
1020         .set_halt = fsl_ep_set_halt,
1021         .fifo_flush = fsl_ep_fifo_flush,        /* flush fifo */
1022 };
1023
1024 /*-------------------------------------------------------------------------
1025                 Gadget Driver Layer Operations
1026 -------------------------------------------------------------------------*/
1027
1028 /*----------------------------------------------------------------------
1029  * Get the current frame number (from DR frame_index Reg )
1030  *----------------------------------------------------------------------*/
1031 static int fsl_get_frame(struct usb_gadget *gadget)
1032 {
1033         return (int)(fsl_readl(&dr_regs->frindex) & USB_FRINDEX_MASKS);
1034 }
1035
1036 /*-----------------------------------------------------------------------
1037  * Tries to wake up the host connected to this gadget
1038  -----------------------------------------------------------------------*/
1039 static int fsl_wakeup(struct usb_gadget *gadget)
1040 {
1041         struct fsl_udc *udc = container_of(gadget, struct fsl_udc, gadget);
1042         u32 portsc;
1043
1044         /* Remote wakeup feature not enabled by host */
1045         if (!udc->remote_wakeup)
1046                 return -ENOTSUPP;
1047
1048         portsc = fsl_readl(&dr_regs->portsc1);
1049         /* not suspended? */
1050         if (!(portsc & PORTSCX_PORT_SUSPEND))
1051                 return 0;
1052         /* trigger force resume */
1053         portsc |= PORTSCX_PORT_FORCE_RESUME;
1054         fsl_writel(portsc, &dr_regs->portsc1);
1055         return 0;
1056 }
1057
1058 static int can_pullup(struct fsl_udc *udc)
1059 {
1060         return udc->driver && udc->softconnect && udc->vbus_active;
1061 }
1062
1063 /* Notify controller that VBUS is powered, Called by whatever
1064    detects VBUS sessions */
1065 static int fsl_vbus_session(struct usb_gadget *gadget, int is_active)
1066 {
1067         struct fsl_udc  *udc;
1068         unsigned long   flags;
1069
1070         udc = container_of(gadget, struct fsl_udc, gadget);
1071         spin_lock_irqsave(&udc->lock, flags);
1072         VDBG("VBUS %s\n", is_active ? "on" : "off");
1073         udc->vbus_active = (is_active != 0);
1074         if (can_pullup(udc))
1075                 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1076                                 &dr_regs->usbcmd);
1077         else
1078                 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1079                                 &dr_regs->usbcmd);
1080         spin_unlock_irqrestore(&udc->lock, flags);
1081         return 0;
1082 }
1083
1084 /* constrain controller's VBUS power usage
1085  * This call is used by gadget drivers during SET_CONFIGURATION calls,
1086  * reporting how much power the device may consume.  For example, this
1087  * could affect how quickly batteries are recharged.
1088  *
1089  * Returns zero on success, else negative errno.
1090  */
1091 static int fsl_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1092 {
1093         struct fsl_udc *udc;
1094
1095         udc = container_of(gadget, struct fsl_udc, gadget);
1096         if (udc->transceiver)
1097                 return otg_set_power(udc->transceiver, mA);
1098         return -ENOTSUPP;
1099 }
1100
1101 /* Change Data+ pullup status
1102  * this func is used by usb_gadget_connect/disconnet
1103  */
1104 static int fsl_pullup(struct usb_gadget *gadget, int is_on)
1105 {
1106         struct fsl_udc *udc;
1107
1108         udc = container_of(gadget, struct fsl_udc, gadget);
1109         udc->softconnect = (is_on != 0);
1110         if (can_pullup(udc))
1111                 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1112                                 &dr_regs->usbcmd);
1113         else
1114                 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1115                                 &dr_regs->usbcmd);
1116
1117         return 0;
1118 }
1119
1120 /* defined in gadget.h */
1121 static struct usb_gadget_ops fsl_gadget_ops = {
1122         .get_frame = fsl_get_frame,
1123         .wakeup = fsl_wakeup,
1124 /*      .set_selfpowered = fsl_set_selfpowered, */ /* Always selfpowered */
1125         .vbus_session = fsl_vbus_session,
1126         .vbus_draw = fsl_vbus_draw,
1127         .pullup = fsl_pullup,
1128 };
1129
1130 /* Set protocol stall on ep0, protocol stall will automatically be cleared
1131    on new transaction */
1132 static void ep0stall(struct fsl_udc *udc)
1133 {
1134         u32 tmp;
1135
1136         /* must set tx and rx to stall at the same time */
1137         tmp = fsl_readl(&dr_regs->endptctrl[0]);
1138         tmp |= EPCTRL_TX_EP_STALL | EPCTRL_RX_EP_STALL;
1139         fsl_writel(tmp, &dr_regs->endptctrl[0]);
1140         udc->ep0_state = WAIT_FOR_SETUP;
1141         udc->ep0_dir = 0;
1142 }
1143
1144 /* Prime a status phase for ep0 */
1145 static int ep0_prime_status(struct fsl_udc *udc, int direction)
1146 {
1147         struct fsl_req *req = udc->status_req;
1148         struct fsl_ep *ep;
1149         int status = 0;
1150
1151         if (direction == EP_DIR_IN)
1152                 udc->ep0_dir = USB_DIR_IN;
1153         else
1154                 udc->ep0_dir = USB_DIR_OUT;
1155
1156         ep = &udc->eps[0];
1157         udc->ep0_state = WAIT_FOR_OUT_STATUS;
1158
1159         req->ep = ep;
1160         req->req.length = 0;
1161         req->req.status = -EINPROGRESS;
1162         req->req.actual = 0;
1163         req->req.complete = NULL;
1164         req->dtd_count = 0;
1165
1166         if (fsl_req_to_dtd(req) == 0)
1167                 status = fsl_queue_td(ep, req);
1168         else
1169                 return -ENOMEM;
1170
1171         if (status)
1172                 ERR("Can't queue ep0 status request \n");
1173         list_add_tail(&req->queue, &ep->queue);
1174
1175         return status;
1176 }
1177
1178 static inline int udc_reset_ep_queue(struct fsl_udc *udc, u8 pipe)
1179 {
1180         struct fsl_ep *ep = get_ep_by_pipe(udc, pipe);
1181
1182         if (!ep->name)
1183                 return 0;
1184
1185         nuke(ep, -ESHUTDOWN);
1186
1187         return 0;
1188 }
1189
1190 /*
1191  * ch9 Set address
1192  */
1193 static void ch9setaddress(struct fsl_udc *udc, u16 value, u16 index, u16 length)
1194 {
1195         /* Save the new address to device struct */
1196         udc->device_address = (u8) value;
1197         /* Update usb state */
1198         udc->usb_state = USB_STATE_ADDRESS;
1199         /* Status phase */
1200         if (ep0_prime_status(udc, EP_DIR_IN))
1201                 ep0stall(udc);
1202 }
1203
1204 /*
1205  * ch9 Get status
1206  */
1207 static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value,
1208                 u16 index, u16 length)
1209 {
1210         u16 tmp = 0;            /* Status, cpu endian */
1211
1212         struct fsl_req *req;
1213         struct fsl_ep *ep;
1214         int status = 0;
1215
1216         ep = &udc->eps[0];
1217
1218         if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1219                 /* Get device status */
1220                 tmp = 1 << USB_DEVICE_SELF_POWERED;
1221                 tmp |= udc->remote_wakeup << USB_DEVICE_REMOTE_WAKEUP;
1222         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
1223                 /* Get interface status */
1224                 /* We don't have interface information in udc driver */
1225                 tmp = 0;
1226         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
1227                 /* Get endpoint status */
1228                 struct fsl_ep *target_ep;
1229
1230                 target_ep = get_ep_by_pipe(udc, get_pipe_by_windex(index));
1231
1232                 /* stall if endpoint doesn't exist */
1233                 if (!target_ep->desc)
1234                         goto stall;
1235                 tmp = dr_ep_get_stall(ep_index(target_ep), ep_is_in(target_ep))
1236                                 << USB_ENDPOINT_HALT;
1237         }
1238
1239         udc->ep0_dir = USB_DIR_IN;
1240         /* Borrow the per device status_req */
1241         req = udc->status_req;
1242         /* Fill in the reqest structure */
1243         *((u16 *) req->req.buf) = cpu_to_le16(tmp);
1244         req->ep = ep;
1245         req->req.length = 2;
1246         req->req.status = -EINPROGRESS;
1247         req->req.actual = 0;
1248         req->req.complete = NULL;
1249         req->dtd_count = 0;
1250
1251         /* prime the data phase */
1252         if ((fsl_req_to_dtd(req) == 0))
1253                 status = fsl_queue_td(ep, req);
1254         else                    /* no mem */
1255                 goto stall;
1256
1257         if (status) {
1258                 ERR("Can't respond to getstatus request \n");
1259                 goto stall;
1260         }
1261         list_add_tail(&req->queue, &ep->queue);
1262         udc->ep0_state = DATA_STATE_XMIT;
1263         return;
1264 stall:
1265         ep0stall(udc);
1266 }
1267
1268 static void setup_received_irq(struct fsl_udc *udc,
1269                 struct usb_ctrlrequest *setup)
1270 {
1271         u16 wValue = le16_to_cpu(setup->wValue);
1272         u16 wIndex = le16_to_cpu(setup->wIndex);
1273         u16 wLength = le16_to_cpu(setup->wLength);
1274
1275         udc_reset_ep_queue(udc, 0);
1276
1277         /* We process some stardard setup requests here */
1278         switch (setup->bRequest) {
1279         case USB_REQ_GET_STATUS:
1280                 /* Data+Status phase from udc */
1281                 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
1282                                         != (USB_DIR_IN | USB_TYPE_STANDARD))
1283                         break;
1284                 ch9getstatus(udc, setup->bRequestType, wValue, wIndex, wLength);
1285                 return;
1286
1287         case USB_REQ_SET_ADDRESS:
1288                 /* Status phase from udc */
1289                 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD
1290                                                 | USB_RECIP_DEVICE))
1291                         break;
1292                 ch9setaddress(udc, wValue, wIndex, wLength);
1293                 return;
1294
1295         case USB_REQ_CLEAR_FEATURE:
1296         case USB_REQ_SET_FEATURE:
1297                 /* Status phase from udc */
1298         {
1299                 int rc = -EOPNOTSUPP;
1300
1301                 if ((setup->bRequestType & (USB_RECIP_MASK | USB_TYPE_MASK))
1302                                 == (USB_RECIP_ENDPOINT | USB_TYPE_STANDARD)) {
1303                         int pipe = get_pipe_by_windex(wIndex);
1304                         struct fsl_ep *ep;
1305
1306                         if (wValue != 0 || wLength != 0 || pipe > udc->max_ep)
1307                                 break;
1308                         ep = get_ep_by_pipe(udc, pipe);
1309
1310                         spin_unlock(&udc->lock);
1311                         rc = fsl_ep_set_halt(&ep->ep,
1312                                         (setup->bRequest == USB_REQ_SET_FEATURE)
1313                                                 ? 1 : 0);
1314                         spin_lock(&udc->lock);
1315
1316                 } else if ((setup->bRequestType & (USB_RECIP_MASK
1317                                 | USB_TYPE_MASK)) == (USB_RECIP_DEVICE
1318                                 | USB_TYPE_STANDARD)) {
1319                         /* Note: The driver has not include OTG support yet.
1320                          * This will be set when OTG support is added */
1321                         if (!gadget_is_otg(udc->gadget))
1322                                 break;
1323                         else if (setup->bRequest == USB_DEVICE_B_HNP_ENABLE)
1324                                 udc->gadget.b_hnp_enable = 1;
1325                         else if (setup->bRequest == USB_DEVICE_A_HNP_SUPPORT)
1326                                 udc->gadget.a_hnp_support = 1;
1327                         else if (setup->bRequest ==
1328                                         USB_DEVICE_A_ALT_HNP_SUPPORT)
1329                                 udc->gadget.a_alt_hnp_support = 1;
1330                         else
1331                                 break;
1332                         rc = 0;
1333                 } else
1334                         break;
1335
1336                 if (rc == 0) {
1337                         if (ep0_prime_status(udc, EP_DIR_IN))
1338                                 ep0stall(udc);
1339                 }
1340                 return;
1341         }
1342
1343         default:
1344                 break;
1345         }
1346
1347         /* Requests handled by gadget */
1348         if (wLength) {
1349                 /* Data phase from gadget, status phase from udc */
1350                 udc->ep0_dir = (setup->bRequestType & USB_DIR_IN)
1351                                 ?  USB_DIR_IN : USB_DIR_OUT;
1352                 spin_unlock(&udc->lock);
1353                 if (udc->driver->setup(&udc->gadget,
1354                                 &udc->local_setup_buff) < 0)
1355                         ep0stall(udc);
1356                 spin_lock(&udc->lock);
1357                 udc->ep0_state = (setup->bRequestType & USB_DIR_IN)
1358                                 ?  DATA_STATE_XMIT : DATA_STATE_RECV;
1359         } else {
1360                 /* No data phase, IN status from gadget */
1361                 udc->ep0_dir = USB_DIR_IN;
1362                 spin_unlock(&udc->lock);
1363                 if (udc->driver->setup(&udc->gadget,
1364                                 &udc->local_setup_buff) < 0)
1365                         ep0stall(udc);
1366                 spin_lock(&udc->lock);
1367                 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1368         }
1369 }
1370
1371 /* Process request for Data or Status phase of ep0
1372  * prime status phase if needed */
1373 static void ep0_req_complete(struct fsl_udc *udc, struct fsl_ep *ep0,
1374                 struct fsl_req *req)
1375 {
1376         if (udc->usb_state == USB_STATE_ADDRESS) {
1377                 /* Set the new address */
1378                 u32 new_address = (u32) udc->device_address;
1379                 fsl_writel(new_address << USB_DEVICE_ADDRESS_BIT_POS,
1380                                 &dr_regs->deviceaddr);
1381         }
1382
1383         done(ep0, req, 0);
1384
1385         switch (udc->ep0_state) {
1386         case DATA_STATE_XMIT:
1387                 /* receive status phase */
1388                 if (ep0_prime_status(udc, EP_DIR_OUT))
1389                         ep0stall(udc);
1390                 break;
1391         case DATA_STATE_RECV:
1392                 /* send status phase */
1393                 if (ep0_prime_status(udc, EP_DIR_IN))
1394                         ep0stall(udc);
1395                 break;
1396         case WAIT_FOR_OUT_STATUS:
1397                 udc->ep0_state = WAIT_FOR_SETUP;
1398                 break;
1399         case WAIT_FOR_SETUP:
1400                 ERR("Unexpect ep0 packets \n");
1401                 break;
1402         default:
1403                 ep0stall(udc);
1404                 break;
1405         }
1406 }
1407
1408 /* Tripwire mechanism to ensure a setup packet payload is extracted without
1409  * being corrupted by another incoming setup packet */
1410 static void tripwire_handler(struct fsl_udc *udc, u8 ep_num, u8 *buffer_ptr)
1411 {
1412         u32 temp;
1413         struct ep_queue_head *qh;
1414
1415         qh = &udc->ep_qh[ep_num * 2 + EP_DIR_OUT];
1416
1417         /* Clear bit in ENDPTSETUPSTAT */
1418         temp = fsl_readl(&dr_regs->endptsetupstat);
1419         fsl_writel(temp | (1 << ep_num), &dr_regs->endptsetupstat);
1420
1421         /* while a hazard exists when setup package arrives */
1422         do {
1423                 /* Set Setup Tripwire */
1424                 temp = fsl_readl(&dr_regs->usbcmd);
1425                 fsl_writel(temp | USB_CMD_SUTW, &dr_regs->usbcmd);
1426
1427                 /* Copy the setup packet to local buffer */
1428                 memcpy(buffer_ptr, (u8 *) qh->setup_buffer, 8);
1429         } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_SUTW));
1430
1431         /* Clear Setup Tripwire */
1432         temp = fsl_readl(&dr_regs->usbcmd);
1433         fsl_writel(temp & ~USB_CMD_SUTW, &dr_regs->usbcmd);
1434 }
1435
1436 /* process-ep_req(): free the completed Tds for this req */
1437 static int process_ep_req(struct fsl_udc *udc, int pipe,
1438                 struct fsl_req *curr_req)
1439 {
1440         struct ep_td_struct *curr_td;
1441         int     td_complete, actual, remaining_length, j, tmp;
1442         int     status = 0;
1443         int     errors = 0;
1444         struct  ep_queue_head *curr_qh = &udc->ep_qh[pipe];
1445         int direction = pipe % 2;
1446
1447         curr_td = curr_req->head;
1448         td_complete = 0;
1449         actual = curr_req->req.length;
1450
1451         for (j = 0; j < curr_req->dtd_count; j++) {
1452                 remaining_length = (le32_to_cpu(curr_td->size_ioc_sts)
1453                                         & DTD_PACKET_SIZE)
1454                                 >> DTD_LENGTH_BIT_POS;
1455                 actual -= remaining_length;
1456
1457                 if ((errors = le32_to_cpu(curr_td->size_ioc_sts) &
1458                                                 DTD_ERROR_MASK)) {
1459                         if (errors & DTD_STATUS_HALTED) {
1460                                 ERR("dTD error %08x QH=%d\n", errors, pipe);
1461                                 /* Clear the errors and Halt condition */
1462                                 tmp = le32_to_cpu(curr_qh->size_ioc_int_sts);
1463                                 tmp &= ~errors;
1464                                 curr_qh->size_ioc_int_sts = cpu_to_le32(tmp);
1465                                 status = -EPIPE;
1466                                 /* FIXME: continue with next queued TD? */
1467
1468                                 break;
1469                         }
1470                         if (errors & DTD_STATUS_DATA_BUFF_ERR) {
1471                                 VDBG("Transfer overflow");
1472                                 status = -EPROTO;
1473                                 break;
1474                         } else if (errors & DTD_STATUS_TRANSACTION_ERR) {
1475                                 VDBG("ISO error");
1476                                 status = -EILSEQ;
1477                                 break;
1478                         } else
1479                                 ERR("Unknown error has occured (0x%x)!\r\n",
1480                                         errors);
1481
1482                 } else if (le32_to_cpu(curr_td->size_ioc_sts)
1483                                 & DTD_STATUS_ACTIVE) {
1484                         VDBG("Request not complete");
1485                         status = REQ_UNCOMPLETE;
1486                         return status;
1487                 } else if (remaining_length) {
1488                         if (direction) {
1489                                 VDBG("Transmit dTD remaining length not zero");
1490                                 status = -EPROTO;
1491                                 break;
1492                         } else {
1493                                 td_complete++;
1494                                 break;
1495                         }
1496                 } else {
1497                         td_complete++;
1498                         VDBG("dTD transmitted successful ");
1499                 }
1500
1501                 if (j != curr_req->dtd_count - 1)
1502                         curr_td = (struct ep_td_struct *)curr_td->next_td_virt;
1503         }
1504
1505         if (status)
1506                 return status;
1507
1508         curr_req->req.actual = actual;
1509
1510         return 0;
1511 }
1512
1513 /* Process a DTD completion interrupt */
1514 static void dtd_complete_irq(struct fsl_udc *udc)
1515 {
1516         u32 bit_pos;
1517         int i, ep_num, direction, bit_mask, status;
1518         struct fsl_ep *curr_ep;
1519         struct fsl_req *curr_req, *temp_req;
1520
1521         /* Clear the bits in the register */
1522         bit_pos = fsl_readl(&dr_regs->endptcomplete);
1523         fsl_writel(bit_pos, &dr_regs->endptcomplete);
1524
1525         if (!bit_pos)
1526                 return;
1527
1528         for (i = 0; i < udc->max_ep * 2; i++) {
1529                 ep_num = i >> 1;
1530                 direction = i % 2;
1531
1532                 bit_mask = 1 << (ep_num + 16 * direction);
1533
1534                 if (!(bit_pos & bit_mask))
1535                         continue;
1536
1537                 curr_ep = get_ep_by_pipe(udc, i);
1538
1539                 /* If the ep is configured */
1540                 if (curr_ep->name == NULL) {
1541                         WARN("Invalid EP?");
1542                         continue;
1543                 }
1544
1545                 /* process the req queue until an uncomplete request */
1546                 list_for_each_entry_safe(curr_req, temp_req, &curr_ep->queue,
1547                                 queue) {
1548                         status = process_ep_req(udc, i, curr_req);
1549
1550                         VDBG("status of process_ep_req= %d, ep = %d",
1551                                         status, ep_num);
1552                         if (status == REQ_UNCOMPLETE)
1553                                 break;
1554                         /* write back status to req */
1555                         curr_req->req.status = status;
1556
1557                         if (ep_num == 0) {
1558                                 ep0_req_complete(udc, curr_ep, curr_req);
1559                                 break;
1560                         } else
1561                                 done(curr_ep, curr_req, status);
1562                 }
1563         }
1564 }
1565
1566 /* Process a port change interrupt */
1567 static void port_change_irq(struct fsl_udc *udc)
1568 {
1569         u32 speed;
1570
1571         if (udc->bus_reset)
1572                 udc->bus_reset = 0;
1573
1574         /* Bus resetting is finished */
1575         if (!(fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET)) {
1576                 /* Get the speed */
1577                 speed = (fsl_readl(&dr_regs->portsc1)
1578                                 & PORTSCX_PORT_SPEED_MASK);
1579                 switch (speed) {
1580                 case PORTSCX_PORT_SPEED_HIGH:
1581                         udc->gadget.speed = USB_SPEED_HIGH;
1582                         break;
1583                 case PORTSCX_PORT_SPEED_FULL:
1584                         udc->gadget.speed = USB_SPEED_FULL;
1585                         break;
1586                 case PORTSCX_PORT_SPEED_LOW:
1587                         udc->gadget.speed = USB_SPEED_LOW;
1588                         break;
1589                 default:
1590                         udc->gadget.speed = USB_SPEED_UNKNOWN;
1591                         break;
1592                 }
1593         }
1594
1595         /* Update USB state */
1596         if (!udc->resume_state)
1597                 udc->usb_state = USB_STATE_DEFAULT;
1598 }
1599
1600 /* Process suspend interrupt */
1601 static void suspend_irq(struct fsl_udc *udc)
1602 {
1603         udc->resume_state = udc->usb_state;
1604         udc->usb_state = USB_STATE_SUSPENDED;
1605
1606         /* report suspend to the driver, serial.c does not support this */
1607         if (udc->driver->suspend)
1608                 udc->driver->suspend(&udc->gadget);
1609 }
1610
1611 static void bus_resume(struct fsl_udc *udc)
1612 {
1613         udc->usb_state = udc->resume_state;
1614         udc->resume_state = 0;
1615
1616         /* report resume to the driver, serial.c does not support this */
1617         if (udc->driver->resume)
1618                 udc->driver->resume(&udc->gadget);
1619 }
1620
1621 /* Clear up all ep queues */
1622 static int reset_queues(struct fsl_udc *udc)
1623 {
1624         u8 pipe;
1625
1626         for (pipe = 0; pipe < udc->max_pipes; pipe++)
1627                 udc_reset_ep_queue(udc, pipe);
1628
1629         /* report disconnect; the driver is already quiesced */
1630         udc->driver->disconnect(&udc->gadget);
1631
1632         return 0;
1633 }
1634
1635 /* Process reset interrupt */
1636 static void reset_irq(struct fsl_udc *udc)
1637 {
1638         u32 temp;
1639         unsigned long timeout;
1640
1641         /* Clear the device address */
1642         temp = fsl_readl(&dr_regs->deviceaddr);
1643         fsl_writel(temp & ~USB_DEVICE_ADDRESS_MASK, &dr_regs->deviceaddr);
1644
1645         udc->device_address = 0;
1646
1647         /* Clear usb state */
1648         udc->resume_state = 0;
1649         udc->ep0_dir = 0;
1650         udc->ep0_state = WAIT_FOR_SETUP;
1651         udc->remote_wakeup = 0; /* default to 0 on reset */
1652         udc->gadget.b_hnp_enable = 0;
1653         udc->gadget.a_hnp_support = 0;
1654         udc->gadget.a_alt_hnp_support = 0;
1655
1656         /* Clear all the setup token semaphores */
1657         temp = fsl_readl(&dr_regs->endptsetupstat);
1658         fsl_writel(temp, &dr_regs->endptsetupstat);
1659
1660         /* Clear all the endpoint complete status bits */
1661         temp = fsl_readl(&dr_regs->endptcomplete);
1662         fsl_writel(temp, &dr_regs->endptcomplete);
1663
1664         timeout = jiffies + 100;
1665         while (fsl_readl(&dr_regs->endpointprime)) {
1666                 /* Wait until all endptprime bits cleared */
1667                 if (time_after(jiffies, timeout)) {
1668                         ERR("Timeout for reset\n");
1669                         break;
1670                 }
1671                 cpu_relax();
1672         }
1673
1674         /* Write 1s to the flush register */
1675         fsl_writel(0xffffffff, &dr_regs->endptflush);
1676
1677         if (fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET) {
1678                 VDBG("Bus reset");
1679                 /* Bus is reseting */
1680                 udc->bus_reset = 1;
1681                 /* Reset all the queues, include XD, dTD, EP queue
1682                  * head and TR Queue */
1683                 reset_queues(udc);
1684                 udc->usb_state = USB_STATE_DEFAULT;
1685         } else {
1686                 VDBG("Controller reset");
1687                 /* initialize usb hw reg except for regs for EP, not
1688                  * touch usbintr reg */
1689                 dr_controller_setup(udc);
1690
1691                 /* Reset all internal used Queues */
1692                 reset_queues(udc);
1693
1694                 ep0_setup(udc);
1695
1696                 /* Enable DR IRQ reg, Set Run bit, change udc state */
1697                 dr_controller_run(udc);
1698                 udc->usb_state = USB_STATE_ATTACHED;
1699         }
1700 }
1701
1702 /*
1703  * USB device controller interrupt handler
1704  */
1705 static irqreturn_t fsl_udc_irq(int irq, void *_udc)
1706 {
1707         struct fsl_udc *udc = _udc;
1708         u32 irq_src;
1709         irqreturn_t status = IRQ_NONE;
1710         unsigned long flags;
1711
1712         /* Disable ISR for OTG host mode */
1713         if (udc->stopped)
1714                 return IRQ_NONE;
1715         spin_lock_irqsave(&udc->lock, flags);
1716         irq_src = fsl_readl(&dr_regs->usbsts) & fsl_readl(&dr_regs->usbintr);
1717         /* Clear notification bits */
1718         fsl_writel(irq_src, &dr_regs->usbsts);
1719
1720         /* VDBG("irq_src [0x%8x]", irq_src); */
1721
1722         /* Need to resume? */
1723         if (udc->usb_state == USB_STATE_SUSPENDED)
1724                 if ((fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_SUSPEND) == 0)
1725                         bus_resume(udc);
1726
1727         /* USB Interrupt */
1728         if (irq_src & USB_STS_INT) {
1729                 VDBG("Packet int");
1730                 /* Setup package, we only support ep0 as control ep */
1731                 if (fsl_readl(&dr_regs->endptsetupstat) & EP_SETUP_STATUS_EP0) {
1732                         tripwire_handler(udc, 0,
1733                                         (u8 *) (&udc->local_setup_buff));
1734                         setup_received_irq(udc, &udc->local_setup_buff);
1735                         status = IRQ_HANDLED;
1736                 }
1737
1738                 /* completion of dtd */
1739                 if (fsl_readl(&dr_regs->endptcomplete)) {
1740                         dtd_complete_irq(udc);
1741                         status = IRQ_HANDLED;
1742                 }
1743         }
1744
1745         /* SOF (for ISO transfer) */
1746         if (irq_src & USB_STS_SOF) {
1747                 status = IRQ_HANDLED;
1748         }
1749
1750         /* Port Change */
1751         if (irq_src & USB_STS_PORT_CHANGE) {
1752                 port_change_irq(udc);
1753                 status = IRQ_HANDLED;
1754         }
1755
1756         /* Reset Received */
1757         if (irq_src & USB_STS_RESET) {
1758                 reset_irq(udc);
1759                 status = IRQ_HANDLED;
1760         }
1761
1762         /* Sleep Enable (Suspend) */
1763         if (irq_src & USB_STS_SUSPEND) {
1764                 suspend_irq(udc);
1765                 status = IRQ_HANDLED;
1766         }
1767
1768         if (irq_src & (USB_STS_ERR | USB_STS_SYS_ERR)) {
1769                 VDBG("Error IRQ %x ", irq_src);
1770         }
1771
1772         spin_unlock_irqrestore(&udc->lock, flags);
1773         return status;
1774 }
1775
1776 /*----------------------------------------------------------------*
1777  * Hook to gadget drivers
1778  * Called by initialization code of gadget drivers
1779 *----------------------------------------------------------------*/
1780 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1781 {
1782         int retval = -ENODEV;
1783         unsigned long flags = 0;
1784
1785         if (!udc_controller)
1786                 return -ENODEV;
1787
1788         if (!driver || (driver->speed != USB_SPEED_FULL
1789                                 && driver->speed != USB_SPEED_HIGH)
1790                         || !driver->bind || !driver->disconnect
1791                         || !driver->setup)
1792                 return -EINVAL;
1793
1794         if (udc_controller->driver)
1795                 return -EBUSY;
1796
1797         /* lock is needed but whether should use this lock or another */
1798         spin_lock_irqsave(&udc_controller->lock, flags);
1799
1800         driver->driver.bus = 0;
1801         /* hook up the driver */
1802         udc_controller->driver = driver;
1803         udc_controller->gadget.dev.driver = &driver->driver;
1804         spin_unlock_irqrestore(&udc_controller->lock, flags);
1805
1806         /* bind udc driver to gadget driver */
1807         retval = driver->bind(&udc_controller->gadget);
1808         if (retval) {
1809                 VDBG("bind to %s --> %d", driver->driver.name, retval);
1810                 udc_controller->gadget.dev.driver = 0;
1811                 udc_controller->driver = 0;
1812                 goto out;
1813         }
1814
1815         /* Enable DR IRQ reg and Set usbcmd reg  Run bit */
1816         dr_controller_run(udc_controller);
1817         udc_controller->usb_state = USB_STATE_ATTACHED;
1818         udc_controller->ep0_state = WAIT_FOR_SETUP;
1819         udc_controller->ep0_dir = 0;
1820         printk(KERN_INFO "%s: bind to driver %s \n",
1821                         udc_controller->gadget.name, driver->driver.name);
1822
1823 out:
1824         if (retval)
1825                 printk("retval %d \n", retval);
1826         return retval;
1827 }
1828 EXPORT_SYMBOL(usb_gadget_register_driver);
1829
1830 /* Disconnect from gadget driver */
1831 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1832 {
1833         struct fsl_ep *loop_ep;
1834         unsigned long flags;
1835
1836         if (!udc_controller)
1837                 return -ENODEV;
1838
1839         if (!driver || driver != udc_controller->driver || !driver->unbind)
1840                 return -EINVAL;
1841
1842         if (udc_controller->transceiver)
1843                 (void)otg_set_peripheral(udc_controller->transceiver, 0);
1844
1845         /* stop DR, disable intr */
1846         dr_controller_stop(udc_controller);
1847
1848         /* in fact, no needed */
1849         udc_controller->usb_state = USB_STATE_ATTACHED;
1850         udc_controller->ep0_state = WAIT_FOR_SETUP;
1851         udc_controller->ep0_dir = 0;
1852
1853         /* stand operation */
1854         spin_lock_irqsave(&udc_controller->lock, flags);
1855         udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
1856         nuke(&udc_controller->eps[0], -ESHUTDOWN);
1857         list_for_each_entry(loop_ep, &udc_controller->gadget.ep_list,
1858                         ep.ep_list)
1859                 nuke(loop_ep, -ESHUTDOWN);
1860         spin_unlock_irqrestore(&udc_controller->lock, flags);
1861
1862         /* unbind gadget and unhook driver. */
1863         driver->unbind(&udc_controller->gadget);
1864         udc_controller->gadget.dev.driver = 0;
1865         udc_controller->driver = 0;
1866
1867         printk("unregistered gadget driver '%s'\r\n", driver->driver.name);
1868         return 0;
1869 }
1870 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1871
1872 /*-------------------------------------------------------------------------
1873                 PROC File System Support
1874 -------------------------------------------------------------------------*/
1875 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
1876
1877 #include <linux/seq_file.h>
1878
1879 static const char proc_filename[] = "driver/fsl_usb2_udc";
1880
1881 static int fsl_proc_read(char *page, char **start, off_t off, int count,
1882                 int *eof, void *_dev)
1883 {
1884         char *buf = page;
1885         char *next = buf;
1886         unsigned size = count;
1887         unsigned long flags;
1888         int t, i;
1889         u32 tmp_reg;
1890         struct fsl_ep *ep = NULL;
1891         struct fsl_req *req;
1892
1893         struct fsl_udc *udc = udc_controller;
1894         if (off != 0)
1895                 return 0;
1896
1897         spin_lock_irqsave(&udc->lock, flags);
1898
1899         /* ------basic driver infomation ---- */
1900         t = scnprintf(next, size,
1901                         DRIVER_DESC "\n"
1902                         "%s version: %s\n"
1903                         "Gadget driver: %s\n\n",
1904                         driver_name, DRIVER_VERSION,
1905                         udc->driver ? udc->driver->driver.name : "(none)");
1906         size -= t;
1907         next += t;
1908
1909         /* ------ DR Registers ----- */
1910         tmp_reg = fsl_readl(&dr_regs->usbcmd);
1911         t = scnprintf(next, size,
1912                         "USBCMD reg:\n"
1913                         "SetupTW: %d\n"
1914                         "Run/Stop: %s\n\n",
1915                         (tmp_reg & USB_CMD_SUTW) ? 1 : 0,
1916                         (tmp_reg & USB_CMD_RUN_STOP) ? "Run" : "Stop");
1917         size -= t;
1918         next += t;
1919
1920         tmp_reg = fsl_readl(&dr_regs->usbsts);
1921         t = scnprintf(next, size,
1922                         "USB Status Reg:\n"
1923                         "Dr Suspend: %d" "Reset Received: %d" "System Error: %s"
1924                         "USB Error Interrupt: %s\n\n",
1925                         (tmp_reg & USB_STS_SUSPEND) ? 1 : 0,
1926                         (tmp_reg & USB_STS_RESET) ? 1 : 0,
1927                         (tmp_reg & USB_STS_SYS_ERR) ? "Err" : "Normal",
1928                         (tmp_reg & USB_STS_ERR) ? "Err detected" : "No err");
1929         size -= t;
1930         next += t;
1931
1932         tmp_reg = fsl_readl(&dr_regs->usbintr);
1933         t = scnprintf(next, size,
1934                         "USB Intrrupt Enable Reg:\n"
1935                         "Sleep Enable: %d" "SOF Received Enable: %d"
1936                         "Reset Enable: %d\n"
1937                         "System Error Enable: %d"
1938                         "Port Change Dectected Enable: %d\n"
1939                         "USB Error Intr Enable: %d" "USB Intr Enable: %d\n\n",
1940                         (tmp_reg & USB_INTR_DEVICE_SUSPEND) ? 1 : 0,
1941                         (tmp_reg & USB_INTR_SOF_EN) ? 1 : 0,
1942                         (tmp_reg & USB_INTR_RESET_EN) ? 1 : 0,
1943                         (tmp_reg & USB_INTR_SYS_ERR_EN) ? 1 : 0,
1944                         (tmp_reg & USB_INTR_PTC_DETECT_EN) ? 1 : 0,
1945                         (tmp_reg & USB_INTR_ERR_INT_EN) ? 1 : 0,
1946                         (tmp_reg & USB_INTR_INT_EN) ? 1 : 0);
1947         size -= t;
1948         next += t;
1949
1950         tmp_reg = fsl_readl(&dr_regs->frindex);
1951         t = scnprintf(next, size,
1952                         "USB Frame Index Reg:" "Frame Number is 0x%x\n\n",
1953                         (tmp_reg & USB_FRINDEX_MASKS));
1954         size -= t;
1955         next += t;
1956
1957         tmp_reg = fsl_readl(&dr_regs->deviceaddr);
1958         t = scnprintf(next, size,
1959                         "USB Device Address Reg:" "Device Addr is 0x%x\n\n",
1960                         (tmp_reg & USB_DEVICE_ADDRESS_MASK));
1961         size -= t;
1962         next += t;
1963
1964         tmp_reg = fsl_readl(&dr_regs->endpointlistaddr);
1965         t = scnprintf(next, size,
1966                         "USB Endpoint List Address Reg:"
1967                         "Device Addr is 0x%x\n\n",
1968                         (tmp_reg & USB_EP_LIST_ADDRESS_MASK));
1969         size -= t;
1970         next += t;
1971
1972         tmp_reg = fsl_readl(&dr_regs->portsc1);
1973         t = scnprintf(next, size,
1974                 "USB Port Status&Control Reg:\n"
1975                 "Port Transceiver Type : %s" "Port Speed: %s \n"
1976                 "PHY Low Power Suspend: %s" "Port Reset: %s"
1977                 "Port Suspend Mode: %s \n" "Over-current Change: %s"
1978                 "Port Enable/Disable Change: %s\n"
1979                 "Port Enabled/Disabled: %s"
1980                 "Current Connect Status: %s\n\n", ( {
1981                         char *s;
1982                         switch (tmp_reg & PORTSCX_PTS_FSLS) {
1983                         case PORTSCX_PTS_UTMI:
1984                                 s = "UTMI"; break;
1985                         case PORTSCX_PTS_ULPI:
1986                                 s = "ULPI "; break;
1987                         case PORTSCX_PTS_FSLS:
1988                                 s = "FS/LS Serial"; break;
1989                         default:
1990                                 s = "None"; break;
1991                         }
1992                         s;} ), ( {
1993                         char *s;
1994                         switch (tmp_reg & PORTSCX_PORT_SPEED_UNDEF) {
1995                         case PORTSCX_PORT_SPEED_FULL:
1996                                 s = "Full Speed"; break;
1997                         case PORTSCX_PORT_SPEED_LOW:
1998                                 s = "Low Speed"; break;
1999                         case PORTSCX_PORT_SPEED_HIGH:
2000                                 s = "High Speed"; break;
2001                         default:
2002                                 s = "Undefined"; break;
2003                         }
2004                         s;
2005                 } ),
2006                 (tmp_reg & PORTSCX_PHY_LOW_POWER_SPD) ?
2007                 "Normal PHY mode" : "Low power mode",
2008                 (tmp_reg & PORTSCX_PORT_RESET) ? "In Reset" :
2009                 "Not in Reset",
2010                 (tmp_reg & PORTSCX_PORT_SUSPEND) ? "In " : "Not in",
2011                 (tmp_reg & PORTSCX_OVER_CURRENT_CHG) ? "Dected" :
2012                 "No",
2013                 (tmp_reg & PORTSCX_PORT_EN_DIS_CHANGE) ? "Disable" :
2014                 "Not change",
2015                 (tmp_reg & PORTSCX_PORT_ENABLE) ? "Enable" :
2016                 "Not correct",
2017                 (tmp_reg & PORTSCX_CURRENT_CONNECT_STATUS) ?
2018                 "Attached" : "Not-Att");
2019         size -= t;
2020         next += t;
2021
2022         tmp_reg = fsl_readl(&dr_regs->usbmode);
2023         t = scnprintf(next, size,
2024                         "USB Mode Reg:" "Controller Mode is : %s\n\n", ( {
2025                                 char *s;
2026                                 switch (tmp_reg & USB_MODE_CTRL_MODE_HOST) {
2027                                 case USB_MODE_CTRL_MODE_IDLE:
2028                                         s = "Idle"; break;
2029                                 case USB_MODE_CTRL_MODE_DEVICE:
2030                                         s = "Device Controller"; break;
2031                                 case USB_MODE_CTRL_MODE_HOST:
2032                                         s = "Host Controller"; break;
2033                                 default:
2034                                         s = "None"; break;
2035                                 }
2036                                 s;
2037                         } ));
2038         size -= t;
2039         next += t;
2040
2041         tmp_reg = fsl_readl(&dr_regs->endptsetupstat);
2042         t = scnprintf(next, size,
2043                         "Endpoint Setup Status Reg:" "SETUP on ep 0x%x\n\n",
2044                         (tmp_reg & EP_SETUP_STATUS_MASK));
2045         size -= t;
2046         next += t;
2047
2048         for (i = 0; i < udc->max_ep / 2; i++) {
2049                 tmp_reg = fsl_readl(&dr_regs->endptctrl[i]);
2050                 t = scnprintf(next, size, "EP Ctrl Reg [0x%x]: = [0x%x]\n",
2051                                 i, tmp_reg);
2052                 size -= t;
2053                 next += t;
2054         }
2055         tmp_reg = fsl_readl(&dr_regs->endpointprime);
2056         t = scnprintf(next, size, "EP Prime Reg = [0x%x]\n", tmp_reg);
2057         size -= t;
2058         next += t;
2059
2060         tmp_reg = usb_sys_regs->snoop1;
2061         t = scnprintf(next, size, "\nSnoop1 Reg : = [0x%x]\n\n", tmp_reg);
2062         size -= t;
2063         next += t;
2064
2065         tmp_reg = usb_sys_regs->control;
2066         t = scnprintf(next, size, "General Control Reg : = [0x%x]\n\n",
2067                         tmp_reg);
2068         size -= t;
2069         next += t;
2070
2071         /* ------fsl_udc, fsl_ep, fsl_request structure information ----- */
2072         ep = &udc->eps[0];
2073         t = scnprintf(next, size, "For %s Maxpkt is 0x%x index is 0x%x\n",
2074                         ep->ep.name, ep_maxpacket(ep), ep_index(ep));
2075         size -= t;
2076         next += t;
2077
2078         if (list_empty(&ep->queue)) {
2079                 t = scnprintf(next, size, "its req queue is empty\n\n");
2080                 size -= t;
2081                 next += t;
2082         } else {
2083                 list_for_each_entry(req, &ep->queue, queue) {
2084                         t = scnprintf(next, size,
2085                                 "req %p actual 0x%x length 0x%x  buf %p\n",
2086                                 &req->req, req->req.actual,
2087                                 req->req.length, req->req.buf);
2088                         size -= t;
2089                         next += t;
2090                 }
2091         }
2092         /* other gadget->eplist ep */
2093         list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2094                 if (ep->desc) {
2095                         t = scnprintf(next, size,
2096                                         "\nFor %s Maxpkt is 0x%x "
2097                                         "index is 0x%x\n",
2098                                         ep->ep.name, ep_maxpacket(ep),
2099                                         ep_index(ep));
2100                         size -= t;
2101                         next += t;
2102
2103                         if (list_empty(&ep->queue)) {
2104                                 t = scnprintf(next, size,
2105                                                 "its req queue is empty\n\n");
2106                                 size -= t;
2107                                 next += t;
2108                         } else {
2109                                 list_for_each_entry(req, &ep->queue, queue) {
2110                                         t = scnprintf(next, size,
2111                                                 "req %p actual 0x%x length"
2112                                                 "0x%x  buf %p\n",
2113                                                 &req->req, req->req.actual,
2114                                                 req->req.length, req->req.buf);
2115                                         size -= t;
2116                                         next += t;
2117                                         }       /* end for each_entry of ep req */
2118                                 }       /* end for else */
2119                         }       /* end for if(ep->queue) */
2120                 }               /* end (ep->desc) */
2121
2122         spin_unlock_irqrestore(&udc->lock, flags);
2123
2124         *eof = 1;
2125         return count - size;
2126 }
2127
2128 #define create_proc_file()      create_proc_read_entry(proc_filename, \
2129                                 0, NULL, fsl_proc_read, NULL)
2130
2131 #define remove_proc_file()      remove_proc_entry(proc_filename, NULL)
2132
2133 #else                           /* !CONFIG_USB_GADGET_DEBUG_FILES */
2134
2135 #define create_proc_file()      do {} while (0)
2136 #define remove_proc_file()      do {} while (0)
2137
2138 #endif                          /* CONFIG_USB_GADGET_DEBUG_FILES */
2139
2140 /*-------------------------------------------------------------------------*/
2141
2142 /* Release udc structures */
2143 static void fsl_udc_release(struct device *dev)
2144 {
2145         complete(udc_controller->done);
2146         dma_free_coherent(dev, udc_controller->ep_qh_size,
2147                         udc_controller->ep_qh, udc_controller->ep_qh_dma);
2148         kfree(udc_controller);
2149 }
2150
2151 /******************************************************************
2152         Internal structure setup functions
2153 *******************************************************************/
2154 /*------------------------------------------------------------------
2155  * init resource for globle controller
2156  * Return the udc handle on success or NULL on failure
2157  ------------------------------------------------------------------*/
2158 static int __init struct_udc_setup(struct fsl_udc *udc,
2159                 struct platform_device *pdev)
2160 {
2161         struct fsl_usb2_platform_data *pdata;
2162         size_t size;
2163
2164         pdata = pdev->dev.platform_data;
2165         udc->phy_mode = pdata->phy_mode;
2166
2167         udc->eps = kzalloc(sizeof(struct fsl_ep) * udc->max_ep, GFP_KERNEL);
2168         if (!udc->eps) {
2169                 ERR("malloc fsl_ep failed\n");
2170                 return -1;
2171         }
2172
2173         /* initialized QHs, take care of alignment */
2174         size = udc->max_ep * sizeof(struct ep_queue_head);
2175         if (size < QH_ALIGNMENT)
2176                 size = QH_ALIGNMENT;
2177         else if ((size % QH_ALIGNMENT) != 0) {
2178                 size += QH_ALIGNMENT + 1;
2179                 size &= ~(QH_ALIGNMENT - 1);
2180         }
2181         udc->ep_qh = dma_alloc_coherent(&pdev->dev, size,
2182                                         &udc->ep_qh_dma, GFP_KERNEL);
2183         if (!udc->ep_qh) {
2184                 ERR("malloc QHs for udc failed\n");
2185                 kfree(udc->eps);
2186                 return -1;
2187         }
2188
2189         udc->ep_qh_size = size;
2190
2191         /* Initialize ep0 status request structure */
2192         /* FIXME: fsl_alloc_request() ignores ep argument */
2193         udc->status_req = container_of(fsl_alloc_request(NULL, GFP_KERNEL),
2194                         struct fsl_req, req);
2195         /* allocate a small amount of memory to get valid address */
2196         udc->status_req->req.buf = kmalloc(8, GFP_KERNEL);
2197         udc->status_req->req.dma = virt_to_phys(udc->status_req->req.buf);
2198
2199         udc->resume_state = USB_STATE_NOTATTACHED;
2200         udc->usb_state = USB_STATE_POWERED;
2201         udc->ep0_dir = 0;
2202         udc->remote_wakeup = 0; /* default to 0 on reset */
2203         spin_lock_init(&udc->lock);
2204
2205         return 0;
2206 }
2207
2208 /*----------------------------------------------------------------
2209  * Setup the fsl_ep struct for eps
2210  * Link fsl_ep->ep to gadget->ep_list
2211  * ep0out is not used so do nothing here
2212  * ep0in should be taken care
2213  *--------------------------------------------------------------*/
2214 static int __init struct_ep_setup(struct fsl_udc *udc, unsigned char index,
2215                 char *name, int link)
2216 {
2217         struct fsl_ep *ep = &udc->eps[index];
2218
2219         ep->udc = udc;
2220         strcpy(ep->name, name);
2221         ep->ep.name = ep->name;
2222
2223         ep->ep.ops = &fsl_ep_ops;
2224         ep->stopped = 0;
2225
2226         /* for ep0: maxP defined in desc
2227          * for other eps, maxP is set by epautoconfig() called by gadget layer
2228          */
2229         ep->ep.maxpacket = (unsigned short) ~0;
2230
2231         /* the queue lists any req for this ep */
2232         INIT_LIST_HEAD(&ep->queue);
2233
2234         /* gagdet.ep_list used for ep_autoconfig so no ep0 */
2235         if (link)
2236                 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2237         ep->gadget = &udc->gadget;
2238         ep->qh = &udc->ep_qh[index];
2239
2240         return 0;
2241 }
2242
2243 /* Driver probe function
2244  * all intialization operations implemented here except enabling usb_intr reg
2245  * board setup should have been done in the platform code
2246  */
2247 static int __init fsl_udc_probe(struct platform_device *pdev)
2248 {
2249         struct resource *res;
2250         int ret = -ENODEV;
2251         unsigned int i;
2252         u32 dccparams;
2253
2254         if (strcmp(pdev->name, driver_name)) {
2255                 VDBG("Wrong device\n");
2256                 return -ENODEV;
2257         }
2258
2259         udc_controller = kzalloc(sizeof(struct fsl_udc), GFP_KERNEL);
2260         if (udc_controller == NULL) {
2261                 ERR("malloc udc failed\n");
2262                 return -ENOMEM;
2263         }
2264
2265         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2266         if (!res) {
2267                 kfree(udc_controller);
2268                 return -ENXIO;
2269         }
2270
2271         if (!request_mem_region(res->start, res->end - res->start + 1,
2272                                 driver_name)) {
2273                 ERR("request mem region for %s failed \n", pdev->name);
2274                 kfree(udc_controller);
2275                 return -EBUSY;
2276         }
2277
2278         dr_regs = ioremap(res->start, res->end - res->start + 1);
2279         if (!dr_regs) {
2280                 ret = -ENOMEM;
2281                 goto err1;
2282         }
2283
2284         usb_sys_regs = (struct usb_sys_interface *)
2285                         ((u32)dr_regs + USB_DR_SYS_OFFSET);
2286
2287         /* Read Device Controller Capability Parameters register */
2288         dccparams = fsl_readl(&dr_regs->dccparams);
2289         if (!(dccparams & DCCPARAMS_DC)) {
2290                 ERR("This SOC doesn't support device role\n");
2291                 ret = -ENODEV;
2292                 goto err2;
2293         }
2294         /* Get max device endpoints */
2295         /* DEN is bidirectional ep number, max_ep doubles the number */
2296         udc_controller->max_ep = (dccparams & DCCPARAMS_DEN_MASK) * 2;
2297
2298         udc_controller->irq = platform_get_irq(pdev, 0);
2299         if (!udc_controller->irq) {
2300                 ret = -ENODEV;
2301                 goto err2;
2302         }
2303
2304         ret = request_irq(udc_controller->irq, fsl_udc_irq, IRQF_SHARED,
2305                         driver_name, udc_controller);
2306         if (ret != 0) {
2307                 ERR("cannot request irq %d err %d \n",
2308                                 udc_controller->irq, ret);
2309                 goto err2;
2310         }
2311
2312         /* Initialize the udc structure including QH member and other member */
2313         if (struct_udc_setup(udc_controller, pdev)) {
2314                 ERR("Can't initialize udc data structure\n");
2315                 ret = -ENOMEM;
2316                 goto err3;
2317         }
2318
2319         /* initialize usb hw reg except for regs for EP,
2320          * leave usbintr reg untouched */
2321         dr_controller_setup(udc_controller);
2322
2323         /* Setup gadget structure */
2324         udc_controller->gadget.ops = &fsl_gadget_ops;
2325         udc_controller->gadget.is_dualspeed = 1;
2326         udc_controller->gadget.ep0 = &udc_controller->eps[0].ep;
2327         INIT_LIST_HEAD(&udc_controller->gadget.ep_list);
2328         udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
2329         udc_controller->gadget.name = driver_name;
2330
2331         /* Setup gadget.dev and register with kernel */
2332         strcpy(udc_controller->gadget.dev.bus_id, "gadget");
2333         udc_controller->gadget.dev.release = fsl_udc_release;
2334         udc_controller->gadget.dev.parent = &pdev->dev;
2335         ret = device_register(&udc_controller->gadget.dev);
2336         if (ret < 0)
2337                 goto err3;
2338
2339         /* setup QH and epctrl for ep0 */
2340         ep0_setup(udc_controller);
2341
2342         /* setup udc->eps[] for ep0 */
2343         struct_ep_setup(udc_controller, 0, "ep0", 0);
2344         /* for ep0: the desc defined here;
2345          * for other eps, gadget layer called ep_enable with defined desc
2346          */
2347         udc_controller->eps[0].desc = &fsl_ep0_desc;
2348         udc_controller->eps[0].ep.maxpacket = USB_MAX_CTRL_PAYLOAD;
2349
2350         /* setup the udc->eps[] for non-control endpoints and link
2351          * to gadget.ep_list */
2352         for (i = 1; i < (int)(udc_controller->max_ep / 2); i++) {
2353                 char name[14];
2354
2355                 sprintf(name, "ep%dout", i);
2356                 struct_ep_setup(udc_controller, i * 2, name, 1);
2357                 sprintf(name, "ep%din", i);
2358                 struct_ep_setup(udc_controller, i * 2 + 1, name, 1);
2359         }
2360
2361         /* use dma_pool for TD management */
2362         udc_controller->td_pool = dma_pool_create("udc_td", &pdev->dev,
2363                         sizeof(struct ep_td_struct),
2364                         DTD_ALIGNMENT, UDC_DMA_BOUNDARY);
2365         if (udc_controller->td_pool == NULL) {
2366                 ret = -ENOMEM;
2367                 goto err4;
2368         }
2369         create_proc_file();
2370         return 0;
2371
2372 err4:
2373         device_unregister(&udc_controller->gadget.dev);
2374 err3:
2375         free_irq(udc_controller->irq, udc_controller);
2376 err2:
2377         iounmap(dr_regs);
2378 err1:
2379         release_mem_region(res->start, res->end - res->start + 1);
2380         kfree(udc_controller);
2381         return ret;
2382 }
2383
2384 /* Driver removal function
2385  * Free resources and finish pending transactions
2386  */
2387 static int __exit fsl_udc_remove(struct platform_device *pdev)
2388 {
2389         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2390
2391         DECLARE_COMPLETION(done);
2392
2393         if (!udc_controller)
2394                 return -ENODEV;
2395         udc_controller->done = &done;
2396
2397         /* DR has been stopped in usb_gadget_unregister_driver() */
2398         remove_proc_file();
2399
2400         /* Free allocated memory */
2401         kfree(udc_controller->status_req->req.buf);
2402         kfree(udc_controller->status_req);
2403         kfree(udc_controller->eps);
2404
2405         dma_pool_destroy(udc_controller->td_pool);
2406         free_irq(udc_controller->irq, udc_controller);
2407         iounmap(dr_regs);
2408         release_mem_region(res->start, res->end - res->start + 1);
2409
2410         device_unregister(&udc_controller->gadget.dev);
2411         /* free udc --wait for the release() finished */
2412         wait_for_completion(&done);
2413
2414         return 0;
2415 }
2416
2417 /*-----------------------------------------------------------------
2418  * Modify Power management attributes
2419  * Used by OTG statemachine to disable gadget temporarily
2420  -----------------------------------------------------------------*/
2421 static int fsl_udc_suspend(struct platform_device *pdev, pm_message_t state)
2422 {
2423         dr_controller_stop(udc_controller);
2424         return 0;
2425 }
2426
2427 /*-----------------------------------------------------------------
2428  * Invoked on USB resume. May be called in_interrupt.
2429  * Here we start the DR controller and enable the irq
2430  *-----------------------------------------------------------------*/
2431 static int fsl_udc_resume(struct platform_device *pdev)
2432 {
2433         /* Enable DR irq reg and set controller Run */
2434         if (udc_controller->stopped) {
2435                 dr_controller_setup(udc_controller);
2436                 dr_controller_run(udc_controller);
2437         }
2438         udc_controller->usb_state = USB_STATE_ATTACHED;
2439         udc_controller->ep0_state = WAIT_FOR_SETUP;
2440         udc_controller->ep0_dir = 0;
2441         return 0;
2442 }
2443
2444 /*-------------------------------------------------------------------------
2445         Register entry point for the peripheral controller driver
2446 --------------------------------------------------------------------------*/
2447
2448 static struct platform_driver udc_driver = {
2449         .remove  = __exit_p(fsl_udc_remove),
2450         /* these suspend and resume are not usb suspend and resume */
2451         .suspend = fsl_udc_suspend,
2452         .resume  = fsl_udc_resume,
2453         .driver  = {
2454                 .name = (char *)driver_name,
2455                 .owner = THIS_MODULE,
2456         },
2457 };
2458
2459 static int __init udc_init(void)
2460 {
2461         printk(KERN_INFO "%s (%s)\n", driver_desc, DRIVER_VERSION);
2462         return platform_driver_probe(&udc_driver, fsl_udc_probe);
2463 }
2464
2465 module_init(udc_init);
2466
2467 static void __exit udc_exit(void)
2468 {
2469         platform_driver_unregister(&udc_driver);
2470         printk("%s unregistered \n", driver_desc);
2471 }
2472
2473 module_exit(udc_exit);
2474
2475 MODULE_DESCRIPTION(DRIVER_DESC);
2476 MODULE_AUTHOR(DRIVER_AUTHOR);
2477 MODULE_LICENSE("GPL");