Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
[linux-2.6.git] / drivers / usb / gadget / fsl_udc_core.c
1 /*
2  * Copyright (C) 2004-2007 Freescale Semicondutor, Inc. All rights reserved.
3  *
4  * Author: Li Yang <leoli@freescale.com>
5  *         Jiang Bo <tanya.jiang@freescale.com>
6  *
7  * Description:
8  * Freescale high-speed USB SOC DR module device controller driver.
9  * This can be found on MPC8349E/MPC8313E cpus.
10  * The driver is previously named as mpc_udc.  Based on bare board
11  * code from Dave Liu and Shlomi Gridish.
12  *
13  * This program is free software; you can redistribute  it and/or modify it
14  * under  the terms of  the GNU General  Public License as published by the
15  * Free Software Foundation;  either version 2 of the  License, or (at your
16  * option) any later version.
17  */
18
19 #undef VERBOSE
20
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/ioport.h>
24 #include <linux/types.h>
25 #include <linux/errno.h>
26 #include <linux/slab.h>
27 #include <linux/init.h>
28 #include <linux/list.h>
29 #include <linux/interrupt.h>
30 #include <linux/proc_fs.h>
31 #include <linux/mm.h>
32 #include <linux/moduleparam.h>
33 #include <linux/device.h>
34 #include <linux/usb/ch9.h>
35 #include <linux/usb/gadget.h>
36 #include <linux/usb/otg.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/platform_device.h>
39 #include <linux/fsl_devices.h>
40 #include <linux/dmapool.h>
41 #include <linux/delay.h>
42
43 #include <asm/byteorder.h>
44 #include <asm/io.h>
45 #include <asm/system.h>
46 #include <asm/unaligned.h>
47 #include <asm/dma.h>
48
49 #include "fsl_usb2_udc.h"
50
51 #define DRIVER_DESC     "Freescale High-Speed USB SOC Device Controller driver"
52 #define DRIVER_AUTHOR   "Li Yang/Jiang Bo"
53 #define DRIVER_VERSION  "Apr 20, 2007"
54
55 #define DMA_ADDR_INVALID        (~(dma_addr_t)0)
56
57 static const char driver_name[] = "fsl-usb2-udc";
58 static const char driver_desc[] = DRIVER_DESC;
59
60 static struct usb_dr_device *dr_regs;
61 #ifndef CONFIG_ARCH_MXC
62 static struct usb_sys_interface *usb_sys_regs;
63 #endif
64
65 /* it is initialized in probe()  */
66 static struct fsl_udc *udc_controller = NULL;
67
68 static const struct usb_endpoint_descriptor
69 fsl_ep0_desc = {
70         .bLength =              USB_DT_ENDPOINT_SIZE,
71         .bDescriptorType =      USB_DT_ENDPOINT,
72         .bEndpointAddress =     0,
73         .bmAttributes =         USB_ENDPOINT_XFER_CONTROL,
74         .wMaxPacketSize =       USB_MAX_CTRL_PAYLOAD,
75 };
76
77 static void fsl_ep_fifo_flush(struct usb_ep *_ep);
78
79 #ifdef CONFIG_PPC32
80 #define fsl_readl(addr)         in_le32(addr)
81 #define fsl_writel(val32, addr) out_le32(addr, val32)
82 #else
83 #define fsl_readl(addr)         readl(addr)
84 #define fsl_writel(val32, addr) writel(val32, addr)
85 #endif
86
87 /********************************************************************
88  *      Internal Used Function
89 ********************************************************************/
90 /*-----------------------------------------------------------------
91  * done() - retire a request; caller blocked irqs
92  * @status : request status to be set, only works when
93  *      request is still in progress.
94  *--------------------------------------------------------------*/
95 static void done(struct fsl_ep *ep, struct fsl_req *req, int status)
96 {
97         struct fsl_udc *udc = NULL;
98         unsigned char stopped = ep->stopped;
99         struct ep_td_struct *curr_td, *next_td;
100         int j;
101
102         udc = (struct fsl_udc *)ep->udc;
103         /* Removed the req from fsl_ep->queue */
104         list_del_init(&req->queue);
105
106         /* req.status should be set as -EINPROGRESS in ep_queue() */
107         if (req->req.status == -EINPROGRESS)
108                 req->req.status = status;
109         else
110                 status = req->req.status;
111
112         /* Free dtd for the request */
113         next_td = req->head;
114         for (j = 0; j < req->dtd_count; j++) {
115                 curr_td = next_td;
116                 if (j != req->dtd_count - 1) {
117                         next_td = curr_td->next_td_virt;
118                 }
119                 dma_pool_free(udc->td_pool, curr_td, curr_td->td_dma);
120         }
121
122         if (req->mapped) {
123                 dma_unmap_single(ep->udc->gadget.dev.parent,
124                         req->req.dma, req->req.length,
125                         ep_is_in(ep)
126                                 ? DMA_TO_DEVICE
127                                 : DMA_FROM_DEVICE);
128                 req->req.dma = DMA_ADDR_INVALID;
129                 req->mapped = 0;
130         } else
131                 dma_sync_single_for_cpu(ep->udc->gadget.dev.parent,
132                         req->req.dma, req->req.length,
133                         ep_is_in(ep)
134                                 ? DMA_TO_DEVICE
135                                 : DMA_FROM_DEVICE);
136
137         if (status && (status != -ESHUTDOWN))
138                 VDBG("complete %s req %p stat %d len %u/%u",
139                         ep->ep.name, &req->req, status,
140                         req->req.actual, req->req.length);
141
142         ep->stopped = 1;
143
144         spin_unlock(&ep->udc->lock);
145         /* complete() is from gadget layer,
146          * eg fsg->bulk_in_complete() */
147         if (req->req.complete)
148                 req->req.complete(&ep->ep, &req->req);
149
150         spin_lock(&ep->udc->lock);
151         ep->stopped = stopped;
152 }
153
154 /*-----------------------------------------------------------------
155  * nuke(): delete all requests related to this ep
156  * called with spinlock held
157  *--------------------------------------------------------------*/
158 static void nuke(struct fsl_ep *ep, int status)
159 {
160         ep->stopped = 1;
161
162         /* Flush fifo */
163         fsl_ep_fifo_flush(&ep->ep);
164
165         /* Whether this eq has request linked */
166         while (!list_empty(&ep->queue)) {
167                 struct fsl_req *req = NULL;
168
169                 req = list_entry(ep->queue.next, struct fsl_req, queue);
170                 done(ep, req, status);
171         }
172 }
173
174 /*------------------------------------------------------------------
175         Internal Hardware related function
176  ------------------------------------------------------------------*/
177
178 static int dr_controller_setup(struct fsl_udc *udc)
179 {
180         unsigned int tmp, portctrl;
181 #ifndef CONFIG_ARCH_MXC
182         unsigned int ctrl;
183 #endif
184         unsigned long timeout;
185 #define FSL_UDC_RESET_TIMEOUT 1000
186
187         /* Config PHY interface */
188         portctrl = fsl_readl(&dr_regs->portsc1);
189         portctrl &= ~(PORTSCX_PHY_TYPE_SEL | PORTSCX_PORT_WIDTH);
190         switch (udc->phy_mode) {
191         case FSL_USB2_PHY_ULPI:
192                 portctrl |= PORTSCX_PTS_ULPI;
193                 break;
194         case FSL_USB2_PHY_UTMI_WIDE:
195                 portctrl |= PORTSCX_PTW_16BIT;
196                 /* fall through */
197         case FSL_USB2_PHY_UTMI:
198                 portctrl |= PORTSCX_PTS_UTMI;
199                 break;
200         case FSL_USB2_PHY_SERIAL:
201                 portctrl |= PORTSCX_PTS_FSLS;
202                 break;
203         default:
204                 return -EINVAL;
205         }
206         fsl_writel(portctrl, &dr_regs->portsc1);
207
208         /* Stop and reset the usb controller */
209         tmp = fsl_readl(&dr_regs->usbcmd);
210         tmp &= ~USB_CMD_RUN_STOP;
211         fsl_writel(tmp, &dr_regs->usbcmd);
212
213         tmp = fsl_readl(&dr_regs->usbcmd);
214         tmp |= USB_CMD_CTRL_RESET;
215         fsl_writel(tmp, &dr_regs->usbcmd);
216
217         /* Wait for reset to complete */
218         timeout = jiffies + FSL_UDC_RESET_TIMEOUT;
219         while (fsl_readl(&dr_regs->usbcmd) & USB_CMD_CTRL_RESET) {
220                 if (time_after(jiffies, timeout)) {
221                         ERR("udc reset timeout!\n");
222                         return -ETIMEDOUT;
223                 }
224                 cpu_relax();
225         }
226
227         /* Set the controller as device mode */
228         tmp = fsl_readl(&dr_regs->usbmode);
229         tmp |= USB_MODE_CTRL_MODE_DEVICE;
230         /* Disable Setup Lockout */
231         tmp |= USB_MODE_SETUP_LOCK_OFF;
232         fsl_writel(tmp, &dr_regs->usbmode);
233
234         /* Clear the setup status */
235         fsl_writel(0, &dr_regs->usbsts);
236
237         tmp = udc->ep_qh_dma;
238         tmp &= USB_EP_LIST_ADDRESS_MASK;
239         fsl_writel(tmp, &dr_regs->endpointlistaddr);
240
241         VDBG("vir[qh_base] is %p phy[qh_base] is 0x%8x reg is 0x%8x",
242                 udc->ep_qh, (int)tmp,
243                 fsl_readl(&dr_regs->endpointlistaddr));
244
245         /* Config control enable i/o output, cpu endian register */
246 #ifndef CONFIG_ARCH_MXC
247         ctrl = __raw_readl(&usb_sys_regs->control);
248         ctrl |= USB_CTRL_IOENB;
249         __raw_writel(ctrl, &usb_sys_regs->control);
250 #endif
251
252 #if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
253         /* Turn on cache snooping hardware, since some PowerPC platforms
254          * wholly rely on hardware to deal with cache coherent. */
255
256         /* Setup Snooping for all the 4GB space */
257         tmp = SNOOP_SIZE_2GB;   /* starts from 0x0, size 2G */
258         __raw_writel(tmp, &usb_sys_regs->snoop1);
259         tmp |= 0x80000000;      /* starts from 0x8000000, size 2G */
260         __raw_writel(tmp, &usb_sys_regs->snoop2);
261 #endif
262
263         return 0;
264 }
265
266 /* Enable DR irq and set controller to run state */
267 static void dr_controller_run(struct fsl_udc *udc)
268 {
269         u32 temp;
270
271         /* Enable DR irq reg */
272         temp = USB_INTR_INT_EN | USB_INTR_ERR_INT_EN
273                 | USB_INTR_PTC_DETECT_EN | USB_INTR_RESET_EN
274                 | USB_INTR_DEVICE_SUSPEND | USB_INTR_SYS_ERR_EN;
275
276         fsl_writel(temp, &dr_regs->usbintr);
277
278         /* Clear stopped bit */
279         udc->stopped = 0;
280
281         /* Set the controller as device mode */
282         temp = fsl_readl(&dr_regs->usbmode);
283         temp |= USB_MODE_CTRL_MODE_DEVICE;
284         fsl_writel(temp, &dr_regs->usbmode);
285
286         /* Set controller to Run */
287         temp = fsl_readl(&dr_regs->usbcmd);
288         temp |= USB_CMD_RUN_STOP;
289         fsl_writel(temp, &dr_regs->usbcmd);
290 }
291
292 static void dr_controller_stop(struct fsl_udc *udc)
293 {
294         unsigned int tmp;
295
296         /* disable all INTR */
297         fsl_writel(0, &dr_regs->usbintr);
298
299         /* Set stopped bit for isr */
300         udc->stopped = 1;
301
302         /* disable IO output */
303 /*      usb_sys_regs->control = 0; */
304
305         /* set controller to Stop */
306         tmp = fsl_readl(&dr_regs->usbcmd);
307         tmp &= ~USB_CMD_RUN_STOP;
308         fsl_writel(tmp, &dr_regs->usbcmd);
309 }
310
311 static void dr_ep_setup(unsigned char ep_num, unsigned char dir,
312                         unsigned char ep_type)
313 {
314         unsigned int tmp_epctrl = 0;
315
316         tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
317         if (dir) {
318                 if (ep_num)
319                         tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
320                 tmp_epctrl |= EPCTRL_TX_ENABLE;
321                 tmp_epctrl |= ((unsigned int)(ep_type)
322                                 << EPCTRL_TX_EP_TYPE_SHIFT);
323         } else {
324                 if (ep_num)
325                         tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
326                 tmp_epctrl |= EPCTRL_RX_ENABLE;
327                 tmp_epctrl |= ((unsigned int)(ep_type)
328                                 << EPCTRL_RX_EP_TYPE_SHIFT);
329         }
330
331         fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
332 }
333
334 static void
335 dr_ep_change_stall(unsigned char ep_num, unsigned char dir, int value)
336 {
337         u32 tmp_epctrl = 0;
338
339         tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
340
341         if (value) {
342                 /* set the stall bit */
343                 if (dir)
344                         tmp_epctrl |= EPCTRL_TX_EP_STALL;
345                 else
346                         tmp_epctrl |= EPCTRL_RX_EP_STALL;
347         } else {
348                 /* clear the stall bit and reset data toggle */
349                 if (dir) {
350                         tmp_epctrl &= ~EPCTRL_TX_EP_STALL;
351                         tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
352                 } else {
353                         tmp_epctrl &= ~EPCTRL_RX_EP_STALL;
354                         tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
355                 }
356         }
357         fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
358 }
359
360 /* Get stall status of a specific ep
361    Return: 0: not stalled; 1:stalled */
362 static int dr_ep_get_stall(unsigned char ep_num, unsigned char dir)
363 {
364         u32 epctrl;
365
366         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
367         if (dir)
368                 return (epctrl & EPCTRL_TX_EP_STALL) ? 1 : 0;
369         else
370                 return (epctrl & EPCTRL_RX_EP_STALL) ? 1 : 0;
371 }
372
373 /********************************************************************
374         Internal Structure Build up functions
375 ********************************************************************/
376
377 /*------------------------------------------------------------------
378 * struct_ep_qh_setup(): set the Endpoint Capabilites field of QH
379  * @zlt: Zero Length Termination Select (1: disable; 0: enable)
380  * @mult: Mult field
381  ------------------------------------------------------------------*/
382 static void struct_ep_qh_setup(struct fsl_udc *udc, unsigned char ep_num,
383                 unsigned char dir, unsigned char ep_type,
384                 unsigned int max_pkt_len,
385                 unsigned int zlt, unsigned char mult)
386 {
387         struct ep_queue_head *p_QH = &udc->ep_qh[2 * ep_num + dir];
388         unsigned int tmp = 0;
389
390         /* set the Endpoint Capabilites in QH */
391         switch (ep_type) {
392         case USB_ENDPOINT_XFER_CONTROL:
393                 /* Interrupt On Setup (IOS). for control ep  */
394                 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
395                         | EP_QUEUE_HEAD_IOS;
396                 break;
397         case USB_ENDPOINT_XFER_ISOC:
398                 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
399                         | (mult << EP_QUEUE_HEAD_MULT_POS);
400                 break;
401         case USB_ENDPOINT_XFER_BULK:
402         case USB_ENDPOINT_XFER_INT:
403                 tmp = max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS;
404                 break;
405         default:
406                 VDBG("error ep type is %d", ep_type);
407                 return;
408         }
409         if (zlt)
410                 tmp |= EP_QUEUE_HEAD_ZLT_SEL;
411
412         p_QH->max_pkt_length = cpu_to_le32(tmp);
413         p_QH->next_dtd_ptr = 1;
414         p_QH->size_ioc_int_sts = 0;
415 }
416
417 /* Setup qh structure and ep register for ep0. */
418 static void ep0_setup(struct fsl_udc *udc)
419 {
420         /* the intialization of an ep includes: fields in QH, Regs,
421          * fsl_ep struct */
422         struct_ep_qh_setup(udc, 0, USB_RECV, USB_ENDPOINT_XFER_CONTROL,
423                         USB_MAX_CTRL_PAYLOAD, 0, 0);
424         struct_ep_qh_setup(udc, 0, USB_SEND, USB_ENDPOINT_XFER_CONTROL,
425                         USB_MAX_CTRL_PAYLOAD, 0, 0);
426         dr_ep_setup(0, USB_RECV, USB_ENDPOINT_XFER_CONTROL);
427         dr_ep_setup(0, USB_SEND, USB_ENDPOINT_XFER_CONTROL);
428
429         return;
430
431 }
432
433 /***********************************************************************
434                 Endpoint Management Functions
435 ***********************************************************************/
436
437 /*-------------------------------------------------------------------------
438  * when configurations are set, or when interface settings change
439  * for example the do_set_interface() in gadget layer,
440  * the driver will enable or disable the relevant endpoints
441  * ep0 doesn't use this routine. It is always enabled.
442 -------------------------------------------------------------------------*/
443 static int fsl_ep_enable(struct usb_ep *_ep,
444                 const struct usb_endpoint_descriptor *desc)
445 {
446         struct fsl_udc *udc = NULL;
447         struct fsl_ep *ep = NULL;
448         unsigned short max = 0;
449         unsigned char mult = 0, zlt;
450         int retval = -EINVAL;
451         unsigned long flags = 0;
452
453         ep = container_of(_ep, struct fsl_ep, ep);
454
455         /* catch various bogus parameters */
456         if (!_ep || !desc || ep->desc
457                         || (desc->bDescriptorType != USB_DT_ENDPOINT))
458                 return -EINVAL;
459
460         udc = ep->udc;
461
462         if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
463                 return -ESHUTDOWN;
464
465         max = le16_to_cpu(desc->wMaxPacketSize);
466
467         /* Disable automatic zlp generation.  Driver is reponsible to indicate
468          * explicitly through req->req.zero.  This is needed to enable multi-td
469          * request. */
470         zlt = 1;
471
472         /* Assume the max packet size from gadget is always correct */
473         switch (desc->bmAttributes & 0x03) {
474         case USB_ENDPOINT_XFER_CONTROL:
475         case USB_ENDPOINT_XFER_BULK:
476         case USB_ENDPOINT_XFER_INT:
477                 /* mult = 0.  Execute N Transactions as demonstrated by
478                  * the USB variable length packet protocol where N is
479                  * computed using the Maximum Packet Length (dQH) and
480                  * the Total Bytes field (dTD) */
481                 mult = 0;
482                 break;
483         case USB_ENDPOINT_XFER_ISOC:
484                 /* Calculate transactions needed for high bandwidth iso */
485                 mult = (unsigned char)(1 + ((max >> 11) & 0x03));
486                 max = max & 0x7ff;      /* bit 0~10 */
487                 /* 3 transactions at most */
488                 if (mult > 3)
489                         goto en_done;
490                 break;
491         default:
492                 goto en_done;
493         }
494
495         spin_lock_irqsave(&udc->lock, flags);
496         ep->ep.maxpacket = max;
497         ep->desc = desc;
498         ep->stopped = 0;
499
500         /* Controller related setup */
501         /* Init EPx Queue Head (Ep Capabilites field in QH
502          * according to max, zlt, mult) */
503         struct_ep_qh_setup(udc, (unsigned char) ep_index(ep),
504                         (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
505                                         ?  USB_SEND : USB_RECV),
506                         (unsigned char) (desc->bmAttributes
507                                         & USB_ENDPOINT_XFERTYPE_MASK),
508                         max, zlt, mult);
509
510         /* Init endpoint ctrl register */
511         dr_ep_setup((unsigned char) ep_index(ep),
512                         (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
513                                         ? USB_SEND : USB_RECV),
514                         (unsigned char) (desc->bmAttributes
515                                         & USB_ENDPOINT_XFERTYPE_MASK));
516
517         spin_unlock_irqrestore(&udc->lock, flags);
518         retval = 0;
519
520         VDBG("enabled %s (ep%d%s) maxpacket %d",ep->ep.name,
521                         ep->desc->bEndpointAddress & 0x0f,
522                         (desc->bEndpointAddress & USB_DIR_IN)
523                                 ? "in" : "out", max);
524 en_done:
525         return retval;
526 }
527
528 /*---------------------------------------------------------------------
529  * @ep : the ep being unconfigured. May not be ep0
530  * Any pending and uncomplete req will complete with status (-ESHUTDOWN)
531 *---------------------------------------------------------------------*/
532 static int fsl_ep_disable(struct usb_ep *_ep)
533 {
534         struct fsl_udc *udc = NULL;
535         struct fsl_ep *ep = NULL;
536         unsigned long flags = 0;
537         u32 epctrl;
538         int ep_num;
539
540         ep = container_of(_ep, struct fsl_ep, ep);
541         if (!_ep || !ep->desc) {
542                 VDBG("%s not enabled", _ep ? ep->ep.name : NULL);
543                 return -EINVAL;
544         }
545
546         /* disable ep on controller */
547         ep_num = ep_index(ep);
548         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
549         if (ep_is_in(ep))
550                 epctrl &= ~EPCTRL_TX_ENABLE;
551         else
552                 epctrl &= ~EPCTRL_RX_ENABLE;
553         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
554
555         udc = (struct fsl_udc *)ep->udc;
556         spin_lock_irqsave(&udc->lock, flags);
557
558         /* nuke all pending requests (does flush) */
559         nuke(ep, -ESHUTDOWN);
560
561         ep->desc = NULL;
562         ep->stopped = 1;
563         spin_unlock_irqrestore(&udc->lock, flags);
564
565         VDBG("disabled %s OK", _ep->name);
566         return 0;
567 }
568
569 /*---------------------------------------------------------------------
570  * allocate a request object used by this endpoint
571  * the main operation is to insert the req->queue to the eq->queue
572  * Returns the request, or null if one could not be allocated
573 *---------------------------------------------------------------------*/
574 static struct usb_request *
575 fsl_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
576 {
577         struct fsl_req *req = NULL;
578
579         req = kzalloc(sizeof *req, gfp_flags);
580         if (!req)
581                 return NULL;
582
583         req->req.dma = DMA_ADDR_INVALID;
584         INIT_LIST_HEAD(&req->queue);
585
586         return &req->req;
587 }
588
589 static void fsl_free_request(struct usb_ep *_ep, struct usb_request *_req)
590 {
591         struct fsl_req *req = NULL;
592
593         req = container_of(_req, struct fsl_req, req);
594
595         if (_req)
596                 kfree(req);
597 }
598
599 /*-------------------------------------------------------------------------*/
600 static void fsl_queue_td(struct fsl_ep *ep, struct fsl_req *req)
601 {
602         int i = ep_index(ep) * 2 + ep_is_in(ep);
603         u32 temp, bitmask, tmp_stat;
604         struct ep_queue_head *dQH = &ep->udc->ep_qh[i];
605
606         /* VDBG("QH addr Register 0x%8x", dr_regs->endpointlistaddr);
607         VDBG("ep_qh[%d] addr is 0x%8x", i, (u32)&(ep->udc->ep_qh[i])); */
608
609         bitmask = ep_is_in(ep)
610                 ? (1 << (ep_index(ep) + 16))
611                 : (1 << (ep_index(ep)));
612
613         /* check if the pipe is empty */
614         if (!(list_empty(&ep->queue))) {
615                 /* Add td to the end */
616                 struct fsl_req *lastreq;
617                 lastreq = list_entry(ep->queue.prev, struct fsl_req, queue);
618                 lastreq->tail->next_td_ptr =
619                         cpu_to_le32(req->head->td_dma & DTD_ADDR_MASK);
620                 /* Read prime bit, if 1 goto done */
621                 if (fsl_readl(&dr_regs->endpointprime) & bitmask)
622                         goto out;
623
624                 do {
625                         /* Set ATDTW bit in USBCMD */
626                         temp = fsl_readl(&dr_regs->usbcmd);
627                         fsl_writel(temp | USB_CMD_ATDTW, &dr_regs->usbcmd);
628
629                         /* Read correct status bit */
630                         tmp_stat = fsl_readl(&dr_regs->endptstatus) & bitmask;
631
632                 } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_ATDTW));
633
634                 /* Write ATDTW bit to 0 */
635                 temp = fsl_readl(&dr_regs->usbcmd);
636                 fsl_writel(temp & ~USB_CMD_ATDTW, &dr_regs->usbcmd);
637
638                 if (tmp_stat)
639                         goto out;
640         }
641
642         /* Write dQH next pointer and terminate bit to 0 */
643         temp = req->head->td_dma & EP_QUEUE_HEAD_NEXT_POINTER_MASK;
644         dQH->next_dtd_ptr = cpu_to_le32(temp);
645
646         /* Clear active and halt bit */
647         temp = cpu_to_le32(~(EP_QUEUE_HEAD_STATUS_ACTIVE
648                         | EP_QUEUE_HEAD_STATUS_HALT));
649         dQH->size_ioc_int_sts &= temp;
650
651         /* Ensure that updates to the QH will occure before priming. */
652         wmb();
653
654         /* Prime endpoint by writing 1 to ENDPTPRIME */
655         temp = ep_is_in(ep)
656                 ? (1 << (ep_index(ep) + 16))
657                 : (1 << (ep_index(ep)));
658         fsl_writel(temp, &dr_regs->endpointprime);
659 out:
660         return;
661 }
662
663 /* Fill in the dTD structure
664  * @req: request that the transfer belongs to
665  * @length: return actually data length of the dTD
666  * @dma: return dma address of the dTD
667  * @is_last: return flag if it is the last dTD of the request
668  * return: pointer to the built dTD */
669 static struct ep_td_struct *fsl_build_dtd(struct fsl_req *req, unsigned *length,
670                 dma_addr_t *dma, int *is_last)
671 {
672         u32 swap_temp;
673         struct ep_td_struct *dtd;
674
675         /* how big will this transfer be? */
676         *length = min(req->req.length - req->req.actual,
677                         (unsigned)EP_MAX_LENGTH_TRANSFER);
678
679         dtd = dma_pool_alloc(udc_controller->td_pool, GFP_KERNEL, dma);
680         if (dtd == NULL)
681                 return dtd;
682
683         dtd->td_dma = *dma;
684         /* Clear reserved field */
685         swap_temp = cpu_to_le32(dtd->size_ioc_sts);
686         swap_temp &= ~DTD_RESERVED_FIELDS;
687         dtd->size_ioc_sts = cpu_to_le32(swap_temp);
688
689         /* Init all of buffer page pointers */
690         swap_temp = (u32) (req->req.dma + req->req.actual);
691         dtd->buff_ptr0 = cpu_to_le32(swap_temp);
692         dtd->buff_ptr1 = cpu_to_le32(swap_temp + 0x1000);
693         dtd->buff_ptr2 = cpu_to_le32(swap_temp + 0x2000);
694         dtd->buff_ptr3 = cpu_to_le32(swap_temp + 0x3000);
695         dtd->buff_ptr4 = cpu_to_le32(swap_temp + 0x4000);
696
697         req->req.actual += *length;
698
699         /* zlp is needed if req->req.zero is set */
700         if (req->req.zero) {
701                 if (*length == 0 || (*length % req->ep->ep.maxpacket) != 0)
702                         *is_last = 1;
703                 else
704                         *is_last = 0;
705         } else if (req->req.length == req->req.actual)
706                 *is_last = 1;
707         else
708                 *is_last = 0;
709
710         if ((*is_last) == 0)
711                 VDBG("multi-dtd request!");
712         /* Fill in the transfer size; set active bit */
713         swap_temp = ((*length << DTD_LENGTH_BIT_POS) | DTD_STATUS_ACTIVE);
714
715         /* Enable interrupt for the last dtd of a request */
716         if (*is_last && !req->req.no_interrupt)
717                 swap_temp |= DTD_IOC;
718
719         dtd->size_ioc_sts = cpu_to_le32(swap_temp);
720
721         mb();
722
723         VDBG("length = %d address= 0x%x", *length, (int)*dma);
724
725         return dtd;
726 }
727
728 /* Generate dtd chain for a request */
729 static int fsl_req_to_dtd(struct fsl_req *req)
730 {
731         unsigned        count;
732         int             is_last;
733         int             is_first =1;
734         struct ep_td_struct     *last_dtd = NULL, *dtd;
735         dma_addr_t dma;
736
737         do {
738                 dtd = fsl_build_dtd(req, &count, &dma, &is_last);
739                 if (dtd == NULL)
740                         return -ENOMEM;
741
742                 if (is_first) {
743                         is_first = 0;
744                         req->head = dtd;
745                 } else {
746                         last_dtd->next_td_ptr = cpu_to_le32(dma);
747                         last_dtd->next_td_virt = dtd;
748                 }
749                 last_dtd = dtd;
750
751                 req->dtd_count++;
752         } while (!is_last);
753
754         dtd->next_td_ptr = cpu_to_le32(DTD_NEXT_TERMINATE);
755
756         req->tail = dtd;
757
758         return 0;
759 }
760
761 /* queues (submits) an I/O request to an endpoint */
762 static int
763 fsl_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
764 {
765         struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
766         struct fsl_req *req = container_of(_req, struct fsl_req, req);
767         struct fsl_udc *udc;
768         unsigned long flags;
769         int is_iso = 0;
770
771         /* catch various bogus parameters */
772         if (!_req || !req->req.complete || !req->req.buf
773                         || !list_empty(&req->queue)) {
774                 VDBG("%s, bad params", __func__);
775                 return -EINVAL;
776         }
777         if (unlikely(!_ep || !ep->desc)) {
778                 VDBG("%s, bad ep", __func__);
779                 return -EINVAL;
780         }
781         if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
782                 if (req->req.length > ep->ep.maxpacket)
783                         return -EMSGSIZE;
784                 is_iso = 1;
785         }
786
787         udc = ep->udc;
788         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
789                 return -ESHUTDOWN;
790
791         req->ep = ep;
792
793         /* map virtual address to hardware */
794         if (req->req.dma == DMA_ADDR_INVALID) {
795                 req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
796                                         req->req.buf,
797                                         req->req.length, ep_is_in(ep)
798                                                 ? DMA_TO_DEVICE
799                                                 : DMA_FROM_DEVICE);
800                 req->mapped = 1;
801         } else {
802                 dma_sync_single_for_device(ep->udc->gadget.dev.parent,
803                                         req->req.dma, req->req.length,
804                                         ep_is_in(ep)
805                                                 ? DMA_TO_DEVICE
806                                                 : DMA_FROM_DEVICE);
807                 req->mapped = 0;
808         }
809
810         req->req.status = -EINPROGRESS;
811         req->req.actual = 0;
812         req->dtd_count = 0;
813
814         spin_lock_irqsave(&udc->lock, flags);
815
816         /* build dtds and push them to device queue */
817         if (!fsl_req_to_dtd(req)) {
818                 fsl_queue_td(ep, req);
819         } else {
820                 spin_unlock_irqrestore(&udc->lock, flags);
821                 return -ENOMEM;
822         }
823
824         /* Update ep0 state */
825         if ((ep_index(ep) == 0))
826                 udc->ep0_state = DATA_STATE_XMIT;
827
828         /* irq handler advances the queue */
829         if (req != NULL)
830                 list_add_tail(&req->queue, &ep->queue);
831         spin_unlock_irqrestore(&udc->lock, flags);
832
833         return 0;
834 }
835
836 /* dequeues (cancels, unlinks) an I/O request from an endpoint */
837 static int fsl_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
838 {
839         struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
840         struct fsl_req *req;
841         unsigned long flags;
842         int ep_num, stopped, ret = 0;
843         u32 epctrl;
844
845         if (!_ep || !_req)
846                 return -EINVAL;
847
848         spin_lock_irqsave(&ep->udc->lock, flags);
849         stopped = ep->stopped;
850
851         /* Stop the ep before we deal with the queue */
852         ep->stopped = 1;
853         ep_num = ep_index(ep);
854         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
855         if (ep_is_in(ep))
856                 epctrl &= ~EPCTRL_TX_ENABLE;
857         else
858                 epctrl &= ~EPCTRL_RX_ENABLE;
859         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
860
861         /* make sure it's actually queued on this endpoint */
862         list_for_each_entry(req, &ep->queue, queue) {
863                 if (&req->req == _req)
864                         break;
865         }
866         if (&req->req != _req) {
867                 ret = -EINVAL;
868                 goto out;
869         }
870
871         /* The request is in progress, or completed but not dequeued */
872         if (ep->queue.next == &req->queue) {
873                 _req->status = -ECONNRESET;
874                 fsl_ep_fifo_flush(_ep); /* flush current transfer */
875
876                 /* The request isn't the last request in this ep queue */
877                 if (req->queue.next != &ep->queue) {
878                         struct ep_queue_head *qh;
879                         struct fsl_req *next_req;
880
881                         qh = ep->qh;
882                         next_req = list_entry(req->queue.next, struct fsl_req,
883                                         queue);
884
885                         /* Point the QH to the first TD of next request */
886                         fsl_writel((u32) next_req->head, &qh->curr_dtd_ptr);
887                 }
888
889                 /* The request hasn't been processed, patch up the TD chain */
890         } else {
891                 struct fsl_req *prev_req;
892
893                 prev_req = list_entry(req->queue.prev, struct fsl_req, queue);
894                 fsl_writel(fsl_readl(&req->tail->next_td_ptr),
895                                 &prev_req->tail->next_td_ptr);
896
897         }
898
899         done(ep, req, -ECONNRESET);
900
901         /* Enable EP */
902 out:    epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
903         if (ep_is_in(ep))
904                 epctrl |= EPCTRL_TX_ENABLE;
905         else
906                 epctrl |= EPCTRL_RX_ENABLE;
907         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
908         ep->stopped = stopped;
909
910         spin_unlock_irqrestore(&ep->udc->lock, flags);
911         return ret;
912 }
913
914 /*-------------------------------------------------------------------------*/
915
916 /*-----------------------------------------------------------------
917  * modify the endpoint halt feature
918  * @ep: the non-isochronous endpoint being stalled
919  * @value: 1--set halt  0--clear halt
920  * Returns zero, or a negative error code.
921 *----------------------------------------------------------------*/
922 static int fsl_ep_set_halt(struct usb_ep *_ep, int value)
923 {
924         struct fsl_ep *ep = NULL;
925         unsigned long flags = 0;
926         int status = -EOPNOTSUPP;       /* operation not supported */
927         unsigned char ep_dir = 0, ep_num = 0;
928         struct fsl_udc *udc = NULL;
929
930         ep = container_of(_ep, struct fsl_ep, ep);
931         udc = ep->udc;
932         if (!_ep || !ep->desc) {
933                 status = -EINVAL;
934                 goto out;
935         }
936
937         if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
938                 status = -EOPNOTSUPP;
939                 goto out;
940         }
941
942         /* Attempt to halt IN ep will fail if any transfer requests
943          * are still queue */
944         if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
945                 status = -EAGAIN;
946                 goto out;
947         }
948
949         status = 0;
950         ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
951         ep_num = (unsigned char)(ep_index(ep));
952         spin_lock_irqsave(&ep->udc->lock, flags);
953         dr_ep_change_stall(ep_num, ep_dir, value);
954         spin_unlock_irqrestore(&ep->udc->lock, flags);
955
956         if (ep_index(ep) == 0) {
957                 udc->ep0_state = WAIT_FOR_SETUP;
958                 udc->ep0_dir = 0;
959         }
960 out:
961         VDBG(" %s %s halt stat %d", ep->ep.name,
962                         value ?  "set" : "clear", status);
963
964         return status;
965 }
966
967 static void fsl_ep_fifo_flush(struct usb_ep *_ep)
968 {
969         struct fsl_ep *ep;
970         int ep_num, ep_dir;
971         u32 bits;
972         unsigned long timeout;
973 #define FSL_UDC_FLUSH_TIMEOUT 1000
974
975         if (!_ep) {
976                 return;
977         } else {
978                 ep = container_of(_ep, struct fsl_ep, ep);
979                 if (!ep->desc)
980                         return;
981         }
982         ep_num = ep_index(ep);
983         ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
984
985         if (ep_num == 0)
986                 bits = (1 << 16) | 1;
987         else if (ep_dir == USB_SEND)
988                 bits = 1 << (16 + ep_num);
989         else
990                 bits = 1 << ep_num;
991
992         timeout = jiffies + FSL_UDC_FLUSH_TIMEOUT;
993         do {
994                 fsl_writel(bits, &dr_regs->endptflush);
995
996                 /* Wait until flush complete */
997                 while (fsl_readl(&dr_regs->endptflush)) {
998                         if (time_after(jiffies, timeout)) {
999                                 ERR("ep flush timeout\n");
1000                                 return;
1001                         }
1002                         cpu_relax();
1003                 }
1004                 /* See if we need to flush again */
1005         } while (fsl_readl(&dr_regs->endptstatus) & bits);
1006 }
1007
1008 static struct usb_ep_ops fsl_ep_ops = {
1009         .enable = fsl_ep_enable,
1010         .disable = fsl_ep_disable,
1011
1012         .alloc_request = fsl_alloc_request,
1013         .free_request = fsl_free_request,
1014
1015         .queue = fsl_ep_queue,
1016         .dequeue = fsl_ep_dequeue,
1017
1018         .set_halt = fsl_ep_set_halt,
1019         .fifo_flush = fsl_ep_fifo_flush,        /* flush fifo */
1020 };
1021
1022 /*-------------------------------------------------------------------------
1023                 Gadget Driver Layer Operations
1024 -------------------------------------------------------------------------*/
1025
1026 /*----------------------------------------------------------------------
1027  * Get the current frame number (from DR frame_index Reg )
1028  *----------------------------------------------------------------------*/
1029 static int fsl_get_frame(struct usb_gadget *gadget)
1030 {
1031         return (int)(fsl_readl(&dr_regs->frindex) & USB_FRINDEX_MASKS);
1032 }
1033
1034 /*-----------------------------------------------------------------------
1035  * Tries to wake up the host connected to this gadget
1036  -----------------------------------------------------------------------*/
1037 static int fsl_wakeup(struct usb_gadget *gadget)
1038 {
1039         struct fsl_udc *udc = container_of(gadget, struct fsl_udc, gadget);
1040         u32 portsc;
1041
1042         /* Remote wakeup feature not enabled by host */
1043         if (!udc->remote_wakeup)
1044                 return -ENOTSUPP;
1045
1046         portsc = fsl_readl(&dr_regs->portsc1);
1047         /* not suspended? */
1048         if (!(portsc & PORTSCX_PORT_SUSPEND))
1049                 return 0;
1050         /* trigger force resume */
1051         portsc |= PORTSCX_PORT_FORCE_RESUME;
1052         fsl_writel(portsc, &dr_regs->portsc1);
1053         return 0;
1054 }
1055
1056 static int can_pullup(struct fsl_udc *udc)
1057 {
1058         return udc->driver && udc->softconnect && udc->vbus_active;
1059 }
1060
1061 /* Notify controller that VBUS is powered, Called by whatever
1062    detects VBUS sessions */
1063 static int fsl_vbus_session(struct usb_gadget *gadget, int is_active)
1064 {
1065         struct fsl_udc  *udc;
1066         unsigned long   flags;
1067
1068         udc = container_of(gadget, struct fsl_udc, gadget);
1069         spin_lock_irqsave(&udc->lock, flags);
1070         VDBG("VBUS %s", is_active ? "on" : "off");
1071         udc->vbus_active = (is_active != 0);
1072         if (can_pullup(udc))
1073                 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1074                                 &dr_regs->usbcmd);
1075         else
1076                 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1077                                 &dr_regs->usbcmd);
1078         spin_unlock_irqrestore(&udc->lock, flags);
1079         return 0;
1080 }
1081
1082 /* constrain controller's VBUS power usage
1083  * This call is used by gadget drivers during SET_CONFIGURATION calls,
1084  * reporting how much power the device may consume.  For example, this
1085  * could affect how quickly batteries are recharged.
1086  *
1087  * Returns zero on success, else negative errno.
1088  */
1089 static int fsl_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1090 {
1091         struct fsl_udc *udc;
1092
1093         udc = container_of(gadget, struct fsl_udc, gadget);
1094         if (udc->transceiver)
1095                 return otg_set_power(udc->transceiver, mA);
1096         return -ENOTSUPP;
1097 }
1098
1099 /* Change Data+ pullup status
1100  * this func is used by usb_gadget_connect/disconnet
1101  */
1102 static int fsl_pullup(struct usb_gadget *gadget, int is_on)
1103 {
1104         struct fsl_udc *udc;
1105
1106         udc = container_of(gadget, struct fsl_udc, gadget);
1107         udc->softconnect = (is_on != 0);
1108         if (can_pullup(udc))
1109                 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1110                                 &dr_regs->usbcmd);
1111         else
1112                 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1113                                 &dr_regs->usbcmd);
1114
1115         return 0;
1116 }
1117
1118 /* defined in gadget.h */
1119 static struct usb_gadget_ops fsl_gadget_ops = {
1120         .get_frame = fsl_get_frame,
1121         .wakeup = fsl_wakeup,
1122 /*      .set_selfpowered = fsl_set_selfpowered, */ /* Always selfpowered */
1123         .vbus_session = fsl_vbus_session,
1124         .vbus_draw = fsl_vbus_draw,
1125         .pullup = fsl_pullup,
1126 };
1127
1128 /* Set protocol stall on ep0, protocol stall will automatically be cleared
1129    on new transaction */
1130 static void ep0stall(struct fsl_udc *udc)
1131 {
1132         u32 tmp;
1133
1134         /* must set tx and rx to stall at the same time */
1135         tmp = fsl_readl(&dr_regs->endptctrl[0]);
1136         tmp |= EPCTRL_TX_EP_STALL | EPCTRL_RX_EP_STALL;
1137         fsl_writel(tmp, &dr_regs->endptctrl[0]);
1138         udc->ep0_state = WAIT_FOR_SETUP;
1139         udc->ep0_dir = 0;
1140 }
1141
1142 /* Prime a status phase for ep0 */
1143 static int ep0_prime_status(struct fsl_udc *udc, int direction)
1144 {
1145         struct fsl_req *req = udc->status_req;
1146         struct fsl_ep *ep;
1147
1148         if (direction == EP_DIR_IN)
1149                 udc->ep0_dir = USB_DIR_IN;
1150         else
1151                 udc->ep0_dir = USB_DIR_OUT;
1152
1153         ep = &udc->eps[0];
1154         udc->ep0_state = WAIT_FOR_OUT_STATUS;
1155
1156         req->ep = ep;
1157         req->req.length = 0;
1158         req->req.status = -EINPROGRESS;
1159         req->req.actual = 0;
1160         req->req.complete = NULL;
1161         req->dtd_count = 0;
1162
1163         if (fsl_req_to_dtd(req) == 0)
1164                 fsl_queue_td(ep, req);
1165         else
1166                 return -ENOMEM;
1167
1168         list_add_tail(&req->queue, &ep->queue);
1169
1170         return 0;
1171 }
1172
1173 static void udc_reset_ep_queue(struct fsl_udc *udc, u8 pipe)
1174 {
1175         struct fsl_ep *ep = get_ep_by_pipe(udc, pipe);
1176
1177         if (ep->name)
1178                 nuke(ep, -ESHUTDOWN);
1179 }
1180
1181 /*
1182  * ch9 Set address
1183  */
1184 static void ch9setaddress(struct fsl_udc *udc, u16 value, u16 index, u16 length)
1185 {
1186         /* Save the new address to device struct */
1187         udc->device_address = (u8) value;
1188         /* Update usb state */
1189         udc->usb_state = USB_STATE_ADDRESS;
1190         /* Status phase */
1191         if (ep0_prime_status(udc, EP_DIR_IN))
1192                 ep0stall(udc);
1193 }
1194
1195 /*
1196  * ch9 Get status
1197  */
1198 static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value,
1199                 u16 index, u16 length)
1200 {
1201         u16 tmp = 0;            /* Status, cpu endian */
1202         struct fsl_req *req;
1203         struct fsl_ep *ep;
1204
1205         ep = &udc->eps[0];
1206
1207         if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1208                 /* Get device status */
1209                 tmp = 1 << USB_DEVICE_SELF_POWERED;
1210                 tmp |= udc->remote_wakeup << USB_DEVICE_REMOTE_WAKEUP;
1211         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
1212                 /* Get interface status */
1213                 /* We don't have interface information in udc driver */
1214                 tmp = 0;
1215         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
1216                 /* Get endpoint status */
1217                 struct fsl_ep *target_ep;
1218
1219                 target_ep = get_ep_by_pipe(udc, get_pipe_by_windex(index));
1220
1221                 /* stall if endpoint doesn't exist */
1222                 if (!target_ep->desc)
1223                         goto stall;
1224                 tmp = dr_ep_get_stall(ep_index(target_ep), ep_is_in(target_ep))
1225                                 << USB_ENDPOINT_HALT;
1226         }
1227
1228         udc->ep0_dir = USB_DIR_IN;
1229         /* Borrow the per device status_req */
1230         req = udc->status_req;
1231         /* Fill in the reqest structure */
1232         *((u16 *) req->req.buf) = cpu_to_le16(tmp);
1233         req->ep = ep;
1234         req->req.length = 2;
1235         req->req.status = -EINPROGRESS;
1236         req->req.actual = 0;
1237         req->req.complete = NULL;
1238         req->dtd_count = 0;
1239
1240         /* prime the data phase */
1241         if ((fsl_req_to_dtd(req) == 0))
1242                 fsl_queue_td(ep, req);
1243         else                    /* no mem */
1244                 goto stall;
1245
1246         list_add_tail(&req->queue, &ep->queue);
1247         udc->ep0_state = DATA_STATE_XMIT;
1248         return;
1249 stall:
1250         ep0stall(udc);
1251 }
1252
1253 static void setup_received_irq(struct fsl_udc *udc,
1254                 struct usb_ctrlrequest *setup)
1255 {
1256         u16 wValue = le16_to_cpu(setup->wValue);
1257         u16 wIndex = le16_to_cpu(setup->wIndex);
1258         u16 wLength = le16_to_cpu(setup->wLength);
1259
1260         udc_reset_ep_queue(udc, 0);
1261
1262         /* We process some stardard setup requests here */
1263         switch (setup->bRequest) {
1264         case USB_REQ_GET_STATUS:
1265                 /* Data+Status phase from udc */
1266                 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
1267                                         != (USB_DIR_IN | USB_TYPE_STANDARD))
1268                         break;
1269                 ch9getstatus(udc, setup->bRequestType, wValue, wIndex, wLength);
1270                 return;
1271
1272         case USB_REQ_SET_ADDRESS:
1273                 /* Status phase from udc */
1274                 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD
1275                                                 | USB_RECIP_DEVICE))
1276                         break;
1277                 ch9setaddress(udc, wValue, wIndex, wLength);
1278                 return;
1279
1280         case USB_REQ_CLEAR_FEATURE:
1281         case USB_REQ_SET_FEATURE:
1282                 /* Status phase from udc */
1283         {
1284                 int rc = -EOPNOTSUPP;
1285
1286                 if ((setup->bRequestType & (USB_RECIP_MASK | USB_TYPE_MASK))
1287                                 == (USB_RECIP_ENDPOINT | USB_TYPE_STANDARD)) {
1288                         int pipe = get_pipe_by_windex(wIndex);
1289                         struct fsl_ep *ep;
1290
1291                         if (wValue != 0 || wLength != 0 || pipe > udc->max_ep)
1292                                 break;
1293                         ep = get_ep_by_pipe(udc, pipe);
1294
1295                         spin_unlock(&udc->lock);
1296                         rc = fsl_ep_set_halt(&ep->ep,
1297                                         (setup->bRequest == USB_REQ_SET_FEATURE)
1298                                                 ? 1 : 0);
1299                         spin_lock(&udc->lock);
1300
1301                 } else if ((setup->bRequestType & (USB_RECIP_MASK
1302                                 | USB_TYPE_MASK)) == (USB_RECIP_DEVICE
1303                                 | USB_TYPE_STANDARD)) {
1304                         /* Note: The driver has not include OTG support yet.
1305                          * This will be set when OTG support is added */
1306                         if (!gadget_is_otg(&udc->gadget))
1307                                 break;
1308                         else if (setup->bRequest == USB_DEVICE_B_HNP_ENABLE)
1309                                 udc->gadget.b_hnp_enable = 1;
1310                         else if (setup->bRequest == USB_DEVICE_A_HNP_SUPPORT)
1311                                 udc->gadget.a_hnp_support = 1;
1312                         else if (setup->bRequest ==
1313                                         USB_DEVICE_A_ALT_HNP_SUPPORT)
1314                                 udc->gadget.a_alt_hnp_support = 1;
1315                         else
1316                                 break;
1317                         rc = 0;
1318                 } else
1319                         break;
1320
1321                 if (rc == 0) {
1322                         if (ep0_prime_status(udc, EP_DIR_IN))
1323                                 ep0stall(udc);
1324                 }
1325                 return;
1326         }
1327
1328         default:
1329                 break;
1330         }
1331
1332         /* Requests handled by gadget */
1333         if (wLength) {
1334                 /* Data phase from gadget, status phase from udc */
1335                 udc->ep0_dir = (setup->bRequestType & USB_DIR_IN)
1336                                 ?  USB_DIR_IN : USB_DIR_OUT;
1337                 spin_unlock(&udc->lock);
1338                 if (udc->driver->setup(&udc->gadget,
1339                                 &udc->local_setup_buff) < 0)
1340                         ep0stall(udc);
1341                 spin_lock(&udc->lock);
1342                 udc->ep0_state = (setup->bRequestType & USB_DIR_IN)
1343                                 ?  DATA_STATE_XMIT : DATA_STATE_RECV;
1344         } else {
1345                 /* No data phase, IN status from gadget */
1346                 udc->ep0_dir = USB_DIR_IN;
1347                 spin_unlock(&udc->lock);
1348                 if (udc->driver->setup(&udc->gadget,
1349                                 &udc->local_setup_buff) < 0)
1350                         ep0stall(udc);
1351                 spin_lock(&udc->lock);
1352                 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1353         }
1354 }
1355
1356 /* Process request for Data or Status phase of ep0
1357  * prime status phase if needed */
1358 static void ep0_req_complete(struct fsl_udc *udc, struct fsl_ep *ep0,
1359                 struct fsl_req *req)
1360 {
1361         if (udc->usb_state == USB_STATE_ADDRESS) {
1362                 /* Set the new address */
1363                 u32 new_address = (u32) udc->device_address;
1364                 fsl_writel(new_address << USB_DEVICE_ADDRESS_BIT_POS,
1365                                 &dr_regs->deviceaddr);
1366         }
1367
1368         done(ep0, req, 0);
1369
1370         switch (udc->ep0_state) {
1371         case DATA_STATE_XMIT:
1372                 /* receive status phase */
1373                 if (ep0_prime_status(udc, EP_DIR_OUT))
1374                         ep0stall(udc);
1375                 break;
1376         case DATA_STATE_RECV:
1377                 /* send status phase */
1378                 if (ep0_prime_status(udc, EP_DIR_IN))
1379                         ep0stall(udc);
1380                 break;
1381         case WAIT_FOR_OUT_STATUS:
1382                 udc->ep0_state = WAIT_FOR_SETUP;
1383                 break;
1384         case WAIT_FOR_SETUP:
1385                 ERR("Unexpect ep0 packets\n");
1386                 break;
1387         default:
1388                 ep0stall(udc);
1389                 break;
1390         }
1391 }
1392
1393 /* Tripwire mechanism to ensure a setup packet payload is extracted without
1394  * being corrupted by another incoming setup packet */
1395 static void tripwire_handler(struct fsl_udc *udc, u8 ep_num, u8 *buffer_ptr)
1396 {
1397         u32 temp;
1398         struct ep_queue_head *qh;
1399
1400         qh = &udc->ep_qh[ep_num * 2 + EP_DIR_OUT];
1401
1402         /* Clear bit in ENDPTSETUPSTAT */
1403         temp = fsl_readl(&dr_regs->endptsetupstat);
1404         fsl_writel(temp | (1 << ep_num), &dr_regs->endptsetupstat);
1405
1406         /* while a hazard exists when setup package arrives */
1407         do {
1408                 /* Set Setup Tripwire */
1409                 temp = fsl_readl(&dr_regs->usbcmd);
1410                 fsl_writel(temp | USB_CMD_SUTW, &dr_regs->usbcmd);
1411
1412                 /* Copy the setup packet to local buffer */
1413                 memcpy(buffer_ptr, (u8 *) qh->setup_buffer, 8);
1414         } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_SUTW));
1415
1416         /* Clear Setup Tripwire */
1417         temp = fsl_readl(&dr_regs->usbcmd);
1418         fsl_writel(temp & ~USB_CMD_SUTW, &dr_regs->usbcmd);
1419 }
1420
1421 /* process-ep_req(): free the completed Tds for this req */
1422 static int process_ep_req(struct fsl_udc *udc, int pipe,
1423                 struct fsl_req *curr_req)
1424 {
1425         struct ep_td_struct *curr_td;
1426         int     td_complete, actual, remaining_length, j, tmp;
1427         int     status = 0;
1428         int     errors = 0;
1429         struct  ep_queue_head *curr_qh = &udc->ep_qh[pipe];
1430         int direction = pipe % 2;
1431
1432         curr_td = curr_req->head;
1433         td_complete = 0;
1434         actual = curr_req->req.length;
1435
1436         for (j = 0; j < curr_req->dtd_count; j++) {
1437                 remaining_length = (le32_to_cpu(curr_td->size_ioc_sts)
1438                                         & DTD_PACKET_SIZE)
1439                                 >> DTD_LENGTH_BIT_POS;
1440                 actual -= remaining_length;
1441
1442                 if ((errors = le32_to_cpu(curr_td->size_ioc_sts) &
1443                                                 DTD_ERROR_MASK)) {
1444                         if (errors & DTD_STATUS_HALTED) {
1445                                 ERR("dTD error %08x QH=%d\n", errors, pipe);
1446                                 /* Clear the errors and Halt condition */
1447                                 tmp = le32_to_cpu(curr_qh->size_ioc_int_sts);
1448                                 tmp &= ~errors;
1449                                 curr_qh->size_ioc_int_sts = cpu_to_le32(tmp);
1450                                 status = -EPIPE;
1451                                 /* FIXME: continue with next queued TD? */
1452
1453                                 break;
1454                         }
1455                         if (errors & DTD_STATUS_DATA_BUFF_ERR) {
1456                                 VDBG("Transfer overflow");
1457                                 status = -EPROTO;
1458                                 break;
1459                         } else if (errors & DTD_STATUS_TRANSACTION_ERR) {
1460                                 VDBG("ISO error");
1461                                 status = -EILSEQ;
1462                                 break;
1463                         } else
1464                                 ERR("Unknown error has occured (0x%x)!\n",
1465                                         errors);
1466
1467                 } else if (le32_to_cpu(curr_td->size_ioc_sts)
1468                                 & DTD_STATUS_ACTIVE) {
1469                         VDBG("Request not complete");
1470                         status = REQ_UNCOMPLETE;
1471                         return status;
1472                 } else if (remaining_length) {
1473                         if (direction) {
1474                                 VDBG("Transmit dTD remaining length not zero");
1475                                 status = -EPROTO;
1476                                 break;
1477                         } else {
1478                                 td_complete++;
1479                                 break;
1480                         }
1481                 } else {
1482                         td_complete++;
1483                         VDBG("dTD transmitted successful");
1484                 }
1485
1486                 if (j != curr_req->dtd_count - 1)
1487                         curr_td = (struct ep_td_struct *)curr_td->next_td_virt;
1488         }
1489
1490         if (status)
1491                 return status;
1492
1493         curr_req->req.actual = actual;
1494
1495         return 0;
1496 }
1497
1498 /* Process a DTD completion interrupt */
1499 static void dtd_complete_irq(struct fsl_udc *udc)
1500 {
1501         u32 bit_pos;
1502         int i, ep_num, direction, bit_mask, status;
1503         struct fsl_ep *curr_ep;
1504         struct fsl_req *curr_req, *temp_req;
1505
1506         /* Clear the bits in the register */
1507         bit_pos = fsl_readl(&dr_regs->endptcomplete);
1508         fsl_writel(bit_pos, &dr_regs->endptcomplete);
1509
1510         if (!bit_pos)
1511                 return;
1512
1513         for (i = 0; i < udc->max_ep * 2; i++) {
1514                 ep_num = i >> 1;
1515                 direction = i % 2;
1516
1517                 bit_mask = 1 << (ep_num + 16 * direction);
1518
1519                 if (!(bit_pos & bit_mask))
1520                         continue;
1521
1522                 curr_ep = get_ep_by_pipe(udc, i);
1523
1524                 /* If the ep is configured */
1525                 if (curr_ep->name == NULL) {
1526                         WARNING("Invalid EP?");
1527                         continue;
1528                 }
1529
1530                 /* process the req queue until an uncomplete request */
1531                 list_for_each_entry_safe(curr_req, temp_req, &curr_ep->queue,
1532                                 queue) {
1533                         status = process_ep_req(udc, i, curr_req);
1534
1535                         VDBG("status of process_ep_req= %d, ep = %d",
1536                                         status, ep_num);
1537                         if (status == REQ_UNCOMPLETE)
1538                                 break;
1539                         /* write back status to req */
1540                         curr_req->req.status = status;
1541
1542                         if (ep_num == 0) {
1543                                 ep0_req_complete(udc, curr_ep, curr_req);
1544                                 break;
1545                         } else
1546                                 done(curr_ep, curr_req, status);
1547                 }
1548         }
1549 }
1550
1551 /* Process a port change interrupt */
1552 static void port_change_irq(struct fsl_udc *udc)
1553 {
1554         u32 speed;
1555
1556         /* Bus resetting is finished */
1557         if (!(fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET)) {
1558                 /* Get the speed */
1559                 speed = (fsl_readl(&dr_regs->portsc1)
1560                                 & PORTSCX_PORT_SPEED_MASK);
1561                 switch (speed) {
1562                 case PORTSCX_PORT_SPEED_HIGH:
1563                         udc->gadget.speed = USB_SPEED_HIGH;
1564                         break;
1565                 case PORTSCX_PORT_SPEED_FULL:
1566                         udc->gadget.speed = USB_SPEED_FULL;
1567                         break;
1568                 case PORTSCX_PORT_SPEED_LOW:
1569                         udc->gadget.speed = USB_SPEED_LOW;
1570                         break;
1571                 default:
1572                         udc->gadget.speed = USB_SPEED_UNKNOWN;
1573                         break;
1574                 }
1575         }
1576
1577         /* Update USB state */
1578         if (!udc->resume_state)
1579                 udc->usb_state = USB_STATE_DEFAULT;
1580 }
1581
1582 /* Process suspend interrupt */
1583 static void suspend_irq(struct fsl_udc *udc)
1584 {
1585         udc->resume_state = udc->usb_state;
1586         udc->usb_state = USB_STATE_SUSPENDED;
1587
1588         /* report suspend to the driver, serial.c does not support this */
1589         if (udc->driver->suspend)
1590                 udc->driver->suspend(&udc->gadget);
1591 }
1592
1593 static void bus_resume(struct fsl_udc *udc)
1594 {
1595         udc->usb_state = udc->resume_state;
1596         udc->resume_state = 0;
1597
1598         /* report resume to the driver, serial.c does not support this */
1599         if (udc->driver->resume)
1600                 udc->driver->resume(&udc->gadget);
1601 }
1602
1603 /* Clear up all ep queues */
1604 static int reset_queues(struct fsl_udc *udc)
1605 {
1606         u8 pipe;
1607
1608         for (pipe = 0; pipe < udc->max_pipes; pipe++)
1609                 udc_reset_ep_queue(udc, pipe);
1610
1611         /* report disconnect; the driver is already quiesced */
1612         spin_unlock(&udc->lock);
1613         udc->driver->disconnect(&udc->gadget);
1614         spin_lock(&udc->lock);
1615
1616         return 0;
1617 }
1618
1619 /* Process reset interrupt */
1620 static void reset_irq(struct fsl_udc *udc)
1621 {
1622         u32 temp;
1623         unsigned long timeout;
1624
1625         /* Clear the device address */
1626         temp = fsl_readl(&dr_regs->deviceaddr);
1627         fsl_writel(temp & ~USB_DEVICE_ADDRESS_MASK, &dr_regs->deviceaddr);
1628
1629         udc->device_address = 0;
1630
1631         /* Clear usb state */
1632         udc->resume_state = 0;
1633         udc->ep0_dir = 0;
1634         udc->ep0_state = WAIT_FOR_SETUP;
1635         udc->remote_wakeup = 0; /* default to 0 on reset */
1636         udc->gadget.b_hnp_enable = 0;
1637         udc->gadget.a_hnp_support = 0;
1638         udc->gadget.a_alt_hnp_support = 0;
1639
1640         /* Clear all the setup token semaphores */
1641         temp = fsl_readl(&dr_regs->endptsetupstat);
1642         fsl_writel(temp, &dr_regs->endptsetupstat);
1643
1644         /* Clear all the endpoint complete status bits */
1645         temp = fsl_readl(&dr_regs->endptcomplete);
1646         fsl_writel(temp, &dr_regs->endptcomplete);
1647
1648         timeout = jiffies + 100;
1649         while (fsl_readl(&dr_regs->endpointprime)) {
1650                 /* Wait until all endptprime bits cleared */
1651                 if (time_after(jiffies, timeout)) {
1652                         ERR("Timeout for reset\n");
1653                         break;
1654                 }
1655                 cpu_relax();
1656         }
1657
1658         /* Write 1s to the flush register */
1659         fsl_writel(0xffffffff, &dr_regs->endptflush);
1660
1661         if (fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET) {
1662                 VDBG("Bus reset");
1663                 /* Reset all the queues, include XD, dTD, EP queue
1664                  * head and TR Queue */
1665                 reset_queues(udc);
1666                 udc->usb_state = USB_STATE_DEFAULT;
1667         } else {
1668                 VDBG("Controller reset");
1669                 /* initialize usb hw reg except for regs for EP, not
1670                  * touch usbintr reg */
1671                 dr_controller_setup(udc);
1672
1673                 /* Reset all internal used Queues */
1674                 reset_queues(udc);
1675
1676                 ep0_setup(udc);
1677
1678                 /* Enable DR IRQ reg, Set Run bit, change udc state */
1679                 dr_controller_run(udc);
1680                 udc->usb_state = USB_STATE_ATTACHED;
1681         }
1682 }
1683
1684 /*
1685  * USB device controller interrupt handler
1686  */
1687 static irqreturn_t fsl_udc_irq(int irq, void *_udc)
1688 {
1689         struct fsl_udc *udc = _udc;
1690         u32 irq_src;
1691         irqreturn_t status = IRQ_NONE;
1692         unsigned long flags;
1693
1694         /* Disable ISR for OTG host mode */
1695         if (udc->stopped)
1696                 return IRQ_NONE;
1697         spin_lock_irqsave(&udc->lock, flags);
1698         irq_src = fsl_readl(&dr_regs->usbsts) & fsl_readl(&dr_regs->usbintr);
1699         /* Clear notification bits */
1700         fsl_writel(irq_src, &dr_regs->usbsts);
1701
1702         /* VDBG("irq_src [0x%8x]", irq_src); */
1703
1704         /* Need to resume? */
1705         if (udc->usb_state == USB_STATE_SUSPENDED)
1706                 if ((fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_SUSPEND) == 0)
1707                         bus_resume(udc);
1708
1709         /* USB Interrupt */
1710         if (irq_src & USB_STS_INT) {
1711                 VDBG("Packet int");
1712                 /* Setup package, we only support ep0 as control ep */
1713                 if (fsl_readl(&dr_regs->endptsetupstat) & EP_SETUP_STATUS_EP0) {
1714                         tripwire_handler(udc, 0,
1715                                         (u8 *) (&udc->local_setup_buff));
1716                         setup_received_irq(udc, &udc->local_setup_buff);
1717                         status = IRQ_HANDLED;
1718                 }
1719
1720                 /* completion of dtd */
1721                 if (fsl_readl(&dr_regs->endptcomplete)) {
1722                         dtd_complete_irq(udc);
1723                         status = IRQ_HANDLED;
1724                 }
1725         }
1726
1727         /* SOF (for ISO transfer) */
1728         if (irq_src & USB_STS_SOF) {
1729                 status = IRQ_HANDLED;
1730         }
1731
1732         /* Port Change */
1733         if (irq_src & USB_STS_PORT_CHANGE) {
1734                 port_change_irq(udc);
1735                 status = IRQ_HANDLED;
1736         }
1737
1738         /* Reset Received */
1739         if (irq_src & USB_STS_RESET) {
1740                 reset_irq(udc);
1741                 status = IRQ_HANDLED;
1742         }
1743
1744         /* Sleep Enable (Suspend) */
1745         if (irq_src & USB_STS_SUSPEND) {
1746                 suspend_irq(udc);
1747                 status = IRQ_HANDLED;
1748         }
1749
1750         if (irq_src & (USB_STS_ERR | USB_STS_SYS_ERR)) {
1751                 VDBG("Error IRQ %x", irq_src);
1752         }
1753
1754         spin_unlock_irqrestore(&udc->lock, flags);
1755         return status;
1756 }
1757
1758 /*----------------------------------------------------------------*
1759  * Hook to gadget drivers
1760  * Called by initialization code of gadget drivers
1761 *----------------------------------------------------------------*/
1762 int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
1763                 int (*bind)(struct usb_gadget *))
1764 {
1765         int retval = -ENODEV;
1766         unsigned long flags = 0;
1767
1768         if (!udc_controller)
1769                 return -ENODEV;
1770
1771         if (!driver || (driver->speed != USB_SPEED_FULL
1772                                 && driver->speed != USB_SPEED_HIGH)
1773                         || !bind || !driver->disconnect || !driver->setup)
1774                 return -EINVAL;
1775
1776         if (udc_controller->driver)
1777                 return -EBUSY;
1778
1779         /* lock is needed but whether should use this lock or another */
1780         spin_lock_irqsave(&udc_controller->lock, flags);
1781
1782         driver->driver.bus = NULL;
1783         /* hook up the driver */
1784         udc_controller->driver = driver;
1785         udc_controller->gadget.dev.driver = &driver->driver;
1786         spin_unlock_irqrestore(&udc_controller->lock, flags);
1787
1788         /* bind udc driver to gadget driver */
1789         retval = bind(&udc_controller->gadget);
1790         if (retval) {
1791                 VDBG("bind to %s --> %d", driver->driver.name, retval);
1792                 udc_controller->gadget.dev.driver = NULL;
1793                 udc_controller->driver = NULL;
1794                 goto out;
1795         }
1796
1797         /* Enable DR IRQ reg and Set usbcmd reg  Run bit */
1798         dr_controller_run(udc_controller);
1799         udc_controller->usb_state = USB_STATE_ATTACHED;
1800         udc_controller->ep0_state = WAIT_FOR_SETUP;
1801         udc_controller->ep0_dir = 0;
1802         printk(KERN_INFO "%s: bind to driver %s\n",
1803                         udc_controller->gadget.name, driver->driver.name);
1804
1805 out:
1806         if (retval)
1807                 printk(KERN_WARNING "gadget driver register failed %d\n",
1808                        retval);
1809         return retval;
1810 }
1811 EXPORT_SYMBOL(usb_gadget_probe_driver);
1812
1813 /* Disconnect from gadget driver */
1814 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1815 {
1816         struct fsl_ep *loop_ep;
1817         unsigned long flags;
1818
1819         if (!udc_controller)
1820                 return -ENODEV;
1821
1822         if (!driver || driver != udc_controller->driver || !driver->unbind)
1823                 return -EINVAL;
1824
1825         if (udc_controller->transceiver)
1826                 otg_set_peripheral(udc_controller->transceiver, NULL);
1827
1828         /* stop DR, disable intr */
1829         dr_controller_stop(udc_controller);
1830
1831         /* in fact, no needed */
1832         udc_controller->usb_state = USB_STATE_ATTACHED;
1833         udc_controller->ep0_state = WAIT_FOR_SETUP;
1834         udc_controller->ep0_dir = 0;
1835
1836         /* stand operation */
1837         spin_lock_irqsave(&udc_controller->lock, flags);
1838         udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
1839         nuke(&udc_controller->eps[0], -ESHUTDOWN);
1840         list_for_each_entry(loop_ep, &udc_controller->gadget.ep_list,
1841                         ep.ep_list)
1842                 nuke(loop_ep, -ESHUTDOWN);
1843         spin_unlock_irqrestore(&udc_controller->lock, flags);
1844
1845         /* report disconnect; the controller is already quiesced */
1846         driver->disconnect(&udc_controller->gadget);
1847
1848         /* unbind gadget and unhook driver. */
1849         driver->unbind(&udc_controller->gadget);
1850         udc_controller->gadget.dev.driver = NULL;
1851         udc_controller->driver = NULL;
1852
1853         printk(KERN_WARNING "unregistered gadget driver '%s'\n",
1854                driver->driver.name);
1855         return 0;
1856 }
1857 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1858
1859 /*-------------------------------------------------------------------------
1860                 PROC File System Support
1861 -------------------------------------------------------------------------*/
1862 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
1863
1864 #include <linux/seq_file.h>
1865
1866 static const char proc_filename[] = "driver/fsl_usb2_udc";
1867
1868 static int fsl_proc_read(char *page, char **start, off_t off, int count,
1869                 int *eof, void *_dev)
1870 {
1871         char *buf = page;
1872         char *next = buf;
1873         unsigned size = count;
1874         unsigned long flags;
1875         int t, i;
1876         u32 tmp_reg;
1877         struct fsl_ep *ep = NULL;
1878         struct fsl_req *req;
1879
1880         struct fsl_udc *udc = udc_controller;
1881         if (off != 0)
1882                 return 0;
1883
1884         spin_lock_irqsave(&udc->lock, flags);
1885
1886         /* ------basic driver information ---- */
1887         t = scnprintf(next, size,
1888                         DRIVER_DESC "\n"
1889                         "%s version: %s\n"
1890                         "Gadget driver: %s\n\n",
1891                         driver_name, DRIVER_VERSION,
1892                         udc->driver ? udc->driver->driver.name : "(none)");
1893         size -= t;
1894         next += t;
1895
1896         /* ------ DR Registers ----- */
1897         tmp_reg = fsl_readl(&dr_regs->usbcmd);
1898         t = scnprintf(next, size,
1899                         "USBCMD reg:\n"
1900                         "SetupTW: %d\n"
1901                         "Run/Stop: %s\n\n",
1902                         (tmp_reg & USB_CMD_SUTW) ? 1 : 0,
1903                         (tmp_reg & USB_CMD_RUN_STOP) ? "Run" : "Stop");
1904         size -= t;
1905         next += t;
1906
1907         tmp_reg = fsl_readl(&dr_regs->usbsts);
1908         t = scnprintf(next, size,
1909                         "USB Status Reg:\n"
1910                         "Dr Suspend: %d Reset Received: %d System Error: %s "
1911                         "USB Error Interrupt: %s\n\n",
1912                         (tmp_reg & USB_STS_SUSPEND) ? 1 : 0,
1913                         (tmp_reg & USB_STS_RESET) ? 1 : 0,
1914                         (tmp_reg & USB_STS_SYS_ERR) ? "Err" : "Normal",
1915                         (tmp_reg & USB_STS_ERR) ? "Err detected" : "No err");
1916         size -= t;
1917         next += t;
1918
1919         tmp_reg = fsl_readl(&dr_regs->usbintr);
1920         t = scnprintf(next, size,
1921                         "USB Intrrupt Enable Reg:\n"
1922                         "Sleep Enable: %d SOF Received Enable: %d "
1923                         "Reset Enable: %d\n"
1924                         "System Error Enable: %d "
1925                         "Port Change Dectected Enable: %d\n"
1926                         "USB Error Intr Enable: %d USB Intr Enable: %d\n\n",
1927                         (tmp_reg & USB_INTR_DEVICE_SUSPEND) ? 1 : 0,
1928                         (tmp_reg & USB_INTR_SOF_EN) ? 1 : 0,
1929                         (tmp_reg & USB_INTR_RESET_EN) ? 1 : 0,
1930                         (tmp_reg & USB_INTR_SYS_ERR_EN) ? 1 : 0,
1931                         (tmp_reg & USB_INTR_PTC_DETECT_EN) ? 1 : 0,
1932                         (tmp_reg & USB_INTR_ERR_INT_EN) ? 1 : 0,
1933                         (tmp_reg & USB_INTR_INT_EN) ? 1 : 0);
1934         size -= t;
1935         next += t;
1936
1937         tmp_reg = fsl_readl(&dr_regs->frindex);
1938         t = scnprintf(next, size,
1939                         "USB Frame Index Reg: Frame Number is 0x%x\n\n",
1940                         (tmp_reg & USB_FRINDEX_MASKS));
1941         size -= t;
1942         next += t;
1943
1944         tmp_reg = fsl_readl(&dr_regs->deviceaddr);
1945         t = scnprintf(next, size,
1946                         "USB Device Address Reg: Device Addr is 0x%x\n\n",
1947                         (tmp_reg & USB_DEVICE_ADDRESS_MASK));
1948         size -= t;
1949         next += t;
1950
1951         tmp_reg = fsl_readl(&dr_regs->endpointlistaddr);
1952         t = scnprintf(next, size,
1953                         "USB Endpoint List Address Reg: "
1954                         "Device Addr is 0x%x\n\n",
1955                         (tmp_reg & USB_EP_LIST_ADDRESS_MASK));
1956         size -= t;
1957         next += t;
1958
1959         tmp_reg = fsl_readl(&dr_regs->portsc1);
1960         t = scnprintf(next, size,
1961                 "USB Port Status&Control Reg:\n"
1962                 "Port Transceiver Type : %s Port Speed: %s\n"
1963                 "PHY Low Power Suspend: %s Port Reset: %s "
1964                 "Port Suspend Mode: %s\n"
1965                 "Over-current Change: %s "
1966                 "Port Enable/Disable Change: %s\n"
1967                 "Port Enabled/Disabled: %s "
1968                 "Current Connect Status: %s\n\n", ( {
1969                         char *s;
1970                         switch (tmp_reg & PORTSCX_PTS_FSLS) {
1971                         case PORTSCX_PTS_UTMI:
1972                                 s = "UTMI"; break;
1973                         case PORTSCX_PTS_ULPI:
1974                                 s = "ULPI "; break;
1975                         case PORTSCX_PTS_FSLS:
1976                                 s = "FS/LS Serial"; break;
1977                         default:
1978                                 s = "None"; break;
1979                         }
1980                         s;} ), ( {
1981                         char *s;
1982                         switch (tmp_reg & PORTSCX_PORT_SPEED_UNDEF) {
1983                         case PORTSCX_PORT_SPEED_FULL:
1984                                 s = "Full Speed"; break;
1985                         case PORTSCX_PORT_SPEED_LOW:
1986                                 s = "Low Speed"; break;
1987                         case PORTSCX_PORT_SPEED_HIGH:
1988                                 s = "High Speed"; break;
1989                         default:
1990                                 s = "Undefined"; break;
1991                         }
1992                         s;
1993                 } ),
1994                 (tmp_reg & PORTSCX_PHY_LOW_POWER_SPD) ?
1995                 "Normal PHY mode" : "Low power mode",
1996                 (tmp_reg & PORTSCX_PORT_RESET) ? "In Reset" :
1997                 "Not in Reset",
1998                 (tmp_reg & PORTSCX_PORT_SUSPEND) ? "In " : "Not in",
1999                 (tmp_reg & PORTSCX_OVER_CURRENT_CHG) ? "Dected" :
2000                 "No",
2001                 (tmp_reg & PORTSCX_PORT_EN_DIS_CHANGE) ? "Disable" :
2002                 "Not change",
2003                 (tmp_reg & PORTSCX_PORT_ENABLE) ? "Enable" :
2004                 "Not correct",
2005                 (tmp_reg & PORTSCX_CURRENT_CONNECT_STATUS) ?
2006                 "Attached" : "Not-Att");
2007         size -= t;
2008         next += t;
2009
2010         tmp_reg = fsl_readl(&dr_regs->usbmode);
2011         t = scnprintf(next, size,
2012                         "USB Mode Reg: Controller Mode is: %s\n\n", ( {
2013                                 char *s;
2014                                 switch (tmp_reg & USB_MODE_CTRL_MODE_HOST) {
2015                                 case USB_MODE_CTRL_MODE_IDLE:
2016                                         s = "Idle"; break;
2017                                 case USB_MODE_CTRL_MODE_DEVICE:
2018                                         s = "Device Controller"; break;
2019                                 case USB_MODE_CTRL_MODE_HOST:
2020                                         s = "Host Controller"; break;
2021                                 default:
2022                                         s = "None"; break;
2023                                 }
2024                                 s;
2025                         } ));
2026         size -= t;
2027         next += t;
2028
2029         tmp_reg = fsl_readl(&dr_regs->endptsetupstat);
2030         t = scnprintf(next, size,
2031                         "Endpoint Setup Status Reg: SETUP on ep 0x%x\n\n",
2032                         (tmp_reg & EP_SETUP_STATUS_MASK));
2033         size -= t;
2034         next += t;
2035
2036         for (i = 0; i < udc->max_ep / 2; i++) {
2037                 tmp_reg = fsl_readl(&dr_regs->endptctrl[i]);
2038                 t = scnprintf(next, size, "EP Ctrl Reg [0x%x]: = [0x%x]\n",
2039                                 i, tmp_reg);
2040                 size -= t;
2041                 next += t;
2042         }
2043         tmp_reg = fsl_readl(&dr_regs->endpointprime);
2044         t = scnprintf(next, size, "EP Prime Reg = [0x%x]\n\n", tmp_reg);
2045         size -= t;
2046         next += t;
2047
2048 #ifndef CONFIG_ARCH_MXC
2049         tmp_reg = usb_sys_regs->snoop1;
2050         t = scnprintf(next, size, "Snoop1 Reg : = [0x%x]\n\n", tmp_reg);
2051         size -= t;
2052         next += t;
2053
2054         tmp_reg = usb_sys_regs->control;
2055         t = scnprintf(next, size, "General Control Reg : = [0x%x]\n\n",
2056                         tmp_reg);
2057         size -= t;
2058         next += t;
2059 #endif
2060
2061         /* ------fsl_udc, fsl_ep, fsl_request structure information ----- */
2062         ep = &udc->eps[0];
2063         t = scnprintf(next, size, "For %s Maxpkt is 0x%x index is 0x%x\n",
2064                         ep->ep.name, ep_maxpacket(ep), ep_index(ep));
2065         size -= t;
2066         next += t;
2067
2068         if (list_empty(&ep->queue)) {
2069                 t = scnprintf(next, size, "its req queue is empty\n\n");
2070                 size -= t;
2071                 next += t;
2072         } else {
2073                 list_for_each_entry(req, &ep->queue, queue) {
2074                         t = scnprintf(next, size,
2075                                 "req %p actual 0x%x length 0x%x buf %p\n",
2076                                 &req->req, req->req.actual,
2077                                 req->req.length, req->req.buf);
2078                         size -= t;
2079                         next += t;
2080                 }
2081         }
2082         /* other gadget->eplist ep */
2083         list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2084                 if (ep->desc) {
2085                         t = scnprintf(next, size,
2086                                         "\nFor %s Maxpkt is 0x%x "
2087                                         "index is 0x%x\n",
2088                                         ep->ep.name, ep_maxpacket(ep),
2089                                         ep_index(ep));
2090                         size -= t;
2091                         next += t;
2092
2093                         if (list_empty(&ep->queue)) {
2094                                 t = scnprintf(next, size,
2095                                                 "its req queue is empty\n\n");
2096                                 size -= t;
2097                                 next += t;
2098                         } else {
2099                                 list_for_each_entry(req, &ep->queue, queue) {
2100                                         t = scnprintf(next, size,
2101                                                 "req %p actual 0x%x length "
2102                                                 "0x%x  buf %p\n",
2103                                                 &req->req, req->req.actual,
2104                                                 req->req.length, req->req.buf);
2105                                         size -= t;
2106                                         next += t;
2107                                         }       /* end for each_entry of ep req */
2108                                 }       /* end for else */
2109                         }       /* end for if(ep->queue) */
2110                 }               /* end (ep->desc) */
2111
2112         spin_unlock_irqrestore(&udc->lock, flags);
2113
2114         *eof = 1;
2115         return count - size;
2116 }
2117
2118 #define create_proc_file()      create_proc_read_entry(proc_filename, \
2119                                 0, NULL, fsl_proc_read, NULL)
2120
2121 #define remove_proc_file()      remove_proc_entry(proc_filename, NULL)
2122
2123 #else                           /* !CONFIG_USB_GADGET_DEBUG_FILES */
2124
2125 #define create_proc_file()      do {} while (0)
2126 #define remove_proc_file()      do {} while (0)
2127
2128 #endif                          /* CONFIG_USB_GADGET_DEBUG_FILES */
2129
2130 /*-------------------------------------------------------------------------*/
2131
2132 /* Release udc structures */
2133 static void fsl_udc_release(struct device *dev)
2134 {
2135         complete(udc_controller->done);
2136         dma_free_coherent(dev->parent, udc_controller->ep_qh_size,
2137                         udc_controller->ep_qh, udc_controller->ep_qh_dma);
2138         kfree(udc_controller);
2139 }
2140
2141 /******************************************************************
2142         Internal structure setup functions
2143 *******************************************************************/
2144 /*------------------------------------------------------------------
2145  * init resource for globle controller
2146  * Return the udc handle on success or NULL on failure
2147  ------------------------------------------------------------------*/
2148 static int __init struct_udc_setup(struct fsl_udc *udc,
2149                 struct platform_device *pdev)
2150 {
2151         struct fsl_usb2_platform_data *pdata;
2152         size_t size;
2153
2154         pdata = pdev->dev.platform_data;
2155         udc->phy_mode = pdata->phy_mode;
2156
2157         udc->eps = kzalloc(sizeof(struct fsl_ep) * udc->max_ep, GFP_KERNEL);
2158         if (!udc->eps) {
2159                 ERR("malloc fsl_ep failed\n");
2160                 return -1;
2161         }
2162
2163         /* initialized QHs, take care of alignment */
2164         size = udc->max_ep * sizeof(struct ep_queue_head);
2165         if (size < QH_ALIGNMENT)
2166                 size = QH_ALIGNMENT;
2167         else if ((size % QH_ALIGNMENT) != 0) {
2168                 size += QH_ALIGNMENT + 1;
2169                 size &= ~(QH_ALIGNMENT - 1);
2170         }
2171         udc->ep_qh = dma_alloc_coherent(&pdev->dev, size,
2172                                         &udc->ep_qh_dma, GFP_KERNEL);
2173         if (!udc->ep_qh) {
2174                 ERR("malloc QHs for udc failed\n");
2175                 kfree(udc->eps);
2176                 return -1;
2177         }
2178
2179         udc->ep_qh_size = size;
2180
2181         /* Initialize ep0 status request structure */
2182         /* FIXME: fsl_alloc_request() ignores ep argument */
2183         udc->status_req = container_of(fsl_alloc_request(NULL, GFP_KERNEL),
2184                         struct fsl_req, req);
2185         /* allocate a small amount of memory to get valid address */
2186         udc->status_req->req.buf = kmalloc(8, GFP_KERNEL);
2187         udc->status_req->req.dma = virt_to_phys(udc->status_req->req.buf);
2188
2189         udc->resume_state = USB_STATE_NOTATTACHED;
2190         udc->usb_state = USB_STATE_POWERED;
2191         udc->ep0_dir = 0;
2192         udc->remote_wakeup = 0; /* default to 0 on reset */
2193
2194         return 0;
2195 }
2196
2197 /*----------------------------------------------------------------
2198  * Setup the fsl_ep struct for eps
2199  * Link fsl_ep->ep to gadget->ep_list
2200  * ep0out is not used so do nothing here
2201  * ep0in should be taken care
2202  *--------------------------------------------------------------*/
2203 static int __init struct_ep_setup(struct fsl_udc *udc, unsigned char index,
2204                 char *name, int link)
2205 {
2206         struct fsl_ep *ep = &udc->eps[index];
2207
2208         ep->udc = udc;
2209         strcpy(ep->name, name);
2210         ep->ep.name = ep->name;
2211
2212         ep->ep.ops = &fsl_ep_ops;
2213         ep->stopped = 0;
2214
2215         /* for ep0: maxP defined in desc
2216          * for other eps, maxP is set by epautoconfig() called by gadget layer
2217          */
2218         ep->ep.maxpacket = (unsigned short) ~0;
2219
2220         /* the queue lists any req for this ep */
2221         INIT_LIST_HEAD(&ep->queue);
2222
2223         /* gagdet.ep_list used for ep_autoconfig so no ep0 */
2224         if (link)
2225                 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2226         ep->gadget = &udc->gadget;
2227         ep->qh = &udc->ep_qh[index];
2228
2229         return 0;
2230 }
2231
2232 /* Driver probe function
2233  * all intialization operations implemented here except enabling usb_intr reg
2234  * board setup should have been done in the platform code
2235  */
2236 static int __init fsl_udc_probe(struct platform_device *pdev)
2237 {
2238         struct resource *res;
2239         int ret = -ENODEV;
2240         unsigned int i;
2241         u32 dccparams;
2242
2243         if (strcmp(pdev->name, driver_name)) {
2244                 VDBG("Wrong device");
2245                 return -ENODEV;
2246         }
2247
2248         udc_controller = kzalloc(sizeof(struct fsl_udc), GFP_KERNEL);
2249         if (udc_controller == NULL) {
2250                 ERR("malloc udc failed\n");
2251                 return -ENOMEM;
2252         }
2253
2254         spin_lock_init(&udc_controller->lock);
2255         udc_controller->stopped = 1;
2256
2257         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2258         if (!res) {
2259                 ret = -ENXIO;
2260                 goto err_kfree;
2261         }
2262
2263         if (!request_mem_region(res->start, res->end - res->start + 1,
2264                                 driver_name)) {
2265                 ERR("request mem region for %s failed\n", pdev->name);
2266                 ret = -EBUSY;
2267                 goto err_kfree;
2268         }
2269
2270         dr_regs = ioremap(res->start, resource_size(res));
2271         if (!dr_regs) {
2272                 ret = -ENOMEM;
2273                 goto err_release_mem_region;
2274         }
2275
2276 #ifndef CONFIG_ARCH_MXC
2277         usb_sys_regs = (struct usb_sys_interface *)
2278                         ((u32)dr_regs + USB_DR_SYS_OFFSET);
2279 #endif
2280
2281         /* Initialize USB clocks */
2282         ret = fsl_udc_clk_init(pdev);
2283         if (ret < 0)
2284                 goto err_iounmap_noclk;
2285
2286         /* Read Device Controller Capability Parameters register */
2287         dccparams = fsl_readl(&dr_regs->dccparams);
2288         if (!(dccparams & DCCPARAMS_DC)) {
2289                 ERR("This SOC doesn't support device role\n");
2290                 ret = -ENODEV;
2291                 goto err_iounmap;
2292         }
2293         /* Get max device endpoints */
2294         /* DEN is bidirectional ep number, max_ep doubles the number */
2295         udc_controller->max_ep = (dccparams & DCCPARAMS_DEN_MASK) * 2;
2296
2297         udc_controller->irq = platform_get_irq(pdev, 0);
2298         if (!udc_controller->irq) {
2299                 ret = -ENODEV;
2300                 goto err_iounmap;
2301         }
2302
2303         ret = request_irq(udc_controller->irq, fsl_udc_irq, IRQF_SHARED,
2304                         driver_name, udc_controller);
2305         if (ret != 0) {
2306                 ERR("cannot request irq %d err %d\n",
2307                                 udc_controller->irq, ret);
2308                 goto err_iounmap;
2309         }
2310
2311         /* Initialize the udc structure including QH member and other member */
2312         if (struct_udc_setup(udc_controller, pdev)) {
2313                 ERR("Can't initialize udc data structure\n");
2314                 ret = -ENOMEM;
2315                 goto err_free_irq;
2316         }
2317
2318         /* initialize usb hw reg except for regs for EP,
2319          * leave usbintr reg untouched */
2320         dr_controller_setup(udc_controller);
2321
2322         fsl_udc_clk_finalize(pdev);
2323
2324         /* Setup gadget structure */
2325         udc_controller->gadget.ops = &fsl_gadget_ops;
2326         udc_controller->gadget.is_dualspeed = 1;
2327         udc_controller->gadget.ep0 = &udc_controller->eps[0].ep;
2328         INIT_LIST_HEAD(&udc_controller->gadget.ep_list);
2329         udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
2330         udc_controller->gadget.name = driver_name;
2331
2332         /* Setup gadget.dev and register with kernel */
2333         dev_set_name(&udc_controller->gadget.dev, "gadget");
2334         udc_controller->gadget.dev.release = fsl_udc_release;
2335         udc_controller->gadget.dev.parent = &pdev->dev;
2336         ret = device_register(&udc_controller->gadget.dev);
2337         if (ret < 0)
2338                 goto err_free_irq;
2339
2340         /* setup QH and epctrl for ep0 */
2341         ep0_setup(udc_controller);
2342
2343         /* setup udc->eps[] for ep0 */
2344         struct_ep_setup(udc_controller, 0, "ep0", 0);
2345         /* for ep0: the desc defined here;
2346          * for other eps, gadget layer called ep_enable with defined desc
2347          */
2348         udc_controller->eps[0].desc = &fsl_ep0_desc;
2349         udc_controller->eps[0].ep.maxpacket = USB_MAX_CTRL_PAYLOAD;
2350
2351         /* setup the udc->eps[] for non-control endpoints and link
2352          * to gadget.ep_list */
2353         for (i = 1; i < (int)(udc_controller->max_ep / 2); i++) {
2354                 char name[14];
2355
2356                 sprintf(name, "ep%dout", i);
2357                 struct_ep_setup(udc_controller, i * 2, name, 1);
2358                 sprintf(name, "ep%din", i);
2359                 struct_ep_setup(udc_controller, i * 2 + 1, name, 1);
2360         }
2361
2362         /* use dma_pool for TD management */
2363         udc_controller->td_pool = dma_pool_create("udc_td", &pdev->dev,
2364                         sizeof(struct ep_td_struct),
2365                         DTD_ALIGNMENT, UDC_DMA_BOUNDARY);
2366         if (udc_controller->td_pool == NULL) {
2367                 ret = -ENOMEM;
2368                 goto err_unregister;
2369         }
2370         create_proc_file();
2371         return 0;
2372
2373 err_unregister:
2374         device_unregister(&udc_controller->gadget.dev);
2375 err_free_irq:
2376         free_irq(udc_controller->irq, udc_controller);
2377 err_iounmap:
2378         fsl_udc_clk_release();
2379 err_iounmap_noclk:
2380         iounmap(dr_regs);
2381 err_release_mem_region:
2382         release_mem_region(res->start, res->end - res->start + 1);
2383 err_kfree:
2384         kfree(udc_controller);
2385         udc_controller = NULL;
2386         return ret;
2387 }
2388
2389 /* Driver removal function
2390  * Free resources and finish pending transactions
2391  */
2392 static int __exit fsl_udc_remove(struct platform_device *pdev)
2393 {
2394         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2395
2396         DECLARE_COMPLETION(done);
2397
2398         if (!udc_controller)
2399                 return -ENODEV;
2400         udc_controller->done = &done;
2401
2402         fsl_udc_clk_release();
2403
2404         /* DR has been stopped in usb_gadget_unregister_driver() */
2405         remove_proc_file();
2406
2407         /* Free allocated memory */
2408         kfree(udc_controller->status_req->req.buf);
2409         kfree(udc_controller->status_req);
2410         kfree(udc_controller->eps);
2411
2412         dma_pool_destroy(udc_controller->td_pool);
2413         free_irq(udc_controller->irq, udc_controller);
2414         iounmap(dr_regs);
2415         release_mem_region(res->start, res->end - res->start + 1);
2416
2417         device_unregister(&udc_controller->gadget.dev);
2418         /* free udc --wait for the release() finished */
2419         wait_for_completion(&done);
2420
2421         return 0;
2422 }
2423
2424 /*-----------------------------------------------------------------
2425  * Modify Power management attributes
2426  * Used by OTG statemachine to disable gadget temporarily
2427  -----------------------------------------------------------------*/
2428 static int fsl_udc_suspend(struct platform_device *pdev, pm_message_t state)
2429 {
2430         dr_controller_stop(udc_controller);
2431         return 0;
2432 }
2433
2434 /*-----------------------------------------------------------------
2435  * Invoked on USB resume. May be called in_interrupt.
2436  * Here we start the DR controller and enable the irq
2437  *-----------------------------------------------------------------*/
2438 static int fsl_udc_resume(struct platform_device *pdev)
2439 {
2440         /* Enable DR irq reg and set controller Run */
2441         if (udc_controller->stopped) {
2442                 dr_controller_setup(udc_controller);
2443                 dr_controller_run(udc_controller);
2444         }
2445         udc_controller->usb_state = USB_STATE_ATTACHED;
2446         udc_controller->ep0_state = WAIT_FOR_SETUP;
2447         udc_controller->ep0_dir = 0;
2448         return 0;
2449 }
2450
2451 /*-------------------------------------------------------------------------
2452         Register entry point for the peripheral controller driver
2453 --------------------------------------------------------------------------*/
2454
2455 static struct platform_driver udc_driver = {
2456         .remove  = __exit_p(fsl_udc_remove),
2457         /* these suspend and resume are not usb suspend and resume */
2458         .suspend = fsl_udc_suspend,
2459         .resume  = fsl_udc_resume,
2460         .driver  = {
2461                 .name = (char *)driver_name,
2462                 .owner = THIS_MODULE,
2463         },
2464 };
2465
2466 static int __init udc_init(void)
2467 {
2468         printk(KERN_INFO "%s (%s)\n", driver_desc, DRIVER_VERSION);
2469         return platform_driver_probe(&udc_driver, fsl_udc_probe);
2470 }
2471
2472 module_init(udc_init);
2473
2474 static void __exit udc_exit(void)
2475 {
2476         platform_driver_unregister(&udc_driver);
2477         printk(KERN_WARNING "%s unregistered\n", driver_desc);
2478 }
2479
2480 module_exit(udc_exit);
2481
2482 MODULE_DESCRIPTION(DRIVER_DESC);
2483 MODULE_AUTHOR(DRIVER_AUTHOR);
2484 MODULE_LICENSE("GPL");
2485 MODULE_ALIAS("platform:fsl-usb2-udc");