Merge branch 'llseek' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/bkl
[linux-2.6.git] / drivers / telephony / ixj.c
1 /****************************************************************************
2  *    ixj.c
3  *
4  * Device Driver for Quicknet Technologies, Inc.'s Telephony cards
5  * including the Internet PhoneJACK, Internet PhoneJACK Lite,
6  * Internet PhoneJACK PCI, Internet LineJACK, Internet PhoneCARD and
7  * SmartCABLE
8  *
9  *    (c) Copyright 1999-2001  Quicknet Technologies, Inc.
10  *
11  *    This program is free software; you can redistribute it and/or
12  *    modify it under the terms of the GNU General Public License
13  *    as published by the Free Software Foundation; either version
14  *    2 of the License, or (at your option) any later version.
15  *
16  * Author:          Ed Okerson, <eokerson@quicknet.net>
17  *
18  * Contributors:    Greg Herlein, <gherlein@quicknet.net>
19  *                  David W. Erhart, <derhart@quicknet.net>
20  *                  John Sellers, <jsellers@quicknet.net>
21  *                  Mike Preston, <mpreston@quicknet.net>
22  *    
23  * Fixes:           David Huggins-Daines, <dhd@cepstral.com>
24  *                  Fabio Ferrari, <fabio.ferrari@digitro.com.br>
25  *                  Artis Kugevics, <artis@mt.lv>
26  *                  Daniele Bellucci, <bellucda@tiscali.it>
27  *
28  * More information about the hardware related to this driver can be found  
29  * at our website:    http://www.quicknet.net
30  *
31  * IN NO EVENT SHALL QUICKNET TECHNOLOGIES, INC. BE LIABLE TO ANY PARTY FOR
32  * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
33  * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF QUICKNET
34  * TECHNOLOGIES, INC. HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35  *    
36  * QUICKNET TECHNOLOGIES, INC. SPECIFICALLY DISCLAIMS ANY WARRANTIES,
37  * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
38  * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
39  * ON AN "AS IS" BASIS, AND QUICKNET TECHNOLOGIES, INC. HAS NO OBLIGATION
40  * TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
41  *
42  ***************************************************************************/
43
44 /*
45  * Revision 4.8  2003/07/09 19:39:00  Daniele Bellucci
46  * Audit some copy_*_user and minor cleanup.
47  *
48  * Revision 4.7  2001/08/13 06:19:33  craigs
49  * Added additional changes from Alan Cox and John Anderson for
50  * 2.2 to 2.4 cleanup and bounds checking
51  *
52  * Revision 4.6  2001/08/13 01:05:05  craigs
53  * Really fixed PHONE_QUERY_CODEC problem this time
54  *
55  * Revision 4.5  2001/08/13 00:11:03  craigs
56  * Fixed problem in handling of PHONE_QUERY_CODEC, thanks to Shane Anderson
57  *
58  * Revision 4.4  2001/08/07 07:58:12  craigs
59  * Changed back to three digit version numbers
60  * Added tagbuild target to allow automatic and easy tagging of versions
61  *
62  * Revision 4.3  2001/08/07 07:24:47  craigs
63  * Added ixj-ver.h to allow easy configuration management of driver
64  * Added display of version number in /prox/ixj
65  *
66  * Revision 4.2  2001/08/06 07:07:19  craigs
67  * Reverted IXJCTL_DSP_TYPE and IXJCTL_DSP_VERSION files to original
68  * behaviour of returning int rather than short *
69  *
70  * Revision 4.1  2001/08/05 00:17:37  craigs
71  * More changes for correct PCMCIA installation
72  * Start of changes for backward Linux compatibility
73  *
74  * Revision 4.0  2001/08/04 12:33:12  craigs
75  * New version using GNU autoconf
76  *
77  * Revision 3.105  2001/07/20 23:14:32  eokerson
78  * More work on CallerID generation when using ring cadences.
79  *
80  * Revision 3.104  2001/07/06 01:33:55  eokerson
81  * Some bugfixes from Robert Vojta <vojta@ipex.cz> and a few mods to the Makefile.
82  *
83  * Revision 3.103  2001/07/05 19:20:16  eokerson
84  * Updated HOWTO
85  * Changed mic gain to 30dB on Internet LineJACK mic/speaker port.
86  *
87  * Revision 3.102  2001/07/03 23:51:21  eokerson
88  * Un-mute mic on Internet LineJACK when in speakerphone mode.
89  *
90  * Revision 3.101  2001/07/02 19:26:56  eokerson
91  * Removed initialiazation of ixjdebug and ixj_convert_loaded so they will go in the .bss instead of the .data
92  *
93  * Revision 3.100  2001/07/02 19:18:27  eokerson
94  * Changed driver to make dynamic allocation possible.  We now pass IXJ * between functions instead of array indexes.
95  * Fixed the way the POTS and PSTN ports interact during a PSTN call to allow local answering.
96  * Fixed speaker mode on Internet LineJACK.
97  *
98  * Revision 3.99  2001/05/09 14:11:16  eokerson
99  * Fixed kmalloc error in ixj_build_filter_cadence.  Thanks David Chan <cat@waulogy.stanford.edu>.
100  *
101  * Revision 3.98  2001/05/08 19:55:33  eokerson
102  * Fixed POTS hookstate detection while it is connected to PSTN port.
103  *
104  * Revision 3.97  2001/05/08 00:01:04  eokerson
105  * Fixed kernel oops when sending caller ID data.
106  *
107  * Revision 3.96  2001/05/04 23:09:30  eokerson
108  * Now uses one kernel timer for each card, instead of one for the entire driver.
109  *
110  * Revision 3.95  2001/04/25 22:06:47  eokerson
111  * Fixed squawking at beginning of some G.723.1 calls.
112  *
113  * Revision 3.94  2001/04/03 23:42:00  eokerson
114  * Added linear volume ioctls
115  * Added raw filter load ioctl
116  *
117  * Revision 3.93  2001/02/27 01:00:06  eokerson
118  * Fixed blocking in CallerID.
119  * Reduced size of ixj structure for smaller driver footprint.
120  *
121  * Revision 3.92  2001/02/20 22:02:59  eokerson
122  * Fixed isapnp and pcmcia module compatibility for 2.4.x kernels.
123  * Improved PSTN ring detection.
124  * Fixed wink generation on POTS ports.
125  *
126  * Revision 3.91  2001/02/13 00:55:44  eokerson
127  * Turn AEC back on after changing frame sizes.
128  *
129  * Revision 3.90  2001/02/12 16:42:00  eokerson
130  * Added ALAW codec, thanks to Fabio Ferrari for the table based converters to make ALAW from ULAW.
131  *
132  * Revision 3.89  2001/02/12 15:41:16  eokerson
133  * Fix from Artis Kugevics - Tone gains were not being set correctly.
134  *
135  * Revision 3.88  2001/02/05 23:25:42  eokerson
136  * Fixed lockup bugs with deregister.
137  *
138  * Revision 3.87  2001/01/29 21:00:39  eokerson
139  * Fix from Fabio Ferrari <fabio.ferrari@digitro.com.br> to properly handle EAGAIN and EINTR during non-blocking write.
140  * Updated copyright date.
141  *
142  * Revision 3.86  2001/01/23 23:53:46  eokerson
143  * Fixes to G.729 compatibility.
144  *
145  * Revision 3.85  2001/01/23 21:30:36  eokerson
146  * Added verbage about cards supported.
147  * Removed commands that put the card in low power mode at some times that it should not be in low power mode.
148  *
149  * Revision 3.84  2001/01/22 23:32:10  eokerson
150  * Some bugfixes from David Huggins-Daines, <dhd@cepstral.com> and other cleanups.
151  *
152  * Revision 3.83  2001/01/19 14:51:41  eokerson
153  * Fixed ixj_WriteDSPCommand to decrement usage counter when command fails.
154  *
155  * Revision 3.82  2001/01/19 00:34:49  eokerson
156  * Added verbosity to write overlap errors.
157  *
158  * Revision 3.81  2001/01/18 23:56:54  eokerson
159  * Fixed PSTN line test functions.
160  *
161  * Revision 3.80  2001/01/18 22:29:27  eokerson
162  * Updated AEC/AGC values for different cards.
163  *
164  * Revision 3.79  2001/01/17 02:58:54  eokerson
165  * Fixed AEC reset after Caller ID.
166  * Fixed Codec lockup after Caller ID on Call Waiting when not using 30ms frames.
167  *
168  * Revision 3.78  2001/01/16 19:43:09  eokerson
169  * Added support for Linux 2.4.x kernels.
170  *
171  * Revision 3.77  2001/01/09 04:00:52  eokerson
172  * Linetest will now test the line, even if it has previously succeded.
173  *
174  * Revision 3.76  2001/01/08 19:27:00  eokerson
175  * Fixed problem with standard cable on Internet PhoneCARD.
176  *
177  * Revision 3.75  2000/12/22 16:52:14  eokerson
178  * Modified to allow hookstate detection on the POTS port when the PSTN port is selected.
179  *
180  * Revision 3.74  2000/12/08 22:41:50  eokerson
181  * Added capability for G729B.
182  *
183  * Revision 3.73  2000/12/07 23:35:16  eokerson
184  * Added capability to have different ring pattern before CallerID data.
185  * Added hookstate checks in CallerID routines to stop FSK.
186  *
187  * Revision 3.72  2000/12/06 19:31:31  eokerson
188  * Modified signal behavior to only send one signal per event.
189  *
190  * Revision 3.71  2000/12/06 03:23:08  eokerson
191  * Fixed CallerID on Call Waiting.
192  *
193  * Revision 3.70  2000/12/04 21:29:37  eokerson
194  * Added checking to Smart Cable gain functions.
195  *
196  * Revision 3.69  2000/12/04 21:05:20  eokerson
197  * Changed ixjdebug levels.
198  * Added ioctls to change gains in Internet Phone CARD Smart Cable.
199  *
200  * Revision 3.68  2000/12/04 00:17:21  craigs
201  * Changed mixer voice gain to +6dB rather than 0dB
202  *
203  * Revision 3.67  2000/11/30 21:25:51  eokerson
204  * Fixed write signal errors.
205  *
206  * Revision 3.66  2000/11/29 22:42:44  eokerson
207  * Fixed PSTN ring detect problems.
208  *
209  * Revision 3.65  2000/11/29 07:31:55  craigs
210  * Added new 425Hz filter co-efficients
211  * Added card-specific DTMF prescaler initialisation
212  *
213  * Revision 3.64  2000/11/28 14:03:32  craigs
214  * Changed certain mixer initialisations to be 0dB rather than 12dB
215  * Added additional information to /proc/ixj
216  *
217  * Revision 3.63  2000/11/28 11:38:41  craigs
218  * Added display of AEC modes in AUTO and AGC mode
219  *
220  * Revision 3.62  2000/11/28 04:05:44  eokerson
221  * Improved PSTN ring detection routine.
222  *
223  * Revision 3.61  2000/11/27 21:53:12  eokerson
224  * Fixed flash detection.
225  *
226  * Revision 3.60  2000/11/27 15:57:29  eokerson
227  * More work on G.729 load routines.
228  *
229  * Revision 3.59  2000/11/25 21:55:12  eokerson
230  * Fixed errors in G.729 load routine.
231  *
232  * Revision 3.58  2000/11/25 04:08:29  eokerson
233  * Added board locks around G.729 and TS85 load routines.
234  *
235  * Revision 3.57  2000/11/24 05:35:17  craigs
236  * Added ability to retrieve mixer values on LineJACK
237  * Added complete initialisation of all mixer values at startup
238  * Fixed spelling mistake
239  *
240  * Revision 3.56  2000/11/23 02:52:11  robertj
241  * Added cvs change log keyword.
242  * Fixed bug in capabilities list when using G.729 module.
243  *
244  */
245
246 #include "ixj-ver.h"
247
248 #define PERFMON_STATS
249 #define IXJDEBUG 0
250 #define MAXRINGS 5
251
252 #include <linux/module.h>
253
254 #include <linux/init.h>
255 #include <linux/sched.h>
256 #include <linux/kernel.h>       /* printk() */
257 #include <linux/fs.h>           /* everything... */
258 #include <linux/errno.h>        /* error codes */
259 #include <linux/slab.h>
260 #include <linux/mutex.h>
261 #include <linux/mm.h>
262 #include <linux/ioport.h>
263 #include <linux/interrupt.h>
264 #include <linux/proc_fs.h>
265 #include <linux/poll.h>
266 #include <linux/timer.h>
267 #include <linux/delay.h>
268 #include <linux/pci.h>
269
270 #include <asm/io.h>
271 #include <asm/uaccess.h>
272
273 #include <linux/isapnp.h>
274
275 #include "ixj.h"
276
277 #define TYPE(inode) (iminor(inode) >> 4)
278 #define NUM(inode) (iminor(inode) & 0xf)
279
280 static DEFINE_MUTEX(ixj_mutex);
281 static int ixjdebug;
282 static int hertz = HZ;
283 static int samplerate = 100;
284
285 module_param(ixjdebug, int, 0);
286
287 static struct pci_device_id ixj_pci_tbl[] __devinitdata = {
288         { PCI_VENDOR_ID_QUICKNET, PCI_DEVICE_ID_QUICKNET_XJ,
289           PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
290         { }
291 };
292
293 MODULE_DEVICE_TABLE(pci, ixj_pci_tbl);
294
295 /************************************************************************
296 *
297 * ixjdebug meanings are now bit mapped instead of level based
298 * Values can be or'ed together to turn on multiple messages
299 *
300 * bit  0 (0x0001) = any failure
301 * bit  1 (0x0002) = general messages
302 * bit  2 (0x0004) = POTS ringing related
303 * bit  3 (0x0008) = PSTN events
304 * bit  4 (0x0010) = PSTN Cadence state details
305 * bit  5 (0x0020) = Tone detection triggers
306 * bit  6 (0x0040) = Tone detection cadence details
307 * bit  7 (0x0080) = ioctl tracking
308 * bit  8 (0x0100) = signal tracking
309 * bit  9 (0x0200) = CallerID generation details
310 *
311 ************************************************************************/
312
313 #ifdef IXJ_DYN_ALLOC
314
315 static IXJ *ixj[IXJMAX];
316 #define get_ixj(b)      ixj[(b)]
317
318 /*
319  *      Allocate a free IXJ device
320  */
321  
322 static IXJ *ixj_alloc()
323 {
324         for(cnt=0; cnt<IXJMAX; cnt++)
325         {
326                 if(ixj[cnt] == NULL || !ixj[cnt]->DSPbase)
327                 {
328                         j = kmalloc(sizeof(IXJ), GFP_KERNEL);
329                         if (j == NULL)
330                                 return NULL;
331                         ixj[cnt] = j;
332                         return j;
333                 }
334         }
335         return NULL;
336 }
337
338 static void ixj_fsk_free(IXJ *j)
339 {
340         kfree(j->fskdata);
341         j->fskdata = NULL;
342 }
343
344 static void ixj_fsk_alloc(IXJ *j)
345 {
346         if(!j->fskdata) {
347                 j->fskdata = kmalloc(8000, GFP_KERNEL);
348                 if (!j->fskdata) {
349                         if(ixjdebug & 0x0200) {
350                                 printk("IXJ phone%d - allocate failed\n", j->board);
351                         }
352                         return;
353                 } else {
354                         j->fsksize = 8000;
355                         if(ixjdebug & 0x0200) {
356                                 printk("IXJ phone%d - allocate succeded\n", j->board);
357                         }
358                 }
359         }
360 }
361
362 #else
363
364 static IXJ ixj[IXJMAX];
365 #define get_ixj(b)      (&ixj[(b)])
366
367 /*
368  *      Allocate a free IXJ device
369  */
370  
371 static IXJ *ixj_alloc(void)
372 {
373         int cnt;
374         for(cnt=0; cnt<IXJMAX; cnt++) {
375                 if(!ixj[cnt].DSPbase)
376                         return &ixj[cnt];
377         }
378         return NULL;
379 }
380
381 static inline void ixj_fsk_free(IXJ *j) {;}
382
383 static inline void ixj_fsk_alloc(IXJ *j)
384 {
385         j->fsksize = 8000;
386 }
387
388 #endif
389
390 #ifdef PERFMON_STATS
391 #define ixj_perfmon(x)  ((x)++)
392 #else
393 #define ixj_perfmon(x)  do { } while(0)
394 #endif
395
396 static int ixj_convert_loaded;
397
398 static int ixj_WriteDSPCommand(unsigned short, IXJ *j);
399
400 /************************************************************************
401 *
402 * These are function definitions to allow external modules to register
403 * enhanced functionality call backs.
404 *
405 ************************************************************************/
406
407 static int Stub(IXJ * J, unsigned long arg)
408 {
409         return 0;
410 }
411
412 static IXJ_REGFUNC ixj_PreRead = &Stub;
413 static IXJ_REGFUNC ixj_PostRead = &Stub;
414 static IXJ_REGFUNC ixj_PreWrite = &Stub;
415 static IXJ_REGFUNC ixj_PostWrite = &Stub;
416
417 static void ixj_read_frame(IXJ *j);
418 static void ixj_write_frame(IXJ *j);
419 static void ixj_init_timer(IXJ *j);
420 static void ixj_add_timer(IXJ * j);
421 static void ixj_timeout(unsigned long ptr);
422 static int read_filters(IXJ *j);
423 static int LineMonitor(IXJ *j);
424 static int ixj_fasync(int fd, struct file *, int mode);
425 static int ixj_set_port(IXJ *j, int arg);
426 static int ixj_set_pots(IXJ *j, int arg);
427 static int ixj_hookstate(IXJ *j);
428 static int ixj_record_start(IXJ *j);
429 static void ixj_record_stop(IXJ *j);
430 static void set_rec_volume(IXJ *j, int volume);
431 static int get_rec_volume(IXJ *j);
432 static int set_rec_codec(IXJ *j, int rate);
433 static void ixj_vad(IXJ *j, int arg);
434 static int ixj_play_start(IXJ *j);
435 static void ixj_play_stop(IXJ *j);
436 static int ixj_set_tone_on(unsigned short arg, IXJ *j);
437 static int ixj_set_tone_off(unsigned short, IXJ *j);
438 static int ixj_play_tone(IXJ *j, char tone);
439 static void ixj_aec_start(IXJ *j, int level);
440 static int idle(IXJ *j);
441 static void ixj_ring_on(IXJ *j);
442 static void ixj_ring_off(IXJ *j);
443 static void aec_stop(IXJ *j);
444 static void ixj_ringback(IXJ *j);
445 static void ixj_busytone(IXJ *j);
446 static void ixj_dialtone(IXJ *j);
447 static void ixj_cpt_stop(IXJ *j);
448 static char daa_int_read(IXJ *j);
449 static char daa_CR_read(IXJ *j, int cr);
450 static int daa_set_mode(IXJ *j, int mode);
451 static int ixj_linetest(IXJ *j);
452 static int ixj_daa_write(IXJ *j);
453 static int ixj_daa_cid_read(IXJ *j);
454 static void DAA_Coeff_US(IXJ *j);
455 static void DAA_Coeff_UK(IXJ *j);
456 static void DAA_Coeff_France(IXJ *j);
457 static void DAA_Coeff_Germany(IXJ *j);
458 static void DAA_Coeff_Australia(IXJ *j);
459 static void DAA_Coeff_Japan(IXJ *j);
460 static int ixj_init_filter(IXJ *j, IXJ_FILTER * jf);
461 static int ixj_init_filter_raw(IXJ *j, IXJ_FILTER_RAW * jfr);
462 static int ixj_init_tone(IXJ *j, IXJ_TONE * ti);
463 static int ixj_build_cadence(IXJ *j, IXJ_CADENCE __user * cp);
464 static int ixj_build_filter_cadence(IXJ *j, IXJ_FILTER_CADENCE __user * cp);
465 /* Serial Control Interface funtions */
466 static int SCI_Control(IXJ *j, int control);
467 static int SCI_Prepare(IXJ *j);
468 static int SCI_WaitHighSCI(IXJ *j);
469 static int SCI_WaitLowSCI(IXJ *j);
470 static DWORD PCIEE_GetSerialNumber(WORD wAddress);
471 static int ixj_PCcontrol_wait(IXJ *j);
472 static void ixj_pre_cid(IXJ *j);
473 static void ixj_write_cid(IXJ *j);
474 static void ixj_write_cid_bit(IXJ *j, int bit);
475 static int set_base_frame(IXJ *j, int size);
476 static int set_play_codec(IXJ *j, int rate);
477 static void set_rec_depth(IXJ *j, int depth);
478 static int ixj_mixer(long val, IXJ *j);
479
480 /************************************************************************
481 CT8020/CT8021 Host Programmers Model
482 Host address    Function                                        Access
483 DSPbase +
484 0-1             Aux Software Status Register (reserved)         Read Only
485 2-3             Software Status Register                        Read Only
486 4-5             Aux Software Control Register (reserved)        Read Write
487 6-7             Software Control Register                       Read Write
488 8-9             Hardware Status Register                        Read Only
489 A-B             Hardware Control Register                       Read Write
490 C-D Host Transmit (Write) Data Buffer Access Port (buffer input)Write Only
491 E-F Host Recieve (Read) Data Buffer Access Port (buffer input)  Read Only
492 ************************************************************************/
493
494 static inline void ixj_read_HSR(IXJ *j)
495 {
496         j->hsr.bytes.low = inb_p(j->DSPbase + 8);
497         j->hsr.bytes.high = inb_p(j->DSPbase + 9);
498 }
499
500 static inline int IsControlReady(IXJ *j)
501 {
502         ixj_read_HSR(j);
503         return j->hsr.bits.controlrdy ? 1 : 0;
504 }
505
506 static inline int IsPCControlReady(IXJ *j)
507 {
508         j->pccr1.byte = inb_p(j->XILINXbase + 3);
509         return j->pccr1.bits.crr ? 1 : 0;
510 }
511
512 static inline int IsStatusReady(IXJ *j)
513 {
514         ixj_read_HSR(j);
515         return j->hsr.bits.statusrdy ? 1 : 0;
516 }
517
518 static inline int IsRxReady(IXJ *j)
519 {
520         ixj_read_HSR(j);
521         ixj_perfmon(j->rxreadycheck);
522         return j->hsr.bits.rxrdy ? 1 : 0;
523 }
524
525 static inline int IsTxReady(IXJ *j)
526 {
527         ixj_read_HSR(j);
528         ixj_perfmon(j->txreadycheck);
529         return j->hsr.bits.txrdy ? 1 : 0;
530 }
531
532 static inline void set_play_volume(IXJ *j, int volume)
533 {
534         if (ixjdebug & 0x0002)
535                 printk(KERN_INFO "IXJ: /dev/phone%d Setting Play Volume to 0x%4.4x\n", j->board, volume);
536         ixj_WriteDSPCommand(0xCF02, j);
537         ixj_WriteDSPCommand(volume, j);
538 }
539
540 static int set_play_volume_linear(IXJ *j, int volume)
541 {
542         int newvolume, dspplaymax;
543
544         if (ixjdebug & 0x0002)
545                 printk(KERN_INFO "IXJ: /dev/phone %d Setting Linear Play Volume to 0x%4.4x\n", j->board, volume);
546         if(volume > 100 || volume < 0) {
547                 return -1;
548         }
549
550         /* This should normalize the perceived volumes between the different cards caused by differences in the hardware */
551         switch (j->cardtype) {
552         case QTI_PHONEJACK:
553                 dspplaymax = 0x380;
554                 break;
555         case QTI_LINEJACK:
556                 if(j->port == PORT_PSTN) {
557                         dspplaymax = 0x48;
558                 } else {
559                         dspplaymax = 0x100;
560                 }
561                 break;
562         case QTI_PHONEJACK_LITE:
563                 dspplaymax = 0x380;
564                 break;
565         case QTI_PHONEJACK_PCI:
566                 dspplaymax = 0x6C;
567                 break;
568         case QTI_PHONECARD:
569                 dspplaymax = 0x50;
570                 break;
571         default:
572                 return -1;
573         }
574         newvolume = (dspplaymax * volume) / 100;
575         set_play_volume(j, newvolume);
576         return 0;
577 }
578
579 static inline void set_play_depth(IXJ *j, int depth)
580 {
581         if (depth > 60)
582                 depth = 60;
583         if (depth < 0)
584                 depth = 0;
585         ixj_WriteDSPCommand(0x5280 + depth, j);
586 }
587
588 static inline int get_play_volume(IXJ *j)
589 {
590         ixj_WriteDSPCommand(0xCF00, j);
591         return j->ssr.high << 8 | j->ssr.low;
592 }
593
594 static int get_play_volume_linear(IXJ *j)
595 {
596         int volume, newvolume, dspplaymax;
597
598         /* This should normalize the perceived volumes between the different cards caused by differences in the hardware */
599         switch (j->cardtype) {
600         case QTI_PHONEJACK:
601                 dspplaymax = 0x380;
602                 break;
603         case QTI_LINEJACK:
604                 if(j->port == PORT_PSTN) {
605                         dspplaymax = 0x48;
606                 } else {
607                         dspplaymax = 0x100;
608                 }
609                 break;
610         case QTI_PHONEJACK_LITE:
611                 dspplaymax = 0x380;
612                 break;
613         case QTI_PHONEJACK_PCI:
614                 dspplaymax = 0x6C;
615                 break;
616         case QTI_PHONECARD:
617                 dspplaymax = 100;
618                 break;
619         default:
620                 return -1;
621         }
622         volume = get_play_volume(j);
623         newvolume = (volume * 100) / dspplaymax;
624         if(newvolume > 100)
625                 newvolume = 100;
626         return newvolume;
627 }
628
629 static inline BYTE SLIC_GetState(IXJ *j)
630 {
631         if (j->cardtype == QTI_PHONECARD) {
632                 j->pccr1.byte = 0;
633                 j->psccr.bits.dev = 3;
634                 j->psccr.bits.rw = 1;
635                 outw_p(j->psccr.byte << 8, j->XILINXbase + 0x00);
636                 ixj_PCcontrol_wait(j);
637                 j->pslic.byte = inw_p(j->XILINXbase + 0x00) & 0xFF;
638                 ixj_PCcontrol_wait(j);
639                 if (j->pslic.bits.powerdown)
640                         return PLD_SLIC_STATE_OC;
641                 else if (!j->pslic.bits.ring0 && !j->pslic.bits.ring1)
642                         return PLD_SLIC_STATE_ACTIVE;
643                 else
644                         return PLD_SLIC_STATE_RINGING;
645         } else {
646                 j->pld_slicr.byte = inb_p(j->XILINXbase + 0x01);
647         }
648         return j->pld_slicr.bits.state;
649 }
650
651 static bool SLIC_SetState(BYTE byState, IXJ *j)
652 {
653         bool fRetVal = false;
654
655         if (j->cardtype == QTI_PHONECARD) {
656                 if (j->flags.pcmciasct) {
657                         switch (byState) {
658                         case PLD_SLIC_STATE_TIPOPEN:
659                         case PLD_SLIC_STATE_OC:
660                                 j->pslic.bits.powerdown = 1;
661                                 j->pslic.bits.ring0 = j->pslic.bits.ring1 = 0;
662                                 fRetVal = true;
663                                 break;
664                         case PLD_SLIC_STATE_RINGING:
665                                 if (j->readers || j->writers) {
666                                         j->pslic.bits.powerdown = 0;
667                                         j->pslic.bits.ring0 = 1;
668                                         j->pslic.bits.ring1 = 0;
669                                         fRetVal = true;
670                                 }
671                                 break;
672                         case PLD_SLIC_STATE_OHT:        /* On-hook transmit */
673
674                         case PLD_SLIC_STATE_STANDBY:
675                         case PLD_SLIC_STATE_ACTIVE:
676                                 if (j->readers || j->writers) {
677                                         j->pslic.bits.powerdown = 0;
678                                 } else {
679                                         j->pslic.bits.powerdown = 1;
680                                 }
681                                 j->pslic.bits.ring0 = j->pslic.bits.ring1 = 0;
682                                 fRetVal = true;
683                                 break;
684                         case PLD_SLIC_STATE_APR:        /* Active polarity reversal */
685
686                         case PLD_SLIC_STATE_OHTPR:      /* OHT polarity reversal */
687
688                         default:
689                                 fRetVal = false;
690                                 break;
691                         }
692                         j->psccr.bits.dev = 3;
693                         j->psccr.bits.rw = 0;
694                         outw_p(j->psccr.byte << 8 | j->pslic.byte, j->XILINXbase + 0x00);
695                         ixj_PCcontrol_wait(j);
696                 }
697         } else {
698                 /* Set the C1, C2, C3 & B2EN signals. */
699                 switch (byState) {
700                 case PLD_SLIC_STATE_OC:
701                         j->pld_slicw.bits.c1 = 0;
702                         j->pld_slicw.bits.c2 = 0;
703                         j->pld_slicw.bits.c3 = 0;
704                         j->pld_slicw.bits.b2en = 0;
705                         outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
706                         fRetVal = true;
707                         break;
708                 case PLD_SLIC_STATE_RINGING:
709                         j->pld_slicw.bits.c1 = 1;
710                         j->pld_slicw.bits.c2 = 0;
711                         j->pld_slicw.bits.c3 = 0;
712                         j->pld_slicw.bits.b2en = 1;
713                         outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
714                         fRetVal = true;
715                         break;
716                 case PLD_SLIC_STATE_ACTIVE:
717                         j->pld_slicw.bits.c1 = 0;
718                         j->pld_slicw.bits.c2 = 1;
719                         j->pld_slicw.bits.c3 = 0;
720                         j->pld_slicw.bits.b2en = 0;
721                         outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
722                         fRetVal = true;
723                         break;
724                 case PLD_SLIC_STATE_OHT:        /* On-hook transmit */
725
726                         j->pld_slicw.bits.c1 = 1;
727                         j->pld_slicw.bits.c2 = 1;
728                         j->pld_slicw.bits.c3 = 0;
729                         j->pld_slicw.bits.b2en = 0;
730                         outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
731                         fRetVal = true;
732                         break;
733                 case PLD_SLIC_STATE_TIPOPEN:
734                         j->pld_slicw.bits.c1 = 0;
735                         j->pld_slicw.bits.c2 = 0;
736                         j->pld_slicw.bits.c3 = 1;
737                         j->pld_slicw.bits.b2en = 0;
738                         outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
739                         fRetVal = true;
740                         break;
741                 case PLD_SLIC_STATE_STANDBY:
742                         j->pld_slicw.bits.c1 = 1;
743                         j->pld_slicw.bits.c2 = 0;
744                         j->pld_slicw.bits.c3 = 1;
745                         j->pld_slicw.bits.b2en = 1;
746                         outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
747                         fRetVal = true;
748                         break;
749                 case PLD_SLIC_STATE_APR:        /* Active polarity reversal */
750
751                         j->pld_slicw.bits.c1 = 0;
752                         j->pld_slicw.bits.c2 = 1;
753                         j->pld_slicw.bits.c3 = 1;
754                         j->pld_slicw.bits.b2en = 0;
755                         outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
756                         fRetVal = true;
757                         break;
758                 case PLD_SLIC_STATE_OHTPR:      /* OHT polarity reversal */
759
760                         j->pld_slicw.bits.c1 = 1;
761                         j->pld_slicw.bits.c2 = 1;
762                         j->pld_slicw.bits.c3 = 1;
763                         j->pld_slicw.bits.b2en = 0;
764                         outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
765                         fRetVal = true;
766                         break;
767                 default:
768                         fRetVal = false;
769                         break;
770                 }
771         }
772
773         return fRetVal;
774 }
775
776 static int ixj_wink(IXJ *j)
777 {
778         BYTE slicnow;
779
780         slicnow = SLIC_GetState(j);
781
782         j->pots_winkstart = jiffies;
783         SLIC_SetState(PLD_SLIC_STATE_OC, j);
784
785         msleep(jiffies_to_msecs(j->winktime));
786
787         SLIC_SetState(slicnow, j);
788         return 0;
789 }
790
791 static void ixj_init_timer(IXJ *j)
792 {
793         init_timer(&j->timer);
794         j->timer.function = ixj_timeout;
795         j->timer.data = (unsigned long)j;
796 }
797
798 static void ixj_add_timer(IXJ *j)
799 {
800         j->timer.expires = jiffies + (hertz / samplerate);
801         add_timer(&j->timer);
802 }
803
804 static void ixj_tone_timeout(IXJ *j)
805 {
806         IXJ_TONE ti;
807
808         j->tone_state++;
809         if (j->tone_state == 3) {
810                 j->tone_state = 0;
811                 if (j->cadence_t) {
812                         j->tone_cadence_state++;
813                         if (j->tone_cadence_state >= j->cadence_t->elements_used) {
814                                 switch (j->cadence_t->termination) {
815                                 case PLAY_ONCE:
816                                         ixj_cpt_stop(j);
817                                         break;
818                                 case REPEAT_LAST_ELEMENT:
819                                         j->tone_cadence_state--;
820                                         ixj_play_tone(j, j->cadence_t->ce[j->tone_cadence_state].index);
821                                         break;
822                                 case REPEAT_ALL:
823                                         j->tone_cadence_state = 0;
824                                         if (j->cadence_t->ce[j->tone_cadence_state].freq0) {
825                                                 ti.tone_index = j->cadence_t->ce[j->tone_cadence_state].index;
826                                                 ti.freq0 = j->cadence_t->ce[j->tone_cadence_state].freq0;
827                                                 ti.gain0 = j->cadence_t->ce[j->tone_cadence_state].gain0;
828                                                 ti.freq1 = j->cadence_t->ce[j->tone_cadence_state].freq1;
829                                                 ti.gain1 = j->cadence_t->ce[j->tone_cadence_state].gain1;
830                                                 ixj_init_tone(j, &ti);
831                                         }
832                                         ixj_set_tone_on(j->cadence_t->ce[0].tone_on_time, j);
833                                         ixj_set_tone_off(j->cadence_t->ce[0].tone_off_time, j);
834                                         ixj_play_tone(j, j->cadence_t->ce[0].index);
835                                         break;
836                                 }
837                         } else {
838                                 if (j->cadence_t->ce[j->tone_cadence_state].gain0) {
839                                         ti.tone_index = j->cadence_t->ce[j->tone_cadence_state].index;
840                                         ti.freq0 = j->cadence_t->ce[j->tone_cadence_state].freq0;
841                                         ti.gain0 = j->cadence_t->ce[j->tone_cadence_state].gain0;
842                                         ti.freq1 = j->cadence_t->ce[j->tone_cadence_state].freq1;
843                                         ti.gain1 = j->cadence_t->ce[j->tone_cadence_state].gain1;
844                                         ixj_init_tone(j, &ti);
845                                 }
846                                 ixj_set_tone_on(j->cadence_t->ce[j->tone_cadence_state].tone_on_time, j);
847                                 ixj_set_tone_off(j->cadence_t->ce[j->tone_cadence_state].tone_off_time, j);
848                                 ixj_play_tone(j, j->cadence_t->ce[j->tone_cadence_state].index);
849                         }
850                 }
851         }
852 }
853
854 static inline void ixj_kill_fasync(IXJ *j, IXJ_SIGEVENT event, int dir)
855 {
856         if(j->ixj_signals[event]) {
857                 if(ixjdebug & 0x0100)
858                         printk("Sending signal for event %d\n", event);
859                         /* Send apps notice of change */
860                 /* see config.h for macro definition */
861                 kill_fasync(&(j->async_queue), j->ixj_signals[event], dir);
862         }
863 }
864
865 static void ixj_pstn_state(IXJ *j)
866 {
867         int var;
868         union XOPXR0 XR0, daaint;
869
870         var = 10;
871
872         XR0.reg = j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.reg;
873         daaint.reg = 0;
874         XR0.bitreg.RMR = j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.bitreg.RMR;
875
876         j->pld_scrr.byte = inb_p(j->XILINXbase);
877         if (j->pld_scrr.bits.daaflag) {
878                 daa_int_read(j);
879                 if(j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.RING) {
880                         if(time_after(jiffies, j->pstn_sleeptil) && !(j->flags.pots_pstn && j->hookstate)) {
881                                 daaint.bitreg.RING = 1;
882                                 if(ixjdebug & 0x0008) {
883                                         printk(KERN_INFO "IXJ DAA Ring Interrupt /dev/phone%d at %ld\n", j->board, jiffies);
884                                 }
885                         } else {
886                                 daa_set_mode(j, SOP_PU_RESET);
887                         }
888                 }
889                 if(j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.Caller_ID) {
890                         daaint.bitreg.Caller_ID = 1;
891                         j->pstn_cid_intr = 1;
892                         j->pstn_cid_received = jiffies;
893                         if(ixjdebug & 0x0008) {
894                                 printk(KERN_INFO "IXJ DAA Caller_ID Interrupt /dev/phone%d at %ld\n", j->board, jiffies);
895                         }
896                 }
897                 if(j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.Cadence) {
898                         daaint.bitreg.Cadence = 1;
899                         if(ixjdebug & 0x0008) {
900                                 printk(KERN_INFO "IXJ DAA Cadence Interrupt /dev/phone%d at %ld\n", j->board, jiffies);
901                         }
902                 }
903                 if(j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.VDD_OK != XR0.bitreg.VDD_OK) {
904                         daaint.bitreg.VDD_OK = 1;
905                         daaint.bitreg.SI_0 = j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.VDD_OK;
906                 }
907         }
908         daa_CR_read(j, 1);
909         if(j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.bitreg.RMR != XR0.bitreg.RMR && time_after(jiffies, j->pstn_sleeptil) && !(j->flags.pots_pstn && j->hookstate)) {
910                 daaint.bitreg.RMR = 1;
911                 daaint.bitreg.SI_1 = j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.bitreg.RMR;
912                 if(ixjdebug & 0x0008) {
913                         printk(KERN_INFO "IXJ DAA RMR /dev/phone%d was %s for %ld\n", j->board, XR0.bitreg.RMR?"on":"off", jiffies - j->pstn_last_rmr);
914                 }
915                 j->pstn_prev_rmr = j->pstn_last_rmr;
916                 j->pstn_last_rmr = jiffies;
917         }
918         switch(j->daa_mode) {
919                 case SOP_PU_SLEEP:
920                         if (daaint.bitreg.RING) {
921                                 if (!j->flags.pstn_ringing) {
922                                         if (j->daa_mode != SOP_PU_RINGING) {
923                                                 j->pstn_ring_int = jiffies;
924                                                 daa_set_mode(j, SOP_PU_RINGING);
925                                         }
926                                 }
927                         }
928                         break;
929                 case SOP_PU_RINGING:
930                         if (daaint.bitreg.RMR) {
931                                 if (ixjdebug & 0x0008) {
932                                         printk(KERN_INFO "IXJ Ring Cadence a state = %d /dev/phone%d at %ld\n", j->cadence_f[4].state, j->board, jiffies);
933                                 }
934                                 if (daaint.bitreg.SI_1) {                /* Rising edge of RMR */
935                                         j->flags.pstn_rmr = 1;
936                                         j->pstn_ring_start = jiffies;
937                                         j->pstn_ring_stop = 0;
938                                         j->ex.bits.pstn_ring = 0;
939                                         if (j->cadence_f[4].state == 0) {
940                                                 j->cadence_f[4].state = 1;
941                                                 j->cadence_f[4].on1min = jiffies + (long)((j->cadence_f[4].on1 * hertz * (100 - var)) / 10000);
942                                                 j->cadence_f[4].on1dot = jiffies + (long)((j->cadence_f[4].on1 * hertz * (100)) / 10000);
943                                                 j->cadence_f[4].on1max = jiffies + (long)((j->cadence_f[4].on1 * hertz * (100 + var)) / 10000);
944                                         } else if (j->cadence_f[4].state == 2) {
945                                                 if((time_after(jiffies, j->cadence_f[4].off1min) &&
946                                                     time_before(jiffies, j->cadence_f[4].off1max))) {
947                                                         if (j->cadence_f[4].on2) {
948                                                                 j->cadence_f[4].state = 3;
949                                                                 j->cadence_f[4].on2min = jiffies + (long)((j->cadence_f[4].on2 * (hertz * (100 - var)) / 10000));
950                                                                 j->cadence_f[4].on2dot = jiffies + (long)((j->cadence_f[4].on2 * (hertz * (100)) / 10000));
951                                                                 j->cadence_f[4].on2max = jiffies + (long)((j->cadence_f[4].on2 * (hertz * (100 + var)) / 10000));
952                                                         } else {
953                                                                 j->cadence_f[4].state = 7;
954                                                         }
955                                                 } else {
956                                                         if (ixjdebug & 0x0008) {
957                                                                 printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
958                                                                                 j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
959                                                                                 j->cadence_f[4].off1);
960                                                         }
961                                                         j->cadence_f[4].state = 0;
962                                                 }
963                                         } else if (j->cadence_f[4].state == 4) {
964                                                 if((time_after(jiffies, j->cadence_f[4].off2min) &&
965                                                     time_before(jiffies, j->cadence_f[4].off2max))) {
966                                                         if (j->cadence_f[4].on3) {
967                                                                 j->cadence_f[4].state = 5;
968                                                                 j->cadence_f[4].on3min = jiffies + (long)((j->cadence_f[4].on3 * (hertz * (100 - var)) / 10000));
969                                                                 j->cadence_f[4].on3dot = jiffies + (long)((j->cadence_f[4].on3 * (hertz * (100)) / 10000));
970                                                                 j->cadence_f[4].on3max = jiffies + (long)((j->cadence_f[4].on3 * (hertz * (100 + var)) / 10000));
971                                                         } else {
972                                                                 j->cadence_f[4].state = 7;
973                                                         }
974                                                 } else {
975                                                         if (ixjdebug & 0x0008) {
976                                                                 printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
977                                                                                 j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
978                                                                                 j->cadence_f[4].off2);
979                                                         }
980                                                         j->cadence_f[4].state = 0;
981                                                 }
982                                         } else if (j->cadence_f[4].state == 6) {
983                                                 if((time_after(jiffies, j->cadence_f[4].off3min) &&
984                                                     time_before(jiffies, j->cadence_f[4].off3max))) {
985                                                         j->cadence_f[4].state = 7;
986                                                 } else {
987                                                         if (ixjdebug & 0x0008) {
988                                                                 printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
989                                                                                 j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
990                                                                                 j->cadence_f[4].off3);
991                                                         }
992                                                         j->cadence_f[4].state = 0;
993                                                 }
994                                         } else {
995                                                 j->cadence_f[4].state = 0;
996                                         }
997                                 } else {                                /* Falling edge of RMR */
998                                         j->pstn_ring_start = 0;
999                                         j->pstn_ring_stop = jiffies;
1000                                         if (j->cadence_f[4].state == 1) {
1001                                                 if(!j->cadence_f[4].on1) {
1002                                                         j->cadence_f[4].state = 7;
1003                                                 } else if((time_after(jiffies, j->cadence_f[4].on1min) &&
1004                                                   time_before(jiffies, j->cadence_f[4].on1max))) {
1005                                                         if (j->cadence_f[4].off1) {
1006                                                                 j->cadence_f[4].state = 2;
1007                                                                 j->cadence_f[4].off1min = jiffies + (long)((j->cadence_f[4].off1 * (hertz * (100 - var)) / 10000));
1008                                                                 j->cadence_f[4].off1dot = jiffies + (long)((j->cadence_f[4].off1 * (hertz * (100)) / 10000));
1009                                                                 j->cadence_f[4].off1max = jiffies + (long)((j->cadence_f[4].off1 * (hertz * (100 + var)) / 10000));
1010                                                         } else {
1011                                                                 j->cadence_f[4].state = 7;
1012                                                         }
1013                                                 } else {
1014                                                         if (ixjdebug & 0x0008) {
1015                                                                 printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
1016                                                                                 j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
1017                                                                                 j->cadence_f[4].on1);
1018                                                         }
1019                                                         j->cadence_f[4].state = 0;
1020                                                 }
1021                                         } else if (j->cadence_f[4].state == 3) {
1022                                                 if((time_after(jiffies, j->cadence_f[4].on2min) &&
1023                                                     time_before(jiffies, j->cadence_f[4].on2max))) {
1024                                                         if (j->cadence_f[4].off2) {
1025                                                                 j->cadence_f[4].state = 4;
1026                                                                 j->cadence_f[4].off2min = jiffies + (long)((j->cadence_f[4].off2 * (hertz * (100 - var)) / 10000));
1027                                                                 j->cadence_f[4].off2dot = jiffies + (long)((j->cadence_f[4].off2 * (hertz * (100)) / 10000));
1028                                                                 j->cadence_f[4].off2max = jiffies + (long)((j->cadence_f[4].off2 * (hertz * (100 + var)) / 10000));
1029                                                         } else {
1030                                                                 j->cadence_f[4].state = 7;
1031                                                         }
1032                                                 } else {
1033                                                         if (ixjdebug & 0x0008) {
1034                                                                 printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
1035                                                                                 j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
1036                                                                                 j->cadence_f[4].on2);
1037                                                         }
1038                                                         j->cadence_f[4].state = 0;
1039                                                 }
1040                                         } else if (j->cadence_f[4].state == 5) {
1041                                                 if((time_after(jiffies, j->cadence_f[4].on3min) &&
1042                                                     time_before(jiffies, j->cadence_f[4].on3max))) {
1043                                                         if (j->cadence_f[4].off3) {
1044                                                                 j->cadence_f[4].state = 6;
1045                                                                 j->cadence_f[4].off3min = jiffies + (long)((j->cadence_f[4].off3 * (hertz * (100 - var)) / 10000));
1046                                                                 j->cadence_f[4].off3dot = jiffies + (long)((j->cadence_f[4].off3 * (hertz * (100)) / 10000));
1047                                                                 j->cadence_f[4].off3max = jiffies + (long)((j->cadence_f[4].off3 * (hertz * (100 + var)) / 10000));
1048                                                         } else {
1049                                                                 j->cadence_f[4].state = 7;
1050                                                         }
1051                                                 } else {
1052                                                         j->cadence_f[4].state = 0;
1053                                                 }
1054                                         } else {
1055                                                 if (ixjdebug & 0x0008) {
1056                                                         printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
1057                                                                         j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
1058                                                                         j->cadence_f[4].on3);
1059                                                 }
1060                                                 j->cadence_f[4].state = 0;
1061                                         }
1062                                 }
1063                                 if (ixjdebug & 0x0010) {
1064                                         printk(KERN_INFO "IXJ Ring Cadence b state = %d /dev/phone%d at %ld\n", j->cadence_f[4].state, j->board, jiffies);
1065                                 }
1066                                 if (ixjdebug & 0x0010) {
1067                                         switch(j->cadence_f[4].state) {
1068                                                 case 1:
1069                                                         printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
1070                                                 j->cadence_f[4].on1, j->cadence_f[4].on1min, j->cadence_f[4].on1dot, j->cadence_f[4].on1max);
1071                                                         break;
1072                                                 case 2:
1073                                                         printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
1074                                                 j->cadence_f[4].off1, j->cadence_f[4].off1min, j->cadence_f[4].off1dot, j->cadence_f[4].off1max);
1075                                                         break;
1076                                                 case 3:
1077                                                         printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
1078                                                 j->cadence_f[4].on2, j->cadence_f[4].on2min, j->cadence_f[4].on2dot, j->cadence_f[4].on2max);
1079                                                         break;
1080                                                 case 4:
1081                                                         printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
1082                                                 j->cadence_f[4].off2, j->cadence_f[4].off2min, j->cadence_f[4].off2dot, j->cadence_f[4].off2max);
1083                                                         break;
1084                                                 case 5:
1085                                                         printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
1086                                                 j->cadence_f[4].on3, j->cadence_f[4].on3min, j->cadence_f[4].on3dot, j->cadence_f[4].on3max);
1087                                                         break;
1088                                                 case 6: 
1089                                                         printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
1090                                                 j->cadence_f[4].off3, j->cadence_f[4].off3min, j->cadence_f[4].off3dot, j->cadence_f[4].off3max);
1091                                                         break;
1092                                         }
1093                                 }
1094                         }
1095                         if (j->cadence_f[4].state == 7) {
1096                                 j->cadence_f[4].state = 0;
1097                                 j->pstn_ring_stop = jiffies;
1098                                 j->ex.bits.pstn_ring = 1;
1099                                 ixj_kill_fasync(j, SIG_PSTN_RING, POLL_IN);
1100                                 if(ixjdebug & 0x0008) {
1101                                         printk(KERN_INFO "IXJ Ring int set /dev/phone%d at %ld\n", j->board, jiffies);
1102                                 }
1103                         }
1104                         if((j->pstn_ring_int != 0 && time_after(jiffies, j->pstn_ring_int + (hertz * 5)) && !j->flags.pstn_rmr) ||
1105                            (j->pstn_ring_stop != 0 && time_after(jiffies, j->pstn_ring_stop + (hertz * 5)))) {
1106                                 if(ixjdebug & 0x0008) {
1107                                         printk("IXJ DAA no ring in 5 seconds /dev/phone%d at %ld\n", j->board, jiffies);
1108                                         printk("IXJ DAA pstn ring int /dev/phone%d at %ld\n", j->board, j->pstn_ring_int);
1109                                         printk("IXJ DAA pstn ring stop /dev/phone%d at %ld\n", j->board, j->pstn_ring_stop);
1110                                 }
1111                                 j->pstn_ring_stop = j->pstn_ring_int = 0;
1112                                 daa_set_mode(j, SOP_PU_SLEEP);
1113                         } 
1114                         outb_p(j->pld_scrw.byte, j->XILINXbase);
1115                         if (j->pstn_cid_intr && time_after(jiffies, j->pstn_cid_received + hertz)) {
1116                                 ixj_daa_cid_read(j);
1117                                 j->ex.bits.caller_id = 1;
1118                                 ixj_kill_fasync(j, SIG_CALLER_ID, POLL_IN);
1119                                 j->pstn_cid_intr = 0;
1120                         }
1121                         if (daaint.bitreg.Cadence) {
1122                                 if(ixjdebug & 0x0008) {
1123                                         printk("IXJ DAA Cadence interrupt going to sleep /dev/phone%d\n", j->board);
1124                                 }
1125                                 daa_set_mode(j, SOP_PU_SLEEP);
1126                                 j->ex.bits.pstn_ring = 0;
1127                         }
1128                         break;
1129                 case SOP_PU_CONVERSATION:
1130                         if (daaint.bitreg.VDD_OK) {
1131                                 if(!daaint.bitreg.SI_0) {
1132                                         if (!j->pstn_winkstart) {
1133                                                 if(ixjdebug & 0x0008) {
1134                                                         printk("IXJ DAA possible wink /dev/phone%d %ld\n", j->board, jiffies);
1135                                                 }
1136                                                 j->pstn_winkstart = jiffies;
1137                                         } 
1138                                 } else {
1139                                         if (j->pstn_winkstart) {
1140                                                 if(ixjdebug & 0x0008) {
1141                                                         printk("IXJ DAA possible wink end /dev/phone%d %ld\n", j->board, jiffies);
1142                                                 }
1143                                                 j->pstn_winkstart = 0;
1144                                         }
1145                                 }
1146                         }
1147                         if (j->pstn_winkstart && time_after(jiffies, j->pstn_winkstart + ((hertz * j->winktime) / 1000))) {
1148                                 if(ixjdebug & 0x0008) {
1149                                         printk("IXJ DAA wink detected going to sleep /dev/phone%d %ld\n", j->board, jiffies);
1150                                 }
1151                                 daa_set_mode(j, SOP_PU_SLEEP);
1152                                 j->pstn_winkstart = 0;
1153                                 j->ex.bits.pstn_wink = 1;
1154                                 ixj_kill_fasync(j, SIG_PSTN_WINK, POLL_IN);
1155                         }
1156                         break;
1157         }
1158 }
1159
1160 static void ixj_timeout(unsigned long ptr)
1161 {
1162         int board;
1163         unsigned long jifon;
1164         IXJ *j = (IXJ *)ptr;
1165         board = j->board;
1166
1167         if (j->DSPbase && atomic_read(&j->DSPWrite) == 0 && test_and_set_bit(board, (void *)&j->busyflags) == 0) {
1168                 ixj_perfmon(j->timerchecks);
1169                 j->hookstate = ixj_hookstate(j);
1170                 if (j->tone_state) {
1171                         if (!(j->hookstate)) {
1172                                 ixj_cpt_stop(j);
1173                                 if (j->m_hook) {
1174                                         j->m_hook = 0;
1175                                         j->ex.bits.hookstate = 1;
1176                                         ixj_kill_fasync(j, SIG_HOOKSTATE, POLL_IN);
1177                                 }
1178                                 clear_bit(board, &j->busyflags);
1179                                 ixj_add_timer(j);
1180                                 return;
1181                         }
1182                         if (j->tone_state == 1)
1183                                 jifon = ((hertz * j->tone_on_time) * 25 / 100000);
1184                         else
1185                                 jifon = ((hertz * j->tone_on_time) * 25 / 100000) + ((hertz * j->tone_off_time) * 25 / 100000);
1186                         if (time_before(jiffies, j->tone_start_jif + jifon)) {
1187                                 if (j->tone_state == 1) {
1188                                         ixj_play_tone(j, j->tone_index);
1189                                         if (j->dsp.low == 0x20) {
1190                                                 clear_bit(board, &j->busyflags);
1191                                                 ixj_add_timer(j);
1192                                                 return;
1193                                         }
1194                                 } else {
1195                                         ixj_play_tone(j, 0);
1196                                         if (j->dsp.low == 0x20) {
1197                                                 clear_bit(board, &j->busyflags);
1198                                                 ixj_add_timer(j);
1199                                                 return;
1200                                         }
1201                                 }
1202                         } else {
1203                                 ixj_tone_timeout(j);
1204                                 if (j->flags.dialtone) {
1205                                         ixj_dialtone(j);
1206                                 }
1207                                 if (j->flags.busytone) {
1208                                         ixj_busytone(j);
1209                                         if (j->dsp.low == 0x20) {
1210                                                 clear_bit(board, &j->busyflags);
1211                                                 ixj_add_timer(j);
1212                                                 return;
1213                                         }
1214                                 }
1215                                 if (j->flags.ringback) {
1216                                         ixj_ringback(j);
1217                                         if (j->dsp.low == 0x20) {
1218                                                 clear_bit(board, &j->busyflags);
1219                                                 ixj_add_timer(j);
1220                                                 return;
1221                                         }
1222                                 }
1223                                 if (!j->tone_state) {
1224                                         ixj_cpt_stop(j);
1225                                 }
1226                         }
1227                 }
1228                 if (!(j->tone_state && j->dsp.low == 0x20)) {
1229                         if (IsRxReady(j)) {
1230                                 ixj_read_frame(j);
1231                         }
1232                         if (IsTxReady(j)) {
1233                                 ixj_write_frame(j);
1234                         }
1235                 }
1236                 if (j->flags.cringing) {
1237                         if (j->hookstate & 1) {
1238                                 j->flags.cringing = 0;
1239                                 ixj_ring_off(j);
1240                         } else if(j->cadence_f[5].enable && ((!j->cadence_f[5].en_filter) || (j->cadence_f[5].en_filter && j->flags.firstring))) {
1241                                 switch(j->cadence_f[5].state) {
1242                                         case 0:
1243                                                 j->cadence_f[5].on1dot = jiffies + (long)((j->cadence_f[5].on1 * (hertz * 100) / 10000));
1244                                                 if (time_before(jiffies, j->cadence_f[5].on1dot)) {
1245                                                         if(ixjdebug & 0x0004) {
1246                                                                 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1247                                                         }
1248                                                         ixj_ring_on(j);
1249                                                 }
1250                                                 j->cadence_f[5].state = 1;
1251                                                 break;
1252                                         case 1:
1253                                                 if (time_after(jiffies, j->cadence_f[5].on1dot)) {
1254                                                         j->cadence_f[5].off1dot = jiffies + (long)((j->cadence_f[5].off1 * (hertz * 100) / 10000));
1255                                                         if(ixjdebug & 0x0004) {
1256                                                                 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1257                                                         }
1258                                                         ixj_ring_off(j);
1259                                                         j->cadence_f[5].state = 2;
1260                                                 }
1261                                                 break;
1262                                         case 2:
1263                                                 if (time_after(jiffies, j->cadence_f[5].off1dot)) {
1264                                                         if(ixjdebug & 0x0004) {
1265                                                                 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1266                                                         }
1267                                                         ixj_ring_on(j);
1268                                                         if (j->cadence_f[5].on2) {
1269                                                                 j->cadence_f[5].on2dot = jiffies + (long)((j->cadence_f[5].on2 * (hertz * 100) / 10000));
1270                                                                 j->cadence_f[5].state = 3;
1271                                                         } else {
1272                                                                 j->cadence_f[5].state = 7;
1273                                                         }
1274                                                 }
1275                                                 break;
1276                                         case 3:
1277                                                 if (time_after(jiffies, j->cadence_f[5].on2dot)) {
1278                                                         if(ixjdebug & 0x0004) {
1279                                                                 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1280                                                         }
1281                                                         ixj_ring_off(j);
1282                                                         if (j->cadence_f[5].off2) {
1283                                                                 j->cadence_f[5].off2dot = jiffies + (long)((j->cadence_f[5].off2 * (hertz * 100) / 10000));
1284                                                                 j->cadence_f[5].state = 4;
1285                                                         } else {
1286                                                                 j->cadence_f[5].state = 7;
1287                                                         }
1288                                                 }
1289                                                 break;
1290                                         case 4:
1291                                                 if (time_after(jiffies, j->cadence_f[5].off2dot)) {
1292                                                         if(ixjdebug & 0x0004) {
1293                                                                 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1294                                                         }
1295                                                         ixj_ring_on(j);
1296                                                         if (j->cadence_f[5].on3) {
1297                                                                 j->cadence_f[5].on3dot = jiffies + (long)((j->cadence_f[5].on3 * (hertz * 100) / 10000));
1298                                                                 j->cadence_f[5].state = 5;
1299                                                         } else {
1300                                                                 j->cadence_f[5].state = 7;
1301                                                         }
1302                                                 }
1303                                                 break;
1304                                         case 5:
1305                                                 if (time_after(jiffies, j->cadence_f[5].on3dot)) {
1306                                                         if(ixjdebug & 0x0004) {
1307                                                                 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1308                                                         }
1309                                                         ixj_ring_off(j);
1310                                                         if (j->cadence_f[5].off3) {
1311                                                                 j->cadence_f[5].off3dot = jiffies + (long)((j->cadence_f[5].off3 * (hertz * 100) / 10000));
1312                                                                 j->cadence_f[5].state = 6;
1313                                                         } else {
1314                                                                 j->cadence_f[5].state = 7;
1315                                                         }
1316                                                 }
1317                                                 break;
1318                                         case 6:
1319                                                 if (time_after(jiffies, j->cadence_f[5].off3dot)) {
1320                                                         if(ixjdebug & 0x0004) {
1321                                                                 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1322                                                         }
1323                                                         j->cadence_f[5].state = 7;
1324                                                 }
1325                                                 break;
1326                                         case 7:
1327                                                 if(ixjdebug & 0x0004) {
1328                                                         printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1329                                                 }
1330                                                 j->flags.cidring = 1;
1331                                                 j->cadence_f[5].state = 0;
1332                                                 break;
1333                                 }
1334                                 if (j->flags.cidring && !j->flags.cidsent) {
1335                                         j->flags.cidsent = 1;
1336                                         if(j->fskdcnt) {
1337                                                 SLIC_SetState(PLD_SLIC_STATE_OHT, j);
1338                                                 ixj_pre_cid(j);
1339                                         }
1340                                         j->flags.cidring = 0;
1341                                 }
1342                                 clear_bit(board, &j->busyflags);
1343                                 ixj_add_timer(j);
1344                                 return;
1345                         } else {
1346                                 if (time_after(jiffies, j->ring_cadence_jif + (hertz / 2))) {
1347                                         if (j->flags.cidring && !j->flags.cidsent) {
1348                                                 j->flags.cidsent = 1;
1349                                                 if(j->fskdcnt) {
1350                                                         SLIC_SetState(PLD_SLIC_STATE_OHT, j);
1351                                                         ixj_pre_cid(j);
1352                                                 }
1353                                                 j->flags.cidring = 0;
1354                                         }
1355                                         j->ring_cadence_t--;
1356                                         if (j->ring_cadence_t == -1)
1357                                                 j->ring_cadence_t = 15;
1358                                         j->ring_cadence_jif = jiffies;
1359
1360                                         if (j->ring_cadence & 1 << j->ring_cadence_t) {
1361                                                 if(j->flags.cidsent && j->cadence_f[5].en_filter)
1362                                                         j->flags.firstring = 1;
1363                                                 else
1364                                                         ixj_ring_on(j);
1365                                         } else {
1366                                                 ixj_ring_off(j);
1367                                                 if(!j->flags.cidsent)
1368                                                         j->flags.cidring = 1;
1369                                         }
1370                                 }
1371                                 clear_bit(board, &j->busyflags);
1372                                 ixj_add_timer(j);
1373                                 return;
1374                         }
1375                 }
1376                 if (!j->flags.ringing) {
1377                         if (j->hookstate) { /* & 1) { */
1378                                 if (j->dsp.low != 0x20 &&
1379                                     SLIC_GetState(j) != PLD_SLIC_STATE_ACTIVE) {
1380                                         SLIC_SetState(PLD_SLIC_STATE_ACTIVE, j);
1381                                 }
1382                                 LineMonitor(j);
1383                                 read_filters(j);
1384                                 ixj_WriteDSPCommand(0x511B, j);
1385                                 j->proc_load = j->ssr.high << 8 | j->ssr.low;
1386                                 if (!j->m_hook && (j->hookstate & 1)) {
1387                                         j->m_hook = j->ex.bits.hookstate = 1;
1388                                         ixj_kill_fasync(j, SIG_HOOKSTATE, POLL_IN);
1389                                 }
1390                         } else {
1391                                 if (j->ex.bits.dtmf_ready) {
1392                                         j->dtmf_wp = j->dtmf_rp = j->ex.bits.dtmf_ready = 0;
1393                                 }
1394                                 if (j->m_hook) {
1395                                         j->m_hook = 0;
1396                                         j->ex.bits.hookstate = 1;
1397                                         ixj_kill_fasync(j, SIG_HOOKSTATE, POLL_IN);
1398                                 }
1399                         }
1400                 }
1401                 if (j->cardtype == QTI_LINEJACK && !j->flags.pstncheck && j->flags.pstn_present) {
1402                         ixj_pstn_state(j);
1403                 }
1404                 if (j->ex.bytes) {
1405                         wake_up_interruptible(&j->poll_q);      /* Wake any blocked selects */
1406                 }
1407                 clear_bit(board, &j->busyflags);
1408         }
1409         ixj_add_timer(j);
1410 }
1411
1412 static int ixj_status_wait(IXJ *j)
1413 {
1414         unsigned long jif;
1415
1416         jif = jiffies + ((60 * hertz) / 100);
1417         while (!IsStatusReady(j)) {
1418                 ixj_perfmon(j->statuswait);
1419                 if (time_after(jiffies, jif)) {
1420                         ixj_perfmon(j->statuswaitfail);
1421                         return -1;
1422                 }
1423         }
1424         return 0;
1425 }
1426
1427 static int ixj_PCcontrol_wait(IXJ *j)
1428 {
1429         unsigned long jif;
1430
1431         jif = jiffies + ((60 * hertz) / 100);
1432         while (!IsPCControlReady(j)) {
1433                 ixj_perfmon(j->pcontrolwait);
1434                 if (time_after(jiffies, jif)) {
1435                         ixj_perfmon(j->pcontrolwaitfail);
1436                         return -1;
1437                 }
1438         }
1439         return 0;
1440 }
1441
1442 static int ixj_WriteDSPCommand(unsigned short cmd, IXJ *j)
1443 {
1444         BYTES bytes;
1445         unsigned long jif;
1446
1447         atomic_inc(&j->DSPWrite);
1448         if(atomic_read(&j->DSPWrite) > 1) {
1449                 printk("IXJ %d DSP write overlap attempting command 0x%4.4x\n", j->board, cmd);
1450                 return -1;
1451         }
1452         bytes.high = (cmd & 0xFF00) >> 8;
1453         bytes.low = cmd & 0x00FF;
1454         jif = jiffies + ((60 * hertz) / 100);
1455         while (!IsControlReady(j)) {
1456                 ixj_perfmon(j->iscontrolready);
1457                 if (time_after(jiffies, jif)) {
1458                         ixj_perfmon(j->iscontrolreadyfail);
1459                         atomic_dec(&j->DSPWrite);
1460                         if(atomic_read(&j->DSPWrite) > 0) {
1461                                 printk("IXJ %d DSP overlaped command 0x%4.4x during control ready failure.\n", j->board, cmd);
1462                                 while(atomic_read(&j->DSPWrite) > 0) {
1463                                         atomic_dec(&j->DSPWrite);
1464                                 }
1465                         }
1466                         return -1;
1467                 }
1468         }
1469         outb(bytes.low, j->DSPbase + 6);
1470         outb(bytes.high, j->DSPbase + 7);
1471
1472         if (ixj_status_wait(j)) {
1473                 j->ssr.low = 0xFF;
1474                 j->ssr.high = 0xFF;
1475                 atomic_dec(&j->DSPWrite);
1476                 if(atomic_read(&j->DSPWrite) > 0) {
1477                         printk("IXJ %d DSP overlaped command 0x%4.4x during status wait failure.\n", j->board, cmd);
1478                         while(atomic_read(&j->DSPWrite) > 0) {
1479                                 atomic_dec(&j->DSPWrite);
1480                         }
1481                 }
1482                 return -1;
1483         }
1484 /* Read Software Status Register */
1485         j->ssr.low = inb_p(j->DSPbase + 2);
1486         j->ssr.high = inb_p(j->DSPbase + 3);
1487         atomic_dec(&j->DSPWrite);
1488         if(atomic_read(&j->DSPWrite) > 0) {
1489                 printk("IXJ %d DSP overlaped command 0x%4.4x\n", j->board, cmd);
1490                 while(atomic_read(&j->DSPWrite) > 0) {
1491                         atomic_dec(&j->DSPWrite);
1492                 }
1493         }
1494         return 0;
1495 }
1496
1497 /***************************************************************************
1498 *
1499 *  General Purpose IO Register read routine
1500 *
1501 ***************************************************************************/
1502 static inline int ixj_gpio_read(IXJ *j)
1503 {
1504         if (ixj_WriteDSPCommand(0x5143, j))
1505                 return -1;
1506
1507         j->gpio.bytes.low = j->ssr.low;
1508         j->gpio.bytes.high = j->ssr.high;
1509
1510         return 0;
1511 }
1512
1513 static inline void LED_SetState(int state, IXJ *j)
1514 {
1515         if (j->cardtype == QTI_LINEJACK) {
1516                 j->pld_scrw.bits.led1 = state & 0x1 ? 1 : 0;
1517                 j->pld_scrw.bits.led2 = state & 0x2 ? 1 : 0;
1518                 j->pld_scrw.bits.led3 = state & 0x4 ? 1 : 0;
1519                 j->pld_scrw.bits.led4 = state & 0x8 ? 1 : 0;
1520
1521                 outb(j->pld_scrw.byte, j->XILINXbase);
1522         }
1523 }
1524
1525 /*********************************************************************
1526 *  GPIO Pins are configured as follows on the Quicknet Internet
1527 *  PhoneJACK Telephony Cards
1528
1529 * POTS Select        GPIO_6=0 GPIO_7=0
1530 * Mic/Speaker Select GPIO_6=0 GPIO_7=1
1531 * Handset Select     GPIO_6=1 GPIO_7=0
1532 *
1533 * SLIC Active        GPIO_1=0 GPIO_2=1 GPIO_5=0
1534 * SLIC Ringing       GPIO_1=1 GPIO_2=1 GPIO_5=0
1535 * SLIC Open Circuit  GPIO_1=0 GPIO_2=0 GPIO_5=0
1536 *
1537 * Hook Switch changes reported on GPIO_3
1538 *********************************************************************/
1539 static int ixj_set_port(IXJ *j, int arg)
1540 {
1541         if (j->cardtype == QTI_PHONEJACK_LITE) {
1542                 if (arg != PORT_POTS)
1543                         return 10;
1544                 else
1545                         return 0;
1546         }
1547         switch (arg) {
1548         case PORT_POTS:
1549                 j->port = PORT_POTS;
1550                 switch (j->cardtype) {
1551                 case QTI_PHONECARD:
1552                         if (j->flags.pcmciasct == 1)
1553                                 SLIC_SetState(PLD_SLIC_STATE_ACTIVE, j);
1554                         else
1555                                 return 11;
1556                         break;
1557                 case QTI_PHONEJACK_PCI:
1558                         j->pld_slicw.pcib.mic = 0;
1559                         j->pld_slicw.pcib.spk = 0;
1560                         outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1561                         break;
1562                 case QTI_LINEJACK:
1563                         ixj_set_pots(j, 0);                     /* Disconnect POTS/PSTN relay */
1564                         if (ixj_WriteDSPCommand(0xC528, j))             /* Write CODEC config to
1565                                                                            Software Control Register */
1566                                 return 2;
1567                         j->pld_scrw.bits.daafsyncen = 0;        /* Turn off DAA Frame Sync */
1568
1569                         outb(j->pld_scrw.byte, j->XILINXbase);
1570                         j->pld_clock.byte = 0;
1571                         outb(j->pld_clock.byte, j->XILINXbase + 0x04);
1572                         j->pld_slicw.bits.rly1 = 1;
1573                         j->pld_slicw.bits.spken = 0;
1574                         outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1575                         ixj_mixer(0x1200, j);   /* Turn Off MIC switch on mixer left */
1576                         ixj_mixer(0x1401, j);   /* Turn On Mono1 switch on mixer left */
1577                         ixj_mixer(0x1300, j);       /* Turn Off MIC switch on mixer right */
1578                         ixj_mixer(0x1501, j);       /* Turn On Mono1 switch on mixer right */
1579                         ixj_mixer(0x0E80, j);   /*Mic mute */
1580                         ixj_mixer(0x0F00, j);   /* Set mono out (SLIC) to 0dB */
1581                         ixj_mixer(0x0080, j);   /* Mute Master Left volume */
1582                         ixj_mixer(0x0180, j);   /* Mute Master Right volume */
1583                         SLIC_SetState(PLD_SLIC_STATE_STANDBY, j);
1584 /*                      SLIC_SetState(PLD_SLIC_STATE_ACTIVE, j); */
1585                         break;
1586                 case QTI_PHONEJACK:
1587                         j->gpio.bytes.high = 0x0B;
1588                         j->gpio.bits.gpio6 = 0;
1589                         j->gpio.bits.gpio7 = 0;
1590                         ixj_WriteDSPCommand(j->gpio.word, j);
1591                         break;
1592                 }
1593                 break;
1594         case PORT_PSTN:
1595                 if (j->cardtype == QTI_LINEJACK) {
1596                         ixj_WriteDSPCommand(0xC534, j); /* Write CODEC config to Software Control Register */
1597
1598                         j->pld_slicw.bits.rly3 = 0;
1599                         j->pld_slicw.bits.rly1 = 1;
1600                         j->pld_slicw.bits.spken = 0;
1601                         outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1602                         j->port = PORT_PSTN;
1603                 } else {
1604                         return 4;
1605                 }
1606                 break;
1607         case PORT_SPEAKER:
1608                 j->port = PORT_SPEAKER;
1609                 switch (j->cardtype) {
1610                 case QTI_PHONECARD:
1611                         if (j->flags.pcmciasct) {
1612                                 SLIC_SetState(PLD_SLIC_STATE_OC, j);
1613                         }
1614                         break;
1615                 case QTI_PHONEJACK_PCI:
1616                         j->pld_slicw.pcib.mic = 1;
1617                         j->pld_slicw.pcib.spk = 1;
1618                         outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1619                         break;
1620                 case QTI_LINEJACK:
1621                         ixj_set_pots(j, 0);                     /* Disconnect POTS/PSTN relay */
1622                         if (ixj_WriteDSPCommand(0xC528, j))             /* Write CODEC config to
1623                                                                            Software Control Register */
1624                                 return 2;
1625                         j->pld_scrw.bits.daafsyncen = 0;        /* Turn off DAA Frame Sync */
1626
1627                         outb(j->pld_scrw.byte, j->XILINXbase);
1628                         j->pld_clock.byte = 0;
1629                         outb(j->pld_clock.byte, j->XILINXbase + 0x04);
1630                         j->pld_slicw.bits.rly1 = 1;
1631                         j->pld_slicw.bits.spken = 1;
1632                         outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1633                         ixj_mixer(0x1201, j);   /* Turn On MIC switch on mixer left */
1634                         ixj_mixer(0x1400, j);   /* Turn Off Mono1 switch on mixer left */
1635                         ixj_mixer(0x1301, j);       /* Turn On MIC switch on mixer right */
1636                         ixj_mixer(0x1500, j);       /* Turn Off Mono1 switch on mixer right */
1637                         ixj_mixer(0x0E06, j);   /*Mic un-mute 0dB */
1638                         ixj_mixer(0x0F80, j);   /* Mute mono out (SLIC) */
1639                         ixj_mixer(0x0000, j);   /* Set Master Left volume to 0dB */
1640                         ixj_mixer(0x0100, j);   /* Set Master Right volume to 0dB */
1641                         break;
1642                 case QTI_PHONEJACK:
1643                         j->gpio.bytes.high = 0x0B;
1644                         j->gpio.bits.gpio6 = 0;
1645                         j->gpio.bits.gpio7 = 1;
1646                         ixj_WriteDSPCommand(j->gpio.word, j);
1647                         break;
1648                 }
1649                 break;
1650         case PORT_HANDSET:
1651                 if (j->cardtype != QTI_PHONEJACK) {
1652                         return 5;
1653                 } else {
1654                         j->gpio.bytes.high = 0x0B;
1655                         j->gpio.bits.gpio6 = 1;
1656                         j->gpio.bits.gpio7 = 0;
1657                         ixj_WriteDSPCommand(j->gpio.word, j);
1658                         j->port = PORT_HANDSET;
1659                 }
1660                 break;
1661         default:
1662                 return 6;
1663                 break;
1664         }
1665         return 0;
1666 }
1667
1668 static int ixj_set_pots(IXJ *j, int arg)
1669 {
1670         if (j->cardtype == QTI_LINEJACK) {
1671                 if (arg) {
1672                         if (j->port == PORT_PSTN) {
1673                                 j->pld_slicw.bits.rly1 = 0;
1674                                 outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1675                                 j->flags.pots_pstn = 1;
1676                                 return 1;
1677                         } else {
1678                                 j->flags.pots_pstn = 0;
1679                                 return 0;
1680                         }
1681                 } else {
1682                         j->pld_slicw.bits.rly1 = 1;
1683                         outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1684                         j->flags.pots_pstn = 0;
1685                         return 1;
1686                 }
1687         } else {
1688                 return 0;
1689         }
1690 }
1691
1692 static void ixj_ring_on(IXJ *j)
1693 {
1694         if (j->dsp.low == 0x20) /* Internet PhoneJACK */
1695          {
1696                 if (ixjdebug & 0x0004)
1697                         printk(KERN_INFO "IXJ Ring On /dev/phone%d\n",  j->board);
1698
1699                 j->gpio.bytes.high = 0x0B;
1700                 j->gpio.bytes.low = 0x00;
1701                 j->gpio.bits.gpio1 = 1;
1702                 j->gpio.bits.gpio2 = 1;
1703                 j->gpio.bits.gpio5 = 0;
1704                 ixj_WriteDSPCommand(j->gpio.word, j);   /* send the ring signal */
1705         } else                  /* Internet LineJACK, Internet PhoneJACK Lite or Internet PhoneJACK PCI */
1706         {
1707                 if (ixjdebug & 0x0004)
1708                         printk(KERN_INFO "IXJ Ring On /dev/phone%d\n", j->board);
1709
1710                 SLIC_SetState(PLD_SLIC_STATE_RINGING, j);
1711         }
1712 }
1713
1714 static int ixj_siadc(IXJ *j, int val)
1715 {
1716         if(j->cardtype == QTI_PHONECARD){
1717                 if(j->flags.pcmciascp){
1718                         if(val == -1)
1719                                 return j->siadc.bits.rxg;
1720
1721                         if(val < 0 || val > 0x1F)
1722                                 return -1;
1723
1724                         j->siadc.bits.hom = 0;                          /* Handset Out Mute */
1725                         j->siadc.bits.lom = 0;                          /* Line Out Mute */
1726                         j->siadc.bits.rxg = val;                        /*(0xC000 - 0x41C8) / 0x4EF;    RX PGA Gain */
1727                         j->psccr.bits.addr = 6;                         /* R/W Smart Cable Register Address */
1728                         j->psccr.bits.rw = 0;                           /* Read / Write flag */
1729                         j->psccr.bits.dev = 0;
1730                         outb(j->siadc.byte, j->XILINXbase + 0x00);
1731                         outb(j->psccr.byte, j->XILINXbase + 0x01);
1732                         ixj_PCcontrol_wait(j);
1733                         return j->siadc.bits.rxg;
1734                 }
1735         }
1736         return -1;
1737 }
1738
1739 static int ixj_sidac(IXJ *j, int val)
1740 {
1741         if(j->cardtype == QTI_PHONECARD){
1742                 if(j->flags.pcmciascp){
1743                         if(val == -1)
1744                                 return j->sidac.bits.txg;
1745
1746                         if(val < 0 || val > 0x1F)
1747                                 return -1;
1748
1749                         j->sidac.bits.srm = 1;                          /* Speaker Right Mute */
1750                         j->sidac.bits.slm = 1;                          /* Speaker Left Mute */
1751                         j->sidac.bits.txg = val;                        /* (0xC000 - 0x45E4) / 0x5D3;    TX PGA Gain */
1752                         j->psccr.bits.addr = 7;                         /* R/W Smart Cable Register Address */
1753                         j->psccr.bits.rw = 0;                           /* Read / Write flag */
1754                         j->psccr.bits.dev = 0;
1755                         outb(j->sidac.byte, j->XILINXbase + 0x00);
1756                         outb(j->psccr.byte, j->XILINXbase + 0x01);
1757                         ixj_PCcontrol_wait(j);
1758                         return j->sidac.bits.txg;
1759                 }
1760         }
1761         return -1;
1762 }
1763
1764 static int ixj_pcmcia_cable_check(IXJ *j)
1765 {
1766         j->pccr1.byte = inb_p(j->XILINXbase + 0x03);
1767         if (!j->flags.pcmciastate) {
1768                 j->pccr2.byte = inb_p(j->XILINXbase + 0x02);
1769                 if (j->pccr1.bits.drf || j->pccr2.bits.rstc) {
1770                         j->flags.pcmciastate = 4;
1771                         return 0;
1772                 }
1773                 if (j->pccr1.bits.ed) {
1774                         j->pccr1.bits.ed = 0;
1775                         j->psccr.bits.dev = 3;
1776                         j->psccr.bits.rw = 1;
1777                         outw_p(j->psccr.byte << 8, j->XILINXbase + 0x00);
1778                         ixj_PCcontrol_wait(j);
1779                         j->pslic.byte = inw_p(j->XILINXbase + 0x00) & 0xFF;
1780                         j->pslic.bits.led2 = j->pslic.bits.det ? 1 : 0;
1781                         j->psccr.bits.dev = 3;
1782                         j->psccr.bits.rw = 0;
1783                         outw_p(j->psccr.byte << 8 | j->pslic.byte, j->XILINXbase + 0x00);
1784                         ixj_PCcontrol_wait(j);
1785                         return j->pslic.bits.led2 ? 1 : 0;
1786                 } else if (j->flags.pcmciasct) {
1787                         return j->r_hook;
1788                 } else {
1789                         return 1;
1790                 }
1791         } else if (j->flags.pcmciastate == 4) {
1792                 if (!j->pccr1.bits.drf) {
1793                         j->flags.pcmciastate = 3;
1794                 }
1795                 return 0;
1796         } else if (j->flags.pcmciastate == 3) {
1797                 j->pccr2.bits.pwr = 0;
1798                 j->pccr2.bits.rstc = 1;
1799                 outb(j->pccr2.byte, j->XILINXbase + 0x02);
1800                 j->checkwait = jiffies + (hertz * 2);
1801                 j->flags.incheck = 1;
1802                 j->flags.pcmciastate = 2;
1803                 return 0;
1804         } else if (j->flags.pcmciastate == 2) {
1805                 if (j->flags.incheck) {
1806                         if (time_before(jiffies, j->checkwait)) {
1807                                 return 0;
1808                         } else {
1809                                 j->flags.incheck = 0;
1810                         }
1811                 }
1812                 j->pccr2.bits.pwr = 0;
1813                 j->pccr2.bits.rstc = 0;
1814                 outb_p(j->pccr2.byte, j->XILINXbase + 0x02);
1815                 j->flags.pcmciastate = 1;
1816                 return 0;
1817         } else if (j->flags.pcmciastate == 1) {
1818                 j->flags.pcmciastate = 0;
1819                 if (!j->pccr1.bits.drf) {
1820                         j->psccr.bits.dev = 3;
1821                         j->psccr.bits.rw = 1;
1822                         outb_p(j->psccr.byte, j->XILINXbase + 0x01);
1823                         ixj_PCcontrol_wait(j);
1824                         j->flags.pcmciascp = 1;         /* Set Cable Present Flag */
1825
1826                         j->flags.pcmciasct = (inw_p(j->XILINXbase + 0x00) >> 8) & 0x03;         /* Get Cable Type */
1827
1828                         if (j->flags.pcmciasct == 3) {
1829                                 j->flags.pcmciastate = 4;
1830                                 return 0;
1831                         } else if (j->flags.pcmciasct == 0) {
1832                                 j->pccr2.bits.pwr = 1;
1833                                 j->pccr2.bits.rstc = 0;
1834                                 outb_p(j->pccr2.byte, j->XILINXbase + 0x02);
1835                                 j->port = PORT_SPEAKER;
1836                         } else {
1837                                 j->port = PORT_POTS;
1838                         }
1839                         j->sic1.bits.cpd = 0;                           /* Chip Power Down */
1840                         j->sic1.bits.mpd = 0;                           /* MIC Bias Power Down */
1841                         j->sic1.bits.hpd = 0;                           /* Handset Bias Power Down */
1842                         j->sic1.bits.lpd = 0;                           /* Line Bias Power Down */
1843                         j->sic1.bits.spd = 1;                           /* Speaker Drive Power Down */
1844                         j->psccr.bits.addr = 1;                         /* R/W Smart Cable Register Address */
1845                         j->psccr.bits.rw = 0;                           /* Read / Write flag */
1846                         j->psccr.bits.dev = 0;
1847                         outb(j->sic1.byte, j->XILINXbase + 0x00);
1848                         outb(j->psccr.byte, j->XILINXbase + 0x01);
1849                         ixj_PCcontrol_wait(j);
1850
1851                         j->sic2.bits.al = 0;                            /* Analog Loopback DAC analog -> ADC analog */
1852                         j->sic2.bits.dl2 = 0;                           /* Digital Loopback DAC -> ADC one bit */
1853                         j->sic2.bits.dl1 = 0;                           /* Digital Loopback ADC -> DAC one bit */
1854                         j->sic2.bits.pll = 0;                           /* 1 = div 10, 0 = div 5 */
1855                         j->sic2.bits.hpd = 0;                           /* HPF disable */
1856                         j->psccr.bits.addr = 2;                         /* R/W Smart Cable Register Address */
1857                         j->psccr.bits.rw = 0;                           /* Read / Write flag */
1858                         j->psccr.bits.dev = 0;
1859                         outb(j->sic2.byte, j->XILINXbase + 0x00);
1860                         outb(j->psccr.byte, j->XILINXbase + 0x01);
1861                         ixj_PCcontrol_wait(j);
1862
1863                         j->psccr.bits.addr = 3;                         /* R/W Smart Cable Register Address */
1864                         j->psccr.bits.rw = 0;                           /* Read / Write flag */
1865                         j->psccr.bits.dev = 0;
1866                         outb(0x00, j->XILINXbase + 0x00);               /* PLL Divide N1 */
1867                         outb(j->psccr.byte, j->XILINXbase + 0x01);
1868                         ixj_PCcontrol_wait(j);
1869
1870                         j->psccr.bits.addr = 4;                         /* R/W Smart Cable Register Address */
1871                         j->psccr.bits.rw = 0;                           /* Read / Write flag */
1872                         j->psccr.bits.dev = 0;
1873                         outb(0x09, j->XILINXbase + 0x00);               /* PLL Multiply M1 */
1874                         outb(j->psccr.byte, j->XILINXbase + 0x01);
1875                         ixj_PCcontrol_wait(j);
1876
1877                         j->sirxg.bits.lig = 1;                          /* Line In Gain */
1878                         j->sirxg.bits.lim = 1;                          /* Line In Mute */
1879                         j->sirxg.bits.mcg = 0;                          /* MIC In Gain was 3 */
1880                         j->sirxg.bits.mcm = 0;                          /* MIC In Mute */
1881                         j->sirxg.bits.him = 0;                          /* Handset In Mute */
1882                         j->sirxg.bits.iir = 1;                          /* IIR */
1883                         j->psccr.bits.addr = 5;                         /* R/W Smart Cable Register Address */
1884                         j->psccr.bits.rw = 0;                           /* Read / Write flag */
1885                         j->psccr.bits.dev = 0;
1886                         outb(j->sirxg.byte, j->XILINXbase + 0x00);
1887                         outb(j->psccr.byte, j->XILINXbase + 0x01);
1888                         ixj_PCcontrol_wait(j);
1889
1890                         ixj_siadc(j, 0x17);
1891                         ixj_sidac(j, 0x1D);
1892
1893                         j->siaatt.bits.sot = 0;
1894                         j->psccr.bits.addr = 9;                         /* R/W Smart Cable Register Address */
1895                         j->psccr.bits.rw = 0;                           /* Read / Write flag */
1896                         j->psccr.bits.dev = 0;
1897                         outb(j->siaatt.byte, j->XILINXbase + 0x00);
1898                         outb(j->psccr.byte, j->XILINXbase + 0x01);
1899                         ixj_PCcontrol_wait(j);
1900
1901                         if (j->flags.pcmciasct == 1 && !j->readers && !j->writers) {
1902                                 j->psccr.byte = j->pslic.byte = 0;
1903                                 j->pslic.bits.powerdown = 1;
1904                                 j->psccr.bits.dev = 3;
1905                                 j->psccr.bits.rw = 0;
1906                                 outw_p(j->psccr.byte << 8 | j->pslic.byte, j->XILINXbase + 0x00);
1907                                 ixj_PCcontrol_wait(j);
1908                         }
1909                 }
1910                 return 0;
1911         } else {
1912                 j->flags.pcmciascp = 0;
1913                 return 0;
1914         }
1915         return 0;
1916 }
1917
1918 static int ixj_hookstate(IXJ *j)
1919 {
1920         int fOffHook = 0;
1921
1922         switch (j->cardtype) {
1923         case QTI_PHONEJACK:
1924                 ixj_gpio_read(j);
1925                 fOffHook = j->gpio.bits.gpio3read ? 1 : 0;
1926                 break;
1927         case QTI_LINEJACK:
1928         case QTI_PHONEJACK_LITE:
1929         case QTI_PHONEJACK_PCI:
1930                 SLIC_GetState(j);
1931                 if(j->cardtype == QTI_LINEJACK && j->flags.pots_pstn == 1 && (j->readers || j->writers)) {
1932                         fOffHook = j->pld_slicr.bits.potspstn ? 1 : 0;
1933                         if(fOffHook != j->p_hook) {
1934                                 if(!j->checkwait) {
1935                                         j->checkwait = jiffies;
1936                                 } 
1937                                 if(time_before(jiffies, j->checkwait + 2)) {
1938                                         fOffHook ^= 1;
1939                                 } else {
1940                                         j->checkwait = 0;
1941                                 }
1942                                 j->p_hook = fOffHook;
1943                                 printk("IXJ : /dev/phone%d pots-pstn hookstate check %d at %ld\n", j->board, fOffHook, jiffies);
1944                         }
1945                 } else {
1946                         if (j->pld_slicr.bits.state == PLD_SLIC_STATE_ACTIVE ||
1947                             j->pld_slicr.bits.state == PLD_SLIC_STATE_STANDBY) {
1948                                 if (j->flags.ringing || j->flags.cringing) {
1949                                         if (!in_interrupt()) {
1950                                                 msleep(20);
1951                                         }
1952                                         SLIC_GetState(j);
1953                                         if (j->pld_slicr.bits.state == PLD_SLIC_STATE_RINGING) {
1954                                                 ixj_ring_on(j);
1955                                         }
1956                                 }
1957                                 if (j->cardtype == QTI_PHONEJACK_PCI) {
1958                                         j->pld_scrr.byte = inb_p(j->XILINXbase);
1959                                         fOffHook = j->pld_scrr.pcib.det ? 1 : 0;
1960                                 } else
1961                                         fOffHook = j->pld_slicr.bits.det ? 1 : 0;
1962                         }
1963                 }
1964                 break;
1965         case QTI_PHONECARD:
1966                 fOffHook = ixj_pcmcia_cable_check(j);
1967                 break;
1968         }
1969         if (j->r_hook != fOffHook) {
1970                 j->r_hook = fOffHook;
1971                 if (j->port == PORT_SPEAKER || j->port == PORT_HANDSET) { // || (j->port == PORT_PSTN && j->flags.pots_pstn == 0)) {
1972                         j->ex.bits.hookstate = 1;
1973                         ixj_kill_fasync(j, SIG_HOOKSTATE, POLL_IN);
1974                 } else if (!fOffHook) {
1975                         j->flash_end = jiffies + ((60 * hertz) / 100);
1976                 }
1977         }
1978         if (fOffHook) {
1979                 if(time_before(jiffies, j->flash_end)) {
1980                         j->ex.bits.flash = 1;
1981                         j->flash_end = 0;
1982                         ixj_kill_fasync(j, SIG_FLASH, POLL_IN);
1983                 }
1984         } else {
1985                 if(time_before(jiffies, j->flash_end)) {
1986                         fOffHook = 1;
1987                 }
1988         }
1989
1990         if (j->port == PORT_PSTN && j->daa_mode == SOP_PU_CONVERSATION)
1991                 fOffHook |= 2;
1992
1993         if (j->port == PORT_SPEAKER) {
1994                 if(j->cardtype == QTI_PHONECARD) {
1995                         if(j->flags.pcmciascp && j->flags.pcmciasct) {
1996                                 fOffHook |= 2;
1997                         }
1998                 } else {
1999                         fOffHook |= 2;
2000                 }
2001         }
2002
2003         if (j->port == PORT_HANDSET)
2004                 fOffHook |= 2;
2005
2006         return fOffHook;
2007 }
2008
2009 static void ixj_ring_off(IXJ *j)
2010 {
2011         if (j->dsp.low == 0x20) /* Internet PhoneJACK */
2012          {
2013                 if (ixjdebug & 0x0004)
2014                         printk(KERN_INFO "IXJ Ring Off\n");
2015                 j->gpio.bytes.high = 0x0B;
2016                 j->gpio.bytes.low = 0x00;
2017                 j->gpio.bits.gpio1 = 0;
2018                 j->gpio.bits.gpio2 = 1;
2019                 j->gpio.bits.gpio5 = 0;
2020                 ixj_WriteDSPCommand(j->gpio.word, j);
2021         } else                  /* Internet LineJACK */
2022         {
2023                 if (ixjdebug & 0x0004)
2024                         printk(KERN_INFO "IXJ Ring Off\n");
2025
2026                 if(!j->flags.cidplay)
2027                         SLIC_SetState(PLD_SLIC_STATE_STANDBY, j);
2028
2029                 SLIC_GetState(j);
2030         }
2031 }
2032
2033 static void ixj_ring_start(IXJ *j)
2034 {
2035         j->flags.cringing = 1;
2036         if (ixjdebug & 0x0004)
2037                 printk(KERN_INFO "IXJ Cadence Ringing Start /dev/phone%d\n", j->board);
2038         if (ixj_hookstate(j) & 1) {
2039                 if (j->port == PORT_POTS)
2040                         ixj_ring_off(j);
2041                 j->flags.cringing = 0;
2042                 if (ixjdebug & 0x0004)
2043                         printk(KERN_INFO "IXJ Cadence Ringing Stopped /dev/phone%d off hook\n", j->board);
2044         } else if(j->cadence_f[5].enable && (!j->cadence_f[5].en_filter)) {
2045                 j->ring_cadence_jif = jiffies;
2046                 j->flags.cidsent = j->flags.cidring = 0;
2047                 j->cadence_f[5].state = 0;
2048                 if(j->cadence_f[5].on1)
2049                         ixj_ring_on(j);
2050         } else {
2051                 j->ring_cadence_jif = jiffies;
2052                 j->ring_cadence_t = 15;
2053                 if (j->ring_cadence & 1 << j->ring_cadence_t) {
2054                         ixj_ring_on(j);
2055                 } else {
2056                         ixj_ring_off(j);
2057                 }
2058                 j->flags.cidsent = j->flags.cidring = j->flags.firstring = 0;
2059         }
2060 }
2061
2062 static int ixj_ring(IXJ *j)
2063 {
2064         char cntr;
2065         unsigned long jif;
2066
2067         j->flags.ringing = 1;
2068         if (ixj_hookstate(j) & 1) {
2069                 ixj_ring_off(j);
2070                 j->flags.ringing = 0;
2071                 return 1;
2072         }
2073         for (cntr = 0; cntr < j->maxrings; cntr++) {
2074                 jif = jiffies + (1 * hertz);
2075                 ixj_ring_on(j);
2076                 while (time_before(jiffies, jif)) {
2077                         if (ixj_hookstate(j) & 1) {
2078                                 ixj_ring_off(j);
2079                                 j->flags.ringing = 0;
2080                                 return 1;
2081                         }
2082                         schedule_timeout_interruptible(1);
2083                         if (signal_pending(current))
2084                                 break;
2085                 }
2086                 jif = jiffies + (3 * hertz);
2087                 ixj_ring_off(j);
2088                 while (time_before(jiffies, jif)) {
2089                         if (ixj_hookstate(j) & 1) {
2090                                 msleep(10);
2091                                 if (ixj_hookstate(j) & 1) {
2092                                         j->flags.ringing = 0;
2093                                         return 1;
2094                                 }
2095                         }
2096                         schedule_timeout_interruptible(1);
2097                         if (signal_pending(current))
2098                                 break;
2099                 }
2100         }
2101         ixj_ring_off(j);
2102         j->flags.ringing = 0;
2103         return 0;
2104 }
2105
2106 static int ixj_open(struct phone_device *p, struct file *file_p)
2107 {
2108         IXJ *j = get_ixj(p->board);
2109         file_p->private_data = j;
2110
2111         if (!j->DSPbase)
2112                 return -ENODEV;
2113
2114         if (file_p->f_mode & FMODE_READ) {
2115                 if(!j->readers) {
2116                         j->readers++;
2117                 } else {
2118                         return -EBUSY;
2119                 }
2120         }
2121
2122         if (file_p->f_mode & FMODE_WRITE) {
2123                 if(!j->writers) {
2124                         j->writers++;
2125                 } else {
2126                         if (file_p->f_mode & FMODE_READ){
2127                                 j->readers--;
2128                         }
2129                         return -EBUSY;
2130                 }
2131         }
2132
2133         if (j->cardtype == QTI_PHONECARD) {
2134                 j->pslic.bits.powerdown = 0;
2135                 j->psccr.bits.dev = 3;
2136                 j->psccr.bits.rw = 0;
2137                 outw_p(j->psccr.byte << 8 | j->pslic.byte, j->XILINXbase + 0x00);
2138                 ixj_PCcontrol_wait(j);
2139         }
2140
2141         j->flags.cidplay = 0;
2142         j->flags.cidcw_ack = 0;
2143
2144         if (ixjdebug & 0x0002)
2145                 printk(KERN_INFO "Opening board %d\n", p->board);
2146
2147         j->framesread = j->frameswritten = 0;
2148         return 0;
2149 }
2150
2151 static int ixj_release(struct inode *inode, struct file *file_p)
2152 {
2153         IXJ_TONE ti;
2154         int cnt;
2155         IXJ *j = file_p->private_data;
2156         int board = j->p.board;
2157
2158         /*
2159          *    Set up locks to ensure that only one process is talking to the DSP at a time.
2160          *    This is necessary to keep the DSP from locking up.
2161          */
2162         while(test_and_set_bit(board, (void *)&j->busyflags) != 0)
2163                 schedule_timeout_interruptible(1);
2164         if (ixjdebug & 0x0002)
2165                 printk(KERN_INFO "Closing board %d\n", NUM(inode));
2166
2167         if (j->cardtype == QTI_PHONECARD)
2168                 ixj_set_port(j, PORT_SPEAKER);
2169         else
2170                 ixj_set_port(j, PORT_POTS);
2171
2172         aec_stop(j);
2173         ixj_play_stop(j);
2174         ixj_record_stop(j);
2175         set_play_volume(j, 0x100);
2176         set_rec_volume(j, 0x100);
2177         ixj_ring_off(j);
2178
2179         /* Restore the tone table to default settings. */
2180         ti.tone_index = 10;
2181         ti.gain0 = 1;
2182         ti.freq0 = hz941;
2183         ti.gain1 = 0;
2184         ti.freq1 = hz1209;
2185         ixj_init_tone(j, &ti);
2186         ti.tone_index = 11;
2187         ti.gain0 = 1;
2188         ti.freq0 = hz941;
2189         ti.gain1 = 0;
2190         ti.freq1 = hz1336;
2191         ixj_init_tone(j, &ti);
2192         ti.tone_index = 12;
2193         ti.gain0 = 1;
2194         ti.freq0 = hz941;
2195         ti.gain1 = 0;
2196         ti.freq1 = hz1477;
2197         ixj_init_tone(j, &ti);
2198         ti.tone_index = 13;
2199         ti.gain0 = 1;
2200         ti.freq0 = hz800;
2201         ti.gain1 = 0;
2202         ti.freq1 = 0;
2203         ixj_init_tone(j, &ti);
2204         ti.tone_index = 14;
2205         ti.gain0 = 1;
2206         ti.freq0 = hz1000;
2207         ti.gain1 = 0;
2208         ti.freq1 = 0;
2209         ixj_init_tone(j, &ti);
2210         ti.tone_index = 15;
2211         ti.gain0 = 1;
2212         ti.freq0 = hz1250;
2213         ti.gain1 = 0;
2214         ti.freq1 = 0;
2215         ixj_init_tone(j, &ti);
2216         ti.tone_index = 16;
2217         ti.gain0 = 1;
2218         ti.freq0 = hz950;
2219         ti.gain1 = 0;
2220         ti.freq1 = 0;
2221         ixj_init_tone(j, &ti);
2222         ti.tone_index = 17;
2223         ti.gain0 = 1;
2224         ti.freq0 = hz1100;
2225         ti.gain1 = 0;
2226         ti.freq1 = 0;
2227         ixj_init_tone(j, &ti);
2228         ti.tone_index = 18;
2229         ti.gain0 = 1;
2230         ti.freq0 = hz1400;
2231         ti.gain1 = 0;
2232         ti.freq1 = 0;
2233         ixj_init_tone(j, &ti);
2234         ti.tone_index = 19;
2235         ti.gain0 = 1;
2236         ti.freq0 = hz1500;
2237         ti.gain1 = 0;
2238         ti.freq1 = 0;
2239         ixj_init_tone(j, &ti);
2240         ti.tone_index = 20;
2241         ti.gain0 = 1;
2242         ti.freq0 = hz1600;
2243         ti.gain1 = 0;
2244         ti.freq1 = 0;
2245         ixj_init_tone(j, &ti);
2246         ti.tone_index = 21;
2247         ti.gain0 = 1;
2248         ti.freq0 = hz1800;
2249         ti.gain1 = 0;
2250         ti.freq1 = 0;
2251         ixj_init_tone(j, &ti);
2252         ti.tone_index = 22;
2253         ti.gain0 = 1;
2254         ti.freq0 = hz2100;
2255         ti.gain1 = 0;
2256         ti.freq1 = 0;
2257         ixj_init_tone(j, &ti);
2258         ti.tone_index = 23;
2259         ti.gain0 = 1;
2260         ti.freq0 = hz1300;
2261         ti.gain1 = 0;
2262         ti.freq1 = 0;
2263         ixj_init_tone(j, &ti);
2264         ti.tone_index = 24;
2265         ti.gain0 = 1;
2266         ti.freq0 = hz2450;
2267         ti.gain1 = 0;
2268         ti.freq1 = 0;
2269         ixj_init_tone(j, &ti);
2270         ti.tone_index = 25;
2271         ti.gain0 = 1;
2272         ti.freq0 = hz350;
2273         ti.gain1 = 0;
2274         ti.freq1 = hz440;
2275         ixj_init_tone(j, &ti);
2276         ti.tone_index = 26;
2277         ti.gain0 = 1;
2278         ti.freq0 = hz440;
2279         ti.gain1 = 0;
2280         ti.freq1 = hz480;
2281         ixj_init_tone(j, &ti);
2282         ti.tone_index = 27;
2283         ti.gain0 = 1;
2284         ti.freq0 = hz480;
2285         ti.gain1 = 0;
2286         ti.freq1 = hz620;
2287         ixj_init_tone(j, &ti);
2288
2289         set_rec_depth(j, 2);    /* Set Record Channel Limit to 2 frames */
2290
2291         set_play_depth(j, 2);   /* Set Playback Channel Limit to 2 frames */
2292
2293         j->ex.bits.dtmf_ready = 0;
2294         j->dtmf_state = 0;
2295         j->dtmf_wp = j->dtmf_rp = 0;
2296         j->rec_mode = j->play_mode = -1;
2297         j->flags.ringing = 0;
2298         j->maxrings = MAXRINGS;
2299         j->ring_cadence = USA_RING_CADENCE;
2300         if(j->cadence_f[5].enable) {
2301                 j->cadence_f[5].enable = j->cadence_f[5].en_filter = j->cadence_f[5].state = 0;
2302         }
2303         j->drybuffer = 0;
2304         j->winktime = 320;
2305         j->flags.dtmf_oob = 0;
2306         for (cnt = 0; cnt < 4; cnt++)
2307                 j->cadence_f[cnt].enable = 0;
2308
2309         idle(j);
2310
2311         if(j->cardtype == QTI_PHONECARD) {
2312                 SLIC_SetState(PLD_SLIC_STATE_OC, j);
2313         }
2314
2315         if (file_p->f_mode & FMODE_READ)
2316                 j->readers--;
2317         if (file_p->f_mode & FMODE_WRITE)
2318                 j->writers--;
2319
2320         if (j->read_buffer && !j->readers) {
2321                 kfree(j->read_buffer);
2322                 j->read_buffer = NULL;
2323                 j->read_buffer_size = 0;
2324         }
2325         if (j->write_buffer && !j->writers) {
2326                 kfree(j->write_buffer);
2327                 j->write_buffer = NULL;
2328                 j->write_buffer_size = 0;
2329         }
2330         j->rec_codec = j->play_codec = 0;
2331         j->rec_frame_size = j->play_frame_size = 0;
2332         j->flags.cidsent = j->flags.cidring = 0;
2333
2334         if(j->cardtype == QTI_LINEJACK && !j->readers && !j->writers) {
2335                 ixj_set_port(j, PORT_PSTN);
2336                 daa_set_mode(j, SOP_PU_SLEEP);
2337                 ixj_set_pots(j, 1);
2338         }
2339         ixj_WriteDSPCommand(0x0FE3, j); /* Put the DSP in 1/5 power mode. */
2340
2341         /* Set up the default signals for events */
2342         for (cnt = 0; cnt < 35; cnt++)
2343                 j->ixj_signals[cnt] = SIGIO;
2344
2345         /* Set the excetion signal enable flags */
2346         j->ex_sig.bits.dtmf_ready = j->ex_sig.bits.hookstate = j->ex_sig.bits.flash = j->ex_sig.bits.pstn_ring = 
2347         j->ex_sig.bits.caller_id = j->ex_sig.bits.pstn_wink = j->ex_sig.bits.f0 = j->ex_sig.bits.f1 = j->ex_sig.bits.f2 = 
2348         j->ex_sig.bits.f3 = j->ex_sig.bits.fc0 = j->ex_sig.bits.fc1 = j->ex_sig.bits.fc2 = j->ex_sig.bits.fc3 = 1;
2349
2350         file_p->private_data = NULL;
2351         clear_bit(board, &j->busyflags);
2352         return 0;
2353 }
2354
2355 static int read_filters(IXJ *j)
2356 {
2357         unsigned short fc, cnt, trg;
2358         int var;
2359
2360         trg = 0;
2361         if (ixj_WriteDSPCommand(0x5144, j)) {
2362                 if(ixjdebug & 0x0001) {
2363                         printk(KERN_INFO "Read Frame Counter failed!\n");
2364                 }
2365                 return -1;
2366         }
2367         fc = j->ssr.high << 8 | j->ssr.low;
2368         if (fc == j->frame_count)
2369                 return 1;
2370
2371         j->frame_count = fc;
2372
2373         if (j->dtmf_proc)
2374                 return 1;
2375
2376         var = 10;
2377
2378         for (cnt = 0; cnt < 4; cnt++) {
2379                 if (ixj_WriteDSPCommand(0x5154 + cnt, j)) {
2380                         if(ixjdebug & 0x0001) {
2381                                 printk(KERN_INFO "Select Filter %d failed!\n", cnt);
2382                         }
2383                         return -1;
2384                 }
2385                 if (ixj_WriteDSPCommand(0x515C, j)) {
2386                         if(ixjdebug & 0x0001) {
2387                                 printk(KERN_INFO "Read Filter History %d failed!\n", cnt);
2388                         }
2389                         return -1;
2390                 }
2391                 j->filter_hist[cnt] = j->ssr.high << 8 | j->ssr.low;
2392
2393                 if (j->cadence_f[cnt].enable) {
2394                         if (j->filter_hist[cnt] & 3 && !(j->filter_hist[cnt] & 12)) {
2395                                 if (j->cadence_f[cnt].state == 0) {
2396                                         j->cadence_f[cnt].state = 1;
2397                                         j->cadence_f[cnt].on1min = jiffies + (long)((j->cadence_f[cnt].on1 * (hertz * (100 - var)) / 10000));
2398                                         j->cadence_f[cnt].on1dot = jiffies + (long)((j->cadence_f[cnt].on1 * (hertz * (100)) / 10000));
2399                                         j->cadence_f[cnt].on1max = jiffies + (long)((j->cadence_f[cnt].on1 * (hertz * (100 + var)) / 10000));
2400                                 } else if (j->cadence_f[cnt].state == 2 &&
2401                                            (time_after(jiffies, j->cadence_f[cnt].off1min) &&
2402                                             time_before(jiffies, j->cadence_f[cnt].off1max))) {
2403                                         if (j->cadence_f[cnt].on2) {
2404                                                 j->cadence_f[cnt].state = 3;
2405                                                 j->cadence_f[cnt].on2min = jiffies + (long)((j->cadence_f[cnt].on2 * (hertz * (100 - var)) / 10000));
2406                                                 j->cadence_f[cnt].on2dot = jiffies + (long)((j->cadence_f[cnt].on2 * (hertz * (100)) / 10000));
2407                                                 j->cadence_f[cnt].on2max = jiffies + (long)((j->cadence_f[cnt].on2 * (hertz * (100 + var)) / 10000));
2408                                         } else {
2409                                                 j->cadence_f[cnt].state = 7;
2410                                         }
2411                                 } else if (j->cadence_f[cnt].state == 4 &&
2412                                            (time_after(jiffies, j->cadence_f[cnt].off2min) &&
2413                                             time_before(jiffies, j->cadence_f[cnt].off2max))) {
2414                                         if (j->cadence_f[cnt].on3) {
2415                                                 j->cadence_f[cnt].state = 5;
2416                                                 j->cadence_f[cnt].on3min = jiffies + (long)((j->cadence_f[cnt].on3 * (hertz * (100 - var)) / 10000));
2417                                                 j->cadence_f[cnt].on3dot = jiffies + (long)((j->cadence_f[cnt].on3 * (hertz * (100)) / 10000));
2418                                                 j->cadence_f[cnt].on3max = jiffies + (long)((j->cadence_f[cnt].on3 * (hertz * (100 + var)) / 10000));
2419                                         } else {
2420                                                 j->cadence_f[cnt].state = 7;
2421                                         }
2422                                 } else {
2423                                         j->cadence_f[cnt].state = 0;
2424                                 }
2425                         } else if (j->filter_hist[cnt] & 12 && !(j->filter_hist[cnt] & 3)) {
2426                                 if (j->cadence_f[cnt].state == 1) {
2427                                         if(!j->cadence_f[cnt].on1) {
2428                                                 j->cadence_f[cnt].state = 7;
2429                                         } else if((time_after(jiffies, j->cadence_f[cnt].on1min) &&
2430                                           time_before(jiffies, j->cadence_f[cnt].on1max))) {
2431                                                 if(j->cadence_f[cnt].off1) {
2432                                                         j->cadence_f[cnt].state = 2;
2433                                                         j->cadence_f[cnt].off1min = jiffies + (long)((j->cadence_f[cnt].off1 * (hertz * (100 - var)) / 10000));
2434                                                         j->cadence_f[cnt].off1dot = jiffies + (long)((j->cadence_f[cnt].off1 * (hertz * (100)) / 10000));
2435                                                         j->cadence_f[cnt].off1max = jiffies + (long)((j->cadence_f[cnt].off1 * (hertz * (100 + var)) / 10000));
2436                                                 } else {
2437                                                         j->cadence_f[cnt].state = 7;
2438                                                 }
2439                                         } else {
2440                                                 j->cadence_f[cnt].state = 0;
2441                                         }
2442                                 } else if (j->cadence_f[cnt].state == 3) {
2443                                         if((time_after(jiffies, j->cadence_f[cnt].on2min) &&
2444                                             time_before(jiffies, j->cadence_f[cnt].on2max))) {
2445                                                 if(j->cadence_f[cnt].off2) {
2446                                                         j->cadence_f[cnt].state = 4;
2447                                                         j->cadence_f[cnt].off2min = jiffies + (long)((j->cadence_f[cnt].off2 * (hertz * (100 - var)) / 10000));
2448                                                         j->cadence_f[cnt].off2dot = jiffies + (long)((j->cadence_f[cnt].off2 * (hertz * (100)) / 10000));
2449                                                         j->cadence_f[cnt].off2max = jiffies + (long)((j->cadence_f[cnt].off2 * (hertz * (100 + var)) / 10000));
2450                                                 } else {
2451                                                         j->cadence_f[cnt].state = 7;
2452                                                 }
2453                                         } else {
2454                                                 j->cadence_f[cnt].state = 0;
2455                                         }
2456                                 } else if (j->cadence_f[cnt].state == 5) {
2457                                         if ((time_after(jiffies, j->cadence_f[cnt].on3min) &&
2458                                             time_before(jiffies, j->cadence_f[cnt].on3max))) {
2459                                                 if(j->cadence_f[cnt].off3) {
2460                                                         j->cadence_f[cnt].state = 6;
2461                                                         j->cadence_f[cnt].off3min = jiffies + (long)((j->cadence_f[cnt].off3 * (hertz * (100 - var)) / 10000));
2462                                                         j->cadence_f[cnt].off3dot = jiffies + (long)((j->cadence_f[cnt].off3 * (hertz * (100)) / 10000));
2463                                                         j->cadence_f[cnt].off3max = jiffies + (long)((j->cadence_f[cnt].off3 * (hertz * (100 + var)) / 10000));
2464                                                 } else {
2465                                                         j->cadence_f[cnt].state = 7;
2466                                                 }
2467                                         } else {
2468                                                 j->cadence_f[cnt].state = 0;
2469                                         }
2470                                 } else {
2471                                         j->cadence_f[cnt].state = 0;
2472                                 }
2473                         } else {
2474                                 switch(j->cadence_f[cnt].state) {
2475                                         case 1:
2476                                                 if(time_after(jiffies, j->cadence_f[cnt].on1dot) &&
2477                                                    !j->cadence_f[cnt].off1 &&
2478                                                    !j->cadence_f[cnt].on2 && !j->cadence_f[cnt].off2 &&
2479                                                    !j->cadence_f[cnt].on3 && !j->cadence_f[cnt].off3) {
2480                                                         j->cadence_f[cnt].state = 7;
2481                                                 }
2482                                                 break;
2483                                         case 3:
2484                                                 if(time_after(jiffies, j->cadence_f[cnt].on2dot) &&
2485                                                    !j->cadence_f[cnt].off2 &&
2486                                                    !j->cadence_f[cnt].on3 && !j->cadence_f[cnt].off3) {
2487                                                         j->cadence_f[cnt].state = 7;
2488                                                 }
2489                                                 break;
2490                                         case 5:
2491                                                 if(time_after(jiffies, j->cadence_f[cnt].on3dot) &&
2492                                                    !j->cadence_f[cnt].off3) {
2493                                                         j->cadence_f[cnt].state = 7;
2494                                                 }
2495                                                 break;
2496                                 }
2497                         }
2498
2499                         if (ixjdebug & 0x0040) {
2500                                 printk(KERN_INFO "IXJ Tone Cadence state = %d /dev/phone%d at %ld\n", j->cadence_f[cnt].state, j->board, jiffies);
2501                                 switch(j->cadence_f[cnt].state) {
2502                                         case 0:
2503                                                 printk(KERN_INFO "IXJ /dev/phone%d No Tone detected\n", j->board);
2504                                                 break;
2505                                         case 1:
2506                                                 printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %u %ld - %ld - %ld\n", j->board,
2507                                         j->cadence_f[cnt].on1, j->cadence_f[cnt].on1min, j->cadence_f[cnt].on1dot, j->cadence_f[cnt].on1max);
2508                                                 break;
2509                                         case 2:
2510                                                 printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %ld - %ld\n", j->board, j->cadence_f[cnt].off1min, 
2511                                                                                                                         j->cadence_f[cnt].off1max);
2512                                                 break;
2513                                         case 3:
2514                                                 printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %ld - %ld\n", j->board, j->cadence_f[cnt].on2min,
2515                                                                                                                         j->cadence_f[cnt].on2max);
2516                                                 break;
2517                                         case 4:
2518                                                 printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %ld - %ld\n", j->board, j->cadence_f[cnt].off2min,
2519                                                                                                                         j->cadence_f[cnt].off2max);
2520                                                 break;
2521                                         case 5:
2522                                                 printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %ld - %ld\n", j->board, j->cadence_f[cnt].on3min,
2523                                                                                                                         j->cadence_f[cnt].on3max);
2524                                                 break;
2525                                         case 6: 
2526                                                 printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %ld - %ld\n", j->board, j->cadence_f[cnt].off3min,
2527                                                                                                                         j->cadence_f[cnt].off3max);
2528                                                 break;
2529                                 }
2530                         } 
2531                 }
2532                 if (j->cadence_f[cnt].state == 7) {
2533                         j->cadence_f[cnt].state = 0;
2534                         if (j->cadence_f[cnt].enable == 1)
2535                                 j->cadence_f[cnt].enable = 0;
2536                         switch (cnt) {
2537                         case 0:
2538                                 if(ixjdebug & 0x0020) {
2539                                         printk(KERN_INFO "Filter Cadence 0 triggered %ld\n", jiffies);
2540                                 }
2541                                 j->ex.bits.fc0 = 1;
2542                                 ixj_kill_fasync(j, SIG_FC0, POLL_IN);
2543                                 break;
2544                         case 1:
2545                                 if(ixjdebug & 0x0020) {
2546                                         printk(KERN_INFO "Filter Cadence 1 triggered %ld\n", jiffies);
2547                                 }
2548                                 j->ex.bits.fc1 = 1;
2549                                 ixj_kill_fasync(j, SIG_FC1, POLL_IN);
2550                                 break;
2551                         case 2:
2552                                 if(ixjdebug & 0x0020) {
2553                                         printk(KERN_INFO "Filter Cadence 2 triggered %ld\n", jiffies);
2554                                 }
2555                                 j->ex.bits.fc2 = 1;
2556                                 ixj_kill_fasync(j, SIG_FC2, POLL_IN);
2557                                 break;
2558                         case 3:
2559                                 if(ixjdebug & 0x0020) {
2560                                         printk(KERN_INFO "Filter Cadence 3 triggered %ld\n", jiffies);
2561                                 }
2562                                 j->ex.bits.fc3 = 1;
2563                                 ixj_kill_fasync(j, SIG_FC3, POLL_IN);
2564                                 break;
2565                         }
2566                 }
2567                 if (j->filter_en[cnt] && ((j->filter_hist[cnt] & 3 && !(j->filter_hist[cnt] & 12)) ||
2568                                           (j->filter_hist[cnt] & 12 && !(j->filter_hist[cnt] & 3)))) {
2569                         if((j->filter_hist[cnt] & 3 && !(j->filter_hist[cnt] & 12))) {
2570                                 trg = 1;
2571                         } else if((j->filter_hist[cnt] & 12 && !(j->filter_hist[cnt] & 3))) {
2572                                 trg = 0;
2573                         }
2574                         switch (cnt) {
2575                         case 0:
2576                                 if(ixjdebug & 0x0020) {
2577                                         printk(KERN_INFO "Filter 0 triggered %d at %ld\n", trg, jiffies);
2578                                 }
2579                                 j->ex.bits.f0 = 1;
2580                                 ixj_kill_fasync(j, SIG_F0, POLL_IN);
2581                                 break;
2582                         case 1:
2583                                 if(ixjdebug & 0x0020) {
2584                                         printk(KERN_INFO "Filter 1 triggered %d at %ld\n", trg, jiffies);
2585                                 }
2586                                 j->ex.bits.f1 = 1;
2587                                 ixj_kill_fasync(j, SIG_F1, POLL_IN);
2588                                 break;
2589                         case 2:
2590                                 if(ixjdebug & 0x0020) {
2591                                         printk(KERN_INFO "Filter 2 triggered %d at %ld\n", trg, jiffies);
2592                                 }
2593                                 j->ex.bits.f2 = 1;
2594                                 ixj_kill_fasync(j, SIG_F2, POLL_IN);
2595                                 break;
2596                         case 3:
2597                                 if(ixjdebug & 0x0020) {
2598                                         printk(KERN_INFO "Filter 3 triggered %d at %ld\n", trg, jiffies);
2599                                 }
2600                                 j->ex.bits.f3 = 1;
2601                                 ixj_kill_fasync(j, SIG_F3, POLL_IN);
2602                                 break;
2603                         }
2604                 }
2605         }
2606         return 0;
2607 }
2608
2609 static int LineMonitor(IXJ *j)
2610 {
2611         if (j->dtmf_proc) {
2612                 return -1;
2613         }
2614         j->dtmf_proc = 1;
2615
2616         if (ixj_WriteDSPCommand(0x7000, j))             /* Line Monitor */
2617                 return -1;
2618
2619         j->dtmf.bytes.high = j->ssr.high;
2620         j->dtmf.bytes.low = j->ssr.low;
2621         if (!j->dtmf_state && j->dtmf.bits.dtmf_valid) {
2622                 j->dtmf_state = 1;
2623                 j->dtmf_current = j->dtmf.bits.digit;
2624         }
2625         if (j->dtmf_state && !j->dtmf.bits.dtmf_valid)  /* && j->dtmf_wp != j->dtmf_rp) */
2626          {
2627                 if(!j->cidcw_wait) {
2628                         j->dtmfbuffer[j->dtmf_wp] = j->dtmf_current;
2629                         j->dtmf_wp++;
2630                         if (j->dtmf_wp == 79)
2631                                 j->dtmf_wp = 0;
2632                         j->ex.bits.dtmf_ready = 1;
2633                         if(j->ex_sig.bits.dtmf_ready) {
2634                                 ixj_kill_fasync(j, SIG_DTMF_READY, POLL_IN);
2635                         }
2636                 }
2637                 else if(j->dtmf_current == 0x00 || j->dtmf_current == 0x0D) {
2638                         if(ixjdebug & 0x0020) {
2639                                 printk("IXJ phone%d saw CIDCW Ack DTMF %d from display at %ld\n", j->board, j->dtmf_current, jiffies);
2640                         }
2641                         j->flags.cidcw_ack = 1;
2642                 }
2643                 j->dtmf_state = 0;
2644         }
2645         j->dtmf_proc = 0;
2646
2647         return 0;
2648 }
2649
2650 /************************************************************************
2651 *
2652 * Functions to allow alaw <-> ulaw conversions.
2653 *
2654 ************************************************************************/
2655
2656 static void ulaw2alaw(unsigned char *buff, unsigned long len)
2657 {
2658         static unsigned char table_ulaw2alaw[] =
2659         {
2660                 0x2A, 0x2B, 0x28, 0x29, 0x2E, 0x2F, 0x2C, 0x2D, 
2661                 0x22, 0x23, 0x20, 0x21, 0x26, 0x27, 0x24, 0x25, 
2662                 0x3A, 0x3B, 0x38, 0x39, 0x3E, 0x3F, 0x3C, 0x3D, 
2663                 0x32, 0x33, 0x30, 0x31, 0x36, 0x37, 0x34, 0x35, 
2664                 0x0B, 0x08, 0x09, 0x0E, 0x0F, 0x0C, 0x0D, 0x02, 
2665                 0x03, 0x00, 0x01, 0x06, 0x07, 0x04, 0x05, 0x1A, 
2666                 0x1B, 0x18, 0x19, 0x1E, 0x1F, 0x1C, 0x1D, 0x12, 
2667                 0x13, 0x10, 0x11, 0x16, 0x17, 0x14, 0x15, 0x6B, 
2668                 0x68, 0x69, 0x6E, 0x6F, 0x6C, 0x6D, 0x62, 0x63, 
2669                 0x60, 0x61, 0x66, 0x67, 0x64, 0x65, 0x7B, 0x79, 
2670                 0x7E, 0x7F, 0x7C, 0x7D, 0x72, 0x73, 0x70, 0x71, 
2671                 0x76, 0x77, 0x74, 0x75, 0x4B, 0x49, 0x4F, 0x4D, 
2672                 0x42, 0x43, 0x40, 0x41, 0x46, 0x47, 0x44, 0x45, 
2673                 0x5A, 0x5B, 0x58, 0x59, 0x5E, 0x5F, 0x5C, 0x5D, 
2674                 0x52, 0x52, 0x53, 0x53, 0x50, 0x50, 0x51, 0x51, 
2675                 0x56, 0x56, 0x57, 0x57, 0x54, 0x54, 0x55, 0xD5, 
2676                 0xAA, 0xAB, 0xA8, 0xA9, 0xAE, 0xAF, 0xAC, 0xAD, 
2677                 0xA2, 0xA3, 0xA0, 0xA1, 0xA6, 0xA7, 0xA4, 0xA5, 
2678                 0xBA, 0xBB, 0xB8, 0xB9, 0xBE, 0xBF, 0xBC, 0xBD, 
2679                 0xB2, 0xB3, 0xB0, 0xB1, 0xB6, 0xB7, 0xB4, 0xB5, 
2680                 0x8B, 0x88, 0x89, 0x8E, 0x8F, 0x8C, 0x8D, 0x82, 
2681                 0x83, 0x80, 0x81, 0x86, 0x87, 0x84, 0x85, 0x9A, 
2682                 0x9B, 0x98, 0x99, 0x9E, 0x9F, 0x9C, 0x9D, 0x92, 
2683                 0x93, 0x90, 0x91, 0x96, 0x97, 0x94, 0x95, 0xEB, 
2684                 0xE8, 0xE9, 0xEE, 0xEF, 0xEC, 0xED, 0xE2, 0xE3, 
2685                 0xE0, 0xE1, 0xE6, 0xE7, 0xE4, 0xE5, 0xFB, 0xF9, 
2686                 0xFE, 0xFF, 0xFC, 0xFD, 0xF2, 0xF3, 0xF0, 0xF1, 
2687                 0xF6, 0xF7, 0xF4, 0xF5, 0xCB, 0xC9, 0xCF, 0xCD, 
2688                 0xC2, 0xC3, 0xC0, 0xC1, 0xC6, 0xC7, 0xC4, 0xC5, 
2689                 0xDA, 0xDB, 0xD8, 0xD9, 0xDE, 0xDF, 0xDC, 0xDD, 
2690                 0xD2, 0xD2, 0xD3, 0xD3, 0xD0, 0xD0, 0xD1, 0xD1, 
2691                 0xD6, 0xD6, 0xD7, 0xD7, 0xD4, 0xD4, 0xD5, 0xD5
2692         };
2693
2694         while (len--)
2695         {
2696                 *buff = table_ulaw2alaw[*(unsigned char *)buff];
2697                 buff++;
2698         }
2699 }
2700
2701 static void alaw2ulaw(unsigned char *buff, unsigned long len)
2702 {
2703         static unsigned char table_alaw2ulaw[] =
2704         {
2705                 0x29, 0x2A, 0x27, 0x28, 0x2D, 0x2E, 0x2B, 0x2C, 
2706                 0x21, 0x22, 0x1F, 0x20, 0x25, 0x26, 0x23, 0x24, 
2707                 0x39, 0x3A, 0x37, 0x38, 0x3D, 0x3E, 0x3B, 0x3C, 
2708                 0x31, 0x32, 0x2F, 0x30, 0x35, 0x36, 0x33, 0x34, 
2709                 0x0A, 0x0B, 0x08, 0x09, 0x0E, 0x0F, 0x0C, 0x0D, 
2710                 0x02, 0x03, 0x00, 0x01, 0x06, 0x07, 0x04, 0x05, 
2711                 0x1A, 0x1B, 0x18, 0x19, 0x1E, 0x1F, 0x1C, 0x1D, 
2712                 0x12, 0x13, 0x10, 0x11, 0x16, 0x17, 0x14, 0x15, 
2713                 0x62, 0x63, 0x60, 0x61, 0x66, 0x67, 0x64, 0x65, 
2714                 0x5D, 0x5D, 0x5C, 0x5C, 0x5F, 0x5F, 0x5E, 0x5E, 
2715                 0x74, 0x76, 0x70, 0x72, 0x7C, 0x7E, 0x78, 0x7A, 
2716                 0x6A, 0x6B, 0x68, 0x69, 0x6E, 0x6F, 0x6C, 0x6D, 
2717                 0x48, 0x49, 0x46, 0x47, 0x4C, 0x4D, 0x4A, 0x4B, 
2718                 0x40, 0x41, 0x3F, 0x3F, 0x44, 0x45, 0x42, 0x43, 
2719                 0x56, 0x57, 0x54, 0x55, 0x5A, 0x5B, 0x58, 0x59, 
2720                 0x4F, 0x4F, 0x4E, 0x4E, 0x52, 0x53, 0x50, 0x51, 
2721                 0xA9, 0xAA, 0xA7, 0xA8, 0xAD, 0xAE, 0xAB, 0xAC, 
2722                 0xA1, 0xA2, 0x9F, 0xA0, 0xA5, 0xA6, 0xA3, 0xA4, 
2723                 0xB9, 0xBA, 0xB7, 0xB8, 0xBD, 0xBE, 0xBB, 0xBC, 
2724                 0xB1, 0xB2, 0xAF, 0xB0, 0xB5, 0xB6, 0xB3, 0xB4, 
2725                 0x8A, 0x8B, 0x88, 0x89, 0x8E, 0x8F, 0x8C, 0x8D, 
2726                 0x82, 0x83, 0x80, 0x81, 0x86, 0x87, 0x84, 0x85, 
2727                 0x9A, 0x9B, 0x98, 0x99, 0x9E, 0x9F, 0x9C, 0x9D, 
2728                 0x92, 0x93, 0x90, 0x91, 0x96, 0x97, 0x94, 0x95, 
2729                 0xE2, 0xE3, 0xE0, 0xE1, 0xE6, 0xE7, 0xE4, 0xE5, 
2730                 0xDD, 0xDD, 0xDC, 0xDC, 0xDF, 0xDF, 0xDE, 0xDE, 
2731                 0xF4, 0xF6, 0xF0, 0xF2, 0xFC, 0xFE, 0xF8, 0xFA, 
2732                 0xEA, 0xEB, 0xE8, 0xE9, 0xEE, 0xEF, 0xEC, 0xED, 
2733                 0xC8, 0xC9, 0xC6, 0xC7, 0xCC, 0xCD, 0xCA, 0xCB, 
2734                 0xC0, 0xC1, 0xBF, 0xBF, 0xC4, 0xC5, 0xC2, 0xC3, 
2735                 0xD6, 0xD7, 0xD4, 0xD5, 0xDA, 0xDB, 0xD8, 0xD9, 
2736                 0xCF, 0xCF, 0xCE, 0xCE, 0xD2, 0xD3, 0xD0, 0xD1
2737         };
2738
2739         while (len--)
2740         {
2741                 *buff = table_alaw2ulaw[*(unsigned char *)buff];
2742                 buff++;
2743         }
2744 }
2745
2746 static ssize_t ixj_read(struct file * file_p, char __user *buf, size_t length, loff_t * ppos)
2747 {
2748         unsigned long i = *ppos;
2749         IXJ * j = get_ixj(NUM(file_p->f_path.dentry->d_inode));
2750
2751         DECLARE_WAITQUEUE(wait, current);
2752
2753         if (j->flags.inread)
2754                 return -EALREADY;
2755
2756         j->flags.inread = 1;
2757
2758         add_wait_queue(&j->read_q, &wait);
2759         set_current_state(TASK_INTERRUPTIBLE);
2760         mb();
2761
2762         while (!j->read_buffer_ready || (j->dtmf_state && j->flags.dtmf_oob)) {
2763                 ++j->read_wait;
2764                 if (file_p->f_flags & O_NONBLOCK) {
2765                         set_current_state(TASK_RUNNING);
2766                         remove_wait_queue(&j->read_q, &wait);
2767                         j->flags.inread = 0;
2768                         return -EAGAIN;
2769                 }
2770                 if (!ixj_hookstate(j)) {
2771                         set_current_state(TASK_RUNNING);
2772                         remove_wait_queue(&j->read_q, &wait);
2773                         j->flags.inread = 0;
2774                         return 0;
2775                 }
2776                 interruptible_sleep_on(&j->read_q);
2777                 if (signal_pending(current)) {
2778                         set_current_state(TASK_RUNNING);
2779                         remove_wait_queue(&j->read_q, &wait);
2780                         j->flags.inread = 0;
2781                         return -EINTR;
2782                 }
2783         }
2784
2785         remove_wait_queue(&j->read_q, &wait);
2786         set_current_state(TASK_RUNNING);
2787         /* Don't ever copy more than the user asks */
2788         if(j->rec_codec == ALAW)
2789                 ulaw2alaw(j->read_buffer, min(length, j->read_buffer_size));
2790         i = copy_to_user(buf, j->read_buffer, min(length, j->read_buffer_size));
2791         j->read_buffer_ready = 0;
2792         if (i) {
2793                 j->flags.inread = 0;
2794                 return -EFAULT;
2795         } else {
2796                 j->flags.inread = 0;
2797                 return min(length, j->read_buffer_size);
2798         }
2799 }
2800
2801 static ssize_t ixj_enhanced_read(struct file * file_p, char __user *buf, size_t length,
2802                           loff_t * ppos)
2803 {
2804         int pre_retval;
2805         ssize_t read_retval = 0;
2806         IXJ *j = get_ixj(NUM(file_p->f_path.dentry->d_inode));
2807
2808         pre_retval = ixj_PreRead(j, 0L);
2809         switch (pre_retval) {
2810         case NORMAL:
2811                 read_retval = ixj_read(file_p, buf, length, ppos);
2812                 ixj_PostRead(j, 0L);
2813                 break;
2814         case NOPOST:
2815                 read_retval = ixj_read(file_p, buf, length, ppos);
2816                 break;
2817         case POSTONLY:
2818                 ixj_PostRead(j, 0L);
2819                 break;
2820         default:
2821                 read_retval = pre_retval;
2822         }
2823         return read_retval;
2824 }
2825
2826 static ssize_t ixj_write(struct file *file_p, const char __user *buf, size_t count, loff_t * ppos)
2827 {
2828         unsigned long i = *ppos;
2829         IXJ *j = file_p->private_data;
2830
2831         DECLARE_WAITQUEUE(wait, current);
2832
2833         if (j->flags.inwrite)
2834                 return -EALREADY;
2835
2836         j->flags.inwrite = 1;
2837
2838         add_wait_queue(&j->write_q, &wait);
2839         set_current_state(TASK_INTERRUPTIBLE);
2840         mb();
2841
2842
2843         while (!j->write_buffers_empty) {
2844                 ++j->write_wait;
2845                 if (file_p->f_flags & O_NONBLOCK) {
2846                         set_current_state(TASK_RUNNING);
2847                         remove_wait_queue(&j->write_q, &wait);
2848                         j->flags.inwrite = 0;
2849                         return -EAGAIN;
2850                 }
2851                 if (!ixj_hookstate(j)) {
2852                         set_current_state(TASK_RUNNING);
2853                         remove_wait_queue(&j->write_q, &wait);
2854                         j->flags.inwrite = 0;
2855                         return 0;
2856                 }
2857                 interruptible_sleep_on(&j->write_q);
2858                 if (signal_pending(current)) {
2859                         set_current_state(TASK_RUNNING);
2860                         remove_wait_queue(&j->write_q, &wait);
2861                         j->flags.inwrite = 0;
2862                         return -EINTR;
2863                 }
2864         }
2865         set_current_state(TASK_RUNNING);
2866         remove_wait_queue(&j->write_q, &wait);
2867         if (j->write_buffer_wp + count >= j->write_buffer_end)
2868                 j->write_buffer_wp = j->write_buffer;
2869         i = copy_from_user(j->write_buffer_wp, buf, min(count, j->write_buffer_size));
2870         if (i) {
2871                 j->flags.inwrite = 0;
2872                 return -EFAULT;
2873         }
2874        if(j->play_codec == ALAW)
2875                alaw2ulaw(j->write_buffer_wp, min(count, j->write_buffer_size));
2876         j->flags.inwrite = 0;
2877         return min(count, j->write_buffer_size);
2878 }
2879
2880 static ssize_t ixj_enhanced_write(struct file * file_p, const char __user *buf, size_t count, loff_t * ppos)
2881 {
2882         int pre_retval;
2883         ssize_t write_retval = 0;
2884
2885         IXJ *j = get_ixj(NUM(file_p->f_path.dentry->d_inode));
2886
2887         pre_retval = ixj_PreWrite(j, 0L);
2888         switch (pre_retval) {
2889         case NORMAL:
2890                 write_retval = ixj_write(file_p, buf, count, ppos);
2891                 if (write_retval > 0) {
2892                         ixj_PostWrite(j, 0L);
2893                         j->write_buffer_wp += write_retval;
2894                         j->write_buffers_empty--;
2895                 }
2896                 break;
2897         case NOPOST:
2898                 write_retval = ixj_write(file_p, buf, count, ppos);
2899                 if (write_retval > 0) {
2900                         j->write_buffer_wp += write_retval;
2901                         j->write_buffers_empty--;
2902                 }
2903                 break;
2904         case POSTONLY:
2905                 ixj_PostWrite(j, 0L);
2906                 break;
2907         default:
2908                 write_retval = pre_retval;
2909         }
2910         return write_retval;
2911 }
2912
2913 static void ixj_read_frame(IXJ *j)
2914 {
2915         int cnt, dly;
2916
2917         if (j->read_buffer) {
2918                 for (cnt = 0; cnt < j->rec_frame_size * 2; cnt += 2) {
2919                         if (!(cnt % 16) && !IsRxReady(j)) {
2920                                 dly = 0;
2921                                 while (!IsRxReady(j)) {
2922                                         if (dly++ > 5) {
2923                                                 dly = 0;
2924                                                 break;
2925                                         }
2926                                         udelay(10);
2927                                 }
2928                         }
2929                         /* Throw away word 0 of the 8021 compressed format to get standard G.729. */
2930                         if (j->rec_codec == G729 && (cnt == 0 || cnt == 10 || cnt == 20)) {
2931                                 inb_p(j->DSPbase + 0x0E);
2932                                 inb_p(j->DSPbase + 0x0F);
2933                         }
2934                         *(j->read_buffer + cnt) = inb_p(j->DSPbase + 0x0E);
2935                         *(j->read_buffer + cnt + 1) = inb_p(j->DSPbase + 0x0F);
2936                 }
2937                 ++j->framesread;
2938                 if (j->intercom != -1) {
2939                         if (IsTxReady(get_ixj(j->intercom))) {
2940                                 for (cnt = 0; cnt < j->rec_frame_size * 2; cnt += 2) {
2941                                         if (!(cnt % 16) && !IsTxReady(j)) {
2942                                                 dly = 0;
2943                                                 while (!IsTxReady(j)) {
2944                                                         if (dly++ > 5) {
2945                                                                 dly = 0;
2946                                                                 break;
2947                                                         }
2948                                                         udelay(10);
2949                                                 }
2950                                         }
2951                                         outb_p(*(j->read_buffer + cnt), get_ixj(j->intercom)->DSPbase + 0x0C);
2952                                         outb_p(*(j->read_buffer + cnt + 1), get_ixj(j->intercom)->DSPbase + 0x0D);
2953                                 }
2954                                 get_ixj(j->intercom)->frameswritten++;
2955                         }
2956                 } else {
2957                         j->read_buffer_ready = 1;
2958                         wake_up_interruptible(&j->read_q);      /* Wake any blocked readers */
2959
2960                         wake_up_interruptible(&j->poll_q);      /* Wake any blocked selects */
2961
2962                         if(j->ixj_signals[SIG_READ_READY])
2963                                 ixj_kill_fasync(j, SIG_READ_READY, POLL_OUT);
2964                 }
2965         }
2966 }
2967
2968 static short fsk[][6][20] =
2969 {
2970         {
2971                 {
2972                         0, 17846, 29934, 32364, 24351, 8481, -10126, -25465, -32587, -29196,
2973                         -16384, 1715, 19260, 30591, 32051, 23170, 6813, -11743, -26509, -32722
2974                 },
2975                 {
2976                         -28377, -14876, 3425, 20621, 31163, 31650, 21925, 5126, -13328, -27481,
2977                         -32767, -27481, -13328, 5126, 21925, 31650, 31163, 20621, 3425, -14876
2978                 },
2979                 {
2980                         -28377, -32722, -26509, -11743, 6813, 23170, 32051, 30591, 19260, 1715,
2981                         -16384, -29196, -32587, -25465, -10126, 8481, 24351, 32364, 29934, 17846
2982                 },
2983                 {
2984                         0, -17846, -29934, -32364, -24351, -8481, 10126, 25465, 32587, 29196,
2985                         16384, -1715, -19260, -30591, -32051, -23170, -6813, 11743, 26509, 32722
2986                 },
2987                 {
2988                         28377, 14876, -3425, -20621, -31163, -31650, -21925, -5126, 13328, 27481,
2989                         32767, 27481, 13328, -5126, -21925, -31650, -31163, -20621, -3425, 14876
2990                 },
2991                 {
2992                         28377, 32722, 26509, 11743, -6813, -23170, -32051, -30591, -19260, -1715,
2993                         16384, 29196, 32587, 25465, 10126, -8481, -24351, -32364, -29934, -17846
2994                 }
2995         },
2996         {
2997                 {
2998                         0, 10126, 19260, 26509, 31163, 32767, 31163, 26509, 19260, 10126,
2999                         0, -10126, -19260, -26509, -31163, -32767, -31163, -26509, -19260, -10126
3000                 },
3001                 {
3002                         -28377, -21925, -13328, -3425, 6813, 16384, 24351, 29934, 32587, 32051,
3003                         28377, 21925, 13328, 3425, -6813, -16384, -24351, -29934, -32587, -32051
3004                 },
3005                 {
3006                         -28377, -32051, -32587, -29934, -24351, -16384, -6813, 3425, 13328, 21925,
3007                         28377, 32051, 32587, 29934, 24351, 16384, 6813, -3425, -13328, -21925
3008                 },
3009                 {
3010                         0, -10126, -19260, -26509, -31163, -32767, -31163, -26509, -19260, -10126,
3011                         0, 10126, 19260, 26509, 31163, 32767, 31163, 26509, 19260, 10126
3012                 },
3013                 {
3014                         28377, 21925, 13328, 3425, -6813, -16383, -24351, -29934, -32587, -32051,
3015                         -28377, -21925, -13328, -3425, 6813, 16383, 24351, 29934, 32587, 32051
3016                 },
3017                 {
3018                         28377, 32051, 32587, 29934, 24351, 16384, 6813, -3425, -13328, -21925,
3019                         -28377, -32051, -32587, -29934, -24351, -16384, -6813, 3425, 13328, 21925
3020                 }
3021         }
3022 };
3023
3024
3025 static void ixj_write_cid_bit(IXJ *j, int bit)
3026 {
3027         while (j->fskcnt < 20) {
3028                 if(j->fskdcnt < (j->fsksize - 1))
3029                         j->fskdata[j->fskdcnt++] = fsk[bit][j->fskz][j->fskcnt];
3030
3031                 j->fskcnt += 3;
3032         }
3033         j->fskcnt %= 20;
3034
3035         if (!bit)
3036                 j->fskz++;
3037         if (j->fskz >= 6)
3038                 j->fskz = 0;
3039
3040 }
3041
3042 static void ixj_write_cid_byte(IXJ *j, char byte)
3043 {
3044         IXJ_CBYTE cb;
3045
3046                 cb.cbyte = byte;
3047                 ixj_write_cid_bit(j, 0);
3048                 ixj_write_cid_bit(j, cb.cbits.b0 ? 1 : 0);
3049                 ixj_write_cid_bit(j, cb.cbits.b1 ? 1 : 0);
3050                 ixj_write_cid_bit(j, cb.cbits.b2 ? 1 : 0);
3051                 ixj_write_cid_bit(j, cb.cbits.b3 ? 1 : 0);
3052                 ixj_write_cid_bit(j, cb.cbits.b4 ? 1 : 0);
3053                 ixj_write_cid_bit(j, cb.cbits.b5 ? 1 : 0);
3054                 ixj_write_cid_bit(j, cb.cbits.b6 ? 1 : 0);
3055                 ixj_write_cid_bit(j, cb.cbits.b7 ? 1 : 0);
3056                 ixj_write_cid_bit(j, 1);
3057 }
3058
3059 static void ixj_write_cid_seize(IXJ *j)
3060 {
3061         int cnt;
3062
3063         for (cnt = 0; cnt < 150; cnt++) {
3064                 ixj_write_cid_bit(j, 0);
3065                 ixj_write_cid_bit(j, 1);
3066         }
3067         for (cnt = 0; cnt < 180; cnt++) {
3068                 ixj_write_cid_bit(j, 1);
3069         }
3070 }
3071
3072 static void ixj_write_cidcw_seize(IXJ *j)
3073 {
3074         int cnt;
3075
3076         for (cnt = 0; cnt < 80; cnt++) {
3077                 ixj_write_cid_bit(j, 1);
3078         }
3079 }
3080
3081 static int ixj_write_cid_string(IXJ *j, char *s, int checksum)
3082 {
3083         int cnt;
3084
3085         for (cnt = 0; cnt < strlen(s); cnt++) {
3086                 ixj_write_cid_byte(j, s[cnt]);
3087                 checksum = (checksum + s[cnt]);
3088         }
3089         return checksum;
3090 }
3091
3092 static void ixj_pad_fsk(IXJ *j, int pad)
3093 {
3094         int cnt; 
3095
3096         for (cnt = 0; cnt < pad; cnt++) {
3097                 if(j->fskdcnt < (j->fsksize - 1))
3098                         j->fskdata[j->fskdcnt++] = 0x0000;
3099         }
3100         for (cnt = 0; cnt < 720; cnt++) {
3101                 if(j->fskdcnt < (j->fsksize - 1))
3102                         j->fskdata[j->fskdcnt++] = 0x0000;
3103         }
3104 }
3105
3106 static void ixj_pre_cid(IXJ *j)
3107 {
3108         j->cid_play_codec = j->play_codec;
3109         j->cid_play_frame_size = j->play_frame_size;
3110         j->cid_play_volume = get_play_volume(j);
3111         j->cid_play_flag = j->flags.playing;
3112
3113         j->cid_rec_codec = j->rec_codec;
3114         j->cid_rec_volume = get_rec_volume(j);
3115         j->cid_rec_flag = j->flags.recording;
3116
3117         j->cid_play_aec_level = j->aec_level;
3118
3119         switch(j->baseframe.low) {
3120                 case 0xA0:
3121                         j->cid_base_frame_size = 20;
3122                         break;
3123                 case 0x50:
3124                         j->cid_base_frame_size = 10;
3125                         break;
3126                 case 0xF0:
3127                         j->cid_base_frame_size = 30;
3128                         break;
3129         }
3130
3131         ixj_play_stop(j);
3132         ixj_cpt_stop(j);
3133
3134         j->flags.cidplay = 1;
3135
3136         set_base_frame(j, 30);
3137         set_play_codec(j, LINEAR16);
3138         set_play_volume(j, 0x1B);
3139         ixj_play_start(j);
3140 }
3141
3142 static void ixj_post_cid(IXJ *j)
3143 {
3144         ixj_play_stop(j);
3145
3146         if(j->cidsize > 5000) {
3147                 SLIC_SetState(PLD_SLIC_STATE_STANDBY, j);
3148         }
3149         j->flags.cidplay = 0;
3150         if(ixjdebug & 0x0200) {
3151                 printk("IXJ phone%d Finished Playing CallerID data %ld\n", j->board, jiffies);
3152         }
3153
3154         ixj_fsk_free(j);
3155
3156         j->fskdcnt = 0;
3157         set_base_frame(j, j->cid_base_frame_size);
3158         set_play_codec(j, j->cid_play_codec);
3159         ixj_aec_start(j, j->cid_play_aec_level);
3160         set_play_volume(j, j->cid_play_volume);
3161
3162         set_rec_codec(j, j->cid_rec_codec);
3163         set_rec_volume(j, j->cid_rec_volume);
3164
3165         if(j->cid_rec_flag)
3166                 ixj_record_start(j);
3167
3168         if(j->cid_play_flag)
3169                 ixj_play_start(j);
3170
3171         if(j->cid_play_flag) {
3172                 wake_up_interruptible(&j->write_q);     /* Wake any blocked writers */
3173         }
3174 }
3175
3176 static void ixj_write_cid(IXJ *j)
3177 {
3178         char sdmf1[50];
3179         char sdmf2[50];
3180         char sdmf3[80];
3181         char mdmflen, len1, len2, len3;
3182         int pad;
3183
3184         int checksum = 0;
3185
3186         if (j->dsp.low == 0x20 || j->flags.cidplay)
3187                 return;
3188
3189         j->fskz = j->fskphase = j->fskcnt = j->fskdcnt = 0;
3190         j->cidsize = j->cidcnt = 0;
3191
3192         ixj_fsk_alloc(j);
3193
3194         strcpy(sdmf1, j->cid_send.month);
3195         strcat(sdmf1, j->cid_send.day);
3196         strcat(sdmf1, j->cid_send.hour);
3197         strcat(sdmf1, j->cid_send.min);
3198         strcpy(sdmf2, j->cid_send.number);
3199         strcpy(sdmf3, j->cid_send.name);
3200
3201         len1 = strlen(sdmf1);
3202         len2 = strlen(sdmf2);
3203         len3 = strlen(sdmf3);
3204         mdmflen = len1 + len2 + len3 + 6;
3205
3206         while(1){
3207                 ixj_write_cid_seize(j);
3208
3209                 ixj_write_cid_byte(j, 0x80);
3210                 checksum = 0x80;
3211                 ixj_write_cid_byte(j, mdmflen);
3212                 checksum = checksum + mdmflen;
3213
3214                 ixj_write_cid_byte(j, 0x01);
3215                 checksum = checksum + 0x01;
3216                 ixj_write_cid_byte(j, len1);
3217                 checksum = checksum + len1;
3218                 checksum = ixj_write_cid_string(j, sdmf1, checksum);
3219                 if(ixj_hookstate(j) & 1)
3220                         break;
3221
3222                 ixj_write_cid_byte(j, 0x02);
3223                 checksum = checksum + 0x02;
3224                 ixj_write_cid_byte(j, len2);
3225                 checksum = checksum + len2;
3226                 checksum = ixj_write_cid_string(j, sdmf2, checksum);
3227                 if(ixj_hookstate(j) & 1)
3228                         break;
3229
3230                 ixj_write_cid_byte(j, 0x07);
3231                 checksum = checksum + 0x07;
3232                 ixj_write_cid_byte(j, len3);
3233                 checksum = checksum + len3;
3234                 checksum = ixj_write_cid_string(j, sdmf3, checksum);
3235                 if(ixj_hookstate(j) & 1)
3236                         break;
3237
3238                 checksum %= 256;
3239                 checksum ^= 0xFF;
3240                 checksum += 1;
3241
3242                 ixj_write_cid_byte(j, (char) checksum);
3243
3244                 pad = j->fskdcnt % 240;
3245                 if (pad) {
3246                         pad = 240 - pad;
3247                 }
3248                 ixj_pad_fsk(j, pad);
3249                 break;
3250         }
3251
3252         ixj_write_frame(j);
3253 }
3254
3255 static void ixj_write_cidcw(IXJ *j)
3256 {
3257         IXJ_TONE ti;
3258
3259         char sdmf1[50];
3260         char sdmf2[50];
3261         char sdmf3[80];
3262         char mdmflen, len1, len2, len3;
3263         int pad;
3264
3265         int checksum = 0;
3266
3267         if (j->dsp.low == 0x20 || j->flags.cidplay)
3268                 return;
3269
3270         j->fskz = j->fskphase = j->fskcnt = j->fskdcnt = 0;
3271         j->cidsize = j->cidcnt = 0;
3272
3273         ixj_fsk_alloc(j);
3274
3275         j->flags.cidcw_ack = 0;
3276
3277         ti.tone_index = 23;
3278         ti.gain0 = 1;
3279         ti.freq0 = hz440;
3280         ti.gain1 = 0;
3281         ti.freq1 = 0;
3282         ixj_init_tone(j, &ti);
3283
3284         ixj_set_tone_on(1500, j);
3285         ixj_set_tone_off(32, j);
3286         if(ixjdebug & 0x0200) {
3287                 printk("IXJ cidcw phone%d first tone start at %ld\n", j->board, jiffies);
3288         }
3289         ixj_play_tone(j, 23);
3290
3291         clear_bit(j->board, &j->busyflags);
3292         while(j->tone_state)
3293                 schedule_timeout_interruptible(1);
3294         while(test_and_set_bit(j->board, (void *)&j->busyflags) != 0)
3295                 schedule_timeout_interruptible(1);
3296         if(ixjdebug & 0x0200) {
3297                 printk("IXJ cidcw phone%d first tone end at %ld\n", j->board, jiffies);
3298         }
3299
3300         ti.tone_index = 24;
3301         ti.gain0 = 1;
3302         ti.freq0 = hz2130;
3303         ti.gain1 = 0;
3304         ti.freq1 = hz2750;
3305         ixj_init_tone(j, &ti);
3306
3307         ixj_set_tone_off(10, j);
3308         ixj_set_tone_on(600, j);
3309         if(ixjdebug & 0x0200) {
3310                 printk("IXJ cidcw phone%d second tone start at %ld\n", j->board, jiffies);
3311         }
3312         ixj_play_tone(j, 24);
3313
3314         clear_bit(j->board, &j->busyflags);
3315         while(j->tone_state)
3316                 schedule_timeout_interruptible(1);
3317         while(test_and_set_bit(j->board, (void *)&j->busyflags) != 0)
3318                 schedule_timeout_interruptible(1);
3319         if(ixjdebug & 0x0200) {
3320                 printk("IXJ cidcw phone%d sent second tone at %ld\n", j->board, jiffies);
3321         }
3322
3323         j->cidcw_wait = jiffies + ((50 * hertz) / 100);
3324
3325         clear_bit(j->board, &j->busyflags);
3326         while(!j->flags.cidcw_ack && time_before(jiffies, j->cidcw_wait))
3327                 schedule_timeout_interruptible(1);
3328         while(test_and_set_bit(j->board, (void *)&j->busyflags) != 0)
3329                 schedule_timeout_interruptible(1);
3330         j->cidcw_wait = 0;
3331         if(!j->flags.cidcw_ack) {
3332                 if(ixjdebug & 0x0200) {
3333                         printk("IXJ cidcw phone%d did not receive ACK from display %ld\n", j->board, jiffies);
3334                 }
3335                 ixj_post_cid(j);
3336                 if(j->cid_play_flag) {
3337                         wake_up_interruptible(&j->write_q);     /* Wake any blocked readers */
3338                 }
3339                 return;
3340         } else {
3341                 ixj_pre_cid(j);
3342         }
3343         j->flags.cidcw_ack = 0;
3344         strcpy(sdmf1, j->cid_send.month);
3345         strcat(sdmf1, j->cid_send.day);
3346         strcat(sdmf1, j->cid_send.hour);
3347         strcat(sdmf1, j->cid_send.min);
3348         strcpy(sdmf2, j->cid_send.number);
3349         strcpy(sdmf3, j->cid_send.name);
3350
3351         len1 = strlen(sdmf1);
3352         len2 = strlen(sdmf2);
3353         len3 = strlen(sdmf3);
3354         mdmflen = len1 + len2 + len3 + 6;
3355
3356         ixj_write_cidcw_seize(j);
3357
3358         ixj_write_cid_byte(j, 0x80);
3359         checksum = 0x80;
3360         ixj_write_cid_byte(j, mdmflen);
3361         checksum = checksum + mdmflen;
3362
3363         ixj_write_cid_byte(j, 0x01);
3364         checksum = checksum + 0x01;
3365         ixj_write_cid_byte(j, len1);
3366         checksum = checksum + len1;
3367         checksum = ixj_write_cid_string(j, sdmf1, checksum);
3368
3369         ixj_write_cid_byte(j, 0x02);
3370         checksum = checksum + 0x02;
3371         ixj_write_cid_byte(j, len2);
3372         checksum = checksum + len2;
3373         checksum = ixj_write_cid_string(j, sdmf2, checksum);
3374
3375         ixj_write_cid_byte(j, 0x07);
3376         checksum = checksum + 0x07;
3377         ixj_write_cid_byte(j, len3);
3378         checksum = checksum + len3;
3379         checksum = ixj_write_cid_string(j, sdmf3, checksum);
3380
3381         checksum %= 256;
3382         checksum ^= 0xFF;
3383         checksum += 1;
3384
3385         ixj_write_cid_byte(j, (char) checksum);
3386
3387         pad = j->fskdcnt % 240;
3388         if (pad) {
3389                 pad = 240 - pad;
3390         }
3391         ixj_pad_fsk(j, pad);
3392         if(ixjdebug & 0x0200) {
3393                 printk("IXJ cidcw phone%d sent FSK data at %ld\n", j->board, jiffies);
3394         }
3395 }
3396
3397 static void ixj_write_vmwi(IXJ *j, int msg)
3398 {
3399         char mdmflen;
3400         int pad;
3401
3402         int checksum = 0;
3403
3404         if (j->dsp.low == 0x20 || j->flags.cidplay)
3405                 return;
3406
3407         j->fskz = j->fskphase = j->fskcnt = j->fskdcnt = 0;
3408         j->cidsize = j->cidcnt = 0;
3409
3410         ixj_fsk_alloc(j);
3411
3412         mdmflen = 3;
3413
3414         if (j->port == PORT_POTS)
3415                 SLIC_SetState(PLD_SLIC_STATE_OHT, j);
3416
3417         ixj_write_cid_seize(j);
3418
3419         ixj_write_cid_byte(j, 0x82);
3420         checksum = 0x82;
3421         ixj_write_cid_byte(j, mdmflen);
3422         checksum = checksum + mdmflen;
3423
3424         ixj_write_cid_byte(j, 0x0B);
3425         checksum = checksum + 0x0B;
3426         ixj_write_cid_byte(j, 1);
3427         checksum = checksum + 1;
3428
3429         if(msg) {
3430                 ixj_write_cid_byte(j, 0xFF);
3431                 checksum = checksum + 0xFF;
3432         }
3433         else {
3434                 ixj_write_cid_byte(j, 0x00);
3435                 checksum = checksum + 0x00;
3436         }
3437
3438         checksum %= 256;
3439         checksum ^= 0xFF;
3440         checksum += 1;
3441
3442         ixj_write_cid_byte(j, (char) checksum);
3443
3444         pad = j->fskdcnt % 240;
3445         if (pad) {
3446                 pad = 240 - pad;
3447         }
3448         ixj_pad_fsk(j, pad);
3449 }
3450
3451 static void ixj_write_frame(IXJ *j)
3452 {
3453         int cnt, frame_count, dly;
3454         IXJ_WORD dat;
3455
3456         frame_count = 0;
3457         if(j->flags.cidplay) {
3458                 for(cnt = 0; cnt < 480; cnt++) {
3459                         if (!(cnt % 16) && !IsTxReady(j)) {
3460                                 dly = 0;
3461                                 while (!IsTxReady(j)) {
3462                                         if (dly++ > 5) {
3463                                                 dly = 0;
3464                                                 break;
3465                                         }
3466                                         udelay(10);
3467                                 }
3468                         }
3469                         dat.word = j->fskdata[j->cidcnt++];
3470                         outb_p(dat.bytes.low, j->DSPbase + 0x0C);
3471                         outb_p(dat.bytes.high, j->DSPbase + 0x0D);
3472                         cnt++;
3473                 }
3474                 if(j->cidcnt >= j->fskdcnt) {
3475                         ixj_post_cid(j);
3476                 }
3477                 /* This may seem rude, but if we just played one frame of FSK data for CallerID
3478                    and there is real audio data in the buffer, we need to throw it away because 
3479                    we just used it's time slot */
3480                 if (j->write_buffer_rp > j->write_buffer_wp) {
3481                         j->write_buffer_rp += j->cid_play_frame_size * 2;
3482                         if (j->write_buffer_rp >= j->write_buffer_end) {
3483                                 j->write_buffer_rp = j->write_buffer;
3484                         }
3485                         j->write_buffers_empty++;
3486                         wake_up_interruptible(&j->write_q);     /* Wake any blocked writers */
3487
3488                         wake_up_interruptible(&j->poll_q);      /* Wake any blocked selects */
3489                 }
3490         } else if (j->write_buffer && j->write_buffers_empty < 1) { 
3491                 if (j->write_buffer_wp > j->write_buffer_rp) {
3492                         frame_count =
3493                             (j->write_buffer_wp - j->write_buffer_rp) / (j->play_frame_size * 2);
3494                 }
3495                 if (j->write_buffer_rp > j->write_buffer_wp) {
3496                         frame_count =
3497                             (j->write_buffer_wp - j->write_buffer) / (j->play_frame_size * 2) +
3498                             (j->write_buffer_end - j->write_buffer_rp) / (j->play_frame_size * 2);
3499                 }
3500                 if (frame_count >= 1) {
3501                         if (j->ver.low == 0x12 && j->play_mode && j->flags.play_first_frame) {
3502                                 BYTES blankword;
3503
3504                                 switch (j->play_mode) {
3505                                 case PLAYBACK_MODE_ULAW:
3506                                 case PLAYBACK_MODE_ALAW:
3507                                         blankword.low = blankword.high = 0xFF;
3508                                         break;
3509                                 case PLAYBACK_MODE_8LINEAR:
3510                                 case PLAYBACK_MODE_16LINEAR:
3511                                 default:
3512                                         blankword.low = blankword.high = 0x00;
3513                                         break;
3514                                 case PLAYBACK_MODE_8LINEAR_WSS:
3515                                         blankword.low = blankword.high = 0x80;
3516                                         break;
3517                                 }
3518                                 for (cnt = 0; cnt < 16; cnt++) {
3519                                         if (!(cnt % 16) && !IsTxReady(j)) {
3520                                                 dly = 0;
3521                                                 while (!IsTxReady(j)) {
3522                                                         if (dly++ > 5) {
3523                                                                 dly = 0;
3524                                                                 break;
3525                                                         }
3526                                                         udelay(10);
3527                                                 }
3528                                         }
3529                                         outb_p((blankword.low), j->DSPbase + 0x0C);
3530                                         outb_p((blankword.high), j->DSPbase + 0x0D);
3531                                 }
3532                                 j->flags.play_first_frame = 0;
3533                         } else  if (j->play_codec == G723_63 && j->flags.play_first_frame) {
3534                                 for (cnt = 0; cnt < 24; cnt++) {
3535                                         BYTES blankword;
3536
3537                                         if(cnt == 12) {
3538                                                 blankword.low = 0x02;
3539                                                 blankword.high = 0x00;
3540                                         }
3541                                         else {
3542                                                 blankword.low = blankword.high = 0x00;
3543                                         }
3544                                         if (!(cnt % 16) && !IsTxReady(j)) {
3545                                                 dly = 0;
3546                                                 while (!IsTxReady(j)) {
3547                                                         if (dly++ > 5) {
3548                                                                 dly = 0;
3549                                                                 break;
3550                                                         }
3551                                                         udelay(10);
3552                                                 }
3553                                         }
3554                                         outb_p((blankword.low), j->DSPbase + 0x0C);
3555                                         outb_p((blankword.high), j->DSPbase + 0x0D);
3556                                 }
3557                                 j->flags.play_first_frame = 0;
3558                         }
3559                         for (cnt = 0; cnt < j->play_frame_size * 2; cnt += 2) {
3560                                 if (!(cnt % 16) && !IsTxReady(j)) {
3561                                         dly = 0;
3562                                         while (!IsTxReady(j)) {
3563                                                 if (dly++ > 5) {
3564                                                         dly = 0;
3565                                                         break;
3566                                                 }
3567                                                 udelay(10);
3568                                         }
3569                                 }
3570                         /* Add word 0 to G.729 frames for the 8021.  Right now we don't do VAD/CNG  */
3571                                 if (j->play_codec == G729 && (cnt == 0 || cnt == 10 || cnt == 20)) {
3572                                         if (j->write_buffer_rp[cnt] == 0 &&
3573                                             j->write_buffer_rp[cnt + 1] == 0 &&
3574                                             j->write_buffer_rp[cnt + 2] == 0 &&
3575                                             j->write_buffer_rp[cnt + 3] == 0 &&
3576                                             j->write_buffer_rp[cnt + 4] == 0 &&
3577                                             j->write_buffer_rp[cnt + 5] == 0 &&
3578                                             j->write_buffer_rp[cnt + 6] == 0 &&
3579                                             j->write_buffer_rp[cnt + 7] == 0 &&
3580                                             j->write_buffer_rp[cnt + 8] == 0 &&
3581                                             j->write_buffer_rp[cnt + 9] == 0) {
3582                                         /* someone is trying to write silence lets make this a type 0 frame. */
3583                                                 outb_p(0x00, j->DSPbase + 0x0C);
3584                                                 outb_p(0x00, j->DSPbase + 0x0D);
3585                                         } else {
3586                                         /* so all other frames are type 1. */
3587                                                 outb_p(0x01, j->DSPbase + 0x0C);
3588                                                 outb_p(0x00, j->DSPbase + 0x0D);
3589                                         }
3590                                 }
3591                                 outb_p(*(j->write_buffer_rp + cnt), j->DSPbase + 0x0C);
3592                                 outb_p(*(j->write_buffer_rp + cnt + 1), j->DSPbase + 0x0D);
3593                                 *(j->write_buffer_rp + cnt) = 0;
3594                                 *(j->write_buffer_rp + cnt + 1) = 0;
3595                         }
3596                         j->write_buffer_rp += j->play_frame_size * 2;
3597                         if (j->write_buffer_rp >= j->write_buffer_end) {
3598                                 j->write_buffer_rp = j->write_buffer;
3599                         }
3600                         j->write_buffers_empty++;
3601                         wake_up_interruptible(&j->write_q);     /* Wake any blocked writers */
3602
3603                         wake_up_interruptible(&j->poll_q);      /* Wake any blocked selects */
3604
3605                         ++j->frameswritten;
3606                 }
3607         } else {
3608                 j->drybuffer++;
3609         }
3610         if(j->ixj_signals[SIG_WRITE_READY]) {
3611                 ixj_kill_fasync(j, SIG_WRITE_READY, POLL_OUT);
3612         }
3613 }
3614
3615 static int idle(IXJ *j)
3616 {
3617         if (ixj_WriteDSPCommand(0x0000, j))             /* DSP Idle */
3618
3619                 return 0;
3620
3621         if (j->ssr.high || j->ssr.low) {
3622                 return 0;
3623         } else {
3624                 j->play_mode = -1;
3625                 j->flags.playing = 0;
3626                 j->rec_mode = -1;
3627                 j->flags.recording = 0;
3628                 return 1;
3629         }
3630 }
3631
3632 static int set_base_frame(IXJ *j, int size)
3633 {
3634         unsigned short cmd;
3635         int cnt;
3636
3637         idle(j);
3638         j->cid_play_aec_level = j->aec_level;
3639         aec_stop(j);
3640         for (cnt = 0; cnt < 10; cnt++) {
3641                 if (idle(j))
3642                         break;
3643         }
3644         if (j->ssr.high || j->ssr.low)
3645                 return -1;
3646         if (j->dsp.low != 0x20) {
3647                 switch (size) {
3648                 case 30:
3649                         cmd = 0x07F0;
3650                         /* Set Base Frame Size to 240 pg9-10 8021 */
3651                         break;
3652                 case 20:
3653                         cmd = 0x07A0;
3654                         /* Set Base Frame Size to 160 pg9-10 8021 */
3655                         break;
3656                 case 10:
3657                         cmd = 0x0750;
3658                         /* Set Base Frame Size to 80 pg9-10 8021 */
3659                         break;
3660                 default:
3661                         return -1;
3662                 }
3663         } else {
3664                 if (size == 30)
3665                         return size;
3666                 else
3667                         return -1;
3668         }
3669         if (ixj_WriteDSPCommand(cmd, j)) {
3670                 j->baseframe.high = j->baseframe.low = 0xFF;
3671                 return -1;
3672         } else {
3673                 j->baseframe.high = j->ssr.high;
3674                 j->baseframe.low = j->ssr.low;
3675                 /* If the status returned is 0x0000 (pg9-9 8021) the call failed */
3676                 if(j->baseframe.high == 0x00 && j->baseframe.low == 0x00) {
3677                         return -1;
3678                 }
3679         }
3680         ixj_aec_start(j, j->cid_play_aec_level);
3681         return size;
3682 }
3683
3684 static int set_rec_codec(IXJ *j, int rate)
3685 {
3686         int retval = 0;
3687
3688         j->rec_codec = rate;
3689
3690         switch (rate) {
3691         case G723_63:
3692                 if (j->ver.low != 0x12 || ixj_convert_loaded) {
3693                         j->rec_frame_size = 12;
3694                         j->rec_mode = 0;
3695                 } else {
3696                         retval = 1;
3697                 }
3698                 break;
3699         case G723_53:
3700                 if (j->ver.low != 0x12 || ixj_convert_loaded) {
3701                         j->rec_frame_size = 10;
3702                         j->rec_mode = 0;
3703                 } else {
3704                         retval = 1;
3705                 }
3706                 break;
3707         case TS85:
3708                 if (j->dsp.low == 0x20 || j->flags.ts85_loaded) {
3709                         j->rec_frame_size = 16;
3710                         j->rec_mode = 0;
3711                 } else {
3712                         retval = 1;
3713                 }
3714                 break;
3715         case TS48:
3716                 if (j->ver.low != 0x12 || ixj_convert_loaded) {
3717                         j->rec_frame_size = 9;
3718                         j->rec_mode = 0;
3719                 } else {
3720                         retval = 1;
3721                 }
3722                 break;
3723         case TS41:
3724                 if (j->ver.low != 0x12 || ixj_convert_loaded) {
3725                         j->rec_frame_size = 8;
3726                         j->rec_mode = 0;
3727                 } else {
3728                         retval = 1;
3729                 }
3730                 break;
3731         case G728:
3732                 if (j->dsp.low != 0x20) {
3733                         j->rec_frame_size = 48;
3734                         j->rec_mode = 0;
3735                 } else {
3736                         retval = 1;
3737                 }
3738                 break;
3739         case G729:
3740                 if (j->dsp.low != 0x20) {
3741                         if (!j->flags.g729_loaded) {
3742                                 retval = 1;
3743                                 break;
3744                         }
3745                         switch (j->baseframe.low) {
3746                         case 0xA0:
3747                                 j->rec_frame_size = 10;
3748                                 break;
3749                         case 0x50:
3750                                 j->rec_frame_size = 5;
3751                                 break;
3752                         default:
3753                                 j->rec_frame_size = 15;
3754                                 break;
3755                         }
3756                         j->rec_mode = 0;
3757                 } else {
3758                         retval = 1;
3759                 }
3760                 break;
3761         case G729B:
3762                 if (j->dsp.low != 0x20) {
3763                         if (!j->flags.g729_loaded) {
3764                                 retval = 1;
3765                                 break;
3766                         }
3767                         switch (j->baseframe.low) {
3768                         case 0xA0:
3769                                 j->rec_frame_size = 12;
3770                                 break;
3771                         case 0x50:
3772                                 j->rec_frame_size = 6;
3773                                 break;
3774                         default:
3775                                 j->rec_frame_size = 18;
3776                                 break;
3777                         }
3778                         j->rec_mode = 0;
3779                 } else {
3780                         retval = 1;
3781                 }
3782                 break;
3783         case ULAW:
3784                 switch (j->baseframe.low) {
3785                 case 0xA0:
3786                         j->rec_frame_size = 80;
3787                         break;
3788                 case 0x50:
3789                         j->rec_frame_size = 40;
3790                         break;
3791                 default:
3792                         j->rec_frame_size = 120;
3793                         break;
3794                 }
3795                 j->rec_mode = 4;
3796                 break;
3797         case ALAW:
3798                 switch (j->baseframe.low) {
3799                 case 0xA0:
3800                         j->rec_frame_size = 80;
3801                         break;
3802                 case 0x50:
3803                         j->rec_frame_size = 40;
3804                         break;
3805                 default:
3806                         j->rec_frame_size = 120;
3807                         break;
3808                 }
3809                 j->rec_mode = 4;
3810                 break;
3811         case LINEAR16:
3812                 switch (j->baseframe.low) {
3813                 case 0xA0:
3814                         j->rec_frame_size = 160;
3815                         break;
3816                 case 0x50:
3817                         j->rec_frame_size = 80;
3818                         break;
3819                 default:
3820                         j->rec_frame_size = 240;
3821                         break;
3822                 }
3823                 j->rec_mode = 5;
3824                 break;
3825         case LINEAR8:
3826                 switch (j->baseframe.low) {
3827                 case 0xA0:
3828                         j->rec_frame_size = 80;
3829                         break;
3830                 case 0x50:
3831                         j->rec_frame_size = 40;
3832                         break;
3833                 default:
3834                         j->rec_frame_size = 120;
3835                         break;
3836                 }
3837                 j->rec_mode = 6;
3838                 break;
3839         case WSS:
3840                 switch (j->baseframe.low) {
3841                 case 0xA0:
3842                         j->rec_frame_size = 80;
3843                         break;
3844                 case 0x50:
3845                         j->rec_frame_size = 40;
3846                         break;
3847                 default:
3848                         j->rec_frame_size = 120;
3849                         break;
3850                 }
3851                 j->rec_mode = 7;
3852                 break;
3853         default:
3854                 kfree(j->read_buffer);
3855                 j->rec_frame_size = 0;
3856                 j->rec_mode = -1;
3857                 j->read_buffer = NULL;
3858                 j->read_buffer_size = 0;
3859                 retval = 1;
3860                 break;
3861         }
3862         return retval;
3863 }
3864
3865 static int ixj_record_start(IXJ *j)
3866 {
3867         unsigned short cmd = 0x0000;
3868
3869         if (j->read_buffer) {
3870                 ixj_record_stop(j);
3871         }
3872         j->flags.recording = 1;
3873         ixj_WriteDSPCommand(0x0FE0, j); /* Put the DSP in full power mode. */
3874
3875         if(ixjdebug & 0x0002)
3876                 printk("IXJ %d Starting Record Codec %d at %ld\n", j->board, j->rec_codec, jiffies);
3877
3878         if (!j->rec_mode) {
3879                 switch (j->rec_codec) {
3880                 case G723_63:
3881                         cmd = 0x5131;
3882                         break;
3883                 case G723_53:
3884                         cmd = 0x5132;
3885                         break;
3886                 case TS85:
3887                         cmd = 0x5130;   /* TrueSpeech 8.5 */
3888
3889                         break;
3890                 case TS48:
3891                         cmd = 0x5133;   /* TrueSpeech 4.8 */
3892
3893                         break;
3894                 case TS41:
3895                         cmd = 0x5134;   /* TrueSpeech 4.1 */
3896
3897                         break;
3898                 case G728:
3899                         cmd = 0x5135;
3900                         break;
3901                 case G729:
3902                 case G729B:
3903                         cmd = 0x5136;
3904                         break;
3905                 default:
3906                         return 1;
3907                 }
3908                 if (ixj_WriteDSPCommand(cmd, j))
3909                         return -1;
3910         }
3911         if (!j->read_buffer) {
3912                 if (!j->read_buffer)
3913                         j->read_buffer = kmalloc(j->rec_frame_size * 2, GFP_ATOMIC);
3914                 if (!j->read_buffer) {
3915                         printk("Read buffer allocation for ixj board %d failed!\n", j->board);
3916                         return -ENOMEM;
3917                 }
3918         }
3919         j->read_buffer_size = j->rec_frame_size * 2;
3920
3921         if (ixj_WriteDSPCommand(0x5102, j))             /* Set Poll sync mode */
3922
3923                 return -1;
3924
3925         switch (j->rec_mode) {
3926         case 0:
3927                 cmd = 0x1C03;   /* Record C1 */
3928
3929                 break;
3930         case 4:
3931                 if (j->ver.low == 0x12) {
3932                         cmd = 0x1E03;   /* Record C1 */
3933
3934                 } else {
3935                         cmd = 0x1E01;   /* Record C1 */
3936
3937                 }
3938                 break;
3939         case 5:
3940                 if (j->ver.low == 0x12) {
3941                         cmd = 0x1E83;   /* Record C1 */
3942
3943                 } else {
3944                         cmd = 0x1E81;   /* Record C1 */
3945
3946                 }
3947                 break;
3948         case 6:
3949                 if (j->ver.low == 0x12) {
3950                         cmd = 0x1F03;   /* Record C1 */
3951
3952                 } else {
3953                         cmd = 0x1F01;   /* Record C1 */
3954
3955                 }
3956                 break;
3957         case 7:
3958                 if (j->ver.low == 0x12) {
3959                         cmd = 0x1F83;   /* Record C1 */
3960                 } else {
3961                         cmd = 0x1F81;   /* Record C1 */
3962                 }
3963                 break;
3964         }
3965         if (ixj_WriteDSPCommand(cmd, j))
3966                 return -1;
3967
3968         if (j->flags.playing) {
3969                 ixj_aec_start(j, j->aec_level);
3970         }
3971         return 0;
3972 }
3973
3974 static void ixj_record_stop(IXJ *j)
3975 {
3976         if (ixjdebug & 0x0002)
3977                 printk("IXJ %d Stopping Record Codec %d at %ld\n", j->board, j->rec_codec, jiffies);
3978
3979         kfree(j->read_buffer);
3980         j->read_buffer = NULL;
3981         j->read_buffer_size = 0;
3982         if (j->rec_mode > -1) {
3983                 ixj_WriteDSPCommand(0x5120, j);
3984                 j->rec_mode = -1;
3985         }
3986         j->flags.recording = 0;
3987 }
3988 static void ixj_vad(IXJ *j, int arg)
3989 {
3990         if (arg)
3991                 ixj_WriteDSPCommand(0x513F, j);
3992         else
3993                 ixj_WriteDSPCommand(0x513E, j);
3994 }
3995
3996 static void set_rec_depth(IXJ *j, int depth)
3997 {
3998         if (depth > 60)
3999                 depth = 60;
4000         if (depth < 0)
4001                 depth = 0;
4002         ixj_WriteDSPCommand(0x5180 + depth, j);
4003 }
4004
4005 static void set_dtmf_prescale(IXJ *j, int volume)
4006 {
4007         ixj_WriteDSPCommand(0xCF07, j);
4008         ixj_WriteDSPCommand(volume, j);
4009 }
4010
4011 static int get_dtmf_prescale(IXJ *j)
4012 {
4013         ixj_WriteDSPCommand(0xCF05, j);
4014         return j->ssr.high << 8 | j->ssr.low;
4015 }
4016
4017 static void set_rec_volume(IXJ *j, int volume)
4018 {
4019         if(j->aec_level == AEC_AGC) {
4020                 if (ixjdebug & 0x0002)
4021                         printk(KERN_INFO "IXJ: /dev/phone%d Setting AGC Threshold to 0x%4.4x\n", j->board, volume);
4022                 ixj_WriteDSPCommand(0xCF96, j);
4023                 ixj_WriteDSPCommand(volume, j);
4024         } else {
4025                 if (ixjdebug & 0x0002)
4026                         printk(KERN_INFO "IXJ: /dev/phone %d Setting Record Volume to 0x%4.4x\n", j->board, volume);
4027                 ixj_WriteDSPCommand(0xCF03, j);
4028                 ixj_WriteDSPCommand(volume, j);
4029         }
4030 }
4031
4032 static int set_rec_volume_linear(IXJ *j, int volume)
4033 {
4034         int newvolume, dsprecmax;
4035
4036         if (ixjdebug & 0x0002)
4037                 printk(KERN_INFO "IXJ: /dev/phone %d Setting Linear Record Volume to 0x%4.4x\n", j->board, volume);
4038         if(volume > 100 || volume < 0) {
4039           return -1;
4040         }
4041
4042         /* This should normalize the perceived volumes between the different cards caused by differences in the hardware */
4043         switch (j->cardtype) {
4044         case QTI_PHONEJACK:
4045                 dsprecmax = 0x440;
4046                 break;
4047         case QTI_LINEJACK:
4048                 dsprecmax = 0x180;
4049                 ixj_mixer(0x0203, j);   /*Voice Left Volume unmute 6db */
4050                 ixj_mixer(0x0303, j);   /*Voice Right Volume unmute 6db */
4051                 ixj_mixer(0x0C00, j);   /*Mono1 unmute 12db */
4052                 break;
4053         case QTI_PHONEJACK_LITE:
4054                 dsprecmax = 0x4C0;
4055                 break;
4056         case QTI_PHONEJACK_PCI:
4057                 dsprecmax = 0x100;
4058                 break;
4059         case QTI_PHONECARD:
4060                 dsprecmax = 0x400;
4061                 break;
4062         default:
4063                 return -1;
4064         }
4065         newvolume = (dsprecmax * volume) / 100;
4066         set_rec_volume(j, newvolume);
4067         return 0;
4068 }
4069
4070 static int get_rec_volume(IXJ *j)
4071 {
4072         if(j->aec_level == AEC_AGC) {
4073                 if (ixjdebug & 0x0002)
4074                         printk(KERN_INFO "Getting AGC Threshold\n");
4075                 ixj_WriteDSPCommand(0xCF86, j);
4076                 if (ixjdebug & 0x0002)
4077                         printk(KERN_INFO "AGC Threshold is 0x%2.2x%2.2x\n", j->ssr.high, j->ssr.low);
4078                 return j->ssr.high << 8 | j->ssr.low;
4079         } else {
4080                 if (ixjdebug & 0x0002)
4081                         printk(KERN_INFO "Getting Record Volume\n");
4082                 ixj_WriteDSPCommand(0xCF01, j);
4083                 return j->ssr.high << 8 | j->ssr.low;
4084         }
4085 }
4086
4087 static int get_rec_volume_linear(IXJ *j)
4088 {
4089         int volume, newvolume, dsprecmax;
4090
4091         switch (j->cardtype) {
4092         case QTI_PHONEJACK:
4093                 dsprecmax = 0x440;
4094                 break;
4095         case QTI_LINEJACK:
4096                 dsprecmax = 0x180;
4097                 break;
4098         case QTI_PHONEJACK_LITE:
4099                 dsprecmax = 0x4C0;
4100                 break;
4101         case QTI_PHONEJACK_PCI:
4102                 dsprecmax = 0x100;
4103                 break;
4104         case QTI_PHONECARD:
4105                 dsprecmax = 0x400;
4106                 break;
4107         default:
4108                 return -1;
4109         }
4110         volume = get_rec_volume(j);
4111         newvolume = (volume * 100) / dsprecmax;
4112         if(newvolume > 100)
4113                 newvolume = 100;
4114         return newvolume;
4115 }
4116
4117 static int get_rec_level(IXJ *j)
4118 {
4119         int retval;
4120
4121         ixj_WriteDSPCommand(0xCF88, j);
4122
4123         retval = j->ssr.high << 8 | j->ssr.low;
4124         retval = (retval * 256) / 240;
4125         return retval;
4126 }
4127
4128 static void ixj_aec_start(IXJ *j, int level)
4129 {
4130         j->aec_level = level;
4131         if (ixjdebug & 0x0002)
4132                 printk(KERN_INFO "AGC set = 0x%2.2x\n", j->aec_level);
4133         if (!level) {
4134                 aec_stop(j);
4135         } else {
4136                 if (j->rec_codec == G729 || j->play_codec == G729 || j->rec_codec == G729B || j->play_codec == G729B) {
4137                         ixj_WriteDSPCommand(0xE022, j); /* Move AEC filter buffer */
4138
4139                         ixj_WriteDSPCommand(0x0300, j);
4140                 }
4141                 ixj_WriteDSPCommand(0xB001, j); /* AEC On */
4142
4143                 ixj_WriteDSPCommand(0xE013, j); /* Advanced AEC C1 */
4144
4145                 switch (level) {
4146                 case AEC_LOW:
4147                         ixj_WriteDSPCommand(0x0000, j); /* Advanced AEC C2 = off */
4148
4149                         ixj_WriteDSPCommand(0xE011, j);
4150                         ixj_WriteDSPCommand(0xFFFF, j);
4151
4152                         ixj_WriteDSPCommand(0xCF97, j); /* Set AGC Enable */
4153                         ixj_WriteDSPCommand(0x0000, j); /* to off */
4154                         
4155                         break;
4156
4157                 case AEC_MED:
4158                         ixj_WriteDSPCommand(0x0600, j); /* Advanced AEC C2 = on medium */
4159
4160                         ixj_WriteDSPCommand(0xE011, j);
4161                         ixj_WriteDSPCommand(0x0080, j);
4162
4163                         ixj_WriteDSPCommand(0xCF97, j); /* Set AGC Enable */
4164                         ixj_WriteDSPCommand(0x0000, j); /* to off */
4165                         
4166                         break;
4167
4168                 case AEC_HIGH:
4169                         ixj_WriteDSPCommand(0x0C00, j); /* Advanced AEC C2 = on high */
4170
4171                         ixj_WriteDSPCommand(0xE011, j);
4172                         ixj_WriteDSPCommand(0x0080, j);
4173
4174                         ixj_WriteDSPCommand(0xCF97, j); /* Set AGC Enable */
4175                         ixj_WriteDSPCommand(0x0000, j); /* to off */
4176                         
4177                         break;
4178
4179                 case AEC_AGC:
4180                         /* First we have to put the AEC into advance auto mode so that AGC will not conflict with it */
4181                         ixj_WriteDSPCommand(0x0002, j); /* Attenuation scaling factor of 2 */
4182
4183                         ixj_WriteDSPCommand(0xE011, j);
4184                         ixj_WriteDSPCommand(0x0100, j); /* Higher Threshold Floor */
4185
4186                         ixj_WriteDSPCommand(0xE012, j); /* Set Train and Lock */
4187
4188                         if(j->cardtype == QTI_LINEJACK || j->cardtype == QTI_PHONECARD)
4189                                 ixj_WriteDSPCommand(0x0224, j);
4190                         else
4191                                 ixj_WriteDSPCommand(0x1224, j);
4192
4193                         ixj_WriteDSPCommand(0xE014, j);
4194                         ixj_WriteDSPCommand(0x0003, j); /* Lock threshold at 3dB */
4195
4196                         ixj_WriteDSPCommand(0xE338, j); /* Set Echo Suppresser Attenuation to 0dB */
4197
4198                         /* Now we can set the AGC initial parameters and turn it on */
4199                         ixj_WriteDSPCommand(0xCF90, j); /* Set AGC Minumum gain */
4200                         ixj_WriteDSPCommand(0x0020, j); /* to 0.125 (-18dB) */
4201         
4202                         ixj_WriteDSPCommand(0xCF91, j); /* Set AGC Maximum gain */
4203                         ixj_WriteDSPCommand(0x1000, j); /* to 16 (24dB) */
4204                         
4205                         ixj_WriteDSPCommand(0xCF92, j); /* Set AGC start gain */
4206                         ixj_WriteDSPCommand(0x0800, j); /* to 8 (+18dB) */
4207                 
4208                         ixj_WriteDSPCommand(0xCF93, j); /* Set AGC hold time */
4209                         ixj_WriteDSPCommand(0x1F40, j); /* to 2 seconds (units are 250us) */
4210                         
4211                         ixj_WriteDSPCommand(0xCF94, j); /* Set AGC Attack Time Constant */
4212                         ixj_WriteDSPCommand(0x0005, j); /* to 8ms */
4213                         
4214                         ixj_WriteDSPCommand(0xCF95, j); /* Set AGC Decay Time Constant */
4215                         ixj_WriteDSPCommand(0x000D, j); /* to 4096ms */
4216                         
4217                         ixj_WriteDSPCommand(0xCF96, j); /* Set AGC Attack Threshold */
4218                         ixj_WriteDSPCommand(0x1200, j); /* to 25% */
4219                         
4220                         ixj_WriteDSPCommand(0xCF97, j); /* Set AGC Enable */
4221                         ixj_WriteDSPCommand(0x0001, j); /* to on */
4222                         
4223                         break;
4224
4225                 case AEC_AUTO:
4226                         ixj_WriteDSPCommand(0x0002, j); /* Attenuation scaling factor of 2 */
4227
4228                         ixj_WriteDSPCommand(0xE011, j);
4229                         ixj_WriteDSPCommand(0x0100, j); /* Higher Threshold Floor */
4230
4231                         ixj_WriteDSPCommand(0xE012, j); /* Set Train and Lock */
4232
4233                         if(j->cardtype == QTI_LINEJACK || j->cardtype == QTI_PHONECARD)
4234                                 ixj_WriteDSPCommand(0x0224, j);
4235                         else
4236                                 ixj_WriteDSPCommand(0x1224, j);
4237
4238                         ixj_WriteDSPCommand(0xE014, j);
4239                         ixj_WriteDSPCommand(0x0003, j); /* Lock threshold at 3dB */
4240
4241                         ixj_WriteDSPCommand(0xE338, j); /* Set Echo Suppresser Attenuation to 0dB */
4242
4243                         break;
4244                 }
4245         }
4246 }
4247
4248 static void aec_stop(IXJ *j)
4249 {
4250         j->aec_level = AEC_OFF;
4251         if (j->rec_codec == G729 || j->play_codec == G729 || j->rec_codec == G729B || j->play_codec == G729B) {
4252                 ixj_WriteDSPCommand(0xE022, j); /* Move AEC filter buffer back */
4253
4254                 ixj_WriteDSPCommand(0x0700, j);
4255         }
4256         if (j->play_mode != -1 && j->rec_mode != -1)
4257         {
4258                 ixj_WriteDSPCommand(0xB002, j); /* AEC Stop */
4259         }
4260 }
4261
4262 static int set_play_codec(IXJ *j, int rate)
4263 {
4264         int retval = 0;
4265
4266         j->play_codec = rate;
4267
4268         switch (rate) {
4269         case G723_63:
4270                 if (j->ver.low != 0x12 || ixj_convert_loaded) {
4271                         j->play_frame_size = 12;
4272                         j->play_mode = 0;
4273                 } else {
4274                         retval = 1;
4275                 }
4276                 break;
4277         case G723_53:
4278                 if (j->ver.low != 0x12 || ixj_convert_loaded) {
4279                         j->play_frame_size = 10;
4280                         j->play_mode = 0;
4281                 } else {
4282                         retval = 1;
4283                 }
4284                 break;
4285         case TS85:
4286                 if (j->dsp.low == 0x20 || j->flags.ts85_loaded) {
4287                         j->play_frame_size = 16;
4288                         j->play_mode = 0;
4289                 } else {
4290                         retval = 1;
4291                 }
4292                 break;
4293         case TS48:
4294                 if (j->ver.low != 0x12 || ixj_convert_loaded) {
4295                         j->play_frame_size = 9;
4296                         j->play_mode = 0;
4297                 } else {
4298                         retval = 1;
4299                 }
4300                 break;
4301         case TS41:
4302                 if (j->ver.low != 0x12 || ixj_convert_loaded) {
4303                         j->play_frame_size = 8;
4304                         j->play_mode = 0;
4305                 } else {
4306                         retval = 1;
4307                 }
4308                 break;
4309         case G728:
4310                 if (j->dsp.low != 0x20) {
4311                         j->play_frame_size = 48;
4312                         j->play_mode = 0;
4313                 } else {
4314                         retval = 1;
4315                 }
4316                 break;
4317         case G729:
4318                 if (j->dsp.low != 0x20) {
4319                         if (!j->flags.g729_loaded) {
4320                                 retval = 1;
4321                                 break;
4322                         }
4323                         switch (j->baseframe.low) {
4324                         case 0xA0:
4325                                 j->play_frame_size = 10;
4326                                 break;
4327                         case 0x50:
4328                                 j->play_frame_size = 5;
4329                                 break;
4330                         default:
4331                                 j->play_frame_size = 15;
4332                                 break;
4333                         }
4334                         j->play_mode = 0;
4335                 } else {
4336                         retval = 1;
4337                 }
4338                 break;
4339         case G729B:
4340                 if (j->dsp.low != 0x20) {
4341                         if (!j->flags.g729_loaded) {
4342                                 retval = 1;
4343                                 break;
4344                         }
4345                         switch (j->baseframe.low) {
4346                         case 0xA0:
4347                                 j->play_frame_size = 12;
4348                                 break;
4349                         case 0x50:
4350                                 j->play_frame_size = 6;
4351                                 break;
4352                         default:
4353                                 j->play_frame_size = 18;
4354                                 break;
4355                         }
4356                         j->play_mode = 0;
4357                 } else {
4358                         retval = 1;
4359                 }
4360                 break;
4361         case ULAW:
4362                 switch (j->baseframe.low) {
4363                 case 0xA0:
4364                         j->play_frame_size = 80;
4365                         break;
4366                 case 0x50:
4367                         j->play_frame_size = 40;
4368                         break;
4369                 default:
4370                         j->play_frame_size = 120;
4371                         break;
4372                 }
4373                 j->play_mode = 2;
4374                 break;
4375         case ALAW:
4376                 switch (j->baseframe.low) {
4377                 case 0xA0:
4378                         j->play_frame_size = 80;
4379                         break;
4380                 case 0x50:
4381                         j->play_frame_size = 40;
4382                         break;
4383                 default:
4384                         j->play_frame_size = 120;
4385                         break;
4386                 }
4387                 j->play_mode = 2;
4388                 break;
4389         case LINEAR16:
4390                 switch (j->baseframe.low) {
4391                 case 0xA0:
4392                         j->play_frame_size = 160;
4393                         break;
4394                 case 0x50:
4395                         j->play_frame_size = 80;
4396                         break;
4397                 default:
4398                         j->play_frame_size = 240;
4399                         break;
4400                 }
4401                 j->play_mode = 6;
4402                 break;
4403         case LINEAR8:
4404                 switch (j->baseframe.low) {
4405                 case 0xA0:
4406                         j->play_frame_size = 80;
4407                         break;
4408                 case 0x50:
4409                         j->play_frame_size = 40;
4410                         break;
4411                 default:
4412                         j->play_frame_size = 120;
4413                         break;
4414                 }
4415                 j->play_mode = 4;
4416                 break;
4417         case WSS:
4418                 switch (j->baseframe.low) {
4419                 case 0xA0:
4420                         j->play_frame_size = 80;
4421                         break;
4422                 case 0x50:
4423                         j->play_frame_size = 40;
4424                         break;
4425                 default:
4426                         j->play_frame_size = 120;
4427                         break;
4428                 }
4429                 j->play_mode = 5;
4430                 break;
4431         default:
4432                 kfree(j->write_buffer);
4433                 j->play_frame_size = 0;
4434                 j->play_mode = -1;
4435                 j->write_buffer = NULL;
4436                 j->write_buffer_size = 0;
4437                 retval = 1;
4438                 break;
4439         }
4440         return retval;
4441 }
4442
4443 static int ixj_play_start(IXJ *j)
4444 {
4445         unsigned short cmd = 0x0000;
4446
4447         if (j->write_buffer) {
4448                 ixj_play_stop(j);
4449         }
4450
4451         if(ixjdebug & 0x0002)
4452                 printk("IXJ %d Starting Play Codec %d at %ld\n", j->board, j->play_codec, jiffies);
4453
4454         j->flags.playing = 1;
4455         ixj_WriteDSPCommand(0x0FE0, j); /* Put the DSP in full power mode. */
4456
4457         j->flags.play_first_frame = 1;
4458         j->drybuffer = 0;
4459
4460         if (!j->play_mode) {
4461                 switch (j->play_codec) {
4462                 case G723_63:
4463                         cmd = 0x5231;
4464                         break;
4465                 case G723_53:
4466                         cmd = 0x5232;
4467                         break;
4468                 case TS85:
4469                         cmd = 0x5230;   /* TrueSpeech 8.5 */
4470
4471                         break;
4472                 case TS48:
4473                         cmd = 0x5233;   /* TrueSpeech 4.8 */
4474
4475                         break;
4476                 case TS41:
4477                         cmd = 0x5234;   /* TrueSpeech 4.1 */
4478
4479                         break;
4480                 case G728:
4481                         cmd = 0x5235;
4482                         break;
4483                 case G729:
4484                 case G729B:
4485                         cmd = 0x5236;
4486                         break;
4487                 default:
4488                         return 1;
4489                 }
4490                 if (ixj_WriteDSPCommand(cmd, j))
4491                         return -1;
4492         }
4493         j->write_buffer = kmalloc(j->play_frame_size * 2, GFP_ATOMIC);
4494         if (!j->write_buffer) {
4495                 printk("Write buffer allocation for ixj board %d failed!\n", j->board);
4496                 return -ENOMEM;
4497         }
4498 /*      j->write_buffers_empty = 2; */
4499         j->write_buffers_empty = 1; 
4500         j->write_buffer_size = j->play_frame_size * 2;
4501         j->write_buffer_end = j->write_buffer + j->play_frame_size * 2;
4502         j->write_buffer_rp = j->write_buffer_wp = j->write_buffer;
4503
4504         if (ixj_WriteDSPCommand(0x5202, j))             /* Set Poll sync mode */
4505
4506                 return -1;
4507
4508         switch (j->play_mode) {
4509         case 0:
4510                 cmd = 0x2C03;
4511                 break;
4512         case 2:
4513                 if (j->ver.low == 0x12) {
4514                         cmd = 0x2C23;
4515                 } else {
4516                         cmd = 0x2C21;
4517                 }
4518                 break;
4519         case 4:
4520                 if (j->ver.low == 0x12) {
4521                         cmd = 0x2C43;
4522                 } else {
4523                         cmd = 0x2C41;
4524                 }
4525                 break;
4526         case 5:
4527                 if (j->ver.low == 0x12) {
4528                         cmd = 0x2C53;
4529                 } else {
4530                         cmd = 0x2C51;
4531                 }
4532                 break;
4533         case 6:
4534                 if (j->ver.low == 0x12) {
4535                         cmd = 0x2C63;
4536                 } else {
4537                         cmd = 0x2C61;
4538                 }
4539                 break;
4540         }
4541         if (ixj_WriteDSPCommand(cmd, j))
4542                 return -1;
4543
4544         if (ixj_WriteDSPCommand(0x2000, j))             /* Playback C2 */
4545                 return -1;
4546
4547         if (ixj_WriteDSPCommand(0x2000 + j->play_frame_size, j))        /* Playback C3 */
4548                 return -1;
4549
4550         if (j->flags.recording) {
4551                 ixj_aec_start(j, j->aec_level);
4552         }
4553
4554         return 0;
4555 }
4556
4557 static void ixj_play_stop(IXJ *j)
4558 {
4559         if (ixjdebug & 0x0002)
4560                 printk("IXJ %d Stopping Play Codec %d at %ld\n", j->board, j->play_codec, jiffies);
4561
4562         kfree(j->write_buffer);
4563         j->write_buffer = NULL;
4564         j->write_buffer_size = 0;
4565         if (j->play_mode > -1) {
4566                 ixj_WriteDSPCommand(0x5221, j); /* Stop playback and flush buffers.  8022 reference page 9-40 */
4567
4568                 j->play_mode = -1;
4569         }
4570         j->flags.playing = 0;
4571 }
4572
4573 static inline int get_play_level(IXJ *j)
4574 {
4575         int retval;
4576
4577         ixj_WriteDSPCommand(0xCF8F, j); /* 8022 Reference page 9-38 */
4578         return j->ssr.high << 8 | j->ssr.low;
4579         retval = j->ssr.high << 8 | j->ssr.low;
4580         retval = (retval * 256) / 240;
4581         return retval;
4582 }
4583
4584 static unsigned int ixj_poll(struct file *file_p, poll_table * wait)
4585 {
4586         unsigned int mask = 0;
4587
4588         IXJ *j = get_ixj(NUM(file_p->f_path.dentry->d_inode));
4589
4590         poll_wait(file_p, &(j->poll_q), wait);
4591         if (j->read_buffer_ready > 0)
4592                 mask |= POLLIN | POLLRDNORM;    /* readable */
4593         if (j->write_buffers_empty > 0)
4594                 mask |= POLLOUT | POLLWRNORM;   /* writable */
4595         if (j->ex.bytes)
4596                 mask |= POLLPRI;
4597         return mask;
4598 }
4599
4600 static int ixj_play_tone(IXJ *j, char tone)
4601 {
4602         if (!j->tone_state) {
4603                 if(ixjdebug & 0x0002) {
4604                         printk("IXJ %d starting tone %d at %ld\n", j->board, tone, jiffies);
4605                 }
4606                 if (j->dsp.low == 0x20) {
4607                         idle(j);
4608                 }
4609                 j->tone_start_jif = jiffies;
4610
4611                 j->tone_state = 1;
4612         }
4613
4614         j->tone_index = tone;
4615         if (ixj_WriteDSPCommand(0x6000 + j->tone_index, j))
4616                 return -1;
4617
4618         return 0;
4619 }
4620
4621 static int ixj_set_tone_on(unsigned short arg, IXJ *j)
4622 {
4623         j->tone_on_time = arg;
4624
4625         if (ixj_WriteDSPCommand(0x6E04, j))             /* Set Tone On Period */
4626
4627                 return -1;
4628
4629         if (ixj_WriteDSPCommand(arg, j))
4630                 return -1;
4631
4632         return 0;
4633 }
4634
4635 static int SCI_WaitHighSCI(IXJ *j)
4636 {
4637         int cnt;
4638
4639         j->pld_scrr.byte = inb_p(j->XILINXbase);
4640         if (!j->pld_scrr.bits.sci) {
4641                 for (cnt = 0; cnt < 10; cnt++) {
4642                         udelay(32);
4643                         j->pld_scrr.byte = inb_p(j->XILINXbase);
4644
4645                         if ((j->pld_scrr.bits.sci))
4646                                 return 1;
4647                 }
4648                 if (ixjdebug & 0x0001)
4649                         printk(KERN_INFO "SCI Wait High failed %x\n", j->pld_scrr.byte);
4650                 return 0;
4651         } else
4652                 return 1;
4653 }
4654
4655 static int SCI_WaitLowSCI(IXJ *j)
4656 {
4657         int cnt;
4658
4659         j->pld_scrr.byte = inb_p(j->XILINXbase);
4660         if (j->pld_scrr.bits.sci) {
4661                 for (cnt = 0; cnt < 10; cnt++) {
4662                         udelay(32);
4663                         j->pld_scrr.byte = inb_p(j->XILINXbase);
4664
4665                         if (!(j->pld_scrr.bits.sci))
4666                                 return 1;
4667                 }
4668                 if (ixjdebug & 0x0001)
4669                         printk(KERN_INFO "SCI Wait Low failed %x\n", j->pld_scrr.byte);
4670                 return 0;
4671         } else
4672                 return 1;
4673 }
4674
4675 static int SCI_Control(IXJ *j, int control)
4676 {
4677         switch (control) {
4678         case SCI_End:
4679                 j->pld_scrw.bits.c0 = 0;        /* Set PLD Serial control interface */
4680
4681                 j->pld_scrw.bits.c1 = 0;        /* to no selection */
4682
4683                 break;
4684         case SCI_Enable_DAA:
4685                 j->pld_scrw.bits.c0 = 1;        /* Set PLD Serial control interface */
4686
4687                 j->pld_scrw.bits.c1 = 0;        /* to write to DAA */
4688
4689                 break;
4690         case SCI_Enable_Mixer:
4691                 j->pld_scrw.bits.c0 = 0;        /* Set PLD Serial control interface */
4692
4693                 j->pld_scrw.bits.c1 = 1;        /* to write to mixer */
4694
4695                 break;
4696         case SCI_Enable_EEPROM:
4697                 j->pld_scrw.bits.c0 = 1;        /* Set PLD Serial control interface */
4698
4699                 j->pld_scrw.bits.c1 = 1;        /* to write to EEPROM */
4700
4701                 break;
4702         default:
4703                 return 0;
4704                 break;
4705         }
4706         outb_p(j->pld_scrw.byte, j->XILINXbase);
4707
4708         switch (control) {
4709         case SCI_End:
4710                 return 1;
4711                 break;
4712         case SCI_Enable_DAA:
4713         case SCI_Enable_Mixer:
4714         case SCI_Enable_EEPROM:
4715                 if (!SCI_WaitHighSCI(j))
4716                         return 0;
4717                 break;
4718         default:
4719                 return 0;
4720                 break;
4721         }
4722         return 1;
4723 }
4724
4725 static int SCI_Prepare(IXJ *j)
4726 {
4727         if (!SCI_Control(j, SCI_End))
4728                 return 0;
4729
4730         if (!SCI_WaitLowSCI(j))
4731                 return 0;
4732
4733         return 1;
4734 }
4735
4736 static int ixj_get_mixer(long val, IXJ *j)
4737 {
4738         int reg = (val & 0x1F00) >> 8;
4739         return j->mix.vol[reg];
4740 }
4741
4742 static int ixj_mixer(long val, IXJ *j)
4743 {
4744         BYTES bytes;
4745
4746         bytes.high = (val & 0x1F00) >> 8;
4747         bytes.low = val & 0x00FF;
4748
4749         /* save mixer value so we can get back later on */
4750         j->mix.vol[bytes.high] = bytes.low;
4751
4752         outb_p(bytes.high & 0x1F, j->XILINXbase + 0x03);        /* Load Mixer Address */
4753
4754         outb_p(bytes.low, j->XILINXbase + 0x02);        /* Load Mixer Data */
4755
4756         SCI_Control(j, SCI_Enable_Mixer);
4757
4758         SCI_Control(j, SCI_End);
4759
4760         return 0;
4761 }
4762
4763 static int daa_load(BYTES * p_bytes, IXJ *j)
4764 {
4765         outb_p(p_bytes->high, j->XILINXbase + 0x03);
4766         outb_p(p_bytes->low, j->XILINXbase + 0x02);
4767         if (!SCI_Control(j, SCI_Enable_DAA))
4768                 return 0;
4769         else
4770                 return 1;
4771 }
4772