ssb: Implement SDIO host bus support
[linux-2.6.git] / drivers / ssb / main.c
1 /*
2  * Sonics Silicon Backplane
3  * Subsystem core
4  *
5  * Copyright 2005, Broadcom Corporation
6  * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
7  *
8  * Licensed under the GNU/GPL. See COPYING for details.
9  */
10
11 #include "ssb_private.h"
12
13 #include <linux/delay.h>
14 #include <linux/io.h>
15 #include <linux/ssb/ssb.h>
16 #include <linux/ssb/ssb_regs.h>
17 #include <linux/ssb/ssb_driver_gige.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/pci.h>
20 #include <linux/mmc/sdio_func.h>
21
22 #include <pcmcia/cs_types.h>
23 #include <pcmcia/cs.h>
24 #include <pcmcia/cistpl.h>
25 #include <pcmcia/ds.h>
26
27
28 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
29 MODULE_LICENSE("GPL");
30
31
32 /* Temporary list of yet-to-be-attached buses */
33 static LIST_HEAD(attach_queue);
34 /* List if running buses */
35 static LIST_HEAD(buses);
36 /* Software ID counter */
37 static unsigned int next_busnumber;
38 /* buses_mutes locks the two buslists and the next_busnumber.
39  * Don't lock this directly, but use ssb_buses_[un]lock() below. */
40 static DEFINE_MUTEX(buses_mutex);
41
42 /* There are differences in the codeflow, if the bus is
43  * initialized from early boot, as various needed services
44  * are not available early. This is a mechanism to delay
45  * these initializations to after early boot has finished.
46  * It's also used to avoid mutex locking, as that's not
47  * available and needed early. */
48 static bool ssb_is_early_boot = 1;
49
50 static void ssb_buses_lock(void);
51 static void ssb_buses_unlock(void);
52
53
54 #ifdef CONFIG_SSB_PCIHOST
55 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev)
56 {
57         struct ssb_bus *bus;
58
59         ssb_buses_lock();
60         list_for_each_entry(bus, &buses, list) {
61                 if (bus->bustype == SSB_BUSTYPE_PCI &&
62                     bus->host_pci == pdev)
63                         goto found;
64         }
65         bus = NULL;
66 found:
67         ssb_buses_unlock();
68
69         return bus;
70 }
71 #endif /* CONFIG_SSB_PCIHOST */
72
73 #ifdef CONFIG_SSB_PCMCIAHOST
74 struct ssb_bus *ssb_pcmcia_dev_to_bus(struct pcmcia_device *pdev)
75 {
76         struct ssb_bus *bus;
77
78         ssb_buses_lock();
79         list_for_each_entry(bus, &buses, list) {
80                 if (bus->bustype == SSB_BUSTYPE_PCMCIA &&
81                     bus->host_pcmcia == pdev)
82                         goto found;
83         }
84         bus = NULL;
85 found:
86         ssb_buses_unlock();
87
88         return bus;
89 }
90 #endif /* CONFIG_SSB_PCMCIAHOST */
91
92 #ifdef CONFIG_SSB_SDIOHOST
93 struct ssb_bus *ssb_sdio_func_to_bus(struct sdio_func *func)
94 {
95         struct ssb_bus *bus;
96
97         ssb_buses_lock();
98         list_for_each_entry(bus, &buses, list) {
99                 if (bus->bustype == SSB_BUSTYPE_SDIO &&
100                     bus->host_sdio == func)
101                         goto found;
102         }
103         bus = NULL;
104 found:
105         ssb_buses_unlock();
106
107         return bus;
108 }
109 #endif /* CONFIG_SSB_SDIOHOST */
110
111 int ssb_for_each_bus_call(unsigned long data,
112                           int (*func)(struct ssb_bus *bus, unsigned long data))
113 {
114         struct ssb_bus *bus;
115         int res;
116
117         ssb_buses_lock();
118         list_for_each_entry(bus, &buses, list) {
119                 res = func(bus, data);
120                 if (res >= 0) {
121                         ssb_buses_unlock();
122                         return res;
123                 }
124         }
125         ssb_buses_unlock();
126
127         return -ENODEV;
128 }
129
130 static struct ssb_device *ssb_device_get(struct ssb_device *dev)
131 {
132         if (dev)
133                 get_device(dev->dev);
134         return dev;
135 }
136
137 static void ssb_device_put(struct ssb_device *dev)
138 {
139         if (dev)
140                 put_device(dev->dev);
141 }
142
143 static int ssb_device_resume(struct device *dev)
144 {
145         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
146         struct ssb_driver *ssb_drv;
147         int err = 0;
148
149         if (dev->driver) {
150                 ssb_drv = drv_to_ssb_drv(dev->driver);
151                 if (ssb_drv && ssb_drv->resume)
152                         err = ssb_drv->resume(ssb_dev);
153                 if (err)
154                         goto out;
155         }
156 out:
157         return err;
158 }
159
160 static int ssb_device_suspend(struct device *dev, pm_message_t state)
161 {
162         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
163         struct ssb_driver *ssb_drv;
164         int err = 0;
165
166         if (dev->driver) {
167                 ssb_drv = drv_to_ssb_drv(dev->driver);
168                 if (ssb_drv && ssb_drv->suspend)
169                         err = ssb_drv->suspend(ssb_dev, state);
170                 if (err)
171                         goto out;
172         }
173 out:
174         return err;
175 }
176
177 int ssb_bus_resume(struct ssb_bus *bus)
178 {
179         int err;
180
181         /* Reset HW state information in memory, so that HW is
182          * completely reinitialized. */
183         bus->mapped_device = NULL;
184 #ifdef CONFIG_SSB_DRIVER_PCICORE
185         bus->pcicore.setup_done = 0;
186 #endif
187
188         err = ssb_bus_powerup(bus, 0);
189         if (err)
190                 return err;
191         err = ssb_pcmcia_hardware_setup(bus);
192         if (err) {
193                 ssb_bus_may_powerdown(bus);
194                 return err;
195         }
196         ssb_chipco_resume(&bus->chipco);
197         ssb_bus_may_powerdown(bus);
198
199         return 0;
200 }
201 EXPORT_SYMBOL(ssb_bus_resume);
202
203 int ssb_bus_suspend(struct ssb_bus *bus)
204 {
205         ssb_chipco_suspend(&bus->chipco);
206         ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
207
208         return 0;
209 }
210 EXPORT_SYMBOL(ssb_bus_suspend);
211
212 #ifdef CONFIG_SSB_SPROM
213 int ssb_devices_freeze(struct ssb_bus *bus)
214 {
215         struct ssb_device *dev;
216         struct ssb_driver *drv;
217         int err = 0;
218         int i;
219         pm_message_t state = PMSG_FREEZE;
220
221         /* First check that we are capable to freeze all devices. */
222         for (i = 0; i < bus->nr_devices; i++) {
223                 dev = &(bus->devices[i]);
224                 if (!dev->dev ||
225                     !dev->dev->driver ||
226                     !device_is_registered(dev->dev))
227                         continue;
228                 drv = drv_to_ssb_drv(dev->dev->driver);
229                 if (!drv)
230                         continue;
231                 if (!drv->suspend) {
232                         /* Nope, can't suspend this one. */
233                         return -EOPNOTSUPP;
234                 }
235         }
236         /* Now suspend all devices */
237         for (i = 0; i < bus->nr_devices; i++) {
238                 dev = &(bus->devices[i]);
239                 if (!dev->dev ||
240                     !dev->dev->driver ||
241                     !device_is_registered(dev->dev))
242                         continue;
243                 drv = drv_to_ssb_drv(dev->dev->driver);
244                 if (!drv)
245                         continue;
246                 err = drv->suspend(dev, state);
247                 if (err) {
248                         ssb_printk(KERN_ERR PFX "Failed to freeze device %s\n",
249                                    dev_name(dev->dev));
250                         goto err_unwind;
251                 }
252         }
253
254         return 0;
255 err_unwind:
256         for (i--; i >= 0; i--) {
257                 dev = &(bus->devices[i]);
258                 if (!dev->dev ||
259                     !dev->dev->driver ||
260                     !device_is_registered(dev->dev))
261                         continue;
262                 drv = drv_to_ssb_drv(dev->dev->driver);
263                 if (!drv)
264                         continue;
265                 if (drv->resume)
266                         drv->resume(dev);
267         }
268         return err;
269 }
270
271 int ssb_devices_thaw(struct ssb_bus *bus)
272 {
273         struct ssb_device *dev;
274         struct ssb_driver *drv;
275         int err;
276         int i;
277
278         for (i = 0; i < bus->nr_devices; i++) {
279                 dev = &(bus->devices[i]);
280                 if (!dev->dev ||
281                     !dev->dev->driver ||
282                     !device_is_registered(dev->dev))
283                         continue;
284                 drv = drv_to_ssb_drv(dev->dev->driver);
285                 if (!drv)
286                         continue;
287                 if (SSB_WARN_ON(!drv->resume))
288                         continue;
289                 err = drv->resume(dev);
290                 if (err) {
291                         ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
292                                    dev_name(dev->dev));
293                 }
294         }
295
296         return 0;
297 }
298 #endif /* CONFIG_SSB_SPROM */
299
300 static void ssb_device_shutdown(struct device *dev)
301 {
302         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
303         struct ssb_driver *ssb_drv;
304
305         if (!dev->driver)
306                 return;
307         ssb_drv = drv_to_ssb_drv(dev->driver);
308         if (ssb_drv && ssb_drv->shutdown)
309                 ssb_drv->shutdown(ssb_dev);
310 }
311
312 static int ssb_device_remove(struct device *dev)
313 {
314         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
315         struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
316
317         if (ssb_drv && ssb_drv->remove)
318                 ssb_drv->remove(ssb_dev);
319         ssb_device_put(ssb_dev);
320
321         return 0;
322 }
323
324 static int ssb_device_probe(struct device *dev)
325 {
326         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
327         struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
328         int err = 0;
329
330         ssb_device_get(ssb_dev);
331         if (ssb_drv && ssb_drv->probe)
332                 err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
333         if (err)
334                 ssb_device_put(ssb_dev);
335
336         return err;
337 }
338
339 static int ssb_match_devid(const struct ssb_device_id *tabid,
340                            const struct ssb_device_id *devid)
341 {
342         if ((tabid->vendor != devid->vendor) &&
343             tabid->vendor != SSB_ANY_VENDOR)
344                 return 0;
345         if ((tabid->coreid != devid->coreid) &&
346             tabid->coreid != SSB_ANY_ID)
347                 return 0;
348         if ((tabid->revision != devid->revision) &&
349             tabid->revision != SSB_ANY_REV)
350                 return 0;
351         return 1;
352 }
353
354 static int ssb_bus_match(struct device *dev, struct device_driver *drv)
355 {
356         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
357         struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
358         const struct ssb_device_id *id;
359
360         for (id = ssb_drv->id_table;
361              id->vendor || id->coreid || id->revision;
362              id++) {
363                 if (ssb_match_devid(id, &ssb_dev->id))
364                         return 1; /* found */
365         }
366
367         return 0;
368 }
369
370 static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env)
371 {
372         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
373
374         if (!dev)
375                 return -ENODEV;
376
377         return add_uevent_var(env,
378                              "MODALIAS=ssb:v%04Xid%04Xrev%02X",
379                              ssb_dev->id.vendor, ssb_dev->id.coreid,
380                              ssb_dev->id.revision);
381 }
382
383 static struct bus_type ssb_bustype = {
384         .name           = "ssb",
385         .match          = ssb_bus_match,
386         .probe          = ssb_device_probe,
387         .remove         = ssb_device_remove,
388         .shutdown       = ssb_device_shutdown,
389         .suspend        = ssb_device_suspend,
390         .resume         = ssb_device_resume,
391         .uevent         = ssb_device_uevent,
392 };
393
394 static void ssb_buses_lock(void)
395 {
396         /* See the comment at the ssb_is_early_boot definition */
397         if (!ssb_is_early_boot)
398                 mutex_lock(&buses_mutex);
399 }
400
401 static void ssb_buses_unlock(void)
402 {
403         /* See the comment at the ssb_is_early_boot definition */
404         if (!ssb_is_early_boot)
405                 mutex_unlock(&buses_mutex);
406 }
407
408 static void ssb_devices_unregister(struct ssb_bus *bus)
409 {
410         struct ssb_device *sdev;
411         int i;
412
413         for (i = bus->nr_devices - 1; i >= 0; i--) {
414                 sdev = &(bus->devices[i]);
415                 if (sdev->dev)
416                         device_unregister(sdev->dev);
417         }
418 }
419
420 void ssb_bus_unregister(struct ssb_bus *bus)
421 {
422         ssb_buses_lock();
423         ssb_devices_unregister(bus);
424         list_del(&bus->list);
425         ssb_buses_unlock();
426
427         ssb_pcmcia_exit(bus);
428         ssb_pci_exit(bus);
429         ssb_iounmap(bus);
430 }
431 EXPORT_SYMBOL(ssb_bus_unregister);
432
433 static void ssb_release_dev(struct device *dev)
434 {
435         struct __ssb_dev_wrapper *devwrap;
436
437         devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
438         kfree(devwrap);
439 }
440
441 static int ssb_devices_register(struct ssb_bus *bus)
442 {
443         struct ssb_device *sdev;
444         struct device *dev;
445         struct __ssb_dev_wrapper *devwrap;
446         int i, err = 0;
447         int dev_idx = 0;
448
449         for (i = 0; i < bus->nr_devices; i++) {
450                 sdev = &(bus->devices[i]);
451
452                 /* We don't register SSB-system devices to the kernel,
453                  * as the drivers for them are built into SSB. */
454                 switch (sdev->id.coreid) {
455                 case SSB_DEV_CHIPCOMMON:
456                 case SSB_DEV_PCI:
457                 case SSB_DEV_PCIE:
458                 case SSB_DEV_PCMCIA:
459                 case SSB_DEV_MIPS:
460                 case SSB_DEV_MIPS_3302:
461                 case SSB_DEV_EXTIF:
462                         continue;
463                 }
464
465                 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
466                 if (!devwrap) {
467                         ssb_printk(KERN_ERR PFX
468                                    "Could not allocate device\n");
469                         err = -ENOMEM;
470                         goto error;
471                 }
472                 dev = &devwrap->dev;
473                 devwrap->sdev = sdev;
474
475                 dev->release = ssb_release_dev;
476                 dev->bus = &ssb_bustype;
477                 dev_set_name(dev, "ssb%u:%d", bus->busnumber, dev_idx);
478
479                 switch (bus->bustype) {
480                 case SSB_BUSTYPE_PCI:
481 #ifdef CONFIG_SSB_PCIHOST
482                         sdev->irq = bus->host_pci->irq;
483                         dev->parent = &bus->host_pci->dev;
484 #endif
485                         break;
486                 case SSB_BUSTYPE_PCMCIA:
487 #ifdef CONFIG_SSB_PCMCIAHOST
488                         sdev->irq = bus->host_pcmcia->irq.AssignedIRQ;
489                         dev->parent = &bus->host_pcmcia->dev;
490 #endif
491                         break;
492                 case SSB_BUSTYPE_SDIO:
493 #ifdef CONFIG_SSB_SDIO
494                         sdev->irq = bus->host_sdio->dev.irq;
495                         dev->parent = &bus->host_sdio->dev;
496 #endif
497                         break;
498                 case SSB_BUSTYPE_SSB:
499                         dev->dma_mask = &dev->coherent_dma_mask;
500                         break;
501                 }
502
503                 sdev->dev = dev;
504                 err = device_register(dev);
505                 if (err) {
506                         ssb_printk(KERN_ERR PFX
507                                    "Could not register %s\n",
508                                    dev_name(dev));
509                         /* Set dev to NULL to not unregister
510                          * dev on error unwinding. */
511                         sdev->dev = NULL;
512                         kfree(devwrap);
513                         goto error;
514                 }
515                 dev_idx++;
516         }
517
518         return 0;
519 error:
520         /* Unwind the already registered devices. */
521         ssb_devices_unregister(bus);
522         return err;
523 }
524
525 /* Needs ssb_buses_lock() */
526 static int ssb_attach_queued_buses(void)
527 {
528         struct ssb_bus *bus, *n;
529         int err = 0;
530         int drop_them_all = 0;
531
532         list_for_each_entry_safe(bus, n, &attach_queue, list) {
533                 if (drop_them_all) {
534                         list_del(&bus->list);
535                         continue;
536                 }
537                 /* Can't init the PCIcore in ssb_bus_register(), as that
538                  * is too early in boot for embedded systems
539                  * (no udelay() available). So do it here in attach stage.
540                  */
541                 err = ssb_bus_powerup(bus, 0);
542                 if (err)
543                         goto error;
544                 ssb_pcicore_init(&bus->pcicore);
545                 ssb_bus_may_powerdown(bus);
546
547                 err = ssb_devices_register(bus);
548 error:
549                 if (err) {
550                         drop_them_all = 1;
551                         list_del(&bus->list);
552                         continue;
553                 }
554                 list_move_tail(&bus->list, &buses);
555         }
556
557         return err;
558 }
559
560 static u8 ssb_ssb_read8(struct ssb_device *dev, u16 offset)
561 {
562         struct ssb_bus *bus = dev->bus;
563
564         offset += dev->core_index * SSB_CORE_SIZE;
565         return readb(bus->mmio + offset);
566 }
567
568 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset)
569 {
570         struct ssb_bus *bus = dev->bus;
571
572         offset += dev->core_index * SSB_CORE_SIZE;
573         return readw(bus->mmio + offset);
574 }
575
576 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset)
577 {
578         struct ssb_bus *bus = dev->bus;
579
580         offset += dev->core_index * SSB_CORE_SIZE;
581         return readl(bus->mmio + offset);
582 }
583
584 #ifdef CONFIG_SSB_BLOCKIO
585 static void ssb_ssb_block_read(struct ssb_device *dev, void *buffer,
586                                size_t count, u16 offset, u8 reg_width)
587 {
588         struct ssb_bus *bus = dev->bus;
589         void __iomem *addr;
590
591         offset += dev->core_index * SSB_CORE_SIZE;
592         addr = bus->mmio + offset;
593
594         switch (reg_width) {
595         case sizeof(u8): {
596                 u8 *buf = buffer;
597
598                 while (count) {
599                         *buf = __raw_readb(addr);
600                         buf++;
601                         count--;
602                 }
603                 break;
604         }
605         case sizeof(u16): {
606                 __le16 *buf = buffer;
607
608                 SSB_WARN_ON(count & 1);
609                 while (count) {
610                         *buf = (__force __le16)__raw_readw(addr);
611                         buf++;
612                         count -= 2;
613                 }
614                 break;
615         }
616         case sizeof(u32): {
617                 __le32 *buf = buffer;
618
619                 SSB_WARN_ON(count & 3);
620                 while (count) {
621                         *buf = (__force __le32)__raw_readl(addr);
622                         buf++;
623                         count -= 4;
624                 }
625                 break;
626         }
627         default:
628                 SSB_WARN_ON(1);
629         }
630 }
631 #endif /* CONFIG_SSB_BLOCKIO */
632
633 static void ssb_ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
634 {
635         struct ssb_bus *bus = dev->bus;
636
637         offset += dev->core_index * SSB_CORE_SIZE;
638         writeb(value, bus->mmio + offset);
639 }
640
641 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
642 {
643         struct ssb_bus *bus = dev->bus;
644
645         offset += dev->core_index * SSB_CORE_SIZE;
646         writew(value, bus->mmio + offset);
647 }
648
649 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
650 {
651         struct ssb_bus *bus = dev->bus;
652
653         offset += dev->core_index * SSB_CORE_SIZE;
654         writel(value, bus->mmio + offset);
655 }
656
657 #ifdef CONFIG_SSB_BLOCKIO
658 static void ssb_ssb_block_write(struct ssb_device *dev, const void *buffer,
659                                 size_t count, u16 offset, u8 reg_width)
660 {
661         struct ssb_bus *bus = dev->bus;
662         void __iomem *addr;
663
664         offset += dev->core_index * SSB_CORE_SIZE;
665         addr = bus->mmio + offset;
666
667         switch (reg_width) {
668         case sizeof(u8): {
669                 const u8 *buf = buffer;
670
671                 while (count) {
672                         __raw_writeb(*buf, addr);
673                         buf++;
674                         count--;
675                 }
676                 break;
677         }
678         case sizeof(u16): {
679                 const __le16 *buf = buffer;
680
681                 SSB_WARN_ON(count & 1);
682                 while (count) {
683                         __raw_writew((__force u16)(*buf), addr);
684                         buf++;
685                         count -= 2;
686                 }
687                 break;
688         }
689         case sizeof(u32): {
690                 const __le32 *buf = buffer;
691
692                 SSB_WARN_ON(count & 3);
693                 while (count) {
694                         __raw_writel((__force u32)(*buf), addr);
695                         buf++;
696                         count -= 4;
697                 }
698                 break;
699         }
700         default:
701                 SSB_WARN_ON(1);
702         }
703 }
704 #endif /* CONFIG_SSB_BLOCKIO */
705
706 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
707 static const struct ssb_bus_ops ssb_ssb_ops = {
708         .read8          = ssb_ssb_read8,
709         .read16         = ssb_ssb_read16,
710         .read32         = ssb_ssb_read32,
711         .write8         = ssb_ssb_write8,
712         .write16        = ssb_ssb_write16,
713         .write32        = ssb_ssb_write32,
714 #ifdef CONFIG_SSB_BLOCKIO
715         .block_read     = ssb_ssb_block_read,
716         .block_write    = ssb_ssb_block_write,
717 #endif
718 };
719
720 static int ssb_fetch_invariants(struct ssb_bus *bus,
721                                 ssb_invariants_func_t get_invariants)
722 {
723         struct ssb_init_invariants iv;
724         int err;
725
726         memset(&iv, 0, sizeof(iv));
727         err = get_invariants(bus, &iv);
728         if (err)
729                 goto out;
730         memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo));
731         memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom));
732         bus->has_cardbus_slot = iv.has_cardbus_slot;
733 out:
734         return err;
735 }
736
737 static int ssb_bus_register(struct ssb_bus *bus,
738                             ssb_invariants_func_t get_invariants,
739                             unsigned long baseaddr)
740 {
741         int err;
742
743         spin_lock_init(&bus->bar_lock);
744         INIT_LIST_HEAD(&bus->list);
745 #ifdef CONFIG_SSB_EMBEDDED
746         spin_lock_init(&bus->gpio_lock);
747 #endif
748
749         /* Powerup the bus */
750         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
751         if (err)
752                 goto out;
753
754         /* Init SDIO-host device (if any), before the scan */
755         err = ssb_sdio_init(bus);
756         if (err)
757                 goto err_disable_xtal;
758
759         ssb_buses_lock();
760         bus->busnumber = next_busnumber;
761         /* Scan for devices (cores) */
762         err = ssb_bus_scan(bus, baseaddr);
763         if (err)
764                 goto err_sdio_exit;
765
766         /* Init PCI-host device (if any) */
767         err = ssb_pci_init(bus);
768         if (err)
769                 goto err_unmap;
770         /* Init PCMCIA-host device (if any) */
771         err = ssb_pcmcia_init(bus);
772         if (err)
773                 goto err_pci_exit;
774
775         /* Initialize basic system devices (if available) */
776         err = ssb_bus_powerup(bus, 0);
777         if (err)
778                 goto err_pcmcia_exit;
779         ssb_chipcommon_init(&bus->chipco);
780         ssb_mipscore_init(&bus->mipscore);
781         err = ssb_fetch_invariants(bus, get_invariants);
782         if (err) {
783                 ssb_bus_may_powerdown(bus);
784                 goto err_pcmcia_exit;
785         }
786         ssb_bus_may_powerdown(bus);
787
788         /* Queue it for attach.
789          * See the comment at the ssb_is_early_boot definition. */
790         list_add_tail(&bus->list, &attach_queue);
791         if (!ssb_is_early_boot) {
792                 /* This is not early boot, so we must attach the bus now */
793                 err = ssb_attach_queued_buses();
794                 if (err)
795                         goto err_dequeue;
796         }
797         next_busnumber++;
798         ssb_buses_unlock();
799
800 out:
801         return err;
802
803 err_dequeue:
804         list_del(&bus->list);
805 err_pcmcia_exit:
806         ssb_pcmcia_exit(bus);
807 err_pci_exit:
808         ssb_pci_exit(bus);
809 err_unmap:
810         ssb_iounmap(bus);
811 err_sdio_exit:
812         ssb_sdio_exit(bus);
813 err_disable_xtal:
814         ssb_buses_unlock();
815         ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
816         return err;
817 }
818
819 #ifdef CONFIG_SSB_PCIHOST
820 int ssb_bus_pcibus_register(struct ssb_bus *bus,
821                             struct pci_dev *host_pci)
822 {
823         int err;
824
825         bus->bustype = SSB_BUSTYPE_PCI;
826         bus->host_pci = host_pci;
827         bus->ops = &ssb_pci_ops;
828
829         err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
830         if (!err) {
831                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
832                            "PCI device %s\n", dev_name(&host_pci->dev));
833         }
834
835         return err;
836 }
837 EXPORT_SYMBOL(ssb_bus_pcibus_register);
838 #endif /* CONFIG_SSB_PCIHOST */
839
840 #ifdef CONFIG_SSB_PCMCIAHOST
841 int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
842                                struct pcmcia_device *pcmcia_dev,
843                                unsigned long baseaddr)
844 {
845         int err;
846
847         bus->bustype = SSB_BUSTYPE_PCMCIA;
848         bus->host_pcmcia = pcmcia_dev;
849         bus->ops = &ssb_pcmcia_ops;
850
851         err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
852         if (!err) {
853                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
854                            "PCMCIA device %s\n", pcmcia_dev->devname);
855         }
856
857         return err;
858 }
859 EXPORT_SYMBOL(ssb_bus_pcmciabus_register);
860 #endif /* CONFIG_SSB_PCMCIAHOST */
861
862 #ifdef CONFIG_SSB_SDIOHOST
863 int ssb_bus_sdiobus_register(struct ssb_bus *bus, struct sdio_func *func,
864                              unsigned int quirks)
865 {
866         int err;
867
868         bus->bustype = SSB_BUSTYPE_SDIO;
869         bus->host_sdio = func;
870         bus->ops = &ssb_sdio_ops;
871         bus->quirks = quirks;
872
873         err = ssb_bus_register(bus, ssb_sdio_get_invariants, ~0);
874         if (!err) {
875                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
876                            "SDIO device %s\n", sdio_func_id(func));
877         }
878
879         return err;
880 }
881 EXPORT_SYMBOL(ssb_bus_sdiobus_register);
882 #endif /* CONFIG_SSB_PCMCIAHOST */
883
884 int ssb_bus_ssbbus_register(struct ssb_bus *bus,
885                             unsigned long baseaddr,
886                             ssb_invariants_func_t get_invariants)
887 {
888         int err;
889
890         bus->bustype = SSB_BUSTYPE_SSB;
891         bus->ops = &ssb_ssb_ops;
892
893         err = ssb_bus_register(bus, get_invariants, baseaddr);
894         if (!err) {
895                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
896                            "address 0x%08lX\n", baseaddr);
897         }
898
899         return err;
900 }
901
902 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
903 {
904         drv->drv.name = drv->name;
905         drv->drv.bus = &ssb_bustype;
906         drv->drv.owner = owner;
907
908         return driver_register(&drv->drv);
909 }
910 EXPORT_SYMBOL(__ssb_driver_register);
911
912 void ssb_driver_unregister(struct ssb_driver *drv)
913 {
914         driver_unregister(&drv->drv);
915 }
916 EXPORT_SYMBOL(ssb_driver_unregister);
917
918 void ssb_set_devtypedata(struct ssb_device *dev, void *data)
919 {
920         struct ssb_bus *bus = dev->bus;
921         struct ssb_device *ent;
922         int i;
923
924         for (i = 0; i < bus->nr_devices; i++) {
925                 ent = &(bus->devices[i]);
926                 if (ent->id.vendor != dev->id.vendor)
927                         continue;
928                 if (ent->id.coreid != dev->id.coreid)
929                         continue;
930
931                 ent->devtypedata = data;
932         }
933 }
934 EXPORT_SYMBOL(ssb_set_devtypedata);
935
936 static u32 clkfactor_f6_resolve(u32 v)
937 {
938         /* map the magic values */
939         switch (v) {
940         case SSB_CHIPCO_CLK_F6_2:
941                 return 2;
942         case SSB_CHIPCO_CLK_F6_3:
943                 return 3;
944         case SSB_CHIPCO_CLK_F6_4:
945                 return 4;
946         case SSB_CHIPCO_CLK_F6_5:
947                 return 5;
948         case SSB_CHIPCO_CLK_F6_6:
949                 return 6;
950         case SSB_CHIPCO_CLK_F6_7:
951                 return 7;
952         }
953         return 0;
954 }
955
956 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
957 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
958 {
959         u32 n1, n2, clock, m1, m2, m3, mc;
960
961         n1 = (n & SSB_CHIPCO_CLK_N1);
962         n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
963
964         switch (plltype) {
965         case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
966                 if (m & SSB_CHIPCO_CLK_T6_MMASK)
967                         return SSB_CHIPCO_CLK_T6_M0;
968                 return SSB_CHIPCO_CLK_T6_M1;
969         case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
970         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
971         case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
972         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
973                 n1 = clkfactor_f6_resolve(n1);
974                 n2 += SSB_CHIPCO_CLK_F5_BIAS;
975                 break;
976         case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
977                 n1 += SSB_CHIPCO_CLK_T2_BIAS;
978                 n2 += SSB_CHIPCO_CLK_T2_BIAS;
979                 SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7)));
980                 SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23)));
981                 break;
982         case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
983                 return 100000000;
984         default:
985                 SSB_WARN_ON(1);
986         }
987
988         switch (plltype) {
989         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
990         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
991                 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
992                 break;
993         default:
994                 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
995         }
996         if (!clock)
997                 return 0;
998
999         m1 = (m & SSB_CHIPCO_CLK_M1);
1000         m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
1001         m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
1002         mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
1003
1004         switch (plltype) {
1005         case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
1006         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
1007         case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
1008         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
1009                 m1 = clkfactor_f6_resolve(m1);
1010                 if ((plltype == SSB_PLLTYPE_1) ||
1011                     (plltype == SSB_PLLTYPE_3))
1012                         m2 += SSB_CHIPCO_CLK_F5_BIAS;
1013                 else
1014                         m2 = clkfactor_f6_resolve(m2);
1015                 m3 = clkfactor_f6_resolve(m3);
1016
1017                 switch (mc) {
1018                 case SSB_CHIPCO_CLK_MC_BYPASS:
1019                         return clock;
1020                 case SSB_CHIPCO_CLK_MC_M1:
1021                         return (clock / m1);
1022                 case SSB_CHIPCO_CLK_MC_M1M2:
1023                         return (clock / (m1 * m2));
1024                 case SSB_CHIPCO_CLK_MC_M1M2M3:
1025                         return (clock / (m1 * m2 * m3));
1026                 case SSB_CHIPCO_CLK_MC_M1M3:
1027                         return (clock / (m1 * m3));
1028                 }
1029                 return 0;
1030         case SSB_PLLTYPE_2:
1031                 m1 += SSB_CHIPCO_CLK_T2_BIAS;
1032                 m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
1033                 m3 += SSB_CHIPCO_CLK_T2_BIAS;
1034                 SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7)));
1035                 SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10)));
1036                 SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7)));
1037
1038                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
1039                         clock /= m1;
1040                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
1041                         clock /= m2;
1042                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
1043                         clock /= m3;
1044                 return clock;
1045         default:
1046                 SSB_WARN_ON(1);
1047         }
1048         return 0;
1049 }
1050
1051 /* Get the current speed the backplane is running at */
1052 u32 ssb_clockspeed(struct ssb_bus *bus)
1053 {
1054         u32 rate;
1055         u32 plltype;
1056         u32 clkctl_n, clkctl_m;
1057
1058         if (ssb_extif_available(&bus->extif))
1059                 ssb_extif_get_clockcontrol(&bus->extif, &plltype,
1060                                            &clkctl_n, &clkctl_m);
1061         else if (bus->chipco.dev)
1062                 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
1063                                             &clkctl_n, &clkctl_m);
1064         else
1065                 return 0;
1066
1067         if (bus->chip_id == 0x5365) {
1068                 rate = 100000000;
1069         } else {
1070                 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
1071                 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
1072                         rate /= 2;
1073         }
1074
1075         return rate;
1076 }
1077 EXPORT_SYMBOL(ssb_clockspeed);
1078
1079 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
1080 {
1081         u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
1082
1083         /* The REJECT bit changed position in TMSLOW between
1084          * Backplane revisions. */
1085         switch (rev) {
1086         case SSB_IDLOW_SSBREV_22:
1087                 return SSB_TMSLOW_REJECT_22;
1088         case SSB_IDLOW_SSBREV_23:
1089                 return SSB_TMSLOW_REJECT_23;
1090         case SSB_IDLOW_SSBREV_24:     /* TODO - find the proper REJECT bits */
1091         case SSB_IDLOW_SSBREV_25:     /* same here */
1092         case SSB_IDLOW_SSBREV_26:     /* same here */
1093         case SSB_IDLOW_SSBREV_27:     /* same here */
1094                 return SSB_TMSLOW_REJECT_23;    /* this is a guess */
1095         default:
1096                 printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
1097                 WARN_ON(1);
1098         }
1099         return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23);
1100 }
1101
1102 int ssb_device_is_enabled(struct ssb_device *dev)
1103 {
1104         u32 val;
1105         u32 reject;
1106
1107         reject = ssb_tmslow_reject_bitmask(dev);
1108         val = ssb_read32(dev, SSB_TMSLOW);
1109         val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
1110
1111         return (val == SSB_TMSLOW_CLOCK);
1112 }
1113 EXPORT_SYMBOL(ssb_device_is_enabled);
1114
1115 static void ssb_flush_tmslow(struct ssb_device *dev)
1116 {
1117         /* Make _really_ sure the device has finished the TMSLOW
1118          * register write transaction, as we risk running into
1119          * a machine check exception otherwise.
1120          * Do this by reading the register back to commit the
1121          * PCI write and delay an additional usec for the device
1122          * to react to the change. */
1123         ssb_read32(dev, SSB_TMSLOW);
1124         udelay(1);
1125 }
1126
1127 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
1128 {
1129         u32 val;
1130
1131         ssb_device_disable(dev, core_specific_flags);
1132         ssb_write32(dev, SSB_TMSLOW,
1133                     SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
1134                     SSB_TMSLOW_FGC | core_specific_flags);
1135         ssb_flush_tmslow(dev);
1136
1137         /* Clear SERR if set. This is a hw bug workaround. */
1138         if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
1139                 ssb_write32(dev, SSB_TMSHIGH, 0);
1140
1141         val = ssb_read32(dev, SSB_IMSTATE);
1142         if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
1143                 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
1144                 ssb_write32(dev, SSB_IMSTATE, val);
1145         }
1146
1147         ssb_write32(dev, SSB_TMSLOW,
1148                     SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
1149                     core_specific_flags);
1150         ssb_flush_tmslow(dev);
1151
1152         ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
1153                     core_specific_flags);
1154         ssb_flush_tmslow(dev);
1155 }
1156 EXPORT_SYMBOL(ssb_device_enable);
1157
1158 /* Wait for a bit in a register to get set or unset.
1159  * timeout is in units of ten-microseconds */
1160 static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
1161                         int timeout, int set)
1162 {
1163         int i;
1164         u32 val;
1165
1166         for (i = 0; i < timeout; i++) {
1167                 val = ssb_read32(dev, reg);
1168                 if (set) {
1169                         if (val & bitmask)
1170                                 return 0;
1171                 } else {
1172                         if (!(val & bitmask))
1173                                 return 0;
1174                 }
1175                 udelay(10);
1176         }
1177         printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on "
1178                             "register %04X to %s.\n",
1179                bitmask, reg, (set ? "set" : "clear"));
1180
1181         return -ETIMEDOUT;
1182 }
1183
1184 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
1185 {
1186         u32 reject;
1187
1188         if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
1189                 return;
1190
1191         reject = ssb_tmslow_reject_bitmask(dev);
1192         ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
1193         ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1);
1194         ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
1195         ssb_write32(dev, SSB_TMSLOW,
1196                     SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
1197                     reject | SSB_TMSLOW_RESET |
1198                     core_specific_flags);
1199         ssb_flush_tmslow(dev);
1200
1201         ssb_write32(dev, SSB_TMSLOW,
1202                     reject | SSB_TMSLOW_RESET |
1203                     core_specific_flags);
1204         ssb_flush_tmslow(dev);
1205 }
1206 EXPORT_SYMBOL(ssb_device_disable);
1207
1208 u32 ssb_dma_translation(struct ssb_device *dev)
1209 {
1210         switch (dev->bus->bustype) {
1211         case SSB_BUSTYPE_SSB:
1212                 return 0;
1213         case SSB_BUSTYPE_PCI:
1214                 return SSB_PCI_DMA;
1215         default:
1216                 __ssb_dma_not_implemented(dev);
1217         }
1218         return 0;
1219 }
1220 EXPORT_SYMBOL(ssb_dma_translation);
1221
1222 int ssb_dma_set_mask(struct ssb_device *dev, u64 mask)
1223 {
1224 #ifdef CONFIG_SSB_PCIHOST
1225         int err;
1226 #endif
1227
1228         switch (dev->bus->bustype) {
1229         case SSB_BUSTYPE_PCI:
1230 #ifdef CONFIG_SSB_PCIHOST
1231                 err = pci_set_dma_mask(dev->bus->host_pci, mask);
1232                 if (err)
1233                         return err;
1234                 err = pci_set_consistent_dma_mask(dev->bus->host_pci, mask);
1235                 return err;
1236 #endif
1237         case SSB_BUSTYPE_SSB:
1238                 return dma_set_mask(dev->dev, mask);
1239         default:
1240                 __ssb_dma_not_implemented(dev);
1241         }
1242         return -ENOSYS;
1243 }
1244 EXPORT_SYMBOL(ssb_dma_set_mask);
1245
1246 void * ssb_dma_alloc_consistent(struct ssb_device *dev, size_t size,
1247                                 dma_addr_t *dma_handle, gfp_t gfp_flags)
1248 {
1249         switch (dev->bus->bustype) {
1250         case SSB_BUSTYPE_PCI:
1251 #ifdef CONFIG_SSB_PCIHOST
1252                 if (gfp_flags & GFP_DMA) {
1253                         /* Workaround: The PCI API does not support passing
1254                          * a GFP flag. */
1255                         return dma_alloc_coherent(&dev->bus->host_pci->dev,
1256                                                   size, dma_handle, gfp_flags);
1257                 }
1258                 return pci_alloc_consistent(dev->bus->host_pci, size, dma_handle);
1259 #endif
1260         case SSB_BUSTYPE_SSB:
1261                 return dma_alloc_coherent(dev->dev, size, dma_handle, gfp_flags);
1262         default:
1263                 __ssb_dma_not_implemented(dev);
1264         }
1265         return NULL;
1266 }
1267 EXPORT_SYMBOL(ssb_dma_alloc_consistent);
1268
1269 void ssb_dma_free_consistent(struct ssb_device *dev, size_t size,
1270                              void *vaddr, dma_addr_t dma_handle,
1271                              gfp_t gfp_flags)
1272 {
1273         switch (dev->bus->bustype) {
1274         case SSB_BUSTYPE_PCI:
1275 #ifdef CONFIG_SSB_PCIHOST
1276                 if (gfp_flags & GFP_DMA) {
1277                         /* Workaround: The PCI API does not support passing
1278                          * a GFP flag. */
1279                         dma_free_coherent(&dev->bus->host_pci->dev,
1280                                           size, vaddr, dma_handle);
1281                         return;
1282                 }
1283                 pci_free_consistent(dev->bus->host_pci, size,
1284                                     vaddr, dma_handle);
1285                 return;
1286 #endif
1287         case SSB_BUSTYPE_SSB:
1288                 dma_free_coherent(dev->dev, size, vaddr, dma_handle);
1289                 return;
1290         default:
1291                 __ssb_dma_not_implemented(dev);
1292         }
1293 }
1294 EXPORT_SYMBOL(ssb_dma_free_consistent);
1295
1296 int ssb_bus_may_powerdown(struct ssb_bus *bus)
1297 {
1298         struct ssb_chipcommon *cc;
1299         int err = 0;
1300
1301         /* On buses where more than one core may be working
1302          * at a time, we must not powerdown stuff if there are
1303          * still cores that may want to run. */
1304         if (bus->bustype == SSB_BUSTYPE_SSB)
1305                 goto out;
1306
1307         cc = &bus->chipco;
1308
1309         if (!cc->dev)
1310                 goto out;
1311         if (cc->dev->id.revision < 5)
1312                 goto out;
1313
1314         ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
1315         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
1316         if (err)
1317                 goto error;
1318 out:
1319 #ifdef CONFIG_SSB_DEBUG
1320         bus->powered_up = 0;
1321 #endif
1322         return err;
1323 error:
1324         ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
1325         goto out;
1326 }
1327 EXPORT_SYMBOL(ssb_bus_may_powerdown);
1328
1329 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
1330 {
1331         struct ssb_chipcommon *cc;
1332         int err;
1333         enum ssb_clkmode mode;
1334
1335         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
1336         if (err)
1337                 goto error;
1338         cc = &bus->chipco;
1339         mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1340         ssb_chipco_set_clockmode(cc, mode);
1341
1342 #ifdef CONFIG_SSB_DEBUG
1343         bus->powered_up = 1;
1344 #endif
1345         return 0;
1346 error:
1347         ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
1348         return err;
1349 }
1350 EXPORT_SYMBOL(ssb_bus_powerup);
1351
1352 u32 ssb_admatch_base(u32 adm)
1353 {
1354         u32 base = 0;
1355
1356         switch (adm & SSB_ADM_TYPE) {
1357         case SSB_ADM_TYPE0:
1358                 base = (adm & SSB_ADM_BASE0);
1359                 break;
1360         case SSB_ADM_TYPE1:
1361                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1362                 base = (adm & SSB_ADM_BASE1);
1363                 break;
1364         case SSB_ADM_TYPE2:
1365                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1366                 base = (adm & SSB_ADM_BASE2);
1367                 break;
1368         default:
1369                 SSB_WARN_ON(1);
1370         }
1371
1372         return base;
1373 }
1374 EXPORT_SYMBOL(ssb_admatch_base);
1375
1376 u32 ssb_admatch_size(u32 adm)
1377 {
1378         u32 size = 0;
1379
1380         switch (adm & SSB_ADM_TYPE) {
1381         case SSB_ADM_TYPE0:
1382                 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1383                 break;
1384         case SSB_ADM_TYPE1:
1385                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1386                 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1387                 break;
1388         case SSB_ADM_TYPE2:
1389                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1390                 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1391                 break;
1392         default:
1393                 SSB_WARN_ON(1);
1394         }
1395         size = (1 << (size + 1));
1396
1397         return size;
1398 }
1399 EXPORT_SYMBOL(ssb_admatch_size);
1400
1401 static int __init ssb_modinit(void)
1402 {
1403         int err;
1404
1405         /* See the comment at the ssb_is_early_boot definition */
1406         ssb_is_early_boot = 0;
1407         err = bus_register(&ssb_bustype);
1408         if (err)
1409                 return err;
1410
1411         /* Maybe we already registered some buses at early boot.
1412          * Check for this and attach them
1413          */
1414         ssb_buses_lock();
1415         err = ssb_attach_queued_buses();
1416         ssb_buses_unlock();
1417         if (err) {
1418                 bus_unregister(&ssb_bustype);
1419                 goto out;
1420         }
1421
1422         err = b43_pci_ssb_bridge_init();
1423         if (err) {
1424                 ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
1425                            "initialization failed\n");
1426                 /* don't fail SSB init because of this */
1427                 err = 0;
1428         }
1429         err = ssb_gige_init();
1430         if (err) {
1431                 ssb_printk(KERN_ERR "SSB Broadcom Gigabit Ethernet "
1432                            "driver initialization failed\n");
1433                 /* don't fail SSB init because of this */
1434                 err = 0;
1435         }
1436 out:
1437         return err;
1438 }
1439 /* ssb must be initialized after PCI but before the ssb drivers.
1440  * That means we must use some initcall between subsys_initcall
1441  * and device_initcall. */
1442 fs_initcall(ssb_modinit);
1443
1444 static void __exit ssb_modexit(void)
1445 {
1446         ssb_gige_exit();
1447         b43_pci_ssb_bridge_exit();
1448         bus_unregister(&ssb_bustype);
1449 }
1450 module_exit(ssb_modexit)