518671b8afe52c3541448645ad070ac299626907
[linux-2.6.git] / drivers / spi / spi_mpc8xxx.c
1 /*
2  * MPC8xxx SPI controller driver.
3  *
4  * Maintainer: Kumar Gala
5  *
6  * Copyright (C) 2006 Polycom, Inc.
7  *
8  * This program is free software; you can redistribute  it and/or modify it
9  * under  the terms of  the GNU General  Public License as published by the
10  * Free Software Foundation;  either version 2 of the  License, or (at your
11  * option) any later version.
12  */
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/types.h>
16 #include <linux/kernel.h>
17 #include <linux/bug.h>
18 #include <linux/errno.h>
19 #include <linux/err.h>
20 #include <linux/io.h>
21 #include <linux/completion.h>
22 #include <linux/interrupt.h>
23 #include <linux/delay.h>
24 #include <linux/irq.h>
25 #include <linux/device.h>
26 #include <linux/spi/spi.h>
27 #include <linux/spi/spi_bitbang.h>
28 #include <linux/platform_device.h>
29 #include <linux/fsl_devices.h>
30 #include <linux/of.h>
31 #include <linux/of_platform.h>
32 #include <linux/gpio.h>
33 #include <linux/of_gpio.h>
34 #include <linux/of_spi.h>
35
36 #include <sysdev/fsl_soc.h>
37 #include <asm/irq.h>
38
39 /* SPI Controller registers */
40 struct mpc8xxx_spi_reg {
41         u8 res1[0x20];
42         __be32 mode;
43         __be32 event;
44         __be32 mask;
45         __be32 command;
46         __be32 transmit;
47         __be32 receive;
48 };
49
50 /* SPI Controller mode register definitions */
51 #define SPMODE_LOOP             (1 << 30)
52 #define SPMODE_CI_INACTIVEHIGH  (1 << 29)
53 #define SPMODE_CP_BEGIN_EDGECLK (1 << 28)
54 #define SPMODE_DIV16            (1 << 27)
55 #define SPMODE_REV              (1 << 26)
56 #define SPMODE_MS               (1 << 25)
57 #define SPMODE_ENABLE           (1 << 24)
58 #define SPMODE_LEN(x)           ((x) << 20)
59 #define SPMODE_PM(x)            ((x) << 16)
60 #define SPMODE_OP               (1 << 14)
61 #define SPMODE_CG(x)            ((x) << 7)
62
63 /*
64  * Default for SPI Mode:
65  *      SPI MODE 0 (inactive low, phase middle, MSB, 8-bit length, slow clk
66  */
67 #define SPMODE_INIT_VAL (SPMODE_CI_INACTIVEHIGH | SPMODE_DIV16 | SPMODE_REV | \
68                          SPMODE_MS | SPMODE_LEN(7) | SPMODE_PM(0xf))
69
70 /* SPIE register values */
71 #define SPIE_NE         0x00000200      /* Not empty */
72 #define SPIE_NF         0x00000100      /* Not full */
73
74 /* SPIM register values */
75 #define SPIM_NE         0x00000200      /* Not empty */
76 #define SPIM_NF         0x00000100      /* Not full */
77
78 /* SPI Controller driver's private data. */
79 struct mpc8xxx_spi {
80         struct mpc8xxx_spi_reg __iomem *base;
81
82         /* rx & tx bufs from the spi_transfer */
83         const void *tx;
84         void *rx;
85
86         /* functions to deal with different sized buffers */
87         void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);
88         u32(*get_tx) (struct mpc8xxx_spi *);
89
90         unsigned int count;
91         unsigned int irq;
92
93         unsigned nsecs;         /* (clock cycle time)/2 */
94
95         u32 spibrg;             /* SPIBRG input clock */
96         u32 rx_shift;           /* RX data reg shift when in qe mode */
97         u32 tx_shift;           /* TX data reg shift when in qe mode */
98
99         bool qe_mode;
100
101         struct workqueue_struct *workqueue;
102         struct work_struct work;
103
104         struct list_head queue;
105         spinlock_t lock;
106
107         struct completion done;
108 };
109
110 struct spi_mpc8xxx_cs {
111         /* functions to deal with different sized buffers */
112         void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);
113         u32 (*get_tx) (struct mpc8xxx_spi *);
114         u32 rx_shift;           /* RX data reg shift when in qe mode */
115         u32 tx_shift;           /* TX data reg shift when in qe mode */
116         u32 hw_mode;            /* Holds HW mode register settings */
117 };
118
119 static inline void mpc8xxx_spi_write_reg(__be32 __iomem *reg, u32 val)
120 {
121         out_be32(reg, val);
122 }
123
124 static inline u32 mpc8xxx_spi_read_reg(__be32 __iomem *reg)
125 {
126         return in_be32(reg);
127 }
128
129 #define MPC83XX_SPI_RX_BUF(type)                                          \
130 static                                                                    \
131 void mpc8xxx_spi_rx_buf_##type(u32 data, struct mpc8xxx_spi *mpc8xxx_spi) \
132 {                                                                         \
133         type *rx = mpc8xxx_spi->rx;                                       \
134         *rx++ = (type)(data >> mpc8xxx_spi->rx_shift);                    \
135         mpc8xxx_spi->rx = rx;                                             \
136 }
137
138 #define MPC83XX_SPI_TX_BUF(type)                                \
139 static                                                          \
140 u32 mpc8xxx_spi_tx_buf_##type(struct mpc8xxx_spi *mpc8xxx_spi)  \
141 {                                                               \
142         u32 data;                                               \
143         const type *tx = mpc8xxx_spi->tx;                       \
144         if (!tx)                                                \
145                 return 0;                                       \
146         data = *tx++ << mpc8xxx_spi->tx_shift;                  \
147         mpc8xxx_spi->tx = tx;                                   \
148         return data;                                            \
149 }
150
151 MPC83XX_SPI_RX_BUF(u8)
152 MPC83XX_SPI_RX_BUF(u16)
153 MPC83XX_SPI_RX_BUF(u32)
154 MPC83XX_SPI_TX_BUF(u8)
155 MPC83XX_SPI_TX_BUF(u16)
156 MPC83XX_SPI_TX_BUF(u32)
157
158 static void mpc8xxx_spi_chipselect(struct spi_device *spi, int value)
159 {
160         struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
161         struct fsl_spi_platform_data *pdata = spi->dev.parent->platform_data;
162         bool pol = spi->mode & SPI_CS_HIGH;
163         struct spi_mpc8xxx_cs   *cs = spi->controller_state;
164
165         if (value == BITBANG_CS_INACTIVE) {
166                 if (pdata->cs_control)
167                         pdata->cs_control(spi, !pol);
168         }
169
170         if (value == BITBANG_CS_ACTIVE) {
171                 u32 regval = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->mode);
172
173                 mpc8xxx_spi->rx_shift = cs->rx_shift;
174                 mpc8xxx_spi->tx_shift = cs->tx_shift;
175                 mpc8xxx_spi->get_rx = cs->get_rx;
176                 mpc8xxx_spi->get_tx = cs->get_tx;
177
178                 if (cs->hw_mode != regval) {
179                         unsigned long flags;
180                         __be32 __iomem *mode = &mpc8xxx_spi->base->mode;
181
182                         regval = cs->hw_mode;
183                         /* Turn off IRQs locally to minimize time that
184                          * SPI is disabled
185                          */
186                         local_irq_save(flags);
187                         /* Turn off SPI unit prior changing mode */
188                         mpc8xxx_spi_write_reg(mode, regval & ~SPMODE_ENABLE);
189                         mpc8xxx_spi_write_reg(mode, regval);
190                         local_irq_restore(flags);
191                 }
192                 if (pdata->cs_control)
193                         pdata->cs_control(spi, pol);
194         }
195 }
196
197 static
198 int mpc8xxx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
199 {
200         struct mpc8xxx_spi *mpc8xxx_spi;
201         u32 regval;
202         u8 bits_per_word, pm;
203         u32 hz;
204         struct spi_mpc8xxx_cs   *cs = spi->controller_state;
205
206         mpc8xxx_spi = spi_master_get_devdata(spi->master);
207
208         if (t) {
209                 bits_per_word = t->bits_per_word;
210                 hz = t->speed_hz;
211         } else {
212                 bits_per_word = 0;
213                 hz = 0;
214         }
215
216         /* spi_transfer level calls that work per-word */
217         if (!bits_per_word)
218                 bits_per_word = spi->bits_per_word;
219
220         /* Make sure its a bit width we support [4..16, 32] */
221         if ((bits_per_word < 4)
222             || ((bits_per_word > 16) && (bits_per_word != 32)))
223                 return -EINVAL;
224
225         if (!hz)
226                 hz = spi->max_speed_hz;
227
228         cs->rx_shift = 0;
229         cs->tx_shift = 0;
230         if (bits_per_word <= 8) {
231                 cs->get_rx = mpc8xxx_spi_rx_buf_u8;
232                 cs->get_tx = mpc8xxx_spi_tx_buf_u8;
233                 if (mpc8xxx_spi->qe_mode) {
234                         cs->rx_shift = 16;
235                         cs->tx_shift = 24;
236                 }
237         } else if (bits_per_word <= 16) {
238                 cs->get_rx = mpc8xxx_spi_rx_buf_u16;
239                 cs->get_tx = mpc8xxx_spi_tx_buf_u16;
240                 if (mpc8xxx_spi->qe_mode) {
241                         cs->rx_shift = 16;
242                         cs->tx_shift = 16;
243                 }
244         } else if (bits_per_word <= 32) {
245                 cs->get_rx = mpc8xxx_spi_rx_buf_u32;
246                 cs->get_tx = mpc8xxx_spi_tx_buf_u32;
247         } else
248                 return -EINVAL;
249
250         if (mpc8xxx_spi->qe_mode && spi->mode & SPI_LSB_FIRST) {
251                 cs->tx_shift = 0;
252                 if (bits_per_word <= 8)
253                         cs->rx_shift = 8;
254                 else
255                         cs->rx_shift = 0;
256         }
257
258         mpc8xxx_spi->rx_shift = cs->rx_shift;
259         mpc8xxx_spi->tx_shift = cs->tx_shift;
260         mpc8xxx_spi->get_rx = cs->get_rx;
261         mpc8xxx_spi->get_tx = cs->get_tx;
262
263         if (bits_per_word == 32)
264                 bits_per_word = 0;
265         else
266                 bits_per_word = bits_per_word - 1;
267
268         /* mask out bits we are going to set */
269         cs->hw_mode &= ~(SPMODE_LEN(0xF) | SPMODE_DIV16
270                                   | SPMODE_PM(0xF));
271
272         cs->hw_mode |= SPMODE_LEN(bits_per_word);
273
274         if ((mpc8xxx_spi->spibrg / hz) > 64) {
275                 cs->hw_mode |= SPMODE_DIV16;
276                 pm = mpc8xxx_spi->spibrg / (hz * 64);
277
278                 WARN_ONCE(pm > 16, "%s: Requested speed is too low: %d Hz. "
279                           "Will use %d Hz instead.\n", dev_name(&spi->dev),
280                           hz, mpc8xxx_spi->spibrg / 1024);
281                 if (pm > 16)
282                         pm = 16;
283         } else
284                 pm = mpc8xxx_spi->spibrg / (hz * 4);
285         if (pm)
286                 pm--;
287
288         cs->hw_mode |= SPMODE_PM(pm);
289         regval =  mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->mode);
290         if (cs->hw_mode != regval) {
291                 unsigned long flags;
292                 __be32 __iomem *mode = &mpc8xxx_spi->base->mode;
293
294                 regval = cs->hw_mode;
295                 /* Turn off IRQs locally to minimize time
296                  * that SPI is disabled
297                  */
298                 local_irq_save(flags);
299                 /* Turn off SPI unit prior changing mode */
300                 mpc8xxx_spi_write_reg(mode, regval & ~SPMODE_ENABLE);
301                 mpc8xxx_spi_write_reg(mode, regval);
302                 local_irq_restore(flags);
303         }
304         return 0;
305 }
306
307 static int mpc8xxx_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
308 {
309         struct mpc8xxx_spi *mpc8xxx_spi;
310         u32 word, len, bits_per_word;
311
312         mpc8xxx_spi = spi_master_get_devdata(spi->master);
313
314         mpc8xxx_spi->tx = t->tx_buf;
315         mpc8xxx_spi->rx = t->rx_buf;
316         bits_per_word = spi->bits_per_word;
317         if (t->bits_per_word)
318                 bits_per_word = t->bits_per_word;
319         len = t->len;
320         if (bits_per_word > 8) {
321                 /* invalid length? */
322                 if (len & 1)
323                         return -EINVAL;
324                 len /= 2;
325         }
326         if (bits_per_word > 16) {
327                 /* invalid length? */
328                 if (len & 1)
329                         return -EINVAL;
330                 len /= 2;
331         }
332         mpc8xxx_spi->count = len;
333
334         INIT_COMPLETION(mpc8xxx_spi->done);
335
336         /* enable rx ints */
337         mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mask, SPIM_NE);
338
339         /* transmit word */
340         word = mpc8xxx_spi->get_tx(mpc8xxx_spi);
341         mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->transmit, word);
342
343         wait_for_completion(&mpc8xxx_spi->done);
344
345         /* disable rx ints */
346         mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mask, 0);
347
348         return mpc8xxx_spi->count;
349 }
350
351 static void mpc8xxx_spi_do_one_msg(struct spi_message *m)
352 {
353         struct spi_device *spi = m->spi;
354         struct spi_transfer *t;
355         unsigned int cs_change;
356         const int nsecs = 50;
357         int status;
358
359         cs_change = 1;
360         status = 0;
361         list_for_each_entry(t, &m->transfers, transfer_list) {
362                 if (t->bits_per_word || t->speed_hz) {
363                         /* Don't allow changes if CS is active */
364                         status = -EINVAL;
365
366                         if (cs_change)
367                                 status = mpc8xxx_spi_setup_transfer(spi, t);
368                         if (status < 0)
369                                 break;
370                 }
371
372                 if (cs_change) {
373                         mpc8xxx_spi_chipselect(spi, BITBANG_CS_ACTIVE);
374                         ndelay(nsecs);
375                 }
376                 cs_change = t->cs_change;
377                 if (t->len)
378                         status = mpc8xxx_spi_bufs(spi, t);
379                 if (status) {
380                         status = -EMSGSIZE;
381                         break;
382                 }
383                 m->actual_length += t->len;
384
385                 if (t->delay_usecs)
386                         udelay(t->delay_usecs);
387
388                 if (cs_change) {
389                         ndelay(nsecs);
390                         mpc8xxx_spi_chipselect(spi, BITBANG_CS_INACTIVE);
391                         ndelay(nsecs);
392                 }
393         }
394
395         m->status = status;
396         m->complete(m->context);
397
398         if (status || !cs_change) {
399                 ndelay(nsecs);
400                 mpc8xxx_spi_chipselect(spi, BITBANG_CS_INACTIVE);
401         }
402
403         mpc8xxx_spi_setup_transfer(spi, NULL);
404 }
405
406 static void mpc8xxx_spi_work(struct work_struct *work)
407 {
408         struct mpc8xxx_spi *mpc8xxx_spi = container_of(work, struct mpc8xxx_spi,
409                                                        work);
410
411         spin_lock_irq(&mpc8xxx_spi->lock);
412         while (!list_empty(&mpc8xxx_spi->queue)) {
413                 struct spi_message *m = container_of(mpc8xxx_spi->queue.next,
414                                                    struct spi_message, queue);
415
416                 list_del_init(&m->queue);
417                 spin_unlock_irq(&mpc8xxx_spi->lock);
418
419                 mpc8xxx_spi_do_one_msg(m);
420
421                 spin_lock_irq(&mpc8xxx_spi->lock);
422         }
423         spin_unlock_irq(&mpc8xxx_spi->lock);
424 }
425
426 static int mpc8xxx_spi_setup(struct spi_device *spi)
427 {
428         struct mpc8xxx_spi *mpc8xxx_spi;
429         int retval;
430         u32 hw_mode;
431         struct spi_mpc8xxx_cs   *cs = spi->controller_state;
432
433         if (!spi->max_speed_hz)
434                 return -EINVAL;
435
436         if (!cs) {
437                 cs = kzalloc(sizeof *cs, GFP_KERNEL);
438                 if (!cs)
439                         return -ENOMEM;
440                 spi->controller_state = cs;
441         }
442         mpc8xxx_spi = spi_master_get_devdata(spi->master);
443
444         hw_mode = cs->hw_mode; /* Save orginal settings */
445         cs->hw_mode = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->mode);
446         /* mask out bits we are going to set */
447         cs->hw_mode &= ~(SPMODE_CP_BEGIN_EDGECLK | SPMODE_CI_INACTIVEHIGH
448                          | SPMODE_REV | SPMODE_LOOP);
449
450         if (spi->mode & SPI_CPHA)
451                 cs->hw_mode |= SPMODE_CP_BEGIN_EDGECLK;
452         if (spi->mode & SPI_CPOL)
453                 cs->hw_mode |= SPMODE_CI_INACTIVEHIGH;
454         if (!(spi->mode & SPI_LSB_FIRST))
455                 cs->hw_mode |= SPMODE_REV;
456         if (spi->mode & SPI_LOOP)
457                 cs->hw_mode |= SPMODE_LOOP;
458
459         retval = mpc8xxx_spi_setup_transfer(spi, NULL);
460         if (retval < 0) {
461                 cs->hw_mode = hw_mode; /* Restore settings */
462                 return retval;
463         }
464         return 0;
465 }
466
467 static irqreturn_t mpc8xxx_spi_irq(s32 irq, void *context_data)
468 {
469         struct mpc8xxx_spi *mpc8xxx_spi = context_data;
470         u32 event;
471         irqreturn_t ret = IRQ_NONE;
472
473         /* Get interrupt events(tx/rx) */
474         event = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->event);
475
476         /* We need handle RX first */
477         if (event & SPIE_NE) {
478                 u32 rx_data = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->receive);
479
480                 if (mpc8xxx_spi->rx)
481                         mpc8xxx_spi->get_rx(rx_data, mpc8xxx_spi);
482
483                 ret = IRQ_HANDLED;
484         }
485
486         if ((event & SPIE_NF) == 0)
487                 /* spin until TX is done */
488                 while (((event =
489                          mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->event)) &
490                                                 SPIE_NF) == 0)
491                         cpu_relax();
492
493         mpc8xxx_spi->count -= 1;
494         if (mpc8xxx_spi->count) {
495                 u32 word = mpc8xxx_spi->get_tx(mpc8xxx_spi);
496                 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->transmit, word);
497         } else {
498                 complete(&mpc8xxx_spi->done);
499         }
500
501         /* Clear the events */
502         mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->event, event);
503
504         return ret;
505 }
506 static int mpc8xxx_spi_transfer(struct spi_device *spi,
507                                 struct spi_message *m)
508 {
509         struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
510         unsigned long flags;
511
512         m->actual_length = 0;
513         m->status = -EINPROGRESS;
514
515         spin_lock_irqsave(&mpc8xxx_spi->lock, flags);
516         list_add_tail(&m->queue, &mpc8xxx_spi->queue);
517         queue_work(mpc8xxx_spi->workqueue, &mpc8xxx_spi->work);
518         spin_unlock_irqrestore(&mpc8xxx_spi->lock, flags);
519
520         return 0;
521 }
522
523
524 static void mpc8xxx_spi_cleanup(struct spi_device *spi)
525 {
526         kfree(spi->controller_state);
527 }
528
529 static struct spi_master * __devinit
530 mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
531 {
532         struct fsl_spi_platform_data *pdata = dev->platform_data;
533         struct spi_master *master;
534         struct mpc8xxx_spi *mpc8xxx_spi;
535         u32 regval;
536         int ret = 0;
537
538         master = spi_alloc_master(dev, sizeof(struct mpc8xxx_spi));
539         if (master == NULL) {
540                 ret = -ENOMEM;
541                 goto err;
542         }
543
544         dev_set_drvdata(dev, master);
545
546         /* the spi->mode bits understood by this driver: */
547         master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH
548                         | SPI_LSB_FIRST | SPI_LOOP;
549
550         master->setup = mpc8xxx_spi_setup;
551         master->transfer = mpc8xxx_spi_transfer;
552         master->cleanup = mpc8xxx_spi_cleanup;
553
554         mpc8xxx_spi = spi_master_get_devdata(master);
555         mpc8xxx_spi->qe_mode = pdata->qe_mode;
556         mpc8xxx_spi->get_rx = mpc8xxx_spi_rx_buf_u8;
557         mpc8xxx_spi->get_tx = mpc8xxx_spi_tx_buf_u8;
558         mpc8xxx_spi->spibrg = pdata->sysclk;
559
560         mpc8xxx_spi->rx_shift = 0;
561         mpc8xxx_spi->tx_shift = 0;
562         if (mpc8xxx_spi->qe_mode) {
563                 mpc8xxx_spi->rx_shift = 16;
564                 mpc8xxx_spi->tx_shift = 24;
565         }
566
567         init_completion(&mpc8xxx_spi->done);
568
569         mpc8xxx_spi->base = ioremap(mem->start, mem->end - mem->start + 1);
570         if (mpc8xxx_spi->base == NULL) {
571                 ret = -ENOMEM;
572                 goto put_master;
573         }
574
575         mpc8xxx_spi->irq = irq;
576
577         /* Register for SPI Interrupt */
578         ret = request_irq(mpc8xxx_spi->irq, mpc8xxx_spi_irq,
579                           0, "mpc8xxx_spi", mpc8xxx_spi);
580
581         if (ret != 0)
582                 goto unmap_io;
583
584         master->bus_num = pdata->bus_num;
585         master->num_chipselect = pdata->max_chipselect;
586
587         /* SPI controller initializations */
588         mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mode, 0);
589         mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mask, 0);
590         mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->command, 0);
591         mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->event, 0xffffffff);
592
593         /* Enable SPI interface */
594         regval = pdata->initial_spmode | SPMODE_INIT_VAL | SPMODE_ENABLE;
595         if (pdata->qe_mode)
596                 regval |= SPMODE_OP;
597
598         mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mode, regval);
599         spin_lock_init(&mpc8xxx_spi->lock);
600         init_completion(&mpc8xxx_spi->done);
601         INIT_WORK(&mpc8xxx_spi->work, mpc8xxx_spi_work);
602         INIT_LIST_HEAD(&mpc8xxx_spi->queue);
603
604         mpc8xxx_spi->workqueue = create_singlethread_workqueue(
605                 dev_name(master->dev.parent));
606         if (mpc8xxx_spi->workqueue == NULL) {
607                 ret = -EBUSY;
608                 goto free_irq;
609         }
610
611         ret = spi_register_master(master);
612         if (ret < 0)
613                 goto unreg_master;
614
615         printk(KERN_INFO
616                "%s: MPC8xxx SPI Controller driver at 0x%p (irq = %d)\n",
617                dev_name(dev), mpc8xxx_spi->base, mpc8xxx_spi->irq);
618
619         return master;
620
621 unreg_master:
622         destroy_workqueue(mpc8xxx_spi->workqueue);
623 free_irq:
624         free_irq(mpc8xxx_spi->irq, mpc8xxx_spi);
625 unmap_io:
626         iounmap(mpc8xxx_spi->base);
627 put_master:
628         spi_master_put(master);
629 err:
630         return ERR_PTR(ret);
631 }
632
633 static int __devexit mpc8xxx_spi_remove(struct device *dev)
634 {
635         struct mpc8xxx_spi *mpc8xxx_spi;
636         struct spi_master *master;
637
638         master = dev_get_drvdata(dev);
639         mpc8xxx_spi = spi_master_get_devdata(master);
640
641         flush_workqueue(mpc8xxx_spi->workqueue);
642         destroy_workqueue(mpc8xxx_spi->workqueue);
643         spi_unregister_master(master);
644
645         free_irq(mpc8xxx_spi->irq, mpc8xxx_spi);
646         iounmap(mpc8xxx_spi->base);
647
648         return 0;
649 }
650
651 struct mpc8xxx_spi_probe_info {
652         struct fsl_spi_platform_data pdata;
653         int *gpios;
654         bool *alow_flags;
655 };
656
657 static struct mpc8xxx_spi_probe_info *
658 to_of_pinfo(struct fsl_spi_platform_data *pdata)
659 {
660         return container_of(pdata, struct mpc8xxx_spi_probe_info, pdata);
661 }
662
663 static void mpc8xxx_spi_cs_control(struct spi_device *spi, bool on)
664 {
665         struct device *dev = spi->dev.parent;
666         struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(dev->platform_data);
667         u16 cs = spi->chip_select;
668         int gpio = pinfo->gpios[cs];
669         bool alow = pinfo->alow_flags[cs];
670
671         gpio_set_value(gpio, on ^ alow);
672 }
673
674 static int of_mpc8xxx_spi_get_chipselects(struct device *dev)
675 {
676         struct device_node *np = dev_archdata_get_node(&dev->archdata);
677         struct fsl_spi_platform_data *pdata = dev->platform_data;
678         struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(pdata);
679         unsigned int ngpios;
680         int i = 0;
681         int ret;
682
683         ngpios = of_gpio_count(np);
684         if (!ngpios) {
685                 /*
686                  * SPI w/o chip-select line. One SPI device is still permitted
687                  * though.
688                  */
689                 pdata->max_chipselect = 1;
690                 return 0;
691         }
692
693         pinfo->gpios = kmalloc(ngpios * sizeof(*pinfo->gpios), GFP_KERNEL);
694         if (!pinfo->gpios)
695                 return -ENOMEM;
696         memset(pinfo->gpios, -1, ngpios * sizeof(*pinfo->gpios));
697
698         pinfo->alow_flags = kzalloc(ngpios * sizeof(*pinfo->alow_flags),
699                                     GFP_KERNEL);
700         if (!pinfo->alow_flags) {
701                 ret = -ENOMEM;
702                 goto err_alloc_flags;
703         }
704
705         for (; i < ngpios; i++) {
706                 int gpio;
707                 enum of_gpio_flags flags;
708
709                 gpio = of_get_gpio_flags(np, i, &flags);
710                 if (!gpio_is_valid(gpio)) {
711                         dev_err(dev, "invalid gpio #%d: %d\n", i, gpio);
712                         ret = gpio;
713                         goto err_loop;
714                 }
715
716                 ret = gpio_request(gpio, dev_name(dev));
717                 if (ret) {
718                         dev_err(dev, "can't request gpio #%d: %d\n", i, ret);
719                         goto err_loop;
720                 }
721
722                 pinfo->gpios[i] = gpio;
723                 pinfo->alow_flags[i] = flags & OF_GPIO_ACTIVE_LOW;
724
725                 ret = gpio_direction_output(pinfo->gpios[i],
726                                             pinfo->alow_flags[i]);
727                 if (ret) {
728                         dev_err(dev, "can't set output direction for gpio "
729                                 "#%d: %d\n", i, ret);
730                         goto err_loop;
731                 }
732         }
733
734         pdata->max_chipselect = ngpios;
735         pdata->cs_control = mpc8xxx_spi_cs_control;
736
737         return 0;
738
739 err_loop:
740         while (i >= 0) {
741                 if (gpio_is_valid(pinfo->gpios[i]))
742                         gpio_free(pinfo->gpios[i]);
743                 i--;
744         }
745
746         kfree(pinfo->alow_flags);
747         pinfo->alow_flags = NULL;
748 err_alloc_flags:
749         kfree(pinfo->gpios);
750         pinfo->gpios = NULL;
751         return ret;
752 }
753
754 static int of_mpc8xxx_spi_free_chipselects(struct device *dev)
755 {
756         struct fsl_spi_platform_data *pdata = dev->platform_data;
757         struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(pdata);
758         int i;
759
760         if (!pinfo->gpios)
761                 return 0;
762
763         for (i = 0; i < pdata->max_chipselect; i++) {
764                 if (gpio_is_valid(pinfo->gpios[i]))
765                         gpio_free(pinfo->gpios[i]);
766         }
767
768         kfree(pinfo->gpios);
769         kfree(pinfo->alow_flags);
770         return 0;
771 }
772
773 static int __devinit of_mpc8xxx_spi_probe(struct of_device *ofdev,
774                                           const struct of_device_id *ofid)
775 {
776         struct device *dev = &ofdev->dev;
777         struct device_node *np = ofdev->node;
778         struct mpc8xxx_spi_probe_info *pinfo;
779         struct fsl_spi_platform_data *pdata;
780         struct spi_master *master;
781         struct resource mem;
782         struct resource irq;
783         const void *prop;
784         int ret = -ENOMEM;
785
786         pinfo = kzalloc(sizeof(*pinfo), GFP_KERNEL);
787         if (!pinfo)
788                 return -ENOMEM;
789
790         pdata = &pinfo->pdata;
791         dev->platform_data = pdata;
792
793         /* Allocate bus num dynamically. */
794         pdata->bus_num = -1;
795
796         /* SPI controller is either clocked from QE or SoC clock. */
797         pdata->sysclk = get_brgfreq();
798         if (pdata->sysclk == -1) {
799                 pdata->sysclk = fsl_get_sys_freq();
800                 if (pdata->sysclk == -1) {
801                         ret = -ENODEV;
802                         goto err_clk;
803                 }
804         }
805
806         prop = of_get_property(np, "mode", NULL);
807         if (prop && !strcmp(prop, "cpu-qe"))
808                 pdata->qe_mode = 1;
809
810         ret = of_mpc8xxx_spi_get_chipselects(dev);
811         if (ret)
812                 goto err;
813
814         ret = of_address_to_resource(np, 0, &mem);
815         if (ret)
816                 goto err;
817
818         ret = of_irq_to_resource(np, 0, &irq);
819         if (!ret) {
820                 ret = -EINVAL;
821                 goto err;
822         }
823
824         master = mpc8xxx_spi_probe(dev, &mem, irq.start);
825         if (IS_ERR(master)) {
826                 ret = PTR_ERR(master);
827                 goto err;
828         }
829
830         of_register_spi_devices(master, np);
831
832         return 0;
833
834 err:
835         of_mpc8xxx_spi_free_chipselects(dev);
836 err_clk:
837         kfree(pinfo);
838         return ret;
839 }
840
841 static int __devexit of_mpc8xxx_spi_remove(struct of_device *ofdev)
842 {
843         int ret;
844
845         ret = mpc8xxx_spi_remove(&ofdev->dev);
846         if (ret)
847                 return ret;
848         of_mpc8xxx_spi_free_chipselects(&ofdev->dev);
849         return 0;
850 }
851
852 static const struct of_device_id of_mpc8xxx_spi_match[] = {
853         { .compatible = "fsl,spi" },
854         {},
855 };
856 MODULE_DEVICE_TABLE(of, of_mpc8xxx_spi_match);
857
858 static struct of_platform_driver of_mpc8xxx_spi_driver = {
859         .name           = "mpc8xxx_spi",
860         .match_table    = of_mpc8xxx_spi_match,
861         .probe          = of_mpc8xxx_spi_probe,
862         .remove         = __devexit_p(of_mpc8xxx_spi_remove),
863 };
864
865 #ifdef CONFIG_MPC832x_RDB
866 /*
867  *                              XXX XXX XXX
868  * This is "legacy" platform driver, was used by the MPC8323E-RDB boards
869  * only. The driver should go away soon, since newer MPC8323E-RDB's device
870  * tree can work with OpenFirmware driver. But for now we support old trees
871  * as well.
872  */
873 static int __devinit plat_mpc8xxx_spi_probe(struct platform_device *pdev)
874 {
875         struct resource *mem;
876         unsigned int irq;
877         struct spi_master *master;
878
879         if (!pdev->dev.platform_data)
880                 return -EINVAL;
881
882         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
883         if (!mem)
884                 return -EINVAL;
885
886         irq = platform_get_irq(pdev, 0);
887         if (!irq)
888                 return -EINVAL;
889
890         master = mpc8xxx_spi_probe(&pdev->dev, mem, irq);
891         if (IS_ERR(master))
892                 return PTR_ERR(master);
893         return 0;
894 }
895
896 static int __devexit plat_mpc8xxx_spi_remove(struct platform_device *pdev)
897 {
898         return mpc8xxx_spi_remove(&pdev->dev);
899 }
900
901 MODULE_ALIAS("platform:mpc8xxx_spi");
902 static struct platform_driver mpc8xxx_spi_driver = {
903         .probe = plat_mpc8xxx_spi_probe,
904         .remove = __exit_p(plat_mpc8xxx_spi_remove),
905         .driver = {
906                 .name = "mpc8xxx_spi",
907                 .owner = THIS_MODULE,
908         },
909 };
910
911 static bool legacy_driver_failed;
912
913 static void __init legacy_driver_register(void)
914 {
915         legacy_driver_failed = platform_driver_register(&mpc8xxx_spi_driver);
916 }
917
918 static void __exit legacy_driver_unregister(void)
919 {
920         if (legacy_driver_failed)
921                 return;
922         platform_driver_unregister(&mpc8xxx_spi_driver);
923 }
924 #else
925 static void __init legacy_driver_register(void) {}
926 static void __exit legacy_driver_unregister(void) {}
927 #endif /* CONFIG_MPC832x_RDB */
928
929 static int __init mpc8xxx_spi_init(void)
930 {
931         legacy_driver_register();
932         return of_register_platform_driver(&of_mpc8xxx_spi_driver);
933 }
934
935 static void __exit mpc8xxx_spi_exit(void)
936 {
937         of_unregister_platform_driver(&of_mpc8xxx_spi_driver);
938         legacy_driver_unregister();
939 }
940
941 module_init(mpc8xxx_spi_init);
942 module_exit(mpc8xxx_spi_exit);
943
944 MODULE_AUTHOR("Kumar Gala");
945 MODULE_DESCRIPTION("Simple MPC8xxx SPI Driver");
946 MODULE_LICENSE("GPL");