Merge branch 'core-rcu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6.git] / drivers / spi / spi-bitbang.c
1 /*
2  * polling/bitbanging SPI master controller driver utilities
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
17  */
18
19 #include <linux/init.h>
20 #include <linux/spinlock.h>
21 #include <linux/workqueue.h>
22 #include <linux/interrupt.h>
23 #include <linux/delay.h>
24 #include <linux/errno.h>
25 #include <linux/platform_device.h>
26 #include <linux/slab.h>
27
28 #include <linux/spi/spi.h>
29 #include <linux/spi/spi_bitbang.h>
30
31
32 /*----------------------------------------------------------------------*/
33
34 /*
35  * FIRST PART (OPTIONAL):  word-at-a-time spi_transfer support.
36  * Use this for GPIO or shift-register level hardware APIs.
37  *
38  * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
39  * to glue code.  These bitbang setup() and cleanup() routines are always
40  * used, though maybe they're called from controller-aware code.
41  *
42  * chipselect() and friends may use use spi_device->controller_data and
43  * controller registers as appropriate.
44  *
45  *
46  * NOTE:  SPI controller pins can often be used as GPIO pins instead,
47  * which means you could use a bitbang driver either to get hardware
48  * working quickly, or testing for differences that aren't speed related.
49  */
50
51 struct spi_bitbang_cs {
52         unsigned        nsecs;  /* (clock cycle time)/2 */
53         u32             (*txrx_word)(struct spi_device *spi, unsigned nsecs,
54                                         u32 word, u8 bits);
55         unsigned        (*txrx_bufs)(struct spi_device *,
56                                         u32 (*txrx_word)(
57                                                 struct spi_device *spi,
58                                                 unsigned nsecs,
59                                                 u32 word, u8 bits),
60                                         unsigned, struct spi_transfer *);
61 };
62
63 static unsigned bitbang_txrx_8(
64         struct spi_device       *spi,
65         u32                     (*txrx_word)(struct spi_device *spi,
66                                         unsigned nsecs,
67                                         u32 word, u8 bits),
68         unsigned                ns,
69         struct spi_transfer     *t
70 ) {
71         unsigned                bits = t->bits_per_word ? : spi->bits_per_word;
72         unsigned                count = t->len;
73         const u8                *tx = t->tx_buf;
74         u8                      *rx = t->rx_buf;
75
76         while (likely(count > 0)) {
77                 u8              word = 0;
78
79                 if (tx)
80                         word = *tx++;
81                 word = txrx_word(spi, ns, word, bits);
82                 if (rx)
83                         *rx++ = word;
84                 count -= 1;
85         }
86         return t->len - count;
87 }
88
89 static unsigned bitbang_txrx_16(
90         struct spi_device       *spi,
91         u32                     (*txrx_word)(struct spi_device *spi,
92                                         unsigned nsecs,
93                                         u32 word, u8 bits),
94         unsigned                ns,
95         struct spi_transfer     *t
96 ) {
97         unsigned                bits = t->bits_per_word ? : spi->bits_per_word;
98         unsigned                count = t->len;
99         const u16               *tx = t->tx_buf;
100         u16                     *rx = t->rx_buf;
101
102         while (likely(count > 1)) {
103                 u16             word = 0;
104
105                 if (tx)
106                         word = *tx++;
107                 word = txrx_word(spi, ns, word, bits);
108                 if (rx)
109                         *rx++ = word;
110                 count -= 2;
111         }
112         return t->len - count;
113 }
114
115 static unsigned bitbang_txrx_32(
116         struct spi_device       *spi,
117         u32                     (*txrx_word)(struct spi_device *spi,
118                                         unsigned nsecs,
119                                         u32 word, u8 bits),
120         unsigned                ns,
121         struct spi_transfer     *t
122 ) {
123         unsigned                bits = t->bits_per_word ? : spi->bits_per_word;
124         unsigned                count = t->len;
125         const u32               *tx = t->tx_buf;
126         u32                     *rx = t->rx_buf;
127
128         while (likely(count > 3)) {
129                 u32             word = 0;
130
131                 if (tx)
132                         word = *tx++;
133                 word = txrx_word(spi, ns, word, bits);
134                 if (rx)
135                         *rx++ = word;
136                 count -= 4;
137         }
138         return t->len - count;
139 }
140
141 int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
142 {
143         struct spi_bitbang_cs   *cs = spi->controller_state;
144         u8                      bits_per_word;
145         u32                     hz;
146
147         if (t) {
148                 bits_per_word = t->bits_per_word;
149                 hz = t->speed_hz;
150         } else {
151                 bits_per_word = 0;
152                 hz = 0;
153         }
154
155         /* spi_transfer level calls that work per-word */
156         if (!bits_per_word)
157                 bits_per_word = spi->bits_per_word;
158         if (bits_per_word <= 8)
159                 cs->txrx_bufs = bitbang_txrx_8;
160         else if (bits_per_word <= 16)
161                 cs->txrx_bufs = bitbang_txrx_16;
162         else if (bits_per_word <= 32)
163                 cs->txrx_bufs = bitbang_txrx_32;
164         else
165                 return -EINVAL;
166
167         /* nsecs = (clock period)/2 */
168         if (!hz)
169                 hz = spi->max_speed_hz;
170         if (hz) {
171                 cs->nsecs = (1000000000/2) / hz;
172                 if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000))
173                         return -EINVAL;
174         }
175
176         return 0;
177 }
178 EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
179
180 /**
181  * spi_bitbang_setup - default setup for per-word I/O loops
182  */
183 int spi_bitbang_setup(struct spi_device *spi)
184 {
185         struct spi_bitbang_cs   *cs = spi->controller_state;
186         struct spi_bitbang      *bitbang;
187         int                     retval;
188         unsigned long           flags;
189
190         bitbang = spi_master_get_devdata(spi->master);
191
192         if (!cs) {
193                 cs = kzalloc(sizeof *cs, GFP_KERNEL);
194                 if (!cs)
195                         return -ENOMEM;
196                 spi->controller_state = cs;
197         }
198
199         /* per-word shift register access, in hardware or bitbanging */
200         cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
201         if (!cs->txrx_word)
202                 return -EINVAL;
203
204         retval = bitbang->setup_transfer(spi, NULL);
205         if (retval < 0)
206                 return retval;
207
208         dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs);
209
210         /* NOTE we _need_ to call chipselect() early, ideally with adapter
211          * setup, unless the hardware defaults cooperate to avoid confusion
212          * between normal (active low) and inverted chipselects.
213          */
214
215         /* deselect chip (low or high) */
216         spin_lock_irqsave(&bitbang->lock, flags);
217         if (!bitbang->busy) {
218                 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
219                 ndelay(cs->nsecs);
220         }
221         spin_unlock_irqrestore(&bitbang->lock, flags);
222
223         return 0;
224 }
225 EXPORT_SYMBOL_GPL(spi_bitbang_setup);
226
227 /**
228  * spi_bitbang_cleanup - default cleanup for per-word I/O loops
229  */
230 void spi_bitbang_cleanup(struct spi_device *spi)
231 {
232         kfree(spi->controller_state);
233 }
234 EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
235
236 static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
237 {
238         struct spi_bitbang_cs   *cs = spi->controller_state;
239         unsigned                nsecs = cs->nsecs;
240
241         return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t);
242 }
243
244 /*----------------------------------------------------------------------*/
245
246 /*
247  * SECOND PART ... simple transfer queue runner.
248  *
249  * This costs a task context per controller, running the queue by
250  * performing each transfer in sequence.  Smarter hardware can queue
251  * several DMA transfers at once, and process several controller queues
252  * in parallel; this driver doesn't match such hardware very well.
253  *
254  * Drivers can provide word-at-a-time i/o primitives, or provide
255  * transfer-at-a-time ones to leverage dma or fifo hardware.
256  */
257 static void bitbang_work(struct work_struct *work)
258 {
259         struct spi_bitbang      *bitbang =
260                 container_of(work, struct spi_bitbang, work);
261         unsigned long           flags;
262
263         spin_lock_irqsave(&bitbang->lock, flags);
264         bitbang->busy = 1;
265         while (!list_empty(&bitbang->queue)) {
266                 struct spi_message      *m;
267                 struct spi_device       *spi;
268                 unsigned                nsecs;
269                 struct spi_transfer     *t = NULL;
270                 unsigned                tmp;
271                 unsigned                cs_change;
272                 int                     status;
273                 int                     do_setup = -1;
274
275                 m = container_of(bitbang->queue.next, struct spi_message,
276                                 queue);
277                 list_del_init(&m->queue);
278                 spin_unlock_irqrestore(&bitbang->lock, flags);
279
280                 /* FIXME this is made-up ... the correct value is known to
281                  * word-at-a-time bitbang code, and presumably chipselect()
282                  * should enforce these requirements too?
283                  */
284                 nsecs = 100;
285
286                 spi = m->spi;
287                 tmp = 0;
288                 cs_change = 1;
289                 status = 0;
290
291                 list_for_each_entry (t, &m->transfers, transfer_list) {
292
293                         /* override speed or wordsize? */
294                         if (t->speed_hz || t->bits_per_word)
295                                 do_setup = 1;
296
297                         /* init (-1) or override (1) transfer params */
298                         if (do_setup != 0) {
299                                 status = bitbang->setup_transfer(spi, t);
300                                 if (status < 0)
301                                         break;
302                                 if (do_setup == -1)
303                                         do_setup = 0;
304                         }
305
306                         /* set up default clock polarity, and activate chip;
307                          * this implicitly updates clock and spi modes as
308                          * previously recorded for this device via setup().
309                          * (and also deselects any other chip that might be
310                          * selected ...)
311                          */
312                         if (cs_change) {
313                                 bitbang->chipselect(spi, BITBANG_CS_ACTIVE);
314                                 ndelay(nsecs);
315                         }
316                         cs_change = t->cs_change;
317                         if (!t->tx_buf && !t->rx_buf && t->len) {
318                                 status = -EINVAL;
319                                 break;
320                         }
321
322                         /* transfer data.  the lower level code handles any
323                          * new dma mappings it needs. our caller always gave
324                          * us dma-safe buffers.
325                          */
326                         if (t->len) {
327                                 /* REVISIT dma API still needs a designated
328                                  * DMA_ADDR_INVALID; ~0 might be better.
329                                  */
330                                 if (!m->is_dma_mapped)
331                                         t->rx_dma = t->tx_dma = 0;
332                                 status = bitbang->txrx_bufs(spi, t);
333                         }
334                         if (status > 0)
335                                 m->actual_length += status;
336                         if (status != t->len) {
337                                 /* always report some kind of error */
338                                 if (status >= 0)
339                                         status = -EREMOTEIO;
340                                 break;
341                         }
342                         status = 0;
343
344                         /* protocol tweaks before next transfer */
345                         if (t->delay_usecs)
346                                 udelay(t->delay_usecs);
347
348                         if (!cs_change)
349                                 continue;
350                         if (t->transfer_list.next == &m->transfers)
351                                 break;
352
353                         /* sometimes a short mid-message deselect of the chip
354                          * may be needed to terminate a mode or command
355                          */
356                         ndelay(nsecs);
357                         bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
358                         ndelay(nsecs);
359                 }
360
361                 m->status = status;
362                 m->complete(m->context);
363
364                 /* normally deactivate chipselect ... unless no error and
365                  * cs_change has hinted that the next message will probably
366                  * be for this chip too.
367                  */
368                 if (!(status == 0 && cs_change)) {
369                         ndelay(nsecs);
370                         bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
371                         ndelay(nsecs);
372                 }
373
374                 spin_lock_irqsave(&bitbang->lock, flags);
375         }
376         bitbang->busy = 0;
377         spin_unlock_irqrestore(&bitbang->lock, flags);
378 }
379
380 /**
381  * spi_bitbang_transfer - default submit to transfer queue
382  */
383 int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m)
384 {
385         struct spi_bitbang      *bitbang;
386         unsigned long           flags;
387         int                     status = 0;
388
389         m->actual_length = 0;
390         m->status = -EINPROGRESS;
391
392         bitbang = spi_master_get_devdata(spi->master);
393
394         spin_lock_irqsave(&bitbang->lock, flags);
395         if (!spi->max_speed_hz)
396                 status = -ENETDOWN;
397         else {
398                 list_add_tail(&m->queue, &bitbang->queue);
399                 queue_work(bitbang->workqueue, &bitbang->work);
400         }
401         spin_unlock_irqrestore(&bitbang->lock, flags);
402
403         return status;
404 }
405 EXPORT_SYMBOL_GPL(spi_bitbang_transfer);
406
407 /*----------------------------------------------------------------------*/
408
409 /**
410  * spi_bitbang_start - start up a polled/bitbanging SPI master driver
411  * @bitbang: driver handle
412  *
413  * Caller should have zero-initialized all parts of the structure, and then
414  * provided callbacks for chip selection and I/O loops.  If the master has
415  * a transfer method, its final step should call spi_bitbang_transfer; or,
416  * that's the default if the transfer routine is not initialized.  It should
417  * also set up the bus number and number of chipselects.
418  *
419  * For i/o loops, provide callbacks either per-word (for bitbanging, or for
420  * hardware that basically exposes a shift register) or per-spi_transfer
421  * (which takes better advantage of hardware like fifos or DMA engines).
422  *
423  * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
424  * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi
425  * master methods.  Those methods are the defaults if the bitbang->txrx_bufs
426  * routine isn't initialized.
427  *
428  * This routine registers the spi_master, which will process requests in a
429  * dedicated task, keeping IRQs unblocked most of the time.  To stop
430  * processing those requests, call spi_bitbang_stop().
431  */
432 int spi_bitbang_start(struct spi_bitbang *bitbang)
433 {
434         int     status;
435
436         if (!bitbang->master || !bitbang->chipselect)
437                 return -EINVAL;
438
439         INIT_WORK(&bitbang->work, bitbang_work);
440         spin_lock_init(&bitbang->lock);
441         INIT_LIST_HEAD(&bitbang->queue);
442
443         if (!bitbang->master->mode_bits)
444                 bitbang->master->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags;
445
446         if (!bitbang->master->transfer)
447                 bitbang->master->transfer = spi_bitbang_transfer;
448         if (!bitbang->txrx_bufs) {
449                 bitbang->use_dma = 0;
450                 bitbang->txrx_bufs = spi_bitbang_bufs;
451                 if (!bitbang->master->setup) {
452                         if (!bitbang->setup_transfer)
453                                 bitbang->setup_transfer =
454                                          spi_bitbang_setup_transfer;
455                         bitbang->master->setup = spi_bitbang_setup;
456                         bitbang->master->cleanup = spi_bitbang_cleanup;
457                 }
458         } else if (!bitbang->master->setup)
459                 return -EINVAL;
460         if (bitbang->master->transfer == spi_bitbang_transfer &&
461                         !bitbang->setup_transfer)
462                 return -EINVAL;
463
464         /* this task is the only thing to touch the SPI bits */
465         bitbang->busy = 0;
466         bitbang->workqueue = create_singlethread_workqueue(
467                         dev_name(bitbang->master->dev.parent));
468         if (bitbang->workqueue == NULL) {
469                 status = -EBUSY;
470                 goto err1;
471         }
472
473         /* driver may get busy before register() returns, especially
474          * if someone registered boardinfo for devices
475          */
476         status = spi_register_master(bitbang->master);
477         if (status < 0)
478                 goto err2;
479
480         return status;
481
482 err2:
483         destroy_workqueue(bitbang->workqueue);
484 err1:
485         return status;
486 }
487 EXPORT_SYMBOL_GPL(spi_bitbang_start);
488
489 /**
490  * spi_bitbang_stop - stops the task providing spi communication
491  */
492 int spi_bitbang_stop(struct spi_bitbang *bitbang)
493 {
494         spi_unregister_master(bitbang->master);
495
496         WARN_ON(!list_empty(&bitbang->queue));
497
498         destroy_workqueue(bitbang->workqueue);
499
500         return 0;
501 }
502 EXPORT_SYMBOL_GPL(spi_bitbang_stop);
503
504 MODULE_LICENSE("GPL");
505