Driver core: Remove unneeded get_{device,driver}() calls.
[linux-2.6.git] / drivers / serial / 68360serial.c
1 /*
2  *  UART driver for 68360 CPM SCC or SMC
3  *  Copyright (c) 2000 D. Jeff Dionne <jeff@uclinux.org>,
4  *  Copyright (c) 2000 Michael Leslie <mleslie@lineo.ca>
5  *  Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
6  *
7  * I used the serial.c driver as the framework for this driver.
8  * Give credit to those guys.
9  * The original code was written for the MBX860 board.  I tried to make
10  * it generic, but there may be some assumptions in the structures that
11  * have to be fixed later.
12  * To save porting time, I did not bother to change any object names
13  * that are not accessed outside of this file.
14  * It still needs lots of work........When it was easy, I included code
15  * to support the SCCs, but this has never been tested, nor is it complete.
16  * Only the SCCs support modem control, so that is not complete either.
17  *
18  * This module exports the following rs232 io functions:
19  *
20  *      int rs_360_init(void);
21  */
22
23 #include <linux/module.h>
24 #include <linux/errno.h>
25 #include <linux/signal.h>
26 #include <linux/sched.h>
27 #include <linux/timer.h>
28 #include <linux/interrupt.h>
29 #include <linux/tty.h>
30 #include <linux/tty_flip.h>
31 #include <linux/serial.h>
32 #include <linux/serialP.h> 
33 #include <linux/major.h>
34 #include <linux/string.h>
35 #include <linux/fcntl.h>
36 #include <linux/ptrace.h>
37 #include <linux/mm.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
40 #include <asm/irq.h>
41 #include <asm/m68360.h>
42 #include <asm/commproc.h>
43
44  
45 #ifdef CONFIG_KGDB
46 extern void breakpoint(void);
47 extern void set_debug_traps(void);
48 extern int  kgdb_output_string (const char* s, unsigned int count);
49 #endif
50
51
52 /* #ifdef CONFIG_SERIAL_CONSOLE */ /* This seems to be a post 2.0 thing - mles */
53 #include <linux/console.h>
54
55 /* this defines the index into rs_table for the port to use
56  */
57 #ifndef CONFIG_SERIAL_CONSOLE_PORT
58 #define CONFIG_SERIAL_CONSOLE_PORT      1 /* ie SMC2 - note USE_SMC2 must be defined */
59 #endif
60 /* #endif */
61
62 #if 0
63 /* SCC2 for console
64  */
65 #undef CONFIG_SERIAL_CONSOLE_PORT
66 #define CONFIG_SERIAL_CONSOLE_PORT      2
67 #endif
68
69
70 #define TX_WAKEUP       ASYNC_SHARE_IRQ
71
72 static char *serial_name = "CPM UART driver";
73 static char *serial_version = "0.03";
74
75 static struct tty_driver *serial_driver;
76 int serial_console_setup(struct console *co, char *options);
77
78 /*
79  * Serial driver configuration section.  Here are the various options:
80  */
81 #define SERIAL_PARANOIA_CHECK
82 #define CONFIG_SERIAL_NOPAUSE_IO
83 #define SERIAL_DO_RESTART
84
85 /* Set of debugging defines */
86
87 #undef SERIAL_DEBUG_INTR
88 #undef SERIAL_DEBUG_OPEN
89 #undef SERIAL_DEBUG_FLOW
90 #undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
91
92 #define _INLINE_ inline
93   
94 #define DBG_CNT(s)
95
96 /* We overload some of the items in the data structure to meet our
97  * needs.  For example, the port address is the CPM parameter ram
98  * offset for the SCC or SMC.  The maximum number of ports is 4 SCCs and
99  * 2 SMCs.  The "hub6" field is used to indicate the channel number, with
100  * a flag indicating SCC or SMC, and the number is used as an index into
101  * the CPM parameter area for this device.
102  * The "type" field is currently set to 0, for PORT_UNKNOWN.  It is
103  * not currently used.  I should probably use it to indicate the port
104  * type of SMC or SCC.
105  * The SMCs do not support any modem control signals.
106  */
107 #define smc_scc_num     hub6
108 #define NUM_IS_SCC      ((int)0x00010000)
109 #define PORT_NUM(P)     ((P) & 0x0000ffff)
110
111
112 #if defined (CONFIG_UCQUICC)
113
114 volatile extern void *_periph_base;
115 /* sipex transceiver
116  *   mode bits for       are on pins
117  *
118  *    SCC2                d16..19
119  *    SCC3                d20..23
120  *    SCC4                d24..27
121  */
122 #define SIPEX_MODE(n,m) ((m & 0x0f)<<(16+4*(n-1)))
123
124 static uint sipex_mode_bits = 0x00000000;
125
126 #endif
127
128 /* There is no `serial_state' defined back here in 2.0.
129  * Try to get by with serial_struct
130  */
131 /* #define serial_state serial_struct */
132
133 /* 2.4 -> 2.0 portability problem: async_icount in 2.4 has a few
134  * extras: */
135
136 #if 0
137 struct async_icount_24 {
138         __u32   cts, dsr, rng, dcd, tx, rx;
139         __u32   frame, parity, overrun, brk;
140         __u32   buf_overrun;
141 } icount;
142 #endif
143
144 #if 0
145
146 struct serial_state {
147         int     magic;
148         int     baud_base;
149         unsigned long   port;
150         int     irq;
151         int     flags;
152         int     hub6;
153         int     type;
154         int     line;
155         int     revision;       /* Chip revision (950) */
156         int     xmit_fifo_size;
157         int     custom_divisor;
158         int     count;
159         u8      *iomem_base;
160         u16     iomem_reg_shift;
161         unsigned short  close_delay;
162         unsigned short  closing_wait; /* time to wait before closing */
163         struct async_icount_24     icount; 
164         int     io_type;
165         struct async_struct *info;
166 };
167 #endif
168
169 #define SSTATE_MAGIC 0x5302
170
171
172
173 /* SMC2 is sometimes used for low performance TDM interfaces.  Define
174  * this as 1 if you want SMC2 as a serial port UART managed by this driver.
175  * Define this as 0 if you wish to use SMC2 for something else.
176  */
177 #define USE_SMC2 1
178
179 #if 0
180 /* Define SCC to ttySx mapping. */
181 #define SCC_NUM_BASE    (USE_SMC2 + 1)  /* SCC base tty "number" */
182
183 /* Define which SCC is the first one to use for a serial port.  These
184  * are 0-based numbers, i.e. this assumes the first SCC (SCC1) is used
185  * for Ethernet, and the first available SCC for serial UART is SCC2.
186  * NOTE:  IF YOU CHANGE THIS, you have to change the PROFF_xxx and
187  * interrupt vectors in the table below to match.
188  */
189 #define SCC_IDX_BASE    1       /* table index */
190 #endif
191
192
193 /* Processors other than the 860 only get SMCs configured by default.
194  * Either they don't have SCCs or they are allocated somewhere else.
195  * Of course, there are now 860s without some SCCs, so we will need to
196  * address that someday.
197  * The Embedded Planet Multimedia I/O cards use TDM interfaces to the
198  * stereo codec parts, and we use SMC2 to help support that.
199  */
200 static struct serial_state rs_table[] = {
201 /*  type   line   PORT           IRQ       FLAGS  smc_scc_num (F.K.A. hub6) */
202         {  0,     0, PRSLOT_SMC1, CPMVEC_SMC1,   0,    0 }    /* SMC1 ttyS0 */
203 #if USE_SMC2
204         ,{ 0,     0, PRSLOT_SMC2, CPMVEC_SMC2,   0,    1 }     /* SMC2 ttyS1 */
205 #endif
206
207 #if defined(CONFIG_SERIAL_68360_SCC)
208         ,{ 0,     0, PRSLOT_SCC2, CPMVEC_SCC2,   0, (NUM_IS_SCC | 1) }    /* SCC2 ttyS2 */
209         ,{ 0,     0, PRSLOT_SCC3, CPMVEC_SCC3,   0, (NUM_IS_SCC | 2) }    /* SCC3 ttyS3 */
210         ,{ 0,     0, PRSLOT_SCC4, CPMVEC_SCC4,   0, (NUM_IS_SCC | 3) }    /* SCC4 ttyS4 */
211 #endif
212 };
213
214 #define NR_PORTS        (sizeof(rs_table)/sizeof(struct serial_state))
215
216 /* The number of buffer descriptors and their sizes.
217  */
218 #define RX_NUM_FIFO     4
219 #define RX_BUF_SIZE     32
220 #define TX_NUM_FIFO     4
221 #define TX_BUF_SIZE     32
222
223 #define CONSOLE_NUM_FIFO 2
224 #define CONSOLE_BUF_SIZE 4
225
226 char *console_fifos[CONSOLE_NUM_FIFO * CONSOLE_BUF_SIZE];
227
228 /* The async_struct in serial.h does not really give us what we
229  * need, so define our own here.
230  */
231 typedef struct serial_info {
232         int                     magic;
233         int                     flags;
234
235         struct serial_state     *state;
236         /* struct serial_struct *state; */
237         /* struct async_struct  *state; */
238         
239         struct tty_struct       *tty;
240         int                     read_status_mask;
241         int                     ignore_status_mask;
242         int                     timeout;
243         int                     line;
244         int                     x_char; /* xon/xoff character */
245         int                     close_delay;
246         unsigned short          closing_wait;
247         unsigned short          closing_wait2;
248         unsigned long           event;
249         unsigned long           last_active;
250         int                     blocked_open; /* # of blocked opens */
251         struct work_struct      tqueue;
252         struct work_struct      tqueue_hangup;
253         wait_queue_head_t       open_wait; 
254         wait_queue_head_t       close_wait; 
255
256         
257 /* CPM Buffer Descriptor pointers.
258         */
259         QUICC_BD                        *rx_bd_base;
260         QUICC_BD                        *rx_cur;
261         QUICC_BD                        *tx_bd_base;
262         QUICC_BD                        *tx_cur;
263 } ser_info_t;
264
265
266 /* since kmalloc_init() does not get called until much after this initialization: */
267 static ser_info_t  quicc_ser_info[NR_PORTS];
268 static char rx_buf_pool[NR_PORTS * RX_NUM_FIFO * RX_BUF_SIZE];
269 static char tx_buf_pool[NR_PORTS * TX_NUM_FIFO * TX_BUF_SIZE];
270
271 static void change_speed(ser_info_t *info);
272 static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout);
273
274 static inline int serial_paranoia_check(ser_info_t *info,
275                                         char *name, const char *routine)
276 {
277 #ifdef SERIAL_PARANOIA_CHECK
278         static const char *badmagic =
279                 "Warning: bad magic number for serial struct (%s) in %s\n";
280         static const char *badinfo =
281                 "Warning: null async_struct for (%s) in %s\n";
282
283         if (!info) {
284                 printk(badinfo, name, routine);
285                 return 1;
286         }
287         if (info->magic != SERIAL_MAGIC) {
288                 printk(badmagic, name, routine);
289                 return 1;
290         }
291 #endif
292         return 0;
293 }
294
295 /*
296  * This is used to figure out the divisor speeds and the timeouts,
297  * indexed by the termio value.  The generic CPM functions are responsible
298  * for setting and assigning baud rate generators for us.
299  */
300 static int baud_table[] = {
301         0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
302         9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 };
303
304 /* This sucks. There is a better way: */
305 #if defined(CONFIG_CONSOLE_9600)
306   #define CONSOLE_BAUDRATE 9600
307 #elif defined(CONFIG_CONSOLE_19200)
308   #define CONSOLE_BAUDRATE 19200
309 #elif defined(CONFIG_CONSOLE_115200)
310   #define CONSOLE_BAUDRATE 115200
311 #else
312   #warning "console baud rate undefined"
313   #define CONSOLE_BAUDRATE 9600
314 #endif
315
316 /*
317  * ------------------------------------------------------------
318  * rs_stop() and rs_start()
319  *
320  * This routines are called before setting or resetting tty->stopped.
321  * They enable or disable transmitter interrupts, as necessary.
322  * ------------------------------------------------------------
323  */
324 static void rs_360_stop(struct tty_struct *tty)
325 {
326         ser_info_t *info = (ser_info_t *)tty->driver_data;
327         int     idx;
328         unsigned long flags;
329         volatile struct scc_regs *sccp;
330         volatile struct smc_regs *smcp;
331
332         if (serial_paranoia_check(info, tty->name, "rs_stop"))
333                 return;
334         
335         local_irq_save(flags);
336         idx = PORT_NUM(info->state->smc_scc_num);
337         if (info->state->smc_scc_num & NUM_IS_SCC) {
338                 sccp = &pquicc->scc_regs[idx];
339                 sccp->scc_sccm &= ~UART_SCCM_TX;
340         } else {
341                 /* smcp = &cpmp->cp_smc[idx]; */
342                 smcp = &pquicc->smc_regs[idx];
343                 smcp->smc_smcm &= ~SMCM_TX;
344         }
345         local_irq_restore(flags);
346 }
347
348
349 static void rs_360_start(struct tty_struct *tty)
350 {
351         ser_info_t *info = (ser_info_t *)tty->driver_data;
352         int     idx;
353         unsigned long flags;
354         volatile struct scc_regs *sccp;
355         volatile struct smc_regs *smcp;
356
357         if (serial_paranoia_check(info, tty->name, "rs_stop"))
358                 return;
359         
360         local_irq_save(flags);
361         idx = PORT_NUM(info->state->smc_scc_num);
362         if (info->state->smc_scc_num & NUM_IS_SCC) {
363                 sccp = &pquicc->scc_regs[idx];
364                 sccp->scc_sccm |= UART_SCCM_TX;
365         } else {
366                 smcp = &pquicc->smc_regs[idx];
367                 smcp->smc_smcm |= SMCM_TX;
368         }
369         local_irq_restore(flags);
370 }
371
372 /*
373  * ----------------------------------------------------------------------
374  *
375  * Here starts the interrupt handling routines.  All of the following
376  * subroutines are declared as inline and are folded into
377  * rs_interrupt().  They were separated out for readability's sake.
378  *
379  * Note: rs_interrupt() is a "fast" interrupt, which means that it
380  * runs with interrupts turned off.  People who may want to modify
381  * rs_interrupt() should try to keep the interrupt handler as fast as
382  * possible.  After you are done making modifications, it is not a bad
383  * idea to do:
384  * 
385  * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
386  *
387  * and look at the resulting assemble code in serial.s.
388  *
389  *                              - Ted Ts'o (tytso@mit.edu), 7-Mar-93
390  * -----------------------------------------------------------------------
391  */
392
393 static _INLINE_ void receive_chars(ser_info_t *info)
394 {
395         struct tty_struct *tty = info->tty;
396         unsigned char ch, flag, *cp;
397         /*int   ignored = 0;*/
398         int     i;
399         ushort  status;
400          struct async_icount *icount; 
401         /* struct       async_icount_24 *icount; */
402         volatile QUICC_BD       *bdp;
403
404         icount = &info->state->icount;
405
406         /* Just loop through the closed BDs and copy the characters into
407          * the buffer.
408          */
409         bdp = info->rx_cur;
410         for (;;) {
411                 if (bdp->status & BD_SC_EMPTY)  /* If this one is empty */
412                         break;                  /*   we are all done */
413
414                 /* The read status mask tell us what we should do with
415                  * incoming characters, especially if errors occur.
416                  * One special case is the use of BD_SC_EMPTY.  If
417                  * this is not set, we are supposed to be ignoring
418                  * inputs.  In this case, just mark the buffer empty and
419                  * continue.
420                  */
421                 if (!(info->read_status_mask & BD_SC_EMPTY)) {
422                         bdp->status |= BD_SC_EMPTY;
423                         bdp->status &=
424                                 ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
425
426                         if (bdp->status & BD_SC_WRAP)
427                                 bdp = info->rx_bd_base;
428                         else
429                                 bdp++;
430                         continue;
431                 }
432
433                 /* Get the number of characters and the buffer pointer.
434                 */
435                 i = bdp->length;
436                 /* cp = (unsigned char *)__va(bdp->buf); */
437                 cp = (char *)bdp->buf;
438                 status = bdp->status;
439
440                 while (i-- > 0) {
441                         ch = *cp++;
442                         icount->rx++;
443
444 #ifdef SERIAL_DEBUG_INTR
445                         printk("DR%02x:%02x...", ch, status);
446 #endif
447                         flag = TTY_NORMAL;
448
449                         if (status & (BD_SC_BR | BD_SC_FR |
450                                        BD_SC_PR | BD_SC_OV)) {
451                                 /*
452                                  * For statistics only
453                                  */
454                                 if (status & BD_SC_BR)
455                                         icount->brk++;
456                                 else if (status & BD_SC_PR)
457                                         icount->parity++;
458                                 else if (status & BD_SC_FR)
459                                         icount->frame++;
460                                 if (status & BD_SC_OV)
461                                         icount->overrun++;
462
463                                 /*
464                                  * Now check to see if character should be
465                                  * ignored, and mask off conditions which
466                                  * should be ignored.
467                                 if (status & info->ignore_status_mask) {
468                                         if (++ignored > 100)
469                                                 break;
470                                         continue;
471                                 }
472                                  */
473                                 status &= info->read_status_mask;
474                 
475                                 if (status & (BD_SC_BR)) {
476 #ifdef SERIAL_DEBUG_INTR
477                                         printk("handling break....");
478 #endif
479                                         *tty->flip.flag_buf_ptr = TTY_BREAK;
480                                         if (info->flags & ASYNC_SAK)
481                                                 do_SAK(tty);
482                                 } else if (status & BD_SC_PR)
483                                         flag = TTY_PARITY;
484                                 else if (status & BD_SC_FR)
485                                         flag = TTY_FRAME;
486                         }
487                         tty_insert_flip_char(tty, ch, flag);
488                         if (status & BD_SC_OV)
489                                 /*
490                                  * Overrun is special, since it's
491                                  * reported immediately, and doesn't
492                                  * affect the current character
493                                  */
494                                 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
495                 }
496
497                 /* This BD is ready to be used again.  Clear status.
498                  * Get next BD.
499                  */
500                 bdp->status |= BD_SC_EMPTY;
501                 bdp->status &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
502
503                 if (bdp->status & BD_SC_WRAP)
504                         bdp = info->rx_bd_base;
505                 else
506                         bdp++;
507         }
508
509         info->rx_cur = (QUICC_BD *)bdp;
510
511         tty_schedule_flip(tty);
512 }
513
514 static _INLINE_ void receive_break(ser_info_t *info)
515 {
516         struct tty_struct *tty = info->tty;
517
518         info->state->icount.brk++;
519         /* Check to see if there is room in the tty buffer for
520          * the break.  If not, we exit now, losing the break.  FIXME
521          */
522         tty_insert_flip_char(tty, 0, TTY_BREAK);
523         tty_schedule_flip(tty);
524 }
525
526 static _INLINE_ void transmit_chars(ser_info_t *info)
527 {
528
529         if ((info->flags & TX_WAKEUP) ||
530             (info->tty->flags & (1 << TTY_DO_WRITE_WAKEUP))) {
531                 schedule_work(&info->tqueue);
532         }
533
534 #ifdef SERIAL_DEBUG_INTR
535         printk("THRE...");
536 #endif
537 }
538
539 #ifdef notdef
540         /* I need to do this for the SCCs, so it is left as a reminder.
541         */
542 static _INLINE_ void check_modem_status(struct async_struct *info)
543 {
544         int     status;
545         /* struct       async_icount *icount; */
546         struct  async_icount_24 *icount;
547         
548         status = serial_in(info, UART_MSR);
549
550         if (status & UART_MSR_ANY_DELTA) {
551                 icount = &info->state->icount;
552                 /* update input line counters */
553                 if (status & UART_MSR_TERI)
554                         icount->rng++;
555                 if (status & UART_MSR_DDSR)
556                         icount->dsr++;
557                 if (status & UART_MSR_DDCD) {
558                         icount->dcd++;
559 #ifdef CONFIG_HARD_PPS
560                         if ((info->flags & ASYNC_HARDPPS_CD) &&
561                             (status & UART_MSR_DCD))
562                                 hardpps();
563 #endif
564                 }
565                 if (status & UART_MSR_DCTS)
566                         icount->cts++;
567                 wake_up_interruptible(&info->delta_msr_wait);
568         }
569
570         if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
571 #if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
572                 printk("ttys%d CD now %s...", info->line,
573                        (status & UART_MSR_DCD) ? "on" : "off");
574 #endif          
575                 if (status & UART_MSR_DCD)
576                         wake_up_interruptible(&info->open_wait);
577                 else {
578 #ifdef SERIAL_DEBUG_OPEN
579                         printk("scheduling hangup...");
580 #endif
581                         queue_task(&info->tqueue_hangup,
582                                            &tq_scheduler);
583                 }
584         }
585         if (info->flags & ASYNC_CTS_FLOW) {
586                 if (info->tty->hw_stopped) {
587                         if (status & UART_MSR_CTS) {
588 #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
589                                 printk("CTS tx start...");
590 #endif
591                                 info->tty->hw_stopped = 0;
592                                 info->IER |= UART_IER_THRI;
593                                 serial_out(info, UART_IER, info->IER);
594                                 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
595                                 return;
596                         }
597                 } else {
598                         if (!(status & UART_MSR_CTS)) {
599 #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
600                                 printk("CTS tx stop...");
601 #endif
602                                 info->tty->hw_stopped = 1;
603                                 info->IER &= ~UART_IER_THRI;
604                                 serial_out(info, UART_IER, info->IER);
605                         }
606                 }
607         }
608 }
609 #endif
610
611 /*
612  * This is the serial driver's interrupt routine for a single port
613  */
614 /* static void rs_360_interrupt(void *dev_id) */ /* until and if we start servicing irqs here */
615 static void rs_360_interrupt(int vec, void *dev_id)
616 {
617         u_char  events;
618         int     idx;
619         ser_info_t *info;
620         volatile struct smc_regs *smcp;
621         volatile struct scc_regs *sccp;
622         
623         info = dev_id;
624
625         idx = PORT_NUM(info->state->smc_scc_num);
626         if (info->state->smc_scc_num & NUM_IS_SCC) {
627                 sccp = &pquicc->scc_regs[idx];
628                 events = sccp->scc_scce;
629                 if (events & SCCM_RX)
630                         receive_chars(info);
631                 if (events & SCCM_TX)
632                         transmit_chars(info);
633                 sccp->scc_scce = events;
634         } else {
635                 smcp = &pquicc->smc_regs[idx];
636                 events = smcp->smc_smce;
637                 if (events & SMCM_BRKE)
638                         receive_break(info);
639                 if (events & SMCM_RX)
640                         receive_chars(info);
641                 if (events & SMCM_TX)
642                         transmit_chars(info);
643                 smcp->smc_smce = events;
644         }
645         
646 #ifdef SERIAL_DEBUG_INTR
647         printk("rs_interrupt_single(%d, %x)...",
648                                         info->state->smc_scc_num, events);
649 #endif
650 #ifdef modem_control
651         check_modem_status(info);
652 #endif
653         info->last_active = jiffies;
654 #ifdef SERIAL_DEBUG_INTR
655         printk("end.\n");
656 #endif
657 }
658
659
660 /*
661  * -------------------------------------------------------------------
662  * Here ends the serial interrupt routines.
663  * -------------------------------------------------------------------
664  */
665
666
667 static void do_softint(void *private_)
668 {
669         ser_info_t      *info = (ser_info_t *) private_;
670         struct tty_struct       *tty;
671         
672         tty = info->tty;
673         if (!tty)
674                 return;
675
676         if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
677                 tty_wakeup(tty);
678 }
679
680
681 /*
682  * This routine is called from the scheduler tqueue when the interrupt
683  * routine has signalled that a hangup has occurred.  The path of
684  * hangup processing is:
685  *
686  *      serial interrupt routine -> (scheduler tqueue) ->
687  *      do_serial_hangup() -> tty->hangup() -> rs_hangup()
688  * 
689  */
690 static void do_serial_hangup(void *private_)
691 {
692         struct async_struct     *info = (struct async_struct *) private_;
693         struct tty_struct       *tty;
694         
695         tty = info->tty;
696         if (!tty)
697                 return;
698
699         tty_hangup(tty);
700 }
701
702
703 static int startup(ser_info_t *info)
704 {
705         unsigned long flags;
706         int     retval=0;
707         int     idx;
708         /*struct serial_state *state = info->state;*/
709         volatile struct smc_regs *smcp;
710         volatile struct scc_regs *sccp;
711         volatile struct smc_uart_pram   *up;
712         volatile struct uart_pram           *scup;
713
714
715         local_irq_save(flags);
716
717         if (info->flags & ASYNC_INITIALIZED) {
718                 goto errout;
719         }
720
721 #ifdef maybe
722         if (!state->port || !state->type) {
723                 if (info->tty)
724                         set_bit(TTY_IO_ERROR, &info->tty->flags);
725                 goto errout;
726         }
727 #endif
728
729 #ifdef SERIAL_DEBUG_OPEN
730         printk("starting up ttys%d (irq %d)...", info->line, state->irq);
731 #endif
732
733
734 #ifdef modem_control
735         info->MCR = 0;
736         if (info->tty->termios->c_cflag & CBAUD)
737                 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
738 #endif
739         
740         if (info->tty)
741                 clear_bit(TTY_IO_ERROR, &info->tty->flags);
742
743         /*
744          * and set the speed of the serial port
745          */
746         change_speed(info);
747
748         idx = PORT_NUM(info->state->smc_scc_num);
749         if (info->state->smc_scc_num & NUM_IS_SCC) {
750                 sccp = &pquicc->scc_regs[idx];
751                 scup = &pquicc->pram[info->state->port].scc.pscc.u;
752
753                 scup->mrblr = RX_BUF_SIZE;
754                 scup->max_idl = RX_BUF_SIZE;
755
756                 sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX);
757                 sccp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
758
759         } else {
760                 smcp = &pquicc->smc_regs[idx];
761
762                 /* Enable interrupts and I/O.
763                 */
764                 smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
765                 smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
766
767                 /* We can tune the buffer length and idle characters
768                  * to take advantage of the entire incoming buffer size.
769                  * If mrblr is something other than 1, maxidl has to be
770                  * non-zero or we never get an interrupt.  The maxidl
771                  * is the number of character times we wait after reception
772                  * of the last character before we decide no more characters
773                  * are coming.
774                  */
775                 /* up = (smc_uart_t *)&pquicc->cp_dparam[state->port]; */
776                 /* holy unionized structures, Batman: */
777                 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
778
779                 up->mrblr = RX_BUF_SIZE;
780                 up->max_idl = RX_BUF_SIZE;
781
782                 up->brkcr = 1;  /* number of break chars */
783         }
784
785         info->flags |= ASYNC_INITIALIZED;
786         local_irq_restore(flags);
787         return 0;
788         
789 errout:
790         local_irq_restore(flags);
791         return retval;
792 }
793
794 /*
795  * This routine will shutdown a serial port; interrupts are disabled, and
796  * DTR is dropped if the hangup on close termio flag is on.
797  */
798 static void shutdown(ser_info_t *info)
799 {
800         unsigned long   flags;
801         struct serial_state *state;
802         int             idx;
803         volatile struct smc_regs        *smcp;
804         volatile struct scc_regs        *sccp;
805
806         if (!(info->flags & ASYNC_INITIALIZED))
807                 return;
808
809         state = info->state;
810
811 #ifdef SERIAL_DEBUG_OPEN
812         printk("Shutting down serial port %d (irq %d)....", info->line,
813                state->irq);
814 #endif
815         
816         local_irq_save(flags);
817
818         idx = PORT_NUM(state->smc_scc_num);
819         if (state->smc_scc_num & NUM_IS_SCC) {
820                 sccp = &pquicc->scc_regs[idx];
821                 sccp->scc_gsmr.w.low &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
822 #ifdef CONFIG_SERIAL_CONSOLE
823                 /* We can't disable the transmitter if this is the
824                  * system console.
825                  */
826                 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
827 #endif
828                 sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
829         } else {
830                 smcp = &pquicc->smc_regs[idx];
831
832                 /* Disable interrupts and I/O.
833                  */
834                 smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
835 #ifdef CONFIG_SERIAL_CONSOLE
836                 /* We can't disable the transmitter if this is the
837                  * system console.
838                  */
839                 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
840 #endif
841                         smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
842         }
843         
844         if (info->tty)
845                 set_bit(TTY_IO_ERROR, &info->tty->flags);
846
847         info->flags &= ~ASYNC_INITIALIZED;
848         local_irq_restore(flags);
849 }
850
851 /*
852  * This routine is called to set the UART divisor registers to match
853  * the specified baud rate for a serial port.
854  */
855 static void change_speed(ser_info_t *info)
856 {
857         int     baud_rate;
858         unsigned cflag, cval, scval, prev_mode;
859         int     i, bits, sbits, idx;
860         unsigned long   flags;
861         struct serial_state *state;
862         volatile struct smc_regs        *smcp;
863         volatile struct scc_regs        *sccp;
864
865         if (!info->tty || !info->tty->termios)
866                 return;
867         cflag = info->tty->termios->c_cflag;
868
869         state = info->state;
870
871         /* Character length programmed into the mode register is the
872          * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
873          * 1 or 2 stop bits, minus 1.
874          * The value 'bits' counts this for us.
875          */
876         cval = 0;
877         scval = 0;
878
879         /* byte size and parity */
880         switch (cflag & CSIZE) {
881               case CS5: bits = 5; break;
882               case CS6: bits = 6; break;
883               case CS7: bits = 7; break;
884               case CS8: bits = 8; break;
885               /* Never happens, but GCC is too dumb to figure it out */
886               default:  bits = 8; break;
887         }
888         sbits = bits - 5;
889
890         if (cflag & CSTOPB) {
891                 cval |= SMCMR_SL;       /* Two stops */
892                 scval |= SCU_PMSR_SL;
893                 bits++;
894         }
895         if (cflag & PARENB) {
896                 cval |= SMCMR_PEN;
897                 scval |= SCU_PMSR_PEN;
898                 bits++;
899         }
900         if (!(cflag & PARODD)) {
901                 cval |= SMCMR_PM_EVEN;
902                 scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP);
903         }
904
905         /* Determine divisor based on baud rate */
906         i = cflag & CBAUD;
907         if (i >= (sizeof(baud_table)/sizeof(int)))
908                 baud_rate = 9600;
909         else
910                 baud_rate = baud_table[i];
911
912         info->timeout = (TX_BUF_SIZE*HZ*bits);
913         info->timeout += HZ/50;         /* Add .02 seconds of slop */
914
915 #ifdef modem_control
916         /* CTS flow control flag and modem status interrupts */
917         info->IER &= ~UART_IER_MSI;
918         if (info->flags & ASYNC_HARDPPS_CD)
919                 info->IER |= UART_IER_MSI;
920         if (cflag & CRTSCTS) {
921                 info->flags |= ASYNC_CTS_FLOW;
922                 info->IER |= UART_IER_MSI;
923         } else
924                 info->flags &= ~ASYNC_CTS_FLOW;
925         if (cflag & CLOCAL)
926                 info->flags &= ~ASYNC_CHECK_CD;
927         else {
928                 info->flags |= ASYNC_CHECK_CD;
929                 info->IER |= UART_IER_MSI;
930         }
931         serial_out(info, UART_IER, info->IER);
932 #endif
933
934         /*
935          * Set up parity check flag
936          */
937         info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
938         if (I_INPCK(info->tty))
939                 info->read_status_mask |= BD_SC_FR | BD_SC_PR;
940         if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
941                 info->read_status_mask |= BD_SC_BR;
942         
943         /*
944          * Characters to ignore
945          */
946         info->ignore_status_mask = 0;
947         if (I_IGNPAR(info->tty))
948                 info->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
949         if (I_IGNBRK(info->tty)) {
950                 info->ignore_status_mask |= BD_SC_BR;
951                 /*
952                  * If we're ignore parity and break indicators, ignore 
953                  * overruns too.  (For real raw support).
954                  */
955                 if (I_IGNPAR(info->tty))
956                         info->ignore_status_mask |= BD_SC_OV;
957         }
958         /*
959          * !!! ignore all characters if CREAD is not set
960          */
961         if ((cflag & CREAD) == 0)
962          info->read_status_mask &= ~BD_SC_EMPTY;
963          local_irq_save(flags);
964
965          /* Start bit has not been added (so don't, because we would just
966           * subtract it later), and we need to add one for the number of
967           * stops bits (there is always at least one).
968           */
969          bits++;
970          idx = PORT_NUM(state->smc_scc_num);
971          if (state->smc_scc_num & NUM_IS_SCC) {
972          sccp = &pquicc->scc_regs[idx];
973          sccp->scc_psmr = (sbits << 12) | scval;
974      } else {
975          smcp = &pquicc->smc_regs[idx];
976
977                 /* Set the mode register.  We want to keep a copy of the
978                  * enables, because we want to put them back if they were
979                  * present.
980                  */
981                 prev_mode = smcp->smc_smcmr;
982                 smcp->smc_smcmr = smcr_mk_clen(bits) | cval |  SMCMR_SM_UART;
983                 smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
984         }
985
986         m360_cpm_setbrg((state - rs_table), baud_rate);
987
988         local_irq_restore(flags);
989 }
990
991 static void rs_360_put_char(struct tty_struct *tty, unsigned char ch)
992 {
993         ser_info_t *info = (ser_info_t *)tty->driver_data;
994         volatile QUICC_BD       *bdp;
995
996         if (serial_paranoia_check(info, tty->name, "rs_put_char"))
997                 return;
998
999         if (!tty)
1000                 return;
1001
1002         bdp = info->tx_cur;
1003         while (bdp->status & BD_SC_READY);
1004
1005         /* *((char *)__va(bdp->buf)) = ch; */
1006         *((char *)bdp->buf) = ch;
1007         bdp->length = 1;
1008         bdp->status |= BD_SC_READY;
1009
1010         /* Get next BD.
1011         */
1012         if (bdp->status & BD_SC_WRAP)
1013                 bdp = info->tx_bd_base;
1014         else
1015                 bdp++;
1016
1017         info->tx_cur = (QUICC_BD *)bdp;
1018
1019 }
1020
1021 static int rs_360_write(struct tty_struct * tty,
1022                     const unsigned char *buf, int count)
1023 {
1024         int     c, ret = 0;
1025         ser_info_t *info = (ser_info_t *)tty->driver_data;
1026         volatile QUICC_BD *bdp;
1027
1028 #ifdef CONFIG_KGDB
1029         /* Try to let stub handle output. Returns true if it did. */ 
1030         if (kgdb_output_string(buf, count))
1031                 return ret;
1032 #endif
1033
1034         if (serial_paranoia_check(info, tty->name, "rs_write"))
1035                 return 0;
1036
1037         if (!tty) 
1038                 return 0;
1039
1040         bdp = info->tx_cur;
1041
1042         while (1) {
1043                 c = min(count, TX_BUF_SIZE);
1044
1045                 if (c <= 0)
1046                         break;
1047
1048                 if (bdp->status & BD_SC_READY) {
1049                         info->flags |= TX_WAKEUP;
1050                         break;
1051                 }
1052
1053                 /* memcpy(__va(bdp->buf), buf, c); */
1054                 memcpy((void *)bdp->buf, buf, c);
1055
1056                 bdp->length = c;
1057                 bdp->status |= BD_SC_READY;
1058
1059                 buf += c;
1060                 count -= c;
1061                 ret += c;
1062
1063                 /* Get next BD.
1064                 */
1065                 if (bdp->status & BD_SC_WRAP)
1066                         bdp = info->tx_bd_base;
1067                 else
1068                         bdp++;
1069                 info->tx_cur = (QUICC_BD *)bdp;
1070         }
1071         return ret;
1072 }
1073
1074 static int rs_360_write_room(struct tty_struct *tty)
1075 {
1076         ser_info_t *info = (ser_info_t *)tty->driver_data;
1077         int     ret;
1078
1079         if (serial_paranoia_check(info, tty->name, "rs_write_room"))
1080                 return 0;
1081
1082         if ((info->tx_cur->status & BD_SC_READY) == 0) {
1083                 info->flags &= ~TX_WAKEUP;
1084                 ret = TX_BUF_SIZE;
1085         }
1086         else {
1087                 info->flags |= TX_WAKEUP;
1088                 ret = 0;
1089         }
1090         return ret;
1091 }
1092
1093 /* I could track this with transmit counters....maybe later.
1094 */
1095 static int rs_360_chars_in_buffer(struct tty_struct *tty)
1096 {
1097         ser_info_t *info = (ser_info_t *)tty->driver_data;
1098                                 
1099         if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer"))
1100                 return 0;
1101         return 0;
1102 }
1103
1104 static void rs_360_flush_buffer(struct tty_struct *tty)
1105 {
1106         ser_info_t *info = (ser_info_t *)tty->driver_data;
1107                                 
1108         if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
1109                 return;
1110
1111         /* There is nothing to "flush", whatever we gave the CPM
1112          * is on its way out.
1113          */
1114         tty_wakeup(tty);
1115         info->flags &= ~TX_WAKEUP;
1116 }
1117
1118 /*
1119  * This function is used to send a high-priority XON/XOFF character to
1120  * the device
1121  */
1122 static void rs_360_send_xchar(struct tty_struct *tty, char ch)
1123 {
1124         volatile QUICC_BD       *bdp;
1125
1126         ser_info_t *info = (ser_info_t *)tty->driver_data;
1127
1128         if (serial_paranoia_check(info, tty->name, "rs_send_char"))
1129                 return;
1130
1131         bdp = info->tx_cur;
1132         while (bdp->status & BD_SC_READY);
1133
1134         /* *((char *)__va(bdp->buf)) = ch; */
1135         *((char *)bdp->buf) = ch;
1136         bdp->length = 1;
1137         bdp->status |= BD_SC_READY;
1138
1139         /* Get next BD.
1140         */
1141         if (bdp->status & BD_SC_WRAP)
1142                 bdp = info->tx_bd_base;
1143         else
1144                 bdp++;
1145
1146         info->tx_cur = (QUICC_BD *)bdp;
1147 }
1148
1149 /*
1150  * ------------------------------------------------------------
1151  * rs_throttle()
1152  * 
1153  * This routine is called by the upper-layer tty layer to signal that
1154  * incoming characters should be throttled.
1155  * ------------------------------------------------------------
1156  */
1157 static void rs_360_throttle(struct tty_struct * tty)
1158 {
1159         ser_info_t *info = (ser_info_t *)tty->driver_data;
1160 #ifdef SERIAL_DEBUG_THROTTLE
1161         char    buf[64];
1162         
1163         printk("throttle %s: %d....\n", _tty_name(tty, buf),
1164                tty->ldisc.chars_in_buffer(tty));
1165 #endif
1166
1167         if (serial_paranoia_check(info, tty->name, "rs_throttle"))
1168                 return;
1169         
1170         if (I_IXOFF(tty))
1171                 rs_360_send_xchar(tty, STOP_CHAR(tty));
1172
1173 #ifdef modem_control
1174         if (tty->termios->c_cflag & CRTSCTS)
1175                 info->MCR &= ~UART_MCR_RTS;
1176
1177         local_irq_disable();
1178         serial_out(info, UART_MCR, info->MCR);
1179         local_irq_enable();
1180 #endif
1181 }
1182
1183 static void rs_360_unthrottle(struct tty_struct * tty)
1184 {
1185         ser_info_t *info = (ser_info_t *)tty->driver_data;
1186 #ifdef SERIAL_DEBUG_THROTTLE
1187         char    buf[64];
1188         
1189         printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
1190                tty->ldisc.chars_in_buffer(tty));
1191 #endif
1192
1193         if (serial_paranoia_check(info, tty->name, "rs_unthrottle"))
1194                 return;
1195         
1196         if (I_IXOFF(tty)) {
1197                 if (info->x_char)
1198                         info->x_char = 0;
1199                 else
1200                         rs_360_send_xchar(tty, START_CHAR(tty));
1201         }
1202 #ifdef modem_control
1203         if (tty->termios->c_cflag & CRTSCTS)
1204                 info->MCR |= UART_MCR_RTS;
1205         local_irq_disable();
1206         serial_out(info, UART_MCR, info->MCR);
1207         local_irq_enable();
1208 #endif
1209 }
1210
1211 /*
1212  * ------------------------------------------------------------
1213  * rs_ioctl() and friends
1214  * ------------------------------------------------------------
1215  */
1216
1217 #ifdef maybe
1218 /*
1219  * get_lsr_info - get line status register info
1220  *
1221  * Purpose: Let user call ioctl() to get info when the UART physically
1222  *          is emptied.  On bus types like RS485, the transmitter must
1223  *          release the bus after transmitting. This must be done when
1224  *          the transmit shift register is empty, not be done when the
1225  *          transmit holding register is empty.  This functionality
1226  *          allows an RS485 driver to be written in user space. 
1227  */
1228 static int get_lsr_info(struct async_struct * info, unsigned int *value)
1229 {
1230         unsigned char status;
1231         unsigned int result;
1232
1233         local_irq_disable();
1234         status = serial_in(info, UART_LSR);
1235         local_irq_enable();
1236         result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1237         return put_user(result,value);
1238 }
1239 #endif
1240
1241 static int rs_360_tiocmget(struct tty_struct *tty, struct file *file)
1242 {
1243         ser_info_t *info = (ser_info_t *)tty->driver_data;
1244         unsigned int result = 0;
1245 #ifdef modem_control
1246         unsigned char control, status;
1247
1248         if (serial_paranoia_check(info, tty->name, __FUNCTION__))
1249                 return -ENODEV;
1250
1251         if (tty->flags & (1 << TTY_IO_ERROR))
1252                 return -EIO;
1253
1254         control = info->MCR;
1255         local_irq_disable();
1256         status = serial_in(info, UART_MSR);
1257         local_irq_enable();
1258         result =  ((control & UART_MCR_RTS) ? TIOCM_RTS : 0)
1259                 | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0)
1260 #ifdef TIOCM_OUT1
1261                 | ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0)
1262                 | ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0)
1263 #endif
1264                 | ((status  & UART_MSR_DCD) ? TIOCM_CAR : 0)
1265                 | ((status  & UART_MSR_RI) ? TIOCM_RNG : 0)
1266                 | ((status  & UART_MSR_DSR) ? TIOCM_DSR : 0)
1267                 | ((status  & UART_MSR_CTS) ? TIOCM_CTS : 0);
1268 #endif
1269         return result;
1270 }
1271
1272 static int rs_360_tiocmset(struct tty_struct *tty, struct file *file,
1273                            unsigned int set, unsigned int clear)
1274 {
1275 #ifdef modem_control
1276         ser_info_t *info = (ser_info_t *)tty->driver_data;
1277         unsigned int arg;
1278
1279         if (serial_paranoia_check(info, tty->name, __FUNCTION__))
1280                 return -ENODEV;
1281
1282         if (tty->flags & (1 << TTY_IO_ERROR))
1283                 return -EIO;
1284
1285         if (set & TIOCM_RTS)
1286                 info->mcr |= UART_MCR_RTS;
1287         if (set & TIOCM_DTR)
1288                 info->mcr |= UART_MCR_DTR;
1289         if (clear & TIOCM_RTS)
1290                 info->MCR &= ~UART_MCR_RTS;
1291         if (clear & TIOCM_DTR)
1292                 info->MCR &= ~UART_MCR_DTR;
1293
1294 #ifdef TIOCM_OUT1
1295         if (set & TIOCM_OUT1)
1296                 info->MCR |= UART_MCR_OUT1;
1297         if (set & TIOCM_OUT2)
1298                 info->MCR |= UART_MCR_OUT2;
1299         if (clear & TIOCM_OUT1)
1300                 info->MCR &= ~UART_MCR_OUT1;
1301         if (clear & TIOCM_OUT2)
1302                 info->MCR &= ~UART_MCR_OUT2;
1303 #endif
1304
1305         local_irq_disable();
1306         serial_out(info, UART_MCR, info->MCR);
1307         local_irq_enable();
1308 #endif
1309         return 0;
1310 }
1311
1312 /* Sending a break is a two step process on the SMC/SCC.  It is accomplished
1313  * by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT
1314  * command.  We take advantage of the begin/end functions to make this
1315  * happen.
1316  */
1317 static ushort   smc_chan_map[] = {
1318         CPM_CR_CH_SMC1,
1319         CPM_CR_CH_SMC2
1320 };
1321
1322 static ushort   scc_chan_map[] = {
1323         CPM_CR_CH_SCC1,
1324         CPM_CR_CH_SCC2,
1325         CPM_CR_CH_SCC3,
1326         CPM_CR_CH_SCC4
1327 };
1328
1329 static void begin_break(ser_info_t *info)
1330 {
1331         volatile QUICC *cp;
1332         ushort  chan;
1333         int     idx;
1334
1335         cp = pquicc;
1336
1337         idx = PORT_NUM(info->state->smc_scc_num);
1338         if (info->state->smc_scc_num & NUM_IS_SCC)
1339                 chan = scc_chan_map[idx];
1340         else
1341                 chan = smc_chan_map[idx];
1342
1343         cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG;
1344         while (cp->cp_cr & CPM_CR_FLG);
1345 }
1346
1347 static void end_break(ser_info_t *info)
1348 {
1349         volatile QUICC *cp;
1350         ushort  chan;
1351         int idx;
1352
1353         cp = pquicc;
1354
1355         idx = PORT_NUM(info->state->smc_scc_num);
1356         if (info->state->smc_scc_num & NUM_IS_SCC)
1357                 chan = scc_chan_map[idx];
1358         else
1359                 chan = smc_chan_map[idx];
1360
1361         cp->cp_cr = mk_cr_cmd(chan, CPM_CR_RESTART_TX) | CPM_CR_FLG;
1362         while (cp->cp_cr & CPM_CR_FLG);
1363 }
1364
1365 /*
1366  * This routine sends a break character out the serial port.
1367  */
1368 static void send_break(ser_info_t *info, unsigned int duration)
1369 {
1370 #ifdef SERIAL_DEBUG_SEND_BREAK
1371         printk("rs_send_break(%d) jiff=%lu...", duration, jiffies);
1372 #endif
1373         begin_break(info);
1374         msleep_interruptible(duration);
1375         end_break(info);
1376 #ifdef SERIAL_DEBUG_SEND_BREAK
1377         printk("done jiffies=%lu\n", jiffies);
1378 #endif
1379 }
1380
1381
1382 static int rs_360_ioctl(struct tty_struct *tty, struct file * file,
1383                     unsigned int cmd, unsigned long arg)
1384 {
1385         int error;
1386         ser_info_t *info = (ser_info_t *)tty->driver_data;
1387         int retval;
1388         struct async_icount cnow; 
1389         /* struct async_icount_24 cnow;*/       /* kernel counter temps */
1390         struct serial_icounter_struct *p_cuser; /* user space */
1391
1392         if (serial_paranoia_check(info, tty->name, "rs_ioctl"))
1393                 return -ENODEV;
1394
1395         if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1396                 if (tty->flags & (1 << TTY_IO_ERROR))
1397                     return -EIO;
1398         }
1399         
1400         switch (cmd) {
1401                 case TCSBRK:    /* SVID version: non-zero arg --> no break */
1402                         retval = tty_check_change(tty);
1403                         if (retval)
1404                                 return retval;
1405                         tty_wait_until_sent(tty, 0);
1406                         if (signal_pending(current))
1407                                 return -EINTR;
1408                         if (!arg) {
1409                                 send_break(info, 250);  /* 1/4 second */
1410                                 if (signal_pending(current))
1411                                         return -EINTR;
1412                         }
1413                         return 0;
1414                 case TCSBRKP:   /* support for POSIX tcsendbreak() */
1415                         retval = tty_check_change(tty);
1416                         if (retval)
1417                                 return retval;
1418                         tty_wait_until_sent(tty, 0);
1419                         if (signal_pending(current))
1420                                 return -EINTR;
1421                         send_break(info, arg ? arg*100 : 250);
1422                         if (signal_pending(current))
1423                                 return -EINTR;
1424                         return 0;
1425                 case TIOCSBRK:
1426                         retval = tty_check_change(tty);
1427                         if (retval)
1428                                 return retval;
1429                         tty_wait_until_sent(tty, 0);
1430                         begin_break(info);
1431                         return 0;
1432                 case TIOCCBRK:
1433                         retval = tty_check_change(tty);
1434                         if (retval)
1435                                 return retval;
1436                         end_break(info);
1437                         return 0;
1438                 case TIOCGSOFTCAR:
1439                         /* return put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg); */
1440                         put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg);
1441                         return 0;
1442                 case TIOCSSOFTCAR:
1443                         error = get_user(arg, (unsigned int *) arg); 
1444                         if (error)
1445                                 return error;
1446                         tty->termios->c_cflag =
1447                                 ((tty->termios->c_cflag & ~CLOCAL) |
1448                                  (arg ? CLOCAL : 0));
1449                         return 0;
1450 #ifdef maybe
1451                 case TIOCSERGETLSR: /* Get line status register */
1452                         return get_lsr_info(info, (unsigned int *) arg);
1453 #endif
1454                 /*
1455                  * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1456                  * - mask passed in arg for lines of interest
1457                  *   (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1458                  * Caller should use TIOCGICOUNT to see which one it was
1459                  */
1460                  case TIOCMIWAIT:
1461 #ifdef modem_control
1462                         local_irq_disable();
1463                         /* note the counters on entry */
1464                         cprev = info->state->icount;
1465                         local_irq_enable();
1466                         while (1) {
1467                                 interruptible_sleep_on(&info->delta_msr_wait);
1468                                 /* see if a signal did it */
1469                                 if (signal_pending(current))
1470                                         return -ERESTARTSYS;
1471                                 local_irq_disable();
1472                                 cnow = info->state->icount; /* atomic copy */
1473                                 local_irq_enable();
1474                                 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr && 
1475                                     cnow.dcd == cprev.dcd && cnow.cts == cprev.cts)
1476                                         return -EIO; /* no change => error */
1477                                 if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
1478                                      ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
1479                                      ((arg & TIOCM_CD)  && (cnow.dcd != cprev.dcd)) ||
1480                                      ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) {
1481                                         return 0;
1482                                 }
1483                                 cprev = cnow;
1484                         }
1485                         /* NOTREACHED */
1486 #else
1487                         return 0;
1488 #endif
1489
1490                 /* 
1491                  * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1492                  * Return: write counters to the user passed counter struct
1493                  * NB: both 1->0 and 0->1 transitions are counted except for
1494                  *     RI where only 0->1 is counted.
1495                  */
1496                 case TIOCGICOUNT:
1497                         local_irq_disable();
1498                         cnow = info->state->icount;
1499                         local_irq_enable();
1500                         p_cuser = (struct serial_icounter_struct *) arg;
1501 /*                      error = put_user(cnow.cts, &p_cuser->cts); */
1502 /*                      if (error) return error; */
1503 /*                      error = put_user(cnow.dsr, &p_cuser->dsr); */
1504 /*                      if (error) return error; */
1505 /*                      error = put_user(cnow.rng, &p_cuser->rng); */
1506 /*                      if (error) return error; */
1507 /*                      error = put_user(cnow.dcd, &p_cuser->dcd); */
1508 /*                      if (error) return error; */
1509
1510                         put_user(cnow.cts, &p_cuser->cts);
1511                         put_user(cnow.dsr, &p_cuser->dsr);
1512                         put_user(cnow.rng, &p_cuser->rng);
1513                         put_user(cnow.dcd, &p_cuser->dcd);
1514                         return 0;
1515
1516                 default:
1517                         return -ENOIOCTLCMD;
1518                 }
1519         return 0;
1520 }
1521
1522 /* FIX UP modem control here someday......
1523 */
1524 static void rs_360_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1525 {
1526         ser_info_t *info = (ser_info_t *)tty->driver_data;
1527
1528         change_speed(info);
1529
1530 #ifdef modem_control
1531         /* Handle transition to B0 status */
1532         if ((old_termios->c_cflag & CBAUD) &&
1533             !(tty->termios->c_cflag & CBAUD)) {
1534                 info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
1535                 local_irq_disable();
1536                 serial_out(info, UART_MCR, info->MCR);
1537                 local_irq_enable();
1538         }
1539         
1540         /* Handle transition away from B0 status */
1541         if (!(old_termios->c_cflag & CBAUD) &&
1542             (tty->termios->c_cflag & CBAUD)) {
1543                 info->MCR |= UART_MCR_DTR;
1544                 if (!tty->hw_stopped ||
1545                     !(tty->termios->c_cflag & CRTSCTS)) {
1546                         info->MCR |= UART_MCR_RTS;
1547                 }
1548                 local_irq_disable();
1549                 serial_out(info, UART_MCR, info->MCR);
1550                 local_irq_enable();
1551         }
1552         
1553         /* Handle turning off CRTSCTS */
1554         if ((old_termios->c_cflag & CRTSCTS) &&
1555             !(tty->termios->c_cflag & CRTSCTS)) {
1556                 tty->hw_stopped = 0;
1557                 rs_360_start(tty);
1558         }
1559 #endif
1560
1561 #if 0
1562         /*
1563          * No need to wake up processes in open wait, since they
1564          * sample the CLOCAL flag once, and don't recheck it.
1565          * XXX  It's not clear whether the current behavior is correct
1566          * or not.  Hence, this may change.....
1567          */
1568         if (!(old_termios->c_cflag & CLOCAL) &&
1569             (tty->termios->c_cflag & CLOCAL))
1570                 wake_up_interruptible(&info->open_wait);
1571 #endif
1572 }
1573
1574 /*
1575  * ------------------------------------------------------------
1576  * rs_close()
1577  * 
1578  * This routine is called when the serial port gets closed.  First, we
1579  * wait for the last remaining data to be sent.  Then, we unlink its
1580  * async structure from the interrupt chain if necessary, and we free
1581  * that IRQ if nothing is left in the chain.
1582  * ------------------------------------------------------------
1583  */
1584 static void rs_360_close(struct tty_struct *tty, struct file * filp)
1585 {
1586         ser_info_t *info = (ser_info_t *)tty->driver_data;
1587         /* struct async_state *state; */
1588         struct serial_state *state;
1589         unsigned long   flags;
1590         int             idx;
1591         volatile struct smc_regs        *smcp;
1592         volatile struct scc_regs        *sccp;
1593
1594         if (!info || serial_paranoia_check(info, tty->name, "rs_close"))
1595                 return;
1596
1597         state = info->state;
1598         
1599         local_irq_save(flags);
1600         
1601         if (tty_hung_up_p(filp)) {
1602                 DBG_CNT("before DEC-hung");
1603                 local_irq_restore(flags);
1604                 return;
1605         }
1606         
1607 #ifdef SERIAL_DEBUG_OPEN
1608         printk("rs_close ttys%d, count = %d\n", info->line, state->count);
1609 #endif
1610         if ((tty->count == 1) && (state->count != 1)) {
1611                 /*
1612                  * Uh, oh.  tty->count is 1, which means that the tty
1613                  * structure will be freed.  state->count should always
1614                  * be one in these conditions.  If it's greater than
1615                  * one, we've got real problems, since it means the
1616                  * serial port won't be shutdown.
1617                  */
1618                 printk("rs_close: bad serial port count; tty->count is 1, "
1619                        "state->count is %d\n", state->count);
1620                 state->count = 1;
1621         }
1622         if (--state->count < 0) {
1623                 printk("rs_close: bad serial port count for ttys%d: %d\n",
1624                        info->line, state->count);
1625                 state->count = 0;
1626         }
1627         if (state->count) {
1628                 DBG_CNT("before DEC-2");
1629                 local_irq_restore(flags);
1630                 return;
1631         }
1632         info->flags |= ASYNC_CLOSING;
1633         /*
1634          * Now we wait for the transmit buffer to clear; and we notify 
1635          * the line discipline to only process XON/XOFF characters.
1636          */
1637         tty->closing = 1;
1638         if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1639                 tty_wait_until_sent(tty, info->closing_wait);
1640         /*
1641          * At this point we stop accepting input.  To do this, we
1642          * disable the receive line status interrupts, and tell the
1643          * interrupt driver to stop checking the data ready bit in the
1644          * line status register.
1645          */
1646         info->read_status_mask &= ~BD_SC_EMPTY;
1647         if (info->flags & ASYNC_INITIALIZED) {
1648
1649                 idx = PORT_NUM(info->state->smc_scc_num);
1650                 if (info->state->smc_scc_num & NUM_IS_SCC) {
1651                         sccp = &pquicc->scc_regs[idx];
1652                         sccp->scc_sccm &= ~UART_SCCM_RX;
1653                         sccp->scc_gsmr.w.low &= ~SCC_GSMRL_ENR;
1654                 } else {
1655                         smcp = &pquicc->smc_regs[idx];
1656                         smcp->smc_smcm &= ~SMCM_RX;
1657                         smcp->smc_smcmr &= ~SMCMR_REN;
1658                 }
1659                 /*
1660                  * Before we drop DTR, make sure the UART transmitter
1661                  * has completely drained; this is especially
1662                  * important if there is a transmit FIFO!
1663                  */
1664                 rs_360_wait_until_sent(tty, info->timeout);
1665         }
1666         shutdown(info);
1667         if (tty->driver->flush_buffer)
1668                 tty->driver->flush_buffer(tty);
1669         tty_ldisc_flush(tty);           
1670         tty->closing = 0;
1671         info->event = 0;
1672         info->tty = 0;
1673         if (info->blocked_open) {
1674                 if (info->close_delay) {
1675                         msleep_interruptible(jiffies_to_msecs(info->close_delay));
1676                 }
1677                 wake_up_interruptible(&info->open_wait);
1678         }
1679         info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
1680         wake_up_interruptible(&info->close_wait);
1681         local_irq_restore(flags);
1682 }
1683
1684 /*
1685  * rs_wait_until_sent() --- wait until the transmitter is empty
1686  */
1687 static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout)
1688 {
1689         ser_info_t *info = (ser_info_t *)tty->driver_data;
1690         unsigned long orig_jiffies, char_time;
1691         /*int lsr;*/
1692         volatile QUICC_BD *bdp;
1693         
1694         if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent"))
1695                 return;
1696
1697 #ifdef maybe
1698         if (info->state->type == PORT_UNKNOWN)
1699                 return;
1700 #endif
1701
1702         orig_jiffies = jiffies;
1703         /*
1704          * Set the check interval to be 1/5 of the estimated time to
1705          * send a single character, and make it at least 1.  The check
1706          * interval should also be less than the timeout.
1707          * 
1708          * Note: we have to use pretty tight timings here to satisfy
1709          * the NIST-PCTS.
1710          */
1711         char_time = 1;
1712         if (timeout)
1713                 char_time = min(char_time, (unsigned long)timeout);
1714 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1715         printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
1716         printk("jiff=%lu...", jiffies);
1717 #endif
1718
1719         /* We go through the loop at least once because we can't tell
1720          * exactly when the last character exits the shifter.  There can
1721          * be at least two characters waiting to be sent after the buffers
1722          * are empty.
1723          */
1724         do {
1725 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1726                 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1727 #endif
1728 /*              current->counter = 0;    make us low-priority */
1729                 msleep_interruptible(jiffies_to_msecs(char_time));
1730                 if (signal_pending(current))
1731                         break;
1732                 if (timeout && ((orig_jiffies + timeout) < jiffies))
1733                         break;
1734                 /* The 'tx_cur' is really the next buffer to send.  We
1735                  * have to back up to the previous BD and wait for it
1736                  * to go.  This isn't perfect, because all this indicates
1737                  * is the buffer is available.  There are still characters
1738                  * in the CPM FIFO.
1739                  */
1740                 bdp = info->tx_cur;
1741                 if (bdp == info->tx_bd_base)
1742                         bdp += (TX_NUM_FIFO-1);
1743                 else
1744                         bdp--;
1745         } while (bdp->status & BD_SC_READY);
1746         current->state = TASK_RUNNING;
1747 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1748         printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1749 #endif
1750 }
1751
1752 /*
1753  * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
1754  */
1755 static void rs_360_hangup(struct tty_struct *tty)
1756 {
1757         ser_info_t *info = (ser_info_t *)tty->driver_data;
1758         struct serial_state *state = info->state;
1759         
1760         if (serial_paranoia_check(info, tty->name, "rs_hangup"))
1761                 return;
1762
1763         state = info->state;
1764         
1765         rs_360_flush_buffer(tty);
1766         shutdown(info);
1767         info->event = 0;
1768         state->count = 0;
1769         info->flags &= ~ASYNC_NORMAL_ACTIVE;
1770         info->tty = 0;
1771         wake_up_interruptible(&info->open_wait);
1772 }
1773
1774 /*
1775  * ------------------------------------------------------------
1776  * rs_open() and friends
1777  * ------------------------------------------------------------
1778  */
1779 static int block_til_ready(struct tty_struct *tty, struct file * filp,
1780                            ser_info_t *info)
1781 {
1782 #ifdef DO_THIS_LATER
1783         DECLARE_WAITQUEUE(wait, current);
1784 #endif
1785         struct serial_state *state = info->state;
1786         int             retval;
1787         int             do_clocal = 0;
1788
1789         /*
1790          * If the device is in the middle of being closed, then block
1791          * until it's done, and then try again.
1792          */
1793         if (tty_hung_up_p(filp) ||
1794             (info->flags & ASYNC_CLOSING)) {
1795                 if (info->flags & ASYNC_CLOSING)
1796                         interruptible_sleep_on(&info->close_wait);
1797 #ifdef SERIAL_DO_RESTART
1798                 if (info->flags & ASYNC_HUP_NOTIFY)
1799                         return -EAGAIN;
1800                 else
1801                         return -ERESTARTSYS;
1802 #else
1803                 return -EAGAIN;
1804 #endif
1805         }
1806
1807         /*
1808          * If non-blocking mode is set, or the port is not enabled,
1809          * then make the check up front and then exit.
1810          * If this is an SMC port, we don't have modem control to wait
1811          * for, so just get out here.
1812          */
1813         if ((filp->f_flags & O_NONBLOCK) ||
1814             (tty->flags & (1 << TTY_IO_ERROR)) ||
1815             !(info->state->smc_scc_num & NUM_IS_SCC)) {
1816                 info->flags |= ASYNC_NORMAL_ACTIVE;
1817                 return 0;
1818         }
1819
1820         if (tty->termios->c_cflag & CLOCAL)
1821                 do_clocal = 1;
1822         
1823         /*
1824          * Block waiting for the carrier detect and the line to become
1825          * free (i.e., not in use by the callout).  While we are in
1826          * this loop, state->count is dropped by one, so that
1827          * rs_close() knows when to free things.  We restore it upon
1828          * exit, either normal or abnormal.
1829          */
1830         retval = 0;
1831 #ifdef DO_THIS_LATER
1832         add_wait_queue(&info->open_wait, &wait);
1833 #ifdef SERIAL_DEBUG_OPEN
1834         printk("block_til_ready before block: ttys%d, count = %d\n",
1835                state->line, state->count);
1836 #endif
1837         local_irq_disable();
1838         if (!tty_hung_up_p(filp)) 
1839                 state->count--;
1840         local_irq_enable();
1841         info->blocked_open++;
1842         while (1) {
1843                 local_irq_disable();
1844                 if (tty->termios->c_cflag & CBAUD)
1845                         serial_out(info, UART_MCR,
1846                                    serial_inp(info, UART_MCR) |
1847                                    (UART_MCR_DTR | UART_MCR_RTS));
1848                 local_irq_enable();
1849                 set_current_state(TASK_INTERRUPTIBLE);
1850                 if (tty_hung_up_p(filp) ||
1851                     !(info->flags & ASYNC_INITIALIZED)) {
1852 #ifdef SERIAL_DO_RESTART
1853                         if (info->flags & ASYNC_HUP_NOTIFY)
1854                                 retval = -EAGAIN;
1855                         else
1856                                 retval = -ERESTARTSYS;  
1857 #else
1858                         retval = -EAGAIN;
1859 #endif
1860                         break;
1861                 }
1862                 if (!(info->flags & ASYNC_CLOSING) &&
1863                     (do_clocal || (serial_in(info, UART_MSR) &
1864                                    UART_MSR_DCD)))
1865                         break;
1866                 if (signal_pending(current)) {
1867                         retval = -ERESTARTSYS;
1868                         break;
1869                 }
1870 #ifdef SERIAL_DEBUG_OPEN
1871                 printk("block_til_ready blocking: ttys%d, count = %d\n",
1872                        info->line, state->count);
1873 #endif
1874                 schedule();
1875         }
1876         current->state = TASK_RUNNING;
1877         remove_wait_queue(&info->open_wait, &wait);
1878         if (!tty_hung_up_p(filp))
1879                 state->count++;
1880         info->blocked_open--;
1881 #ifdef SERIAL_DEBUG_OPEN
1882         printk("block_til_ready after blocking: ttys%d, count = %d\n",
1883                info->line, state->count);
1884 #endif
1885 #endif /* DO_THIS_LATER */
1886         if (retval)
1887                 return retval;
1888         info->flags |= ASYNC_NORMAL_ACTIVE;
1889         return 0;
1890 }
1891
1892 static int get_async_struct(int line, ser_info_t **ret_info)
1893 {
1894         struct serial_state *sstate;
1895
1896         sstate = rs_table + line;
1897         if (sstate->info) {
1898                 sstate->count++;
1899                 *ret_info = (ser_info_t *)sstate->info;
1900                 return 0;
1901         }
1902         else {
1903                 return -ENOMEM;
1904         }
1905 }
1906
1907 /*
1908  * This routine is called whenever a serial port is opened.  It
1909  * enables interrupts for a serial port, linking in its async structure into
1910  * the IRQ chain.   It also performs the serial-specific
1911  * initialization for the tty structure.
1912  */
1913 static int rs_360_open(struct tty_struct *tty, struct file * filp)
1914 {
1915         ser_info_t      *info;
1916         int             retval, line;
1917
1918         line = tty->index;
1919         if ((line < 0) || (line >= NR_PORTS))
1920                 return -ENODEV;
1921         retval = get_async_struct(line, &info);
1922         if (retval)
1923                 return retval;
1924         if (serial_paranoia_check(info, tty->name, "rs_open"))
1925                 return -ENODEV;
1926
1927 #ifdef SERIAL_DEBUG_OPEN
1928         printk("rs_open %s, count = %d\n", tty->name, info->state->count);
1929 #endif
1930         tty->driver_data = info;
1931         info->tty = tty;
1932
1933         /*
1934          * Start up serial port
1935          */
1936         retval = startup(info);
1937         if (retval)
1938                 return retval;
1939
1940         retval = block_til_ready(tty, filp, info);
1941         if (retval) {
1942 #ifdef SERIAL_DEBUG_OPEN
1943                 printk("rs_open returning after block_til_ready with %d\n",
1944                        retval);
1945 #endif
1946                 return retval;
1947         }
1948
1949 #ifdef SERIAL_DEBUG_OPEN
1950         printk("rs_open %s successful...", tty->name);
1951 #endif
1952         return 0;
1953 }
1954
1955 /*
1956  * /proc fs routines....
1957  */
1958
1959 static inline int line_info(char *buf, struct serial_state *state)
1960 {
1961 #ifdef notdef
1962         struct async_struct *info = state->info, scr_info;
1963         char    stat_buf[30], control, status;
1964 #endif
1965         int     ret;
1966
1967         ret = sprintf(buf, "%d: uart:%s port:%X irq:%d",
1968                       state->line,
1969                       (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC",
1970                       (unsigned int)(state->port), state->irq);
1971
1972         if (!state->port || (state->type == PORT_UNKNOWN)) {
1973                 ret += sprintf(buf+ret, "\n");
1974                 return ret;
1975         }
1976
1977 #ifdef notdef
1978         /*
1979          * Figure out the current RS-232 lines
1980          */
1981         if (!info) {
1982                 info = &scr_info;       /* This is just for serial_{in,out} */
1983
1984                 info->magic = SERIAL_MAGIC;
1985                 info->port = state->port;
1986                 info->flags = state->flags;
1987                 info->quot = 0;
1988                 info->tty = 0;
1989         }
1990         local_irq_disable();
1991         status = serial_in(info, UART_MSR);
1992         control = info ? info->MCR : serial_in(info, UART_MCR);
1993         local_irq_enable();
1994         
1995         stat_buf[0] = 0;
1996         stat_buf[1] = 0;
1997         if (control & UART_MCR_RTS)
1998                 strcat(stat_buf, "|RTS");
1999         if (status & UART_MSR_CTS)
2000                 strcat(stat_buf, "|CTS");
2001         if (control & UART_MCR_DTR)
2002                 strcat(stat_buf, "|DTR");
2003         if (status & UART_MSR_DSR)
2004                 strcat(stat_buf, "|DSR");
2005         if (status & UART_MSR_DCD)
2006                 strcat(stat_buf, "|CD");
2007         if (status & UART_MSR_RI)
2008                 strcat(stat_buf, "|RI");
2009
2010         if (info->quot) {
2011                 ret += sprintf(buf+ret, " baud:%d",
2012                                state->baud_base / info->quot);
2013         }
2014
2015         ret += sprintf(buf+ret, " tx:%d rx:%d",
2016                       state->icount.tx, state->icount.rx);
2017
2018         if (state->icount.frame)
2019                 ret += sprintf(buf+ret, " fe:%d", state->icount.frame);
2020         
2021         if (state->icount.parity)
2022                 ret += sprintf(buf+ret, " pe:%d", state->icount.parity);
2023         
2024         if (state->icount.brk)
2025                 ret += sprintf(buf+ret, " brk:%d", state->icount.brk);  
2026
2027         if (state->icount.overrun)
2028                 ret += sprintf(buf+ret, " oe:%d", state->icount.overrun);
2029
2030         /*
2031          * Last thing is the RS-232 status lines
2032          */
2033         ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2034 #endif
2035         return ret;
2036 }
2037
2038 int rs_360_read_proc(char *page, char **start, off_t off, int count,
2039                  int *eof, void *data)
2040 {
2041         int i, len = 0;
2042         off_t   begin = 0;
2043
2044         len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version);
2045         for (i = 0; i < NR_PORTS && len < 4000; i++) {
2046                 len += line_info(page + len, &rs_table[i]);
2047                 if (len+begin > off+count)
2048                         goto done;
2049                 if (len+begin < off) {
2050                         begin += len;
2051                         len = 0;
2052                 }
2053         }
2054         *eof = 1;
2055 done:
2056         if (off >= len+begin)
2057                 return 0;
2058         *start = page + (begin-off);
2059         return ((count < begin+len-off) ? count : begin+len-off);
2060 }
2061
2062 /*
2063  * ---------------------------------------------------------------------
2064  * rs_init() and friends
2065  *
2066  * rs_init() is called at boot-time to initialize the serial driver.
2067  * ---------------------------------------------------------------------
2068  */
2069
2070 /*
2071  * This routine prints out the appropriate serial driver version
2072  * number, and identifies which options were configured into this
2073  * driver.
2074  */
2075 static _INLINE_ void show_serial_version(void)
2076 {
2077         printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
2078 }
2079
2080
2081 /*
2082  * The serial console driver used during boot.  Note that these names
2083  * clash with those found in "serial.c", so we currently can't support
2084  * the 16xxx uarts and these at the same time.  I will fix this to become
2085  * an indirect function call from tty_io.c (or something).
2086  */
2087
2088 #ifdef CONFIG_SERIAL_CONSOLE
2089
2090 /*
2091  * Print a string to the serial port trying not to disturb any possible
2092  * real use of the port...
2093  */
2094 static void my_console_write(int idx, const char *s,
2095                                 unsigned count)
2096 {
2097         struct          serial_state    *ser;
2098         ser_info_t              *info;
2099         unsigned                i;
2100         QUICC_BD                *bdp, *bdbase;
2101         volatile struct smc_uart_pram   *up;
2102         volatile        u_char          *cp;
2103
2104         ser = rs_table + idx;
2105
2106
2107         /* If the port has been initialized for general use, we have
2108          * to use the buffer descriptors allocated there.  Otherwise,
2109          * we simply use the single buffer allocated.
2110          */
2111         if ((info = (ser_info_t *)ser->info) != NULL) {
2112                 bdp = info->tx_cur;
2113                 bdbase = info->tx_bd_base;
2114         }
2115         else {
2116                 /* Pointer to UART in parameter ram.
2117                 */
2118                 /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2119                 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
2120
2121                 /* Get the address of the host memory buffer.
2122                  */
2123                 bdp = bdbase = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2124         }
2125
2126         /*
2127          * We need to gracefully shut down the transmitter, disable
2128          * interrupts, then send our bytes out.
2129          */
2130
2131         /*
2132          * Now, do each character.  This is not as bad as it looks
2133          * since this is a holding FIFO and not a transmitting FIFO.
2134          * We could add the complexity of filling the entire transmit
2135          * buffer, but we would just wait longer between accesses......
2136          */
2137         for (i = 0; i < count; i++, s++) {
2138                 /* Wait for transmitter fifo to empty.
2139                  * Ready indicates output is ready, and xmt is doing
2140                  * that, not that it is ready for us to send.
2141                  */
2142                 while (bdp->status & BD_SC_READY);
2143
2144                 /* Send the character out.
2145                  */
2146                 cp = bdp->buf;
2147                 *cp = *s;
2148                 
2149                 bdp->length = 1;
2150                 bdp->status |= BD_SC_READY;
2151
2152                 if (bdp->status & BD_SC_WRAP)
2153                         bdp = bdbase;
2154                 else
2155                         bdp++;
2156
2157                 /* if a LF, also do CR... */
2158                 if (*s == 10) {
2159                         while (bdp->status & BD_SC_READY);
2160                         /* cp = __va(bdp->buf); */
2161                         cp = bdp->buf;
2162                         *cp = 13;
2163                         bdp->length = 1;
2164                         bdp->status |= BD_SC_READY;
2165
2166                         if (bdp->status & BD_SC_WRAP) {
2167                                 bdp = bdbase;
2168                         }
2169                         else {
2170                                 bdp++;
2171                         }
2172                 }
2173         }
2174
2175         /*
2176          * Finally, Wait for transmitter & holding register to empty
2177          *  and restore the IER
2178          */
2179         while (bdp->status & BD_SC_READY);
2180
2181         if (info)
2182                 info->tx_cur = (QUICC_BD *)bdp;
2183 }
2184
2185 static void serial_console_write(struct console *c, const char *s,
2186                                 unsigned count)
2187 {
2188 #ifdef CONFIG_KGDB
2189         /* Try to let stub handle output. Returns true if it did. */ 
2190         if (kgdb_output_string(s, count))
2191                 return;
2192 #endif
2193         my_console_write(c->index, s, count);
2194 }
2195
2196
2197
2198 /*void console_print_68360(const char *p)
2199 {
2200         const char *cp = p;
2201         int i;
2202
2203         for (i=0;cp[i]!=0;i++);
2204
2205         serial_console_write (p, i);
2206
2207         //Comment this if you want to have a strict interrupt-driven output
2208         //rs_fair_output();
2209
2210         return;
2211 }*/
2212
2213
2214
2215
2216
2217
2218 #ifdef CONFIG_XMON
2219 int
2220 xmon_360_write(const char *s, unsigned count)
2221 {
2222         my_console_write(0, s, count);
2223         return(count);
2224 }
2225 #endif
2226
2227 #ifdef CONFIG_KGDB
2228 void
2229 putDebugChar(char ch)
2230 {
2231         my_console_write(0, &ch, 1);
2232 }
2233 #endif
2234
2235 /*
2236  * Receive character from the serial port.  This only works well
2237  * before the port is initialized for real use.
2238  */
2239 static int my_console_wait_key(int idx, int xmon, char *obuf)
2240 {
2241         struct serial_state             *ser;
2242         u_char                  c, *cp;
2243         ser_info_t              *info;
2244         QUICC_BD                *bdp;
2245         volatile struct smc_uart_pram   *up;
2246         int                             i;
2247
2248         ser = rs_table + idx;
2249
2250         /* Get the address of the host memory buffer.
2251          * If the port has been initialized for general use, we must
2252          * use information from the port structure.
2253          */
2254         if ((info = (ser_info_t *)ser->info))
2255                 bdp = info->rx_cur;
2256         else
2257                 /* bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase]; */
2258                 bdp = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2259
2260         /* Pointer to UART in parameter ram.
2261          */
2262         /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2263         up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2264
2265         /*
2266          * We need to gracefully shut down the receiver, disable
2267          * interrupts, then read the input.
2268          * XMON just wants a poll.  If no character, return -1, else
2269          * return the character.
2270          */
2271         if (!xmon) {
2272                 while (bdp->status & BD_SC_EMPTY);
2273         }
2274         else {
2275                 if (bdp->status & BD_SC_EMPTY)
2276                         return -1;
2277         }
2278
2279         cp = (char *)bdp->buf;
2280
2281         if (obuf) {
2282                 i = c = bdp->length;
2283                 while (i-- > 0)
2284                         *obuf++ = *cp++;
2285         }
2286         else {
2287                 c = *cp;
2288         }
2289         bdp->status |= BD_SC_EMPTY;
2290
2291         if (info) {
2292                 if (bdp->status & BD_SC_WRAP) {
2293                         bdp = info->rx_bd_base;
2294                 }
2295                 else {
2296                         bdp++;
2297                 }
2298                 info->rx_cur = (QUICC_BD *)bdp;
2299         }
2300
2301         return((int)c);
2302 }
2303
2304 static int serial_console_wait_key(struct console *co)
2305 {
2306         return(my_console_wait_key(co->index, 0, NULL));
2307 }
2308
2309 #ifdef CONFIG_XMON
2310 int
2311 xmon_360_read_poll(void)
2312 {
2313         return(my_console_wait_key(0, 1, NULL));
2314 }
2315
2316 int
2317 xmon_360_read_char(void)
2318 {
2319         return(my_console_wait_key(0, 0, NULL));
2320 }
2321 #endif
2322
2323 #ifdef CONFIG_KGDB
2324 static char kgdb_buf[RX_BUF_SIZE], *kgdp;
2325 static int kgdb_chars;
2326
2327 unsigned char
2328 getDebugChar(void)
2329 {
2330         if (kgdb_chars <= 0) {
2331                 kgdb_chars = my_console_wait_key(0, 0, kgdb_buf);
2332                 kgdp = kgdb_buf;
2333         }
2334         kgdb_chars--;
2335
2336         return(*kgdp++);
2337 }
2338
2339 void kgdb_interruptible(int state)
2340 {
2341 }
2342 void kgdb_map_scc(void)
2343 {
2344         struct          serial_state *ser;
2345         uint            mem_addr;
2346         volatile        QUICC_BD                *bdp;
2347         volatile        smc_uart_t      *up;
2348
2349         cpmp = (cpm360_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
2350
2351         /* To avoid data cache CPM DMA coherency problems, allocate a
2352          * buffer in the CPM DPRAM.  This will work until the CPM and
2353          * serial ports are initialized.  At that time a memory buffer
2354          * will be allocated.
2355          * The port is already initialized from the boot procedure, all
2356          * we do here is give it a different buffer and make it a FIFO.
2357          */
2358
2359         ser = rs_table;
2360
2361         /* Right now, assume we are using SMCs.
2362         */
2363         up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];
2364
2365         /* Allocate space for an input FIFO, plus a few bytes for output.
2366          * Allocate bytes to maintain word alignment.
2367          */
2368         mem_addr = (uint)(&cpmp->cp_dpmem[0x1000]);
2369
2370         /* Set the physical address of the host memory buffers in
2371          * the buffer descriptors.
2372          */
2373         bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase];
2374         bdp->buf = mem_addr;
2375
2376         bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_tbase];
2377         bdp->buf = mem_addr+RX_BUF_SIZE;
2378
2379         up->smc_mrblr = RX_BUF_SIZE;            /* receive buffer length */
2380         up->smc_maxidl = RX_BUF_SIZE;
2381 }
2382 #endif
2383
2384 static struct tty_struct *serial_console_device(struct console *c, int *index)
2385 {
2386         *index = c->index;
2387         return serial_driver;
2388 }
2389
2390
2391 struct console sercons = {
2392         .name           = "ttyS",
2393         .write          = serial_console_write,
2394         .device         = serial_console_device,
2395         .wait_key       = serial_console_wait_key,
2396         .setup          = serial_console_setup,
2397         .flags          = CON_PRINTBUFFER,
2398         .index          = CONFIG_SERIAL_CONSOLE_PORT, 
2399 };
2400
2401
2402
2403 /*
2404  *      Register console.
2405  */
2406 long console_360_init(long kmem_start, long kmem_end)
2407 {
2408         register_console(&sercons);
2409         /*register_console (console_print_68360); - 2.0.38 only required a write
2410       function pointer. */
2411         return kmem_start;
2412 }
2413
2414 #endif
2415
2416 /* Index in baud rate table of the default console baud rate.
2417 */
2418 static  int     baud_idx;
2419
2420 static const struct tty_operations rs_360_ops = {
2421         .owner = THIS_MODULE,
2422         .open = rs_360_open,
2423         .close = rs_360_close,
2424         .write = rs_360_write,
2425         .put_char = rs_360_put_char,
2426         .write_room = rs_360_write_room,
2427         .chars_in_buffer = rs_360_chars_in_buffer,
2428         .flush_buffer = rs_360_flush_buffer,
2429         .ioctl = rs_360_ioctl,
2430         .throttle = rs_360_throttle,
2431         .unthrottle = rs_360_unthrottle,
2432         /* .send_xchar = rs_360_send_xchar, */
2433         .set_termios = rs_360_set_termios,
2434         .stop = rs_360_stop,
2435         .start = rs_360_start,
2436         .hangup = rs_360_hangup,
2437         /* .wait_until_sent = rs_360_wait_until_sent, */
2438         /* .read_proc = rs_360_read_proc, */
2439         .tiocmget = rs_360_tiocmget,
2440         .tiocmset = rs_360_tiocmset,
2441 };
2442
2443 static int __init rs_360_init(void)
2444 {
2445         struct serial_state * state;
2446         ser_info_t      *info;
2447         void       *mem_addr;
2448         uint            dp_addr, iobits;
2449         int                 i, j, idx;
2450         ushort          chan;
2451         QUICC_BD        *bdp;
2452         volatile        QUICC           *cp;
2453         volatile        struct smc_regs *sp;
2454         volatile        struct smc_uart_pram    *up;
2455         volatile        struct scc_regs *scp;
2456         volatile        struct uart_pram        *sup;
2457         /* volatile     immap_t         *immap; */
2458         
2459         serial_driver = alloc_tty_driver(NR_PORTS);
2460         if (!serial_driver)
2461                 return -1;
2462
2463         show_serial_version();
2464
2465         serial_driver->name = "ttyS";
2466         serial_driver->major = TTY_MAJOR;
2467         serial_driver->minor_start = 64;
2468         serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2469         serial_driver->subtype = SERIAL_TYPE_NORMAL;
2470         serial_driver->init_termios = tty_std_termios;
2471         serial_driver->init_termios.c_cflag =
2472                 baud_idx | CS8 | CREAD | HUPCL | CLOCAL;
2473         serial_driver->flags = TTY_DRIVER_REAL_RAW;
2474         tty_set_operations(serial_driver, &rs_360_ops);
2475         
2476         if (tty_register_driver(serial_driver))
2477                 panic("Couldn't register serial driver\n");
2478
2479         cp = pquicc;    /* Get pointer to Communication Processor */
2480         /* immap = (immap_t *)IMAP_ADDR; */     /* and to internal registers */
2481
2482
2483         /* Configure SCC2, SCC3, and SCC4 instead of port A parallel I/O.
2484          */
2485         /* The "standard" configuration through the 860.
2486         */
2487 /*      immap->im_ioport.iop_papar |= 0x00fc; */
2488 /*      immap->im_ioport.iop_padir &= ~0x00fc; */
2489 /*      immap->im_ioport.iop_paodr &= ~0x00fc; */
2490         cp->pio_papar |= 0x00fc;
2491         cp->pio_padir &= ~0x00fc;
2492         /* cp->pio_paodr &= ~0x00fc; */
2493
2494
2495         /* Since we don't yet do modem control, connect the port C pins
2496          * as general purpose I/O.  This will assert CTS and CD for the
2497          * SCC ports.
2498          */
2499         /* FIXME: see 360um p.7-365 and 860um p.34-12 
2500          * I can't make sense of these bits - mleslie*/
2501 /*      immap->im_ioport.iop_pcdir |= 0x03c6; */
2502 /*      immap->im_ioport.iop_pcpar &= ~0x03c6; */
2503
2504 /*      cp->pio_pcdir |= 0x03c6; */
2505 /*      cp->pio_pcpar &= ~0x03c6; */
2506
2507
2508
2509         /* Connect SCC2 and SCC3 to NMSI.  Connect BRG3 to SCC2 and
2510          * BRG4 to SCC3.
2511          */
2512         cp->si_sicr &= ~0x00ffff00;
2513         cp->si_sicr |=  0x001b1200;
2514
2515 #ifdef CONFIG_PP04
2516         /* Frequentis PP04 forced to RS-232 until we know better.
2517          * Port C 12 and 13 low enables RS-232 on SCC3 and SCC4.
2518          */
2519         immap->im_ioport.iop_pcdir |= 0x000c;
2520         immap->im_ioport.iop_pcpar &= ~0x000c;
2521         immap->im_ioport.iop_pcdat &= ~0x000c;
2522
2523         /* This enables the TX driver.
2524         */
2525         cp->cp_pbpar &= ~0x6000;
2526         cp->cp_pbdat &= ~0x6000;
2527 #endif
2528
2529         for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
2530                 state->magic = SSTATE_MAGIC;
2531                 state->line = i;
2532                 state->type = PORT_UNKNOWN;
2533                 state->custom_divisor = 0;
2534                 state->close_delay = 5*HZ/10;
2535                 state->closing_wait = 30*HZ;
2536                 state->icount.cts = state->icount.dsr = 
2537                         state->icount.rng = state->icount.dcd = 0;
2538                 state->icount.rx = state->icount.tx = 0;
2539                 state->icount.frame = state->icount.parity = 0;
2540                 state->icount.overrun = state->icount.brk = 0;
2541                 printk(KERN_INFO "ttyS%d at irq 0x%02x is an %s\n",
2542                        i, (unsigned int)(state->irq),
2543                        (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC");
2544
2545 #ifdef CONFIG_SERIAL_CONSOLE
2546                 /* If we just printed the message on the console port, and
2547                  * we are about to initialize it for general use, we have
2548                  * to wait a couple of character times for the CR/NL to
2549                  * make it out of the transmit buffer.
2550                  */
2551                 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2552                         mdelay(8);
2553
2554
2555 /*              idx = PORT_NUM(info->state->smc_scc_num); */
2556 /*              if (info->state->smc_scc_num & NUM_IS_SCC) */
2557 /*                      chan = scc_chan_map[idx]; */
2558 /*              else */
2559 /*                      chan = smc_chan_map[idx]; */
2560
2561 /*              cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG; */
2562 /*              while (cp->cp_cr & CPM_CR_FLG); */
2563
2564 #endif
2565                 /* info = kmalloc(sizeof(ser_info_t), GFP_KERNEL); */
2566                 info = &quicc_ser_info[i];
2567                 if (info) {
2568                         memset (info, 0, sizeof(ser_info_t));
2569                         info->magic = SERIAL_MAGIC;
2570                         info->line = i;
2571                         info->flags = state->flags;
2572                         INIT_WORK(&info->tqueue, do_softint, info);
2573                         INIT_WORK(&info->tqueue_hangup, do_serial_hangup, info);
2574                         init_waitqueue_head(&info->open_wait);
2575                         init_waitqueue_head(&info->close_wait);
2576                         info->state = state;
2577                         state->info = (struct async_struct *)info;
2578
2579                         /* We need to allocate a transmit and receive buffer
2580                          * descriptors from dual port ram, and a character
2581                          * buffer area from host mem.
2582                          */
2583                         dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * RX_NUM_FIFO);
2584
2585                         /* Allocate space for FIFOs in the host memory.
2586                          *  (for now this is from a static array of buffers :(
2587                          */
2588                         /* mem_addr = m360_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE); */
2589                         /* mem_addr = kmalloc (RX_NUM_FIFO * RX_BUF_SIZE, GFP_BUFFER); */
2590                         mem_addr = &rx_buf_pool[i * RX_NUM_FIFO * RX_BUF_SIZE];
2591
2592                         /* Set the physical address of the host memory
2593                          * buffers in the buffer descriptors, and the
2594                          * virtual address for us to work with.
2595                          */
2596                         bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2597                         info->rx_cur = info->rx_bd_base = bdp;
2598
2599                         /* initialize rx buffer descriptors */
2600                         for (j=0; j<(RX_NUM_FIFO-1); j++) {
2601                                 bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2602                                 bdp->status = BD_SC_EMPTY | BD_SC_INTRPT;
2603                                 mem_addr += RX_BUF_SIZE;
2604                                 bdp++;
2605                         }
2606                         bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2607                         bdp->status = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
2608
2609
2610                         idx = PORT_NUM(info->state->smc_scc_num);
2611                         if (info->state->smc_scc_num & NUM_IS_SCC) {
2612
2613 #if defined (CONFIG_UCQUICC) && 1
2614                                 /* set the transceiver mode to RS232 */
2615                                 sipex_mode_bits &= ~(uint)SIPEX_MODE(idx,0x0f); /* clear current mode */
2616                                 sipex_mode_bits |= (uint)SIPEX_MODE(idx,0x02);
2617                                 *(uint *)_periph_base = sipex_mode_bits;
2618                                 /* printk ("sipex bits = 0x%08x\n", sipex_mode_bits); */
2619 #endif
2620                         }
2621
2622                         dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * TX_NUM_FIFO);
2623
2624                         /* Allocate space for FIFOs in the host memory.
2625                         */
2626                         /* mem_addr = m360_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE); */
2627                         /* mem_addr = kmalloc (TX_NUM_FIFO * TX_BUF_SIZE, GFP_BUFFER); */
2628                         mem_addr = &tx_buf_pool[i * TX_NUM_FIFO * TX_BUF_SIZE];
2629
2630                         /* Set the physical address of the host memory
2631                          * buffers in the buffer descriptors, and the
2632                          * virtual address for us to work with.
2633                          */
2634                         /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2635                         bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2636                         info->tx_cur = info->tx_bd_base = (QUICC_BD *)bdp;
2637
2638                         /* initialize tx buffer descriptors */
2639                         for (j=0; j<(TX_NUM_FIFO-1); j++) {
2640                                 bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2641                                 bdp->status = BD_SC_INTRPT;
2642                                 mem_addr += TX_BUF_SIZE;
2643                                 bdp++;
2644                         }
2645                         bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2646                         bdp->status = (BD_SC_WRAP | BD_SC_INTRPT);
2647
2648                         if (info->state->smc_scc_num & NUM_IS_SCC) {
2649                                 scp = &pquicc->scc_regs[idx];
2650                                 sup = &pquicc->pram[info->state->port].scc.pscc.u;
2651                                 sup->rbase = dp_addr;
2652                                 sup->tbase = dp_addr;
2653
2654                                 /* Set up the uart parameters in the
2655                                  * parameter ram.
2656                                  */
2657                                 sup->rfcr = SMC_EB;
2658                                 sup->tfcr = SMC_EB;
2659
2660                                 /* Set this to 1 for now, so we get single
2661                                  * character interrupts.  Using idle charater
2662                                  * time requires some additional tuning.
2663                                  */
2664                                 sup->mrblr = 1;
2665                                 sup->max_idl = 0;
2666                                 sup->brkcr = 1;
2667                                 sup->parec = 0;
2668                                 sup->frmer = 0;
2669                                 sup->nosec = 0;
2670                                 sup->brkec = 0;
2671                                 sup->uaddr1 = 0;
2672                                 sup->uaddr2 = 0;
2673                                 sup->toseq = 0;
2674                                 {
2675                                         int i;
2676                                         for (i=0;i<8;i++)
2677                                                 sup->cc[i] = 0x8000;
2678                                 }
2679                                 sup->rccm = 0xc0ff;
2680
2681                                 /* Send the CPM an initialize command.
2682                                 */
2683                                 chan = scc_chan_map[idx];
2684
2685                                 /* execute the INIT RX & TX PARAMS command for this channel. */
2686                                 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2687                                 while (cp->cp_cr & CPM_CR_FLG);
2688
2689                                 /* Set UART mode, 8 bit, no parity, one stop.
2690                                  * Enable receive and transmit.
2691                                  */
2692                                 scp->scc_gsmr.w.high = 0;
2693                                 scp->scc_gsmr.w.low = 
2694                                         (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2695
2696                                 /* Disable all interrupts and clear all pending
2697                                  * events.
2698                                  */
2699                                 scp->scc_sccm = 0;
2700                                 scp->scc_scce = 0xffff;
2701                                 scp->scc_dsr = 0x7e7e;
2702                                 scp->scc_psmr = 0x3000;
2703
2704                                 /* If the port is the console, enable Rx and Tx.
2705                                 */
2706 #ifdef CONFIG_SERIAL_CONSOLE
2707                                 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2708                                         scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
2709 #endif
2710                         }
2711                         else {
2712                                 /* Configure SMCs Tx/Rx instead of port B
2713                                  * parallel I/O.
2714                                  */
2715                                 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2716                                 up->rbase = dp_addr;
2717
2718                                 iobits = 0xc0 << (idx * 4);
2719                                 cp->pip_pbpar |= iobits;
2720                                 cp->pip_pbdir &= ~iobits;
2721                                 cp->pip_pbodr &= ~iobits;
2722
2723
2724                                 /* Connect the baud rate generator to the
2725                                  * SMC based upon index in rs_table.  Also
2726                                  * make sure it is connected to NMSI.
2727                                  */
2728                                 cp->si_simode &= ~(0xffff << (idx * 16));
2729                                 cp->si_simode |= (i << ((idx * 16) + 12));
2730
2731                                 up->tbase = dp_addr;
2732
2733                                 /* Set up the uart parameters in the
2734                                  * parameter ram.
2735                                  */
2736                                 up->rfcr = SMC_EB;
2737                                 up->tfcr = SMC_EB;
2738
2739                                 /* Set this to 1 for now, so we get single
2740                                  * character interrupts.  Using idle charater
2741                                  * time requires some additional tuning.
2742                                  */
2743                                 up->mrblr = 1;
2744                                 up->max_idl = 0;
2745                                 up->brkcr = 1;
2746
2747                                 /* Send the CPM an initialize command.
2748                                 */
2749                                 chan = smc_chan_map[idx];
2750
2751                                 cp->cp_cr = mk_cr_cmd(chan,
2752                                                                           CPM_CR_INIT_TRX) | CPM_CR_FLG;
2753 #ifdef CONFIG_SERIAL_CONSOLE
2754                                 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2755                                         printk("");
2756 #endif
2757                                 while (cp->cp_cr & CPM_CR_FLG);
2758
2759                                 /* Set UART mode, 8 bit, no parity, one stop.
2760                                  * Enable receive and transmit.
2761                                  */
2762                                 sp = &cp->smc_regs[idx];
2763                                 sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
2764
2765                                 /* Disable all interrupts and clear all pending
2766                                  * events.
2767                                  */
2768                                 sp->smc_smcm = 0;
2769                                 sp->smc_smce = 0xff;
2770
2771                                 /* If the port is the console, enable Rx and Tx.
2772                                 */
2773 #ifdef CONFIG_SERIAL_CONSOLE
2774                                 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2775                                         sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
2776 #endif
2777                         }
2778
2779                         /* Install interrupt handler.
2780                         */
2781                         /* cpm_install_handler(IRQ_MACHSPEC | state->irq, rs_360_interrupt, info);  */
2782                         /*request_irq(IRQ_MACHSPEC | state->irq, rs_360_interrupt, */
2783                         request_irq(state->irq, rs_360_interrupt,
2784                                                 IRQ_FLG_LOCK, "ttyS", (void *)info);
2785
2786                         /* Set up the baud rate generator.
2787                         */
2788                         m360_cpm_setbrg(i, baud_table[baud_idx]);
2789
2790                 }
2791         }
2792
2793         return 0;
2794 }
2795 module_init(rs_360_init);
2796
2797 /* This must always be called before the rs_360_init() function, otherwise
2798  * it blows away the port control information.
2799  */
2800 //static int __init serial_console_setup( struct console *co, char *options)
2801 int serial_console_setup( struct console *co, char *options)
2802 {
2803         struct          serial_state    *ser;
2804         uint            mem_addr, dp_addr, bidx, idx, iobits;
2805         ushort          chan;
2806         QUICC_BD        *bdp;
2807         volatile        QUICC                   *cp;
2808         volatile        struct smc_regs *sp;
2809         volatile        struct scc_regs *scp;
2810         volatile        struct smc_uart_pram    *up;
2811         volatile        struct uart_pram                *sup;
2812
2813 /* mleslie TODO:
2814  * add something to the 68k bootloader to store a desired initial console baud rate */
2815
2816 /*      bd_t                                            *bd; */ /* a board info struct used by EPPC-bug */
2817 /*      bd = (bd_t *)__res; */
2818
2819         for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)
2820          /* if (bd->bi_baudrate == baud_table[bidx]) */
2821                 if (CONSOLE_BAUDRATE == baud_table[bidx])
2822                         break;
2823
2824         /* co->cflag = CREAD|CLOCAL|bidx|CS8; */
2825         baud_idx = bidx;
2826
2827         ser = rs_table + CONFIG_SERIAL_CONSOLE_PORT;
2828
2829         cp = pquicc;    /* Get pointer to Communication Processor */
2830
2831         idx = PORT_NUM(ser->smc_scc_num);
2832         if (ser->smc_scc_num & NUM_IS_SCC) {
2833
2834                 /* TODO: need to set up SCC pin assignment etc. here */
2835                 
2836         }
2837         else {
2838                 iobits = 0xc0 << (idx * 4);
2839                 cp->pip_pbpar |= iobits;
2840                 cp->pip_pbdir &= ~iobits;
2841                 cp->pip_pbodr &= ~iobits;
2842
2843                 /* Connect the baud rate generator to the
2844                  * SMC based upon index in rs_table.  Also
2845                  * make sure it is connected to NMSI.
2846                  */
2847                 cp->si_simode &= ~(0xffff << (idx * 16));
2848                 cp->si_simode |= (idx << ((idx * 16) + 12));
2849         }
2850
2851         /* When we get here, the CPM has been reset, so we need
2852          * to configure the port.
2853          * We need to allocate a transmit and receive buffer descriptor
2854          * from dual port ram, and a character buffer area from host mem.
2855          */
2856
2857         /* Allocate space for two buffer descriptors in the DP ram.
2858         */
2859         dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * CONSOLE_NUM_FIFO);
2860
2861         /* Allocate space for two 2 byte FIFOs in the host memory.
2862          */
2863         /* mem_addr = m360_cpm_hostalloc(8); */
2864         mem_addr = (uint)console_fifos;
2865
2866
2867         /* Set the physical address of the host memory buffers in
2868          * the buffer descriptors.
2869          */
2870         /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2871         bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2872         bdp->buf = (char *)mem_addr;
2873         (bdp+1)->buf = (char *)(mem_addr+4);
2874
2875         /* For the receive, set empty and wrap.
2876          * For transmit, set wrap.
2877          */
2878         bdp->status = BD_SC_EMPTY | BD_SC_WRAP;
2879         (bdp+1)->status = BD_SC_WRAP;
2880
2881         /* Set up the uart parameters in the parameter ram.
2882          */
2883         if (ser->smc_scc_num & NUM_IS_SCC) {
2884                 scp = &cp->scc_regs[idx];
2885                 /* sup = (scc_uart_t *)&cp->cp_dparam[ser->port]; */
2886                 sup = &pquicc->pram[ser->port].scc.pscc.u;
2887
2888                 sup->rbase = dp_addr;
2889                 sup->tbase = dp_addr + sizeof(QUICC_BD);
2890
2891                 /* Set up the uart parameters in the
2892                  * parameter ram.
2893                  */
2894                 sup->rfcr = SMC_EB;
2895                 sup->tfcr = SMC_EB;
2896
2897                 /* Set this to 1 for now, so we get single
2898                  * character interrupts.  Using idle charater
2899                  * time requires some additional tuning.
2900                  */
2901                 sup->mrblr = 1;
2902                 sup->max_idl = 0;
2903                 sup->brkcr = 1;
2904                 sup->parec = 0;
2905                 sup->frmer = 0;
2906                 sup->nosec = 0;
2907                 sup->brkec = 0;
2908                 sup->uaddr1 = 0;
2909                 sup->uaddr2 = 0;
2910                 sup->toseq = 0;
2911                 {
2912                         int i;
2913                         for (i=0;i<8;i++)
2914                                 sup->cc[i] = 0x8000;
2915                 }
2916                 sup->rccm = 0xc0ff;
2917
2918                 /* Send the CPM an initialize command.
2919                 */
2920                 chan = scc_chan_map[idx];
2921
2922                 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2923                 while (cp->cp_cr & CPM_CR_FLG);
2924
2925                 /* Set UART mode, 8 bit, no parity, one stop.
2926                  * Enable receive and transmit.
2927                  */
2928                 scp->scc_gsmr.w.high = 0;
2929                 scp->scc_gsmr.w.low = 
2930                         (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2931
2932                 /* Disable all interrupts and clear all pending
2933                  * events.
2934                  */
2935                 scp->scc_sccm = 0;
2936                 scp->scc_scce = 0xffff;
2937                 scp->scc_dsr = 0x7e7e;
2938                 scp->scc_psmr = 0x3000;
2939
2940                 scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
2941
2942         }
2943         else {
2944                 /* up = (smc_uart_t *)&cp->cp_dparam[ser->port]; */
2945                 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
2946
2947                 up->rbase = dp_addr;    /* Base of receive buffer desc. */
2948                 up->tbase = dp_addr+sizeof(QUICC_BD);   /* Base of xmt buffer desc. */
2949                 up->rfcr = SMC_EB;
2950                 up->tfcr = SMC_EB;
2951
2952                 /* Set this to 1 for now, so we get single character interrupts.
2953                 */
2954                 up->mrblr = 1;          /* receive buffer length */
2955                 up->max_idl = 0;                /* wait forever for next char */
2956
2957                 /* Send the CPM an initialize command.
2958                 */
2959                 chan = smc_chan_map[idx];
2960                 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2961                 while (cp->cp_cr & CPM_CR_FLG);
2962
2963                 /* Set UART mode, 8 bit, no parity, one stop.
2964                  * Enable receive and transmit.
2965                  */
2966                 sp = &cp->smc_regs[idx];
2967                 sp->smc_smcmr = smcr_mk_clen(9) |  SMCMR_SM_UART;
2968
2969                 /* And finally, enable Rx and Tx.
2970                 */
2971                 sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
2972         }
2973
2974         /* Set up the baud rate generator.
2975         */
2976         /* m360_cpm_setbrg((ser - rs_table), bd->bi_baudrate); */
2977         m360_cpm_setbrg((ser - rs_table), CONSOLE_BAUDRATE);
2978
2979         return 0;
2980 }
2981
2982 /*
2983  * Local variables:
2984  *  c-indent-level: 4
2985  *  c-basic-offset: 4
2986  *  tab-width: 4
2987  * End:
2988  */