135376992a576c4ea09f9a085ff7e02fb2259afb
[linux-2.6.git] / drivers / scsi / NCR53c406a.c
1 /* 
2  *  NCR53c406.c
3  *  Low-level SCSI driver for NCR53c406a chip.
4  *  Copyright (C) 1994, 1995, 1996 Normunds Saumanis (normunds@fi.ibm.com)
5  * 
6  *  LILO command line usage: ncr53c406a=<PORTBASE>[,<IRQ>[,<FASTPIO>]]
7  *  Specify IRQ = 0 for non-interrupt driven mode.
8  *  FASTPIO = 1 for fast pio mode, 0 for slow mode.
9  *
10  *  This program is free software; you can redistribute it and/or modify it
11  *  under the terms of the GNU General Public License as published by the
12  *  Free Software Foundation; either version 2, or (at your option) any
13  *  later version.
14  *
15  *  This program is distributed in the hope that it will be useful, but
16  *  WITHOUT ANY WARRANTY; without even the implied warranty of
17  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18  *  General Public License for more details.
19  *
20  */
21
22 #define NCR53C406A_DEBUG 0
23 #define VERBOSE_NCR53C406A_DEBUG 0
24
25 /* Set this to 1 for PIO mode (recommended) or to 0 for DMA mode */
26 #define USE_PIO 1
27
28 #define USE_BIOS 0
29                                 /* #define BIOS_ADDR 0xD8000 *//* define this if autoprobe fails */
30                                 /* #define PORT_BASE 0x330 *//* define this if autoprobe fails */
31                                 /* #define IRQ_LEV   0  *//* define this if autoprobe fails */
32 #define DMA_CHAN  5             /* this is ignored if DMA is disabled */
33
34 /* Set this to 0 if you encounter kernel lockups while transferring 
35  * data in PIO mode */
36 #define USE_FAST_PIO 1
37
38 /* ============= End of user configurable parameters ============= */
39
40 #include <linux/module.h>
41
42 #include <linux/errno.h>
43 #include <linux/ioport.h>
44 #include <linux/sched.h>
45 #include <linux/interrupt.h>
46 #include <linux/proc_fs.h>
47 #include <linux/stat.h>
48 #include <linux/init.h>
49 #include <linux/bitops.h>
50 #include <asm/io.h>
51 #include <asm/dma.h>
52 #include <asm/irq.h>
53
54 #include <linux/blkdev.h>
55 #include <linux/spinlock.h>
56 #include "scsi.h"
57 #include <scsi/scsi_host.h>
58
59 /* ============================================================= */
60
61 #define WATCHDOG 5000000
62
63 #define SYNC_MODE 0             /* Synchronous transfer mode */
64
65 #ifdef DEBUG
66 #undef NCR53C406A_DEBUG
67 #define NCR53C406A_DEBUG 1
68 #endif
69
70 #if USE_PIO
71 #define USE_DMA 0
72 #else
73 #define USE_DMA 1
74 #endif
75
76 /* Default configuration */
77 #define C1_IMG   0x07           /* ID=7 */
78 #define C2_IMG   0x48           /* FE SCSI2 */
79 #if USE_DMA
80 #define C3_IMG   0x21           /* CDB TE */
81 #else
82 #define C3_IMG   0x20           /* CDB */
83 #endif
84 #define C4_IMG   0x04           /* ANE */
85 #define C5_IMG   0xb6           /* AA PI SIE POL */
86
87 #define REG0 (outb(C4_IMG, CONFIG4))
88 #define REG1 (outb(C5_IMG, CONFIG5))
89
90 #if NCR53C406A_DEBUG
91 #define DEB(x) x
92 #else
93 #define DEB(x)
94 #endif
95
96 #if VERBOSE_NCR53C406A_DEBUG
97 #define VDEB(x) x
98 #else
99 #define VDEB(x)
100 #endif
101
102 #define LOAD_DMA_COUNT(count) \
103   outb(count & 0xff, TC_LSB); \
104   outb((count >> 8) & 0xff, TC_MSB); \
105   outb((count >> 16) & 0xff, TC_HIGH);
106
107 /* Chip commands */
108 #define DMA_OP               0x80
109
110 #define SCSI_NOP             0x00
111 #define FLUSH_FIFO           0x01
112 #define CHIP_RESET           0x02
113 #define SCSI_RESET           0x03
114 #define RESELECT             0x40
115 #define SELECT_NO_ATN        0x41
116 #define SELECT_ATN           0x42
117 #define SELECT_ATN_STOP      0x43
118 #define ENABLE_SEL           0x44
119 #define DISABLE_SEL          0x45
120 #define SELECT_ATN3          0x46
121 #define RESELECT3            0x47
122 #define TRANSFER_INFO        0x10
123 #define INIT_CMD_COMPLETE    0x11
124 #define MSG_ACCEPT           0x12
125 #define TRANSFER_PAD         0x18
126 #define SET_ATN              0x1a
127 #define RESET_ATN            0x1b
128 #define SEND_MSG             0x20
129 #define SEND_STATUS          0x21
130 #define SEND_DATA            0x22
131 #define DISCONN_SEQ          0x23
132 #define TERMINATE_SEQ        0x24
133 #define TARG_CMD_COMPLETE    0x25
134 #define DISCONN              0x27
135 #define RECV_MSG             0x28
136 #define RECV_CMD             0x29
137 #define RECV_DATA            0x2a
138 #define RECV_CMD_SEQ         0x2b
139 #define TARGET_ABORT_DMA     0x04
140
141 /*----------------------------------------------------------------*/
142 /* the following will set the monitor border color (useful to find
143    where something crashed or gets stuck at */
144 /* 1 = blue
145    2 = green
146    3 = cyan
147    4 = red
148    5 = magenta
149    6 = yellow
150    7 = white
151 */
152
153 #if NCR53C406A_DEBUG
154 #define rtrc(i) {inb(0x3da);outb(0x31,0x3c0);outb((i),0x3c0);}
155 #else
156 #define rtrc(i) {}
157 #endif
158 /*----------------------------------------------------------------*/
159
160 enum Phase {
161         idle,
162         data_out,
163         data_in,
164         command_ph,
165         status_ph,
166         message_out,
167         message_in
168 };
169
170 /* Static function prototypes */
171 static void NCR53c406a_intr(int, void *, struct pt_regs *);
172 static irqreturn_t do_NCR53c406a_intr(int, void *, struct pt_regs *);
173 static void chip_init(void);
174 static void calc_port_addr(void);
175 #ifndef IRQ_LEV
176 static int irq_probe(void);
177 #endif
178
179 /* ================================================================= */
180
181 #if USE_BIOS
182 static void *bios_base;
183 #endif
184
185 #ifdef PORT_BASE
186 static int port_base = PORT_BASE;
187 #else
188 static int port_base;
189 #endif
190
191 #ifdef IRQ_LEV
192 static int irq_level = IRQ_LEV;
193 #else
194 static int irq_level = -1;      /* 0 is 'no irq', so use -1 for 'uninitialized' */
195 #endif
196
197 #if USE_DMA
198 static int dma_chan;
199 #endif
200
201 #if USE_PIO
202 static int fast_pio = USE_FAST_PIO;
203 #endif
204
205 static Scsi_Cmnd *current_SC;
206 static char info_msg[256];
207
208 /* ================================================================= */
209
210 /* possible BIOS locations */
211 #if USE_BIOS
212 static void *addresses[] = {
213         (void *) 0xd8000,
214         (void *) 0xc8000
215 };
216 #define ADDRESS_COUNT (sizeof( addresses ) / sizeof( unsigned ))
217 #endif                          /* USE_BIOS */
218
219 /* possible i/o port addresses */
220 static unsigned short ports[] = { 0x230, 0x330, 0x280, 0x290, 0x330, 0x340, 0x300, 0x310, 0x348, 0x350 };
221 #define PORT_COUNT (sizeof( ports ) / sizeof( unsigned short ))
222
223 /* possible interrupt channels */
224 static unsigned short intrs[] = { 10, 11, 12, 15 };
225 #define INTR_COUNT (sizeof( intrs ) / sizeof( unsigned short ))
226
227 /* signatures for NCR 53c406a based controllers */
228 #if USE_BIOS
229 struct signature {
230         char *signature;
231         int sig_offset;
232         int sig_length;
233 } signatures[] __initdata = {
234         /*          1         2         3         4         5         6 */
235         /* 123456789012345678901234567890123456789012345678901234567890 */
236         {
237 "Copyright (C) Acculogic, Inc.\r\n2.8M Diskette Extension Bios ver 4.04.03 03/01/1993", 61, 82},};
238
239 #define SIGNATURE_COUNT (sizeof( signatures ) / sizeof( struct signature ))
240 #endif                          /* USE_BIOS */
241
242 /* ============================================================ */
243
244 /* Control Register Set 0 */
245 static int TC_LSB;              /* transfer counter lsb         */
246 static int TC_MSB;              /* transfer counter msb */
247 static int SCSI_FIFO;           /* scsi fifo register   */
248 static int CMD_REG;             /* command register             */
249 static int STAT_REG;            /* status register              */
250 static int DEST_ID;             /* selection/reselection bus id */
251 static int INT_REG;             /* interrupt status register    */
252 static int SRTIMOUT;            /* select/reselect timeout reg  */
253 static int SEQ_REG;             /* sequence step register       */
254 static int SYNCPRD;             /* synchronous transfer period  */
255 static int FIFO_FLAGS;          /* indicates # of bytes in fifo */
256 static int SYNCOFF;             /* synchronous offset register  */
257 static int CONFIG1;             /* configuration register       */
258 static int CLKCONV;             /* clock conversion reg */
259                                 /*static int TESTREG;*//* test mode register           */
260 static int CONFIG2;             /* Configuration 2 Register     */
261 static int CONFIG3;             /* Configuration 3 Register     */
262 static int CONFIG4;             /* Configuration 4 Register     */
263 static int TC_HIGH;             /* Transfer Counter High */
264                                 /*static int FIFO_BOTTOM;*//* Reserve FIFO byte register   */
265
266 /* Control Register Set 1 */
267                                 /*static int JUMPER_SENSE;*//* Jumper sense port reg (r/w) */
268                                 /*static int SRAM_PTR;*//* SRAM address pointer reg (r/w) */
269                                 /*static int SRAM_DATA;*//* SRAM data register (r/w) */
270 static int PIO_FIFO;            /* PIO FIFO registers (r/w) */
271                                 /*static int PIO_FIFO1;*//*  */
272                                 /*static int PIO_FIFO2;*//*  */
273                                 /*static int PIO_FIFO3;*//*  */
274 static int PIO_STATUS;          /* PIO status (r/w) */
275                                 /*static int ATA_CMD;*//* ATA command/status reg (r/w) */
276                                 /*static int ATA_ERR;*//* ATA features/error register (r/w) */
277 static int PIO_FLAG;            /* PIO flag interrupt enable (r/w) */
278 static int CONFIG5;             /* Configuration 5 register (r/w) */
279                                 /*static int SIGNATURE;*//* Signature Register (r) */
280                                 /*static int CONFIG6;*//* Configuration 6 register (r) */
281
282 /* ============================================================== */
283
284 #if USE_DMA
285 static __inline__ int NCR53c406a_dma_setup(unsigned char *ptr, unsigned int count, unsigned char mode)
286 {
287         unsigned limit;
288         unsigned long flags = 0;
289
290         VDEB(printk("dma: before count=%d   ", count));
291         if (dma_chan <= 3) {
292                 if (count > 65536)
293                         count = 65536;
294                 limit = 65536 - (((unsigned) ptr) & 0xFFFF);
295         } else {
296                 if (count > (65536 << 1))
297                         count = (65536 << 1);
298                 limit = (65536 << 1) - (((unsigned) ptr) & 0x1FFFF);
299         }
300
301         if (count > limit)
302                 count = limit;
303
304         VDEB(printk("after count=%d\n", count));
305         if ((count & 1) || (((unsigned) ptr) & 1))
306                 panic("NCR53c406a: attempted unaligned DMA transfer\n");
307
308         flags = claim_dma_lock();
309         disable_dma(dma_chan);
310         clear_dma_ff(dma_chan);
311         set_dma_addr(dma_chan, (long) ptr);
312         set_dma_count(dma_chan, count);
313         set_dma_mode(dma_chan, mode);
314         enable_dma(dma_chan);
315         release_dma_lock(flags);
316
317         return count;
318 }
319
320 static __inline__ int NCR53c406a_dma_write(unsigned char *src, unsigned int count)
321 {
322         return NCR53c406a_dma_setup(src, count, DMA_MODE_WRITE);
323 }
324
325 static __inline__ int NCR53c406a_dma_read(unsigned char *src, unsigned int count)
326 {
327         return NCR53c406a_dma_setup(src, count, DMA_MODE_READ);
328 }
329
330 static __inline__ int NCR53c406a_dma_residual(void)
331 {
332         register int tmp;
333         unsigned long flags;
334
335         flags = claim_dma_lock();
336         clear_dma_ff(dma_chan);
337         tmp = get_dma_residue(dma_chan);
338         release_dma_lock(flags);
339
340         return tmp;
341 }
342 #endif                          /* USE_DMA */
343
344 #if USE_PIO
345 static __inline__ int NCR53c406a_pio_read(unsigned char *request, unsigned int reqlen)
346 {
347         int i;
348         int len;                /* current scsi fifo size */
349
350         REG1;
351         while (reqlen) {
352                 i = inb(PIO_STATUS);
353                 /*    VDEB(printk("pio_status=%x\n", i)); */
354                 if (i & 0x80)
355                         return 0;
356
357                 switch (i & 0x1e) {
358                 default:
359                 case 0x10:
360                         len = 0;
361                         break;
362                 case 0x0:
363                         len = 1;
364                         break;
365                 case 0x8:
366                         len = 42;
367                         break;
368                 case 0xc:
369                         len = 84;
370                         break;
371                 case 0xe:
372                         len = 128;
373                         break;
374                 }
375
376                 if ((i & 0x40) && len == 0) {   /* fifo empty and interrupt occurred */
377                         return 0;
378                 }
379
380                 if (len) {
381                         if (len > reqlen)
382                                 len = reqlen;
383
384                         if (fast_pio && len > 3) {
385                                 insl(PIO_FIFO, request, len >> 2);
386                                 request += len & 0xfc;
387                                 reqlen -= len & 0xfc;
388                         } else {
389                                 while (len--) {
390                                         *request++ = inb(PIO_FIFO);
391                                         reqlen--;
392                                 }
393                         }
394                 }
395         }
396         return 0;
397 }
398
399 static __inline__ int NCR53c406a_pio_write(unsigned char *request, unsigned int reqlen)
400 {
401         int i = 0;
402         int len;                /* current scsi fifo size */
403
404         REG1;
405         while (reqlen && !(i & 0x40)) {
406                 i = inb(PIO_STATUS);
407                 /*    VDEB(printk("pio_status=%x\n", i)); */
408                 if (i & 0x80)   /* error */
409                         return 0;
410
411                 switch (i & 0x1e) {
412                 case 0x10:
413                         len = 128;
414                         break;
415                 case 0x0:
416                         len = 84;
417                         break;
418                 case 0x8:
419                         len = 42;
420                         break;
421                 case 0xc:
422                         len = 1;
423                         break;
424                 default:
425                 case 0xe:
426                         len = 0;
427                         break;
428                 }
429
430                 if (len) {
431                         if (len > reqlen)
432                                 len = reqlen;
433
434                         if (fast_pio && len > 3) {
435                                 outsl(PIO_FIFO, request, len >> 2);
436                                 request += len & 0xfc;
437                                 reqlen -= len & 0xfc;
438                         } else {
439                                 while (len--) {
440                                         outb(*request++, PIO_FIFO);
441                                         reqlen--;
442                                 }
443                         }
444                 }
445         }
446         return 0;
447 }
448 #endif                          /* USE_PIO */
449
450 static int __init NCR53c406a_detect(Scsi_Host_Template * tpnt)
451 {
452         int present = 0;
453         struct Scsi_Host *shpnt = NULL;
454 #ifndef PORT_BASE
455         int i;
456 #endif
457
458 #if USE_BIOS
459         int ii, jj;
460         bios_base = 0;
461         /* look for a valid signature */
462         for (ii = 0; ii < ADDRESS_COUNT && !bios_base; ii++)
463                 for (jj = 0; (jj < SIGNATURE_COUNT) && !bios_base; jj++)
464                         if (!memcmp((void *) addresses[ii] + signatures[jj].sig_offset, (void *) signatures[jj].signature, (int) signatures[jj].sig_length))
465                                 bios_base = addresses[ii];
466
467         if (!bios_base) {
468                 printk("NCR53c406a: BIOS signature not found\n");
469                 return 0;
470         }
471
472         DEB(printk("NCR53c406a BIOS found at 0x%x\n", (unsigned int) bios_base);
473             );
474 #endif                          /* USE_BIOS */
475
476 #ifdef PORT_BASE
477         if (!request_region(port_base, 0x10, "NCR53c406a"))     /* ports already snatched */
478                 port_base = 0;
479
480 #else                           /* autodetect */
481         if (port_base) {        /* LILO override */
482                 if (!request_region(port_base, 0x10, "NCR53c406a"))
483                         port_base = 0;
484         } else {
485                 for (i = 0; i < PORT_COUNT && !port_base; i++) {
486                         if (!request_region(ports[i], 0x10, "NCR53c406a")) {
487                                 DEB(printk("NCR53c406a: port 0x%x in use\n", ports[i]));
488                         } else {
489                                 VDEB(printk("NCR53c406a: port 0x%x available\n", ports[i]));
490                                 outb(C5_IMG, ports[i] + 0x0d);  /* reg set 1 */
491                                 if ((inb(ports[i] + 0x0e) ^ inb(ports[i] + 0x0e)) == 7 && (inb(ports[i] + 0x0e) ^ inb(ports[i] + 0x0e)) == 7 && (inb(ports[i] + 0x0e) & 0xf8) == 0x58) {
492                                         port_base = ports[i];
493                                         VDEB(printk("NCR53c406a: Sig register valid\n"));
494                                         VDEB(printk("port_base=0x%x\n", port_base));
495                                         break;
496                                 }
497                                 release_region(ports[i], 0x10);
498                         }
499                 }
500         }
501 #endif                          /* PORT_BASE */
502
503         if (!port_base) {       /* no ports found */
504                 printk("NCR53c406a: no available ports found\n");
505                 return 0;
506         }
507
508         DEB(printk("NCR53c406a detected\n"));
509
510         calc_port_addr();
511         chip_init();
512
513 #ifndef IRQ_LEV
514         if (irq_level < 0) {    /* LILO override if >= 0 */
515                 irq_level = irq_probe();
516                 if (irq_level < 0) {    /* Trouble */
517                         printk("NCR53c406a: IRQ problem, irq_level=%d, giving up\n", irq_level);
518                         goto err_release;
519                 }
520         }
521 #endif
522
523         DEB(printk("NCR53c406a: using port_base 0x%x\n", port_base));
524
525         present = 1;
526         tpnt->proc_name = "NCR53c406a";
527
528         shpnt = scsi_register(tpnt, 0);
529         if (!shpnt) {
530                 printk("NCR53c406a: Unable to register host, giving up.\n");
531                 goto err_release;
532         }
533
534         if (irq_level > 0) {
535                 if (request_irq(irq_level, do_NCR53c406a_intr, 0, "NCR53c406a", shpnt)) {
536                         printk("NCR53c406a: unable to allocate IRQ %d\n", irq_level);
537                         goto err_free_scsi;
538                 }
539                 tpnt->can_queue = 1;
540                 DEB(printk("NCR53c406a: allocated IRQ %d\n", irq_level));
541         } else if (irq_level == 0) {
542                 tpnt->can_queue = 0;
543                 DEB(printk("NCR53c406a: No interrupts detected\n"));
544                 printk("NCR53c406a driver no longer supports polling interface\n");
545                 printk("Please email linux-scsi@vger.kernel.org\n");
546                         
547 #if USE_DMA
548                 printk("NCR53c406a: No interrupts found and DMA mode defined. Giving up.\n");
549 #endif                          /* USE_DMA */
550                 goto err_free_scsi;
551         } else {
552                 DEB(printk("NCR53c406a: Shouldn't get here!\n"));
553                 goto err_free_scsi;
554         }
555
556 #if USE_DMA
557         dma_chan = DMA_CHAN;
558         if (request_dma(dma_chan, "NCR53c406a") != 0) {
559                 printk("NCR53c406a: unable to allocate DMA channel %d\n", dma_chan);
560                 goto err_free_irq;
561         }
562
563         DEB(printk("Allocated DMA channel %d\n", dma_chan));
564 #endif                          /* USE_DMA */
565
566         shpnt->irq = irq_level;
567         shpnt->io_port = port_base;
568         shpnt->n_io_port = 0x10;
569 #if USE_DMA
570         shpnt->dma = dma_chan;
571 #endif
572
573 #if USE_DMA
574         sprintf(info_msg, "NCR53c406a at 0x%x, IRQ %d, DMA channel %d.", port_base, irq_level, dma_chan);
575 #else
576         sprintf(info_msg, "NCR53c406a at 0x%x, IRQ %d, %s PIO mode.", port_base, irq_level, fast_pio ? "fast" : "slow");
577 #endif
578
579         return (present);
580
581 #if USE_DMA
582       err_free_irq:
583         if (irq_level)
584                 free_irq(irq_level, shpnt);
585 #endif
586       err_free_scsi:
587         scsi_unregister(shpnt);
588       err_release:
589         release_region(port_base, 0x10);
590         return 0;
591 }
592
593 static int NCR53c406a_release(struct Scsi_Host *shost)
594 {
595         if (shost->irq)
596                 free_irq(shost->irq, NULL);
597 #ifdef USE_DMA
598         if (shost->dma_channel != 0xff)
599                 free_dma(shost->dma_channel);
600 #endif
601         if (shost->io_port && shost->n_io_port)
602                 release_region(shost->io_port, shost->n_io_port);
603
604         scsi_unregister(shost);
605         return 0;
606 }
607
608 /* called from init/main.c */
609 static int __init NCR53c406a_setup(char *str)
610 {
611         static size_t setup_idx = 0;
612         size_t i;
613         int ints[4];
614
615         DEB(printk("NCR53c406a: Setup called\n");
616             );
617
618         if (setup_idx >= PORT_COUNT - 1) {
619                 printk("NCR53c406a: Setup called too many times.  Bad LILO params?\n");
620                 return 0;
621         }
622         get_options(str, 4, ints);
623         if (ints[0] < 1 || ints[0] > 3) {
624                 printk("NCR53c406a: Malformed command line\n");
625                 printk("NCR53c406a: Usage: ncr53c406a=<PORTBASE>[,<IRQ>[,<FASTPIO>]]\n");
626                 return 0;
627         }
628         for (i = 0; i < PORT_COUNT && !port_base; i++)
629                 if (ports[i] == ints[1]) {
630                         port_base = ints[1];
631                         DEB(printk("NCR53c406a: Specified port_base 0x%x\n", port_base);
632                             )
633                 }
634         if (!port_base) {
635                 printk("NCR53c406a: Invalid PORTBASE 0x%x specified\n", ints[1]);
636                 return 0;
637         }
638
639         if (ints[0] > 1) {
640                 if (ints[2] == 0) {
641                         irq_level = 0;
642                         DEB(printk("NCR53c406a: Specified irq %d\n", irq_level);
643                             )
644                 } else
645                         for (i = 0; i < INTR_COUNT && irq_level < 0; i++)
646                                 if (intrs[i] == ints[2]) {
647                                         irq_level = ints[2];
648                                         DEB(printk("NCR53c406a: Specified irq %d\n", port_base);
649                                             )
650                                 }
651                 if (irq_level < 0)
652                         printk("NCR53c406a: Invalid IRQ %d specified\n", ints[2]);
653         }
654
655         if (ints[0] > 2)
656                 fast_pio = ints[3];
657
658         DEB(printk("NCR53c406a: port_base=0x%x, irq=%d, fast_pio=%d\n", port_base, irq_level, fast_pio);)
659         return 1;
660 }
661
662 __setup("ncr53c406a=", NCR53c406a_setup);
663
664 static const char *NCR53c406a_info(struct Scsi_Host *SChost)
665 {
666         DEB(printk("NCR53c406a_info called\n"));
667         return (info_msg);
668 }
669
670 #if 0
671 static void wait_intr(void)
672 {
673         unsigned long i = jiffies + WATCHDOG;
674
675         while (time_after(i, jiffies) && !(inb(STAT_REG) & 0xe0)) {     /* wait for a pseudo-interrupt */
676                 cpu_relax();
677                 barrier();
678         }
679
680         if (time_before_eq(i, jiffies)) {       /* Timed out */
681                 rtrc(0);
682                 current_SC->result = DID_TIME_OUT << 16;
683                 current_SC->SCp.phase = idle;
684                 current_SC->scsi_done(current_SC);
685                 return;
686         }
687
688         NCR53c406a_intr(0, NULL, NULL);
689 }
690 #endif
691
692 static int NCR53c406a_queue(Scsi_Cmnd * SCpnt, void (*done) (Scsi_Cmnd *))
693 {
694         int i;
695
696         VDEB(printk("NCR53c406a_queue called\n"));
697         DEB(printk("cmd=%02x, cmd_len=%02x, target=%02x, lun=%02x, bufflen=%d\n", SCpnt->cmnd[0], SCpnt->cmd_len, SCpnt->target, SCpnt->lun, SCpnt->request_bufflen));
698
699 #if 0
700         VDEB(for (i = 0; i < SCpnt->cmd_len; i++)
701              printk("cmd[%d]=%02x  ", i, SCpnt->cmnd[i]));
702         VDEB(printk("\n"));
703 #endif
704
705         current_SC = SCpnt;
706         current_SC->scsi_done = done;
707         current_SC->SCp.phase = command_ph;
708         current_SC->SCp.Status = 0;
709         current_SC->SCp.Message = 0;
710
711         /* We are locked here already by the mid layer */
712         REG0;
713         outb(scmd_id(SCpnt), DEST_ID);  /* set destination */
714         outb(FLUSH_FIFO, CMD_REG);      /* reset the fifos */
715
716         for (i = 0; i < SCpnt->cmd_len; i++) {
717                 outb(SCpnt->cmnd[i], SCSI_FIFO);
718         }
719         outb(SELECT_NO_ATN, CMD_REG);
720
721         rtrc(1);
722         return 0;
723 }
724
725 static int NCR53c406a_host_reset(Scsi_Cmnd * SCpnt)
726 {
727         DEB(printk("NCR53c406a_reset called\n"));
728
729         spin_lock_irq(SCpnt->device->host->host_lock);
730
731         outb(C4_IMG, CONFIG4);  /* Select reg set 0 */
732         outb(CHIP_RESET, CMD_REG);
733         outb(SCSI_NOP, CMD_REG);        /* required after reset */
734         outb(SCSI_RESET, CMD_REG);
735         chip_init();
736
737         rtrc(2);
738
739         spin_unlock_irq(SCpnt->device->host->host_lock);
740
741         return SUCCESS;
742 }
743
744 static int NCR53c406a_biosparm(struct scsi_device *disk,
745                                struct block_device *dev,
746                                sector_t capacity, int *info_array)
747 {
748         int size;
749
750         DEB(printk("NCR53c406a_biosparm called\n"));
751
752         size = capacity;
753         info_array[0] = 64;     /* heads */
754         info_array[1] = 32;     /* sectors */
755         info_array[2] = size >> 11;     /* cylinders */
756         if (info_array[2] > 1024) {     /* big disk */
757                 info_array[0] = 255;
758                 info_array[1] = 63;
759                 info_array[2] = size / (255 * 63);
760         }
761         return 0;
762 }
763
764 static irqreturn_t do_NCR53c406a_intr(int unused, void *dev_id,
765                                         struct pt_regs *regs)
766 {
767         unsigned long flags;
768         struct Scsi_Host *dev = dev_id;
769
770         spin_lock_irqsave(dev->host_lock, flags);
771         NCR53c406a_intr(0, dev_id, regs);
772         spin_unlock_irqrestore(dev->host_lock, flags);
773         return IRQ_HANDLED;
774 }
775
776 static void NCR53c406a_intr(int unused, void *dev_id, struct pt_regs *regs)
777 {
778         DEB(unsigned char fifo_size;
779             )
780             DEB(unsigned char seq_reg;
781             )
782         unsigned char status, int_reg;
783 #if USE_PIO
784         unsigned char pio_status;
785         struct scatterlist *sglist;
786         unsigned int sgcount;
787 #endif
788
789         VDEB(printk("NCR53c406a_intr called\n"));
790
791 #if USE_PIO
792         REG1;
793         pio_status = inb(PIO_STATUS);
794 #endif
795         REG0;
796         status = inb(STAT_REG);
797         DEB(seq_reg = inb(SEQ_REG));
798         int_reg = inb(INT_REG);
799         DEB(fifo_size = inb(FIFO_FLAGS) & 0x1f);
800
801 #if NCR53C406A_DEBUG
802         printk("status=%02x, seq_reg=%02x, int_reg=%02x, fifo_size=%02x", status, seq_reg, int_reg, fifo_size);
803 #if (USE_DMA)
804         printk("\n");
805 #else
806         printk(", pio=%02x\n", pio_status);
807 #endif                          /* USE_DMA */
808 #endif                          /* NCR53C406A_DEBUG */
809
810         if (int_reg & 0x80) {   /* SCSI reset intr */
811                 rtrc(3);
812                 DEB(printk("NCR53c406a: reset intr received\n"));
813                 current_SC->SCp.phase = idle;
814                 current_SC->result = DID_RESET << 16;
815                 current_SC->scsi_done(current_SC);
816                 return;
817         }
818 #if USE_PIO
819         if (pio_status & 0x80) {
820                 printk("NCR53C406A: Warning: PIO error!\n");
821                 current_SC->SCp.phase = idle;
822                 current_SC->result = DID_ERROR << 16;
823                 current_SC->scsi_done(current_SC);
824                 return;
825         }
826 #endif                          /* USE_PIO */
827
828         if (status & 0x20) {    /* Parity error */
829                 printk("NCR53c406a: Warning: parity error!\n");
830                 current_SC->SCp.phase = idle;
831                 current_SC->result = DID_PARITY << 16;
832                 current_SC->scsi_done(current_SC);
833                 return;
834         }
835
836         if (status & 0x40) {    /* Gross error */
837                 printk("NCR53c406a: Warning: gross error!\n");
838                 current_SC->SCp.phase = idle;
839                 current_SC->result = DID_ERROR << 16;
840                 current_SC->scsi_done(current_SC);
841                 return;
842         }
843
844         if (int_reg & 0x20) {   /* Disconnect */
845                 DEB(printk("NCR53c406a: disconnect intr received\n"));
846                 if (current_SC->SCp.phase != message_in) {      /* Unexpected disconnect */
847                         current_SC->result = DID_NO_CONNECT << 16;
848                 } else {        /* Command complete, return status and message */
849                         current_SC->result = (current_SC->SCp.Status & 0xff)
850                             | ((current_SC->SCp.Message & 0xff) << 8) | (DID_OK << 16);
851                 }
852
853                 rtrc(0);
854                 current_SC->SCp.phase = idle;
855                 current_SC->scsi_done(current_SC);
856                 return;
857         }
858
859         switch (status & 0x07) {        /* scsi phase */
860         case 0x00:              /* DATA-OUT */
861                 if (int_reg & 0x10) {   /* Target requesting info transfer */
862                         rtrc(5);
863                         current_SC->SCp.phase = data_out;
864                         VDEB(printk("NCR53c406a: Data-Out phase\n"));
865                         outb(FLUSH_FIFO, CMD_REG);
866                         LOAD_DMA_COUNT(current_SC->request_bufflen);    /* Max transfer size */
867 #if USE_DMA                     /* No s/g support for DMA */
868                         NCR53c406a_dma_write(current_SC->request_buffer, current_SC->request_bufflen);
869 #endif                          /* USE_DMA */
870                         outb(TRANSFER_INFO | DMA_OP, CMD_REG);
871 #if USE_PIO
872                         if (!current_SC->use_sg)        /* Don't use scatter-gather */
873                                 NCR53c406a_pio_write(current_SC->request_buffer, current_SC->request_bufflen);
874                         else {  /* use scatter-gather */
875                                 sgcount = current_SC->use_sg;
876                                 sglist = current_SC->request_buffer;
877                                 while (sgcount--) {
878                                         NCR53c406a_pio_write(page_address(sglist->page) + sglist->offset, sglist->length);
879                                         sglist++;
880                                 }
881                         }
882                         REG0;
883 #endif                          /* USE_PIO */
884                 }
885                 break;
886
887         case 0x01:              /* DATA-IN */
888                 if (int_reg & 0x10) {   /* Target requesting info transfer */
889                         rtrc(6);
890                         current_SC->SCp.phase = data_in;
891                         VDEB(printk("NCR53c406a: Data-In phase\n"));
892                         outb(FLUSH_FIFO, CMD_REG);
893                         LOAD_DMA_COUNT(current_SC->request_bufflen);    /* Max transfer size */
894 #if USE_DMA                     /* No s/g support for DMA */
895                         NCR53c406a_dma_read(current_SC->request_buffer, current_SC->request_bufflen);
896 #endif                          /* USE_DMA */
897                         outb(TRANSFER_INFO | DMA_OP, CMD_REG);
898 #if USE_PIO
899                         if (!current_SC->use_sg)        /* Don't use scatter-gather */
900                                 NCR53c406a_pio_read(current_SC->request_buffer, current_SC->request_bufflen);
901                         else {  /* Use scatter-gather */
902                                 sgcount = current_SC->use_sg;
903                                 sglist = current_SC->request_buffer;
904                                 while (sgcount--) {
905                                         NCR53c406a_pio_read(page_address(sglist->page) + sglist->offset, sglist->length);
906                                         sglist++;
907                                 }
908                         }
909                         REG0;
910 #endif                          /* USE_PIO */
911                 }
912                 break;
913
914         case 0x02:              /* COMMAND */
915                 current_SC->SCp.phase = command_ph;
916                 printk("NCR53c406a: Warning: Unknown interrupt occurred in command phase!\n");
917                 break;
918
919         case 0x03:              /* STATUS */
920                 rtrc(7);
921                 current_SC->SCp.phase = status_ph;
922                 VDEB(printk("NCR53c406a: Status phase\n"));
923                 outb(FLUSH_FIFO, CMD_REG);
924                 outb(INIT_CMD_COMPLETE, CMD_REG);
925                 break;
926
927         case 0x04:              /* Reserved */
928         case 0x05:              /* Reserved */
929                 printk("NCR53c406a: WARNING: Reserved phase!!!\n");
930                 break;
931
932         case 0x06:              /* MESSAGE-OUT */
933                 DEB(printk("NCR53c406a: Message-Out phase\n"));
934                 current_SC->SCp.phase = message_out;
935                 outb(SET_ATN, CMD_REG); /* Reject the message */
936                 outb(MSG_ACCEPT, CMD_REG);
937                 break;
938
939         case 0x07:              /* MESSAGE-IN */
940                 rtrc(4);
941                 VDEB(printk("NCR53c406a: Message-In phase\n"));
942                 current_SC->SCp.phase = message_in;
943
944                 current_SC->SCp.Status = inb(SCSI_FIFO);
945                 current_SC->SCp.Message = inb(SCSI_FIFO);
946
947                 VDEB(printk("SCSI FIFO size=%d\n", inb(FIFO_FLAGS) & 0x1f));
948                 DEB(printk("Status = %02x  Message = %02x\n", current_SC->SCp.Status, current_SC->SCp.Message));
949
950                 if (current_SC->SCp.Message == SAVE_POINTERS || current_SC->SCp.Message == DISCONNECT) {
951                         outb(SET_ATN, CMD_REG); /* Reject message */
952                         DEB(printk("Discarding SAVE_POINTERS message\n"));
953                 }
954                 outb(MSG_ACCEPT, CMD_REG);
955                 break;
956         }
957 }
958
959 #ifndef IRQ_LEV
960 static int irq_probe(void)
961 {
962         int irqs, irq;
963         unsigned long i;
964
965         inb(INT_REG);           /* clear the interrupt register */
966         irqs = probe_irq_on();
967
968         /* Invalid command will cause an interrupt */
969         REG0;
970         outb(0xff, CMD_REG);
971
972         /* Wait for the interrupt to occur */
973         i = jiffies + WATCHDOG;
974         while (time_after(i, jiffies) && !(inb(STAT_REG) & 0x80))
975                 barrier();
976         if (time_before_eq(i, jiffies)) {       /* Timed out, must be hardware trouble */
977                 probe_irq_off(irqs);
978                 return -1;
979         }
980
981         irq = probe_irq_off(irqs);
982
983         /* Kick the chip */
984         outb(CHIP_RESET, CMD_REG);
985         outb(SCSI_NOP, CMD_REG);
986         chip_init();
987
988         return irq;
989 }
990 #endif                          /* IRQ_LEV */
991
992 static void chip_init(void)
993 {
994         REG1;
995 #if USE_DMA
996         outb(0x00, PIO_STATUS);
997 #else                           /* USE_PIO */
998         outb(0x01, PIO_STATUS);
999 #endif
1000         outb(0x00, PIO_FLAG);
1001
1002         outb(C4_IMG, CONFIG4);  /* REG0; */
1003         outb(C3_IMG, CONFIG3);
1004         outb(C2_IMG, CONFIG2);
1005         outb(C1_IMG, CONFIG1);
1006
1007         outb(0x05, CLKCONV);    /* clock conversion factor */
1008         outb(0x9C, SRTIMOUT);   /* Selection timeout */
1009         outb(0x05, SYNCPRD);    /* Synchronous transfer period */
1010         outb(SYNC_MODE, SYNCOFF);       /* synchronous mode */
1011 }
1012
1013 static void __init calc_port_addr(void)
1014 {
1015         /* Control Register Set 0 */
1016         TC_LSB = (port_base + 0x00);
1017         TC_MSB = (port_base + 0x01);
1018         SCSI_FIFO = (port_base + 0x02);
1019         CMD_REG = (port_base + 0x03);
1020         STAT_REG = (port_base + 0x04);
1021         DEST_ID = (port_base + 0x04);
1022         INT_REG = (port_base + 0x05);
1023         SRTIMOUT = (port_base + 0x05);
1024         SEQ_REG = (port_base + 0x06);
1025         SYNCPRD = (port_base + 0x06);
1026         FIFO_FLAGS = (port_base + 0x07);
1027         SYNCOFF = (port_base + 0x07);
1028         CONFIG1 = (port_base + 0x08);
1029         CLKCONV = (port_base + 0x09);
1030         /* TESTREG          = (port_base+0x0A); */
1031         CONFIG2 = (port_base + 0x0B);
1032         CONFIG3 = (port_base + 0x0C);
1033         CONFIG4 = (port_base + 0x0D);
1034         TC_HIGH = (port_base + 0x0E);
1035         /* FIFO_BOTTOM      = (port_base+0x0F); */
1036
1037         /* Control Register Set 1 */
1038         /* JUMPER_SENSE     = (port_base+0x00); */
1039         /* SRAM_PTR         = (port_base+0x01); */
1040         /* SRAM_DATA        = (port_base+0x02); */
1041         PIO_FIFO = (port_base + 0x04);
1042         /* PIO_FIFO1        = (port_base+0x05); */
1043         /* PIO_FIFO2        = (port_base+0x06); */
1044         /* PIO_FIFO3        = (port_base+0x07); */
1045         PIO_STATUS = (port_base + 0x08);
1046         /* ATA_CMD          = (port_base+0x09); */
1047         /* ATA_ERR          = (port_base+0x0A); */
1048         PIO_FLAG = (port_base + 0x0B);
1049         CONFIG5 = (port_base + 0x0D);
1050         /* SIGNATURE        = (port_base+0x0E); */
1051         /* CONFIG6          = (port_base+0x0F); */
1052 }
1053
1054 MODULE_LICENSE("GPL");
1055
1056 /* NOTE:  scatter-gather support only works in PIO mode.
1057  * Use SG_NONE if DMA mode is enabled!
1058  */
1059
1060 static Scsi_Host_Template driver_template = 
1061 {
1062      .proc_name                 = "NCR53c406a"          /* proc_name */,        
1063      .name                      = "NCR53c406a"          /* name */,             
1064      .detect                    = NCR53c406a_detect     /* detect */,           
1065      .release                   = NCR53c406a_release,
1066      .info                      = NCR53c406a_info               /* info */,             
1067      .queuecommand              = NCR53c406a_queue      /* queuecommand */,     
1068      .eh_host_reset_handler     = NCR53c406a_host_reset /* reset */,            
1069      .bios_param                = NCR53c406a_biosparm   /* biosparm */,         
1070      .can_queue                 = 1                     /* can_queue */,        
1071      .this_id                   = 7                     /* SCSI ID of the chip */,
1072      .sg_tablesize              = 32                    /*SG_ALL*/ /*SG_NONE*/, 
1073      .cmd_per_lun               = 1                     /* commands per lun */, 
1074      .unchecked_isa_dma         = 1                     /* unchecked_isa_dma */,
1075      .use_clustering            = ENABLE_CLUSTERING                               
1076 };
1077
1078 #include "scsi_module.c"
1079
1080 /*
1081  * Overrides for Emacs so that we get a uniform tabbing style.
1082  * Emacs will notice this stuff at the end of the file and automatically
1083  * adjust the settings for this buffer only.  This must remain at the end
1084  * of the file.
1085  * ---------------------------------------------------------------------------
1086  * Local variables:
1087  * c-indent-level: 4
1088  * c-brace-imaginary-offset: 0
1089  * c-brace-offset: -4
1090  * c-argdecl-indent: 4
1091  * c-label-offset: -4
1092  * c-continued-statement-offset: 4
1093  * c-continued-brace-offset: 0
1094  * indent-tabs-mode: nil
1095  * tab-width: 8
1096  * End:
1097  */