Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux...
[linux-2.6.git] / drivers / rtc / rtc-ds1305.c
1 /*
2  * rtc-ds1305.c -- driver for DS1305 and DS1306 SPI RTC chips
3  *
4  * Copyright (C) 2008 David Brownell
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  */
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/bcd.h>
14 #include <linux/slab.h>
15 #include <linux/rtc.h>
16 #include <linux/workqueue.h>
17
18 #include <linux/spi/spi.h>
19 #include <linux/spi/ds1305.h>
20
21
22 /*
23  * Registers ... mask DS1305_WRITE into register address to write,
24  * otherwise you're reading it.  All non-bitmask values are BCD.
25  */
26 #define DS1305_WRITE            0x80
27
28
29 /* RTC date/time ... the main special cases are that we:
30  *  - Need fancy "hours" encoding in 12hour mode
31  *  - Don't rely on the "day-of-week" field (or tm_wday)
32  *  - Are a 21st-century clock (2000 <= year < 2100)
33  */
34 #define DS1305_RTC_LEN          7               /* bytes for RTC regs */
35
36 #define DS1305_SEC              0x00            /* register addresses */
37 #define DS1305_MIN              0x01
38 #define DS1305_HOUR             0x02
39 #       define DS1305_HR_12             0x40    /* set == 12 hr mode */
40 #       define DS1305_HR_PM             0x20    /* set == PM (12hr mode) */
41 #define DS1305_WDAY             0x03
42 #define DS1305_MDAY             0x04
43 #define DS1305_MON              0x05
44 #define DS1305_YEAR             0x06
45
46
47 /* The two alarms have only sec/min/hour/wday fields (ALM_LEN).
48  * DS1305_ALM_DISABLE disables a match field (some combos are bad).
49  *
50  * NOTE that since we don't use WDAY, we limit ourselves to alarms
51  * only one day into the future (vs potentially up to a week).
52  *
53  * NOTE ALSO that while we could generate once-a-second IRQs (UIE), we
54  * don't currently support them.  We'd either need to do it only when
55  * no alarm is pending (not the standard model), or to use the second
56  * alarm (implying that this is a DS1305 not DS1306, *and* that either
57  * it's wired up a second IRQ we know, or that INTCN is set)
58  */
59 #define DS1305_ALM_LEN          4               /* bytes for ALM regs */
60 #define DS1305_ALM_DISABLE      0x80
61
62 #define DS1305_ALM0(r)          (0x07 + (r))    /* register addresses */
63 #define DS1305_ALM1(r)          (0x0b + (r))
64
65
66 /* three control registers */
67 #define DS1305_CONTROL_LEN      3               /* bytes of control regs */
68
69 #define DS1305_CONTROL          0x0f            /* register addresses */
70 #       define DS1305_nEOSC             0x80    /* low enables oscillator */
71 #       define DS1305_WP                0x40    /* write protect */
72 #       define DS1305_INTCN             0x04    /* clear == only int0 used */
73 #       define DS1306_1HZ               0x04    /* enable 1Hz output */
74 #       define DS1305_AEI1              0x02    /* enable ALM1 IRQ */
75 #       define DS1305_AEI0              0x01    /* enable ALM0 IRQ */
76 #define DS1305_STATUS           0x10
77 /* status has just AEIx bits, mirrored as IRQFx */
78 #define DS1305_TRICKLE          0x11
79 /* trickle bits are defined in <linux/spi/ds1305.h> */
80
81 /* a bunch of NVRAM */
82 #define DS1305_NVRAM_LEN        96              /* bytes of NVRAM */
83
84 #define DS1305_NVRAM            0x20            /* register addresses */
85
86
87 struct ds1305 {
88         struct spi_device       *spi;
89         struct rtc_device       *rtc;
90
91         struct work_struct      work;
92
93         unsigned long           flags;
94 #define FLAG_EXITING    0
95
96         bool                    hr12;
97         u8                      ctrl[DS1305_CONTROL_LEN];
98 };
99
100
101 /*----------------------------------------------------------------------*/
102
103 /*
104  * Utilities ...  tolerate 12-hour AM/PM notation in case of non-Linux
105  * software (like a bootloader) which may require it.
106  */
107
108 static unsigned bcd2hour(u8 bcd)
109 {
110         if (bcd & DS1305_HR_12) {
111                 unsigned        hour = 0;
112
113                 bcd &= ~DS1305_HR_12;
114                 if (bcd & DS1305_HR_PM) {
115                         hour = 12;
116                         bcd &= ~DS1305_HR_PM;
117                 }
118                 hour += bcd2bin(bcd);
119                 return hour - 1;
120         }
121         return bcd2bin(bcd);
122 }
123
124 static u8 hour2bcd(bool hr12, int hour)
125 {
126         if (hr12) {
127                 hour++;
128                 if (hour <= 12)
129                         return DS1305_HR_12 | bin2bcd(hour);
130                 hour -= 12;
131                 return DS1305_HR_12 | DS1305_HR_PM | bin2bcd(hour);
132         }
133         return bin2bcd(hour);
134 }
135
136 /*----------------------------------------------------------------------*/
137
138 /*
139  * Interface to RTC framework
140  */
141
142 #ifdef CONFIG_RTC_INTF_DEV
143
144 /*
145  * Context: caller holds rtc->ops_lock (to protect ds1305->ctrl)
146  */
147 static int ds1305_ioctl(struct device *dev, unsigned cmd, unsigned long arg)
148 {
149         struct ds1305   *ds1305 = dev_get_drvdata(dev);
150         u8              buf[2];
151         int             status = -ENOIOCTLCMD;
152
153         buf[0] = DS1305_WRITE | DS1305_CONTROL;
154         buf[1] = ds1305->ctrl[0];
155
156         switch (cmd) {
157         case RTC_AIE_OFF:
158                 status = 0;
159                 if (!(buf[1] & DS1305_AEI0))
160                         goto done;
161                 buf[1] &= ~DS1305_AEI0;
162                 break;
163
164         case RTC_AIE_ON:
165                 status = 0;
166                 if (ds1305->ctrl[0] & DS1305_AEI0)
167                         goto done;
168                 buf[1] |= DS1305_AEI0;
169                 break;
170         }
171         if (status == 0) {
172                 status = spi_write_then_read(ds1305->spi, buf, sizeof buf,
173                                 NULL, 0);
174                 if (status >= 0)
175                         ds1305->ctrl[0] = buf[1];
176         }
177
178 done:
179         return status;
180 }
181
182 #else
183 #define ds1305_ioctl    NULL
184 #endif
185
186 /*
187  * Get/set of date and time is pretty normal.
188  */
189
190 static int ds1305_get_time(struct device *dev, struct rtc_time *time)
191 {
192         struct ds1305   *ds1305 = dev_get_drvdata(dev);
193         u8              addr = DS1305_SEC;
194         u8              buf[DS1305_RTC_LEN];
195         int             status;
196
197         /* Use write-then-read to get all the date/time registers
198          * since dma from stack is nonportable
199          */
200         status = spi_write_then_read(ds1305->spi, &addr, sizeof addr,
201                         buf, sizeof buf);
202         if (status < 0)
203                 return status;
204
205         dev_vdbg(dev, "%s: %02x %02x %02x, %02x %02x %02x %02x\n",
206                 "read", buf[0], buf[1], buf[2], buf[3],
207                 buf[4], buf[5], buf[6]);
208
209         /* Decode the registers */
210         time->tm_sec = bcd2bin(buf[DS1305_SEC]);
211         time->tm_min = bcd2bin(buf[DS1305_MIN]);
212         time->tm_hour = bcd2hour(buf[DS1305_HOUR]);
213         time->tm_wday = buf[DS1305_WDAY] - 1;
214         time->tm_mday = bcd2bin(buf[DS1305_MDAY]);
215         time->tm_mon = bcd2bin(buf[DS1305_MON]) - 1;
216         time->tm_year = bcd2bin(buf[DS1305_YEAR]) + 100;
217
218         dev_vdbg(dev, "%s secs=%d, mins=%d, "
219                 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
220                 "read", time->tm_sec, time->tm_min,
221                 time->tm_hour, time->tm_mday,
222                 time->tm_mon, time->tm_year, time->tm_wday);
223
224         /* Time may not be set */
225         return rtc_valid_tm(time);
226 }
227
228 static int ds1305_set_time(struct device *dev, struct rtc_time *time)
229 {
230         struct ds1305   *ds1305 = dev_get_drvdata(dev);
231         u8              buf[1 + DS1305_RTC_LEN];
232         u8              *bp = buf;
233
234         dev_vdbg(dev, "%s secs=%d, mins=%d, "
235                 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
236                 "write", time->tm_sec, time->tm_min,
237                 time->tm_hour, time->tm_mday,
238                 time->tm_mon, time->tm_year, time->tm_wday);
239
240         /* Write registers starting at the first time/date address. */
241         *bp++ = DS1305_WRITE | DS1305_SEC;
242
243         *bp++ = bin2bcd(time->tm_sec);
244         *bp++ = bin2bcd(time->tm_min);
245         *bp++ = hour2bcd(ds1305->hr12, time->tm_hour);
246         *bp++ = (time->tm_wday < 7) ? (time->tm_wday + 1) : 1;
247         *bp++ = bin2bcd(time->tm_mday);
248         *bp++ = bin2bcd(time->tm_mon + 1);
249         *bp++ = bin2bcd(time->tm_year - 100);
250
251         dev_dbg(dev, "%s: %02x %02x %02x, %02x %02x %02x %02x\n",
252                 "write", buf[1], buf[2], buf[3],
253                 buf[4], buf[5], buf[6], buf[7]);
254
255         /* use write-then-read since dma from stack is nonportable */
256         return spi_write_then_read(ds1305->spi, buf, sizeof buf,
257                         NULL, 0);
258 }
259
260 /*
261  * Get/set of alarm is a bit funky:
262  *
263  * - First there's the inherent raciness of getting the (partitioned)
264  *   status of an alarm that could trigger while we're reading parts
265  *   of that status.
266  *
267  * - Second there's its limited range (we could increase it a bit by
268  *   relying on WDAY), which means it will easily roll over.
269  *
270  * - Third there's the choice of two alarms and alarm signals.
271  *   Here we use ALM0 and expect that nINT0 (open drain) is used;
272  *   that's the only real option for DS1306 runtime alarms, and is
273  *   natural on DS1305.
274  *
275  * - Fourth, there's also ALM1, and a second interrupt signal:
276  *     + On DS1305 ALM1 uses nINT1 (when INTCN=1) else nINT0;
277  *     + On DS1306 ALM1 only uses INT1 (an active high pulse)
278  *       and it won't work when VCC1 is active.
279  *
280  *   So to be most general, we should probably set both alarms to the
281  *   same value, letting ALM1 be the wakeup event source on DS1306
282  *   and handling several wiring options on DS1305.
283  *
284  * - Fifth, we support the polled mode (as well as possible; why not?)
285  *   even when no interrupt line is wired to an IRQ.
286  */
287
288 /*
289  * Context: caller holds rtc->ops_lock (to protect ds1305->ctrl)
290  */
291 static int ds1305_get_alarm(struct device *dev, struct rtc_wkalrm *alm)
292 {
293         struct ds1305   *ds1305 = dev_get_drvdata(dev);
294         struct spi_device *spi = ds1305->spi;
295         u8              addr;
296         int             status;
297         u8              buf[DS1305_ALM_LEN];
298
299         /* Refresh control register cache BEFORE reading ALM0 registers,
300          * since reading alarm registers acks any pending IRQ.  That
301          * makes returning "pending" status a bit of a lie, but that bit
302          * of EFI status is at best fragile anyway (given IRQ handlers).
303          */
304         addr = DS1305_CONTROL;
305         status = spi_write_then_read(spi, &addr, sizeof addr,
306                         ds1305->ctrl, sizeof ds1305->ctrl);
307         if (status < 0)
308                 return status;
309
310         alm->enabled = !!(ds1305->ctrl[0] & DS1305_AEI0);
311         alm->pending = !!(ds1305->ctrl[1] & DS1305_AEI0);
312
313         /* get and check ALM0 registers */
314         addr = DS1305_ALM0(DS1305_SEC);
315         status = spi_write_then_read(spi, &addr, sizeof addr,
316                         buf, sizeof buf);
317         if (status < 0)
318                 return status;
319
320         dev_vdbg(dev, "%s: %02x %02x %02x %02x\n",
321                 "alm0 read", buf[DS1305_SEC], buf[DS1305_MIN],
322                 buf[DS1305_HOUR], buf[DS1305_WDAY]);
323
324         if ((DS1305_ALM_DISABLE & buf[DS1305_SEC])
325                         || (DS1305_ALM_DISABLE & buf[DS1305_MIN])
326                         || (DS1305_ALM_DISABLE & buf[DS1305_HOUR]))
327                 return -EIO;
328
329         /* Stuff these values into alm->time and let RTC framework code
330          * fill in the rest ... and also handle rollover to tomorrow when
331          * that's needed.
332          */
333         alm->time.tm_sec = bcd2bin(buf[DS1305_SEC]);
334         alm->time.tm_min = bcd2bin(buf[DS1305_MIN]);
335         alm->time.tm_hour = bcd2hour(buf[DS1305_HOUR]);
336         alm->time.tm_mday = -1;
337         alm->time.tm_mon = -1;
338         alm->time.tm_year = -1;
339         /* next three fields are unused by Linux */
340         alm->time.tm_wday = -1;
341         alm->time.tm_mday = -1;
342         alm->time.tm_isdst = -1;
343
344         return 0;
345 }
346
347 /*
348  * Context: caller holds rtc->ops_lock (to protect ds1305->ctrl)
349  */
350 static int ds1305_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
351 {
352         struct ds1305   *ds1305 = dev_get_drvdata(dev);
353         struct spi_device *spi = ds1305->spi;
354         unsigned long   now, later;
355         struct rtc_time tm;
356         int             status;
357         u8              buf[1 + DS1305_ALM_LEN];
358
359         /* convert desired alarm to time_t */
360         status = rtc_tm_to_time(&alm->time, &later);
361         if (status < 0)
362                 return status;
363
364         /* Read current time as time_t */
365         status = ds1305_get_time(dev, &tm);
366         if (status < 0)
367                 return status;
368         status = rtc_tm_to_time(&tm, &now);
369         if (status < 0)
370                 return status;
371
372         /* make sure alarm fires within the next 24 hours */
373         if (later <= now)
374                 return -EINVAL;
375         if ((later - now) > 24 * 60 * 60)
376                 return -EDOM;
377
378         /* disable alarm if needed */
379         if (ds1305->ctrl[0] & DS1305_AEI0) {
380                 ds1305->ctrl[0] &= ~DS1305_AEI0;
381
382                 buf[0] = DS1305_WRITE | DS1305_CONTROL;
383                 buf[1] = ds1305->ctrl[0];
384                 status = spi_write_then_read(ds1305->spi, buf, 2, NULL, 0);
385                 if (status < 0)
386                         return status;
387         }
388
389         /* write alarm */
390         buf[0] = DS1305_WRITE | DS1305_ALM0(DS1305_SEC);
391         buf[1 + DS1305_SEC] = bin2bcd(alm->time.tm_sec);
392         buf[1 + DS1305_MIN] = bin2bcd(alm->time.tm_min);
393         buf[1 + DS1305_HOUR] = hour2bcd(ds1305->hr12, alm->time.tm_hour);
394         buf[1 + DS1305_WDAY] = DS1305_ALM_DISABLE;
395
396         dev_dbg(dev, "%s: %02x %02x %02x %02x\n",
397                 "alm0 write", buf[1 + DS1305_SEC], buf[1 + DS1305_MIN],
398                 buf[1 + DS1305_HOUR], buf[1 + DS1305_WDAY]);
399
400         status = spi_write_then_read(spi, buf, sizeof buf, NULL, 0);
401         if (status < 0)
402                 return status;
403
404         /* enable alarm if requested */
405         if (alm->enabled) {
406                 ds1305->ctrl[0] |= DS1305_AEI0;
407
408                 buf[0] = DS1305_WRITE | DS1305_CONTROL;
409                 buf[1] = ds1305->ctrl[0];
410                 status = spi_write_then_read(ds1305->spi, buf, 2, NULL, 0);
411         }
412
413         return status;
414 }
415
416 #ifdef CONFIG_PROC_FS
417
418 static int ds1305_proc(struct device *dev, struct seq_file *seq)
419 {
420         struct ds1305   *ds1305 = dev_get_drvdata(dev);
421         char            *diodes = "no";
422         char            *resistors = "";
423
424         /* ctrl[2] is treated as read-only; no locking needed */
425         if ((ds1305->ctrl[2] & 0xf0) == DS1305_TRICKLE_MAGIC) {
426                 switch (ds1305->ctrl[2] & 0x0c) {
427                 case DS1305_TRICKLE_DS2:
428                         diodes = "2 diodes, ";
429                         break;
430                 case DS1305_TRICKLE_DS1:
431                         diodes = "1 diode, ";
432                         break;
433                 default:
434                         goto done;
435                 }
436                 switch (ds1305->ctrl[2] & 0x03) {
437                 case DS1305_TRICKLE_2K:
438                         resistors = "2k Ohm";
439                         break;
440                 case DS1305_TRICKLE_4K:
441                         resistors = "4k Ohm";
442                         break;
443                 case DS1305_TRICKLE_8K:
444                         resistors = "8k Ohm";
445                         break;
446                 default:
447                         diodes = "no";
448                         break;
449                 }
450         }
451
452 done:
453         return seq_printf(seq,
454                         "trickle_charge\t: %s%s\n",
455                         diodes, resistors);
456 }
457
458 #else
459 #define ds1305_proc     NULL
460 #endif
461
462 static const struct rtc_class_ops ds1305_ops = {
463         .ioctl          = ds1305_ioctl,
464         .read_time      = ds1305_get_time,
465         .set_time       = ds1305_set_time,
466         .read_alarm     = ds1305_get_alarm,
467         .set_alarm      = ds1305_set_alarm,
468         .proc           = ds1305_proc,
469 };
470
471 static void ds1305_work(struct work_struct *work)
472 {
473         struct ds1305   *ds1305 = container_of(work, struct ds1305, work);
474         struct mutex    *lock = &ds1305->rtc->ops_lock;
475         struct spi_device *spi = ds1305->spi;
476         u8              buf[3];
477         int             status;
478
479         /* lock to protect ds1305->ctrl */
480         mutex_lock(lock);
481
482         /* Disable the IRQ, and clear its status ... for now, we "know"
483          * that if more than one alarm is active, they're in sync.
484          * Note that reading ALM data registers also clears IRQ status.
485          */
486         ds1305->ctrl[0] &= ~(DS1305_AEI1 | DS1305_AEI0);
487         ds1305->ctrl[1] = 0;
488
489         buf[0] = DS1305_WRITE | DS1305_CONTROL;
490         buf[1] = ds1305->ctrl[0];
491         buf[2] = 0;
492
493         status = spi_write_then_read(spi, buf, sizeof buf,
494                         NULL, 0);
495         if (status < 0)
496                 dev_dbg(&spi->dev, "clear irq --> %d\n", status);
497
498         mutex_unlock(lock);
499
500         if (!test_bit(FLAG_EXITING, &ds1305->flags))
501                 enable_irq(spi->irq);
502
503         rtc_update_irq(ds1305->rtc, 1, RTC_AF | RTC_IRQF);
504 }
505
506 /*
507  * This "real" IRQ handler hands off to a workqueue mostly to allow
508  * mutex locking for ds1305->ctrl ... unlike I2C, we could issue async
509  * I/O requests in IRQ context (to clear the IRQ status).
510  */
511 static irqreturn_t ds1305_irq(int irq, void *p)
512 {
513         struct ds1305           *ds1305 = p;
514
515         disable_irq(irq);
516         schedule_work(&ds1305->work);
517         return IRQ_HANDLED;
518 }
519
520 /*----------------------------------------------------------------------*/
521
522 /*
523  * Interface for NVRAM
524  */
525
526 static void msg_init(struct spi_message *m, struct spi_transfer *x,
527                 u8 *addr, size_t count, char *tx, char *rx)
528 {
529         spi_message_init(m);
530         memset(x, 0, 2 * sizeof(*x));
531
532         x->tx_buf = addr;
533         x->len = 1;
534         spi_message_add_tail(x, m);
535
536         x++;
537
538         x->tx_buf = tx;
539         x->rx_buf = rx;
540         x->len = count;
541         spi_message_add_tail(x, m);
542 }
543
544 static ssize_t
545 ds1305_nvram_read(struct file *filp, struct kobject *kobj,
546                 struct bin_attribute *attr,
547                 char *buf, loff_t off, size_t count)
548 {
549         struct spi_device       *spi;
550         u8                      addr;
551         struct spi_message      m;
552         struct spi_transfer     x[2];
553         int                     status;
554
555         spi = container_of(kobj, struct spi_device, dev.kobj);
556
557         if (unlikely(off >= DS1305_NVRAM_LEN))
558                 return 0;
559         if (count >= DS1305_NVRAM_LEN)
560                 count = DS1305_NVRAM_LEN;
561         if ((off + count) > DS1305_NVRAM_LEN)
562                 count = DS1305_NVRAM_LEN - off;
563         if (unlikely(!count))
564                 return count;
565
566         addr = DS1305_NVRAM + off;
567         msg_init(&m, x, &addr, count, NULL, buf);
568
569         status = spi_sync(spi, &m);
570         if (status < 0)
571                 dev_err(&spi->dev, "nvram %s error %d\n", "read", status);
572         return (status < 0) ? status : count;
573 }
574
575 static ssize_t
576 ds1305_nvram_write(struct file *filp, struct kobject *kobj,
577                 struct bin_attribute *attr,
578                 char *buf, loff_t off, size_t count)
579 {
580         struct spi_device       *spi;
581         u8                      addr;
582         struct spi_message      m;
583         struct spi_transfer     x[2];
584         int                     status;
585
586         spi = container_of(kobj, struct spi_device, dev.kobj);
587
588         if (unlikely(off >= DS1305_NVRAM_LEN))
589                 return -EFBIG;
590         if (count >= DS1305_NVRAM_LEN)
591                 count = DS1305_NVRAM_LEN;
592         if ((off + count) > DS1305_NVRAM_LEN)
593                 count = DS1305_NVRAM_LEN - off;
594         if (unlikely(!count))
595                 return count;
596
597         addr = (DS1305_WRITE | DS1305_NVRAM) + off;
598         msg_init(&m, x, &addr, count, buf, NULL);
599
600         status = spi_sync(spi, &m);
601         if (status < 0)
602                 dev_err(&spi->dev, "nvram %s error %d\n", "write", status);
603         return (status < 0) ? status : count;
604 }
605
606 static struct bin_attribute nvram = {
607         .attr.name      = "nvram",
608         .attr.mode      = S_IRUGO | S_IWUSR,
609         .read           = ds1305_nvram_read,
610         .write          = ds1305_nvram_write,
611         .size           = DS1305_NVRAM_LEN,
612 };
613
614 /*----------------------------------------------------------------------*/
615
616 /*
617  * Interface to SPI stack
618  */
619
620 static int __devinit ds1305_probe(struct spi_device *spi)
621 {
622         struct ds1305                   *ds1305;
623         int                             status;
624         u8                              addr, value;
625         struct ds1305_platform_data     *pdata = spi->dev.platform_data;
626         bool                            write_ctrl = false;
627
628         /* Sanity check board setup data.  This may be hooked up
629          * in 3wire mode, but we don't care.  Note that unless
630          * there's an inverter in place, this needs SPI_CS_HIGH!
631          */
632         if ((spi->bits_per_word && spi->bits_per_word != 8)
633                         || (spi->max_speed_hz > 2000000)
634                         || !(spi->mode & SPI_CPHA))
635                 return -EINVAL;
636
637         /* set up driver data */
638         ds1305 = kzalloc(sizeof *ds1305, GFP_KERNEL);
639         if (!ds1305)
640                 return -ENOMEM;
641         ds1305->spi = spi;
642         spi_set_drvdata(spi, ds1305);
643
644         /* read and cache control registers */
645         addr = DS1305_CONTROL;
646         status = spi_write_then_read(spi, &addr, sizeof addr,
647                         ds1305->ctrl, sizeof ds1305->ctrl);
648         if (status < 0) {
649                 dev_dbg(&spi->dev, "can't %s, %d\n",
650                                 "read", status);
651                 goto fail0;
652         }
653
654         dev_dbg(&spi->dev, "ctrl %s: %02x %02x %02x\n",
655                         "read", ds1305->ctrl[0],
656                         ds1305->ctrl[1], ds1305->ctrl[2]);
657
658         /* Sanity check register values ... partially compensating for the
659          * fact that SPI has no device handshake.  A pullup on MISO would
660          * make these tests fail; but not all systems will have one.  If
661          * some register is neither 0x00 nor 0xff, a chip is likely there.
662          */
663         if ((ds1305->ctrl[0] & 0x38) != 0 || (ds1305->ctrl[1] & 0xfc) != 0) {
664                 dev_dbg(&spi->dev, "RTC chip is not present\n");
665                 status = -ENODEV;
666                 goto fail0;
667         }
668         if (ds1305->ctrl[2] == 0)
669                 dev_dbg(&spi->dev, "chip may not be present\n");
670
671         /* enable writes if needed ... if we were paranoid it would
672          * make sense to enable them only when absolutely necessary.
673          */
674         if (ds1305->ctrl[0] & DS1305_WP) {
675                 u8              buf[2];
676
677                 ds1305->ctrl[0] &= ~DS1305_WP;
678
679                 buf[0] = DS1305_WRITE | DS1305_CONTROL;
680                 buf[1] = ds1305->ctrl[0];
681                 status = spi_write_then_read(spi, buf, sizeof buf, NULL, 0);
682
683                 dev_dbg(&spi->dev, "clear WP --> %d\n", status);
684                 if (status < 0)
685                         goto fail0;
686         }
687
688         /* on DS1305, maybe start oscillator; like most low power
689          * oscillators, it may take a second to stabilize
690          */
691         if (ds1305->ctrl[0] & DS1305_nEOSC) {
692                 ds1305->ctrl[0] &= ~DS1305_nEOSC;
693                 write_ctrl = true;
694                 dev_warn(&spi->dev, "SET TIME!\n");
695         }
696
697         /* ack any pending IRQs */
698         if (ds1305->ctrl[1]) {
699                 ds1305->ctrl[1] = 0;
700                 write_ctrl = true;
701         }
702
703         /* this may need one-time (re)init */
704         if (pdata) {
705                 /* maybe enable trickle charge */
706                 if (((ds1305->ctrl[2] & 0xf0) != DS1305_TRICKLE_MAGIC)) {
707                         ds1305->ctrl[2] = DS1305_TRICKLE_MAGIC
708                                                 | pdata->trickle;
709                         write_ctrl = true;
710                 }
711
712                 /* on DS1306, configure 1 Hz signal */
713                 if (pdata->is_ds1306) {
714                         if (pdata->en_1hz) {
715                                 if (!(ds1305->ctrl[0] & DS1306_1HZ)) {
716                                         ds1305->ctrl[0] |= DS1306_1HZ;
717                                         write_ctrl = true;
718                                 }
719                         } else {
720                                 if (ds1305->ctrl[0] & DS1306_1HZ) {
721                                         ds1305->ctrl[0] &= ~DS1306_1HZ;
722                                         write_ctrl = true;
723                                 }
724                         }
725                 }
726         }
727
728         if (write_ctrl) {
729                 u8              buf[4];
730
731                 buf[0] = DS1305_WRITE | DS1305_CONTROL;
732                 buf[1] = ds1305->ctrl[0];
733                 buf[2] = ds1305->ctrl[1];
734                 buf[3] = ds1305->ctrl[2];
735                 status = spi_write_then_read(spi, buf, sizeof buf, NULL, 0);
736                 if (status < 0) {
737                         dev_dbg(&spi->dev, "can't %s, %d\n",
738                                         "write", status);
739                         goto fail0;
740                 }
741
742                 dev_dbg(&spi->dev, "ctrl %s: %02x %02x %02x\n",
743                                 "write", ds1305->ctrl[0],
744                                 ds1305->ctrl[1], ds1305->ctrl[2]);
745         }
746
747         /* see if non-Linux software set up AM/PM mode */
748         addr = DS1305_HOUR;
749         status = spi_write_then_read(spi, &addr, sizeof addr,
750                                 &value, sizeof value);
751         if (status < 0) {
752                 dev_dbg(&spi->dev, "read HOUR --> %d\n", status);
753                 goto fail0;
754         }
755
756         ds1305->hr12 = (DS1305_HR_12 & value) != 0;
757         if (ds1305->hr12)
758                 dev_dbg(&spi->dev, "AM/PM\n");
759
760         /* register RTC ... from here on, ds1305->ctrl needs locking */
761         ds1305->rtc = rtc_device_register("ds1305", &spi->dev,
762                         &ds1305_ops, THIS_MODULE);
763         if (IS_ERR(ds1305->rtc)) {
764                 status = PTR_ERR(ds1305->rtc);
765                 dev_dbg(&spi->dev, "register rtc --> %d\n", status);
766                 goto fail0;
767         }
768
769         /* Maybe set up alarm IRQ; be ready to handle it triggering right
770          * away.  NOTE that we don't share this.  The signal is active low,
771          * and we can't ack it before a SPI message delay.  We temporarily
772          * disable the IRQ until it's acked, which lets us work with more
773          * IRQ trigger modes (not all IRQ controllers can do falling edge).
774          */
775         if (spi->irq) {
776                 INIT_WORK(&ds1305->work, ds1305_work);
777                 status = request_irq(spi->irq, ds1305_irq,
778                                 0, dev_name(&ds1305->rtc->dev), ds1305);
779                 if (status < 0) {
780                         dev_dbg(&spi->dev, "request_irq %d --> %d\n",
781                                         spi->irq, status);
782                         goto fail1;
783                 }
784
785                 device_set_wakeup_capable(&spi->dev, 1);
786         }
787
788         /* export NVRAM */
789         status = sysfs_create_bin_file(&spi->dev.kobj, &nvram);
790         if (status < 0) {
791                 dev_dbg(&spi->dev, "register nvram --> %d\n", status);
792                 goto fail2;
793         }
794
795         return 0;
796
797 fail2:
798         free_irq(spi->irq, ds1305);
799 fail1:
800         rtc_device_unregister(ds1305->rtc);
801 fail0:
802         kfree(ds1305);
803         return status;
804 }
805
806 static int __devexit ds1305_remove(struct spi_device *spi)
807 {
808         struct ds1305 *ds1305 = spi_get_drvdata(spi);
809
810         sysfs_remove_bin_file(&spi->dev.kobj, &nvram);
811
812         /* carefully shut down irq and workqueue, if present */
813         if (spi->irq) {
814                 set_bit(FLAG_EXITING, &ds1305->flags);
815                 free_irq(spi->irq, ds1305);
816                 flush_scheduled_work();
817         }
818
819         rtc_device_unregister(ds1305->rtc);
820         spi_set_drvdata(spi, NULL);
821         kfree(ds1305);
822         return 0;
823 }
824
825 static struct spi_driver ds1305_driver = {
826         .driver.name    = "rtc-ds1305",
827         .driver.owner   = THIS_MODULE,
828         .probe          = ds1305_probe,
829         .remove         = __devexit_p(ds1305_remove),
830         /* REVISIT add suspend/resume */
831 };
832
833 static int __init ds1305_init(void)
834 {
835         return spi_register_driver(&ds1305_driver);
836 }
837 module_init(ds1305_init);
838
839 static void __exit ds1305_exit(void)
840 {
841         spi_unregister_driver(&ds1305_driver);
842 }
843 module_exit(ds1305_exit);
844
845 MODULE_DESCRIPTION("RTC driver for DS1305 and DS1306 chips");
846 MODULE_LICENSE("GPL");
847 MODULE_ALIAS("spi:rtc-ds1305");