Revert "Revert "regulator: tps80031: rename regulator-name enums""
[linux-2.6.git] / drivers / regulator / tps80031-regulator.c
1 /*
2  * driver/regulator/tps80031-regulator.c
3  *
4  * Regulator driver for TI TPS80031
5  *
6  * Copyright (C) 2011 NVIDIA Corporation
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful, but WITHOUT
14  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
16  * more details.
17  *
18  * You should have received a copy of the GNU General Public License along
19  * with this program; if not, write to the Free Software Foundation, Inc.,
20  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
21  *
22  */
23
24 #include <linux/kernel.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/err.h>
28 #include <linux/slab.h>
29 #include <linux/platform_device.h>
30 #include <linux/regulator/driver.h>
31 #include <linux/regulator/machine.h>
32 #include <linux/regulator/tps80031-regulator.h>
33 #include <linux/mfd/tps80031.h>
34
35 /* Flags for DCDC Voltage reading */
36 #define DCDC_OFFSET_EN          BIT(0)
37 #define DCDC_EXTENDED_EN        BIT(1)
38 #define TRACK_MODE_ENABLE       BIT(2)
39
40 #define SMPS_MULTOFFSET_VIO     BIT(1)
41 #define SMPS_MULTOFFSET_SMPS1   BIT(3)
42 #define SMPS_MULTOFFSET_SMPS2   BIT(4)
43 #define SMPS_MULTOFFSET_SMPS3   BIT(6)
44 #define SMPS_MULTOFFSET_SMPS4   BIT(0)
45
46 #define PMC_SMPS_OFFSET_ADD     0xE0
47 #define PMC_SMPS_MULT_ADD       0xE3
48
49 #define STATE_OFF               0x00
50 #define STATE_ON                0x01
51 #define STATE_MASK              0x03
52
53 #define TRANS_SLEEP_OFF         0x00
54 #define TRANS_SLEEP_ON          0x04
55 #define TRANS_SLEEP_MASK        0x0C
56
57 #define SMPS_CMD_MASK           0xC0
58 #define SMPS_VSEL_MASK          0x3F
59 #define LDO_VSEL_MASK           0x1F
60
61 #define TPS80031_MISC2_ADD      0xE5
62 #define MISC2_LDOUSB_IN_VSYS    0x10
63 #define MISC2_LDOUSB_IN_PMID    0x08
64 #define MISC2_LDOUSB_IN_MASK    0x18
65
66 #define MISC2_LDO3_SEL_VIB_VAL  BIT(0)
67 #define MISC2_LDO3_SEL_VIB_MASK 0x1
68
69 #define CHARGERUSB_CTRL3_ADD    0xEA
70 #define BOOST_HW_PWR_EN         BIT(5)
71 #define BOOST_HW_PWR_EN_MASK    BIT(5)
72
73 #define CHARGERUSB_CTRL1_ADD    0xE8
74 #define OPA_MODE_EN             BIT(6)
75 #define OPA_MODE_EN_MASK        BIT(6)
76
77 #define USB_VBUS_CTRL_SET       0x04
78 #define USB_VBUS_CTRL_CLR       0x05
79 #define VBUS_DISCHRG            0x20
80
81 #define EXT_PWR_REQ (PWR_REQ_INPUT_PREQ1 | PWR_REQ_INPUT_PREQ2 | \
82                         PWR_REQ_INPUT_PREQ3)
83
84 struct tps80031_regulator {
85
86         /* Regulator register address.*/
87         u8              trans_reg;
88         u8              state_reg;
89         u8              force_reg;
90         u8              volt_reg;
91         u8              volt_id;
92         uint8_t         trans_reg_cache;
93         uint8_t         state_reg_cache;
94         uint8_t         force_reg_cache;
95         uint8_t         volt_reg_cache;
96
97         /* twl resource ID, for resource control state machine */
98         u8                      id;
99
100         /* chip constraints on regulator behavior */
101         u16                     min_mV;
102         u16                     max_mV;
103         unsigned int            tolerance_uv;
104
105         /* regulator specific turn-on delay */
106         int                     delay;
107
108         u8                      flags;
109         unsigned int            platform_flags;
110         unsigned int            ext_ctrl_flag;
111
112         /* used by regulator core */
113         struct regulator_desc   desc;
114
115         /* Device */
116         struct device           *dev;
117
118         /*Power request bits */
119         int preq_bit;
120 };
121
122 static inline struct device *to_tps80031_dev(struct regulator_dev *rdev)
123 {
124         return rdev_get_dev(rdev)->parent->parent;
125 }
126
127 static int tps80031_regulator_enable_time(struct regulator_dev *rdev)
128 {
129         struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
130
131         return ri->delay;
132 }
133
134 static u8 tps80031_get_smps_offset(struct device *parent)
135 {
136         u8 value;
137         int ret;
138
139         ret = tps80031_read(parent, SLAVE_ID1, PMC_SMPS_OFFSET_ADD, &value);
140         if (ret < 0) {
141                 dev_err(parent, "Error in reading smps offset register\n");
142                 return 0;
143         }
144         return value;
145 }
146
147 static u8 tps80031_get_smps_mult(struct device *parent)
148 {
149         u8 value;
150         int ret;
151
152         ret = tps80031_read(parent, SLAVE_ID1, PMC_SMPS_MULT_ADD, &value);
153         if (ret < 0) {
154                 dev_err(parent, "Error in reading smps mult register\n");
155                 return 0;
156         }
157         return value;
158 }
159
160 static int tps80031_reg_is_enabled(struct regulator_dev *rdev)
161 {
162         struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
163
164         if (ri->ext_ctrl_flag & EXT_PWR_REQ)
165                 return true;
166         return ((ri->state_reg_cache & STATE_MASK) == STATE_ON);
167 }
168
169 static int tps80031_reg_enable(struct regulator_dev *rdev)
170 {
171         struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
172         struct device *parent = to_tps80031_dev(rdev);
173         int ret;
174         uint8_t reg_val;
175
176         if (ri->ext_ctrl_flag & EXT_PWR_REQ)
177                 return 0;
178
179         reg_val = (ri->state_reg_cache & ~STATE_MASK) |
180                                         (STATE_ON & STATE_MASK);
181         ret = tps80031_write(parent, SLAVE_ID1, ri->state_reg, reg_val);
182         if (ret < 0) {
183                 dev_err(&rdev->dev, "Error in writing the STATE register\n");
184                 return ret;
185         }
186         ri->state_reg_cache = reg_val;
187         udelay(ri->delay);
188         return ret;
189 }
190
191 static int tps80031_reg_disable(struct regulator_dev *rdev)
192 {
193         struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
194         struct device *parent = to_tps80031_dev(rdev);
195         int ret;
196         uint8_t reg_val;
197
198         if (ri->ext_ctrl_flag & EXT_PWR_REQ)
199                 return 0;
200
201         reg_val = (ri->state_reg_cache & ~STATE_MASK) |
202                                         (STATE_OFF & STATE_MASK);
203         ret = tps80031_write(parent, SLAVE_ID1, ri->state_reg, reg_val);
204         if (ret < 0)
205                 dev_err(&rdev->dev, "Error in writing the STATE register\n");
206         else
207                 ri->state_reg_cache = reg_val;
208         return ret;
209 }
210
211 /*
212  * DCDC status and control
213  */
214 static int tps80031dcdc_list_voltage(struct regulator_dev *rdev, unsigned index)
215 {
216         struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
217         int voltage = 0;
218
219         switch (ri->flags) {
220         case 0:
221                 if (index == 0)
222                         voltage = 0;
223                 else if (index < 58)
224                         voltage = (607700 + (12660 * (index - 1)));
225                 else if (index == 58)
226                         voltage = 1350 * 1000;
227                 else if (index == 59)
228                         voltage = 1500 * 1000;
229                 else if (index == 60)
230                         voltage = 1800 * 1000;
231                 else if (index == 61)
232                         voltage = 1900 * 1000;
233                 else if (index == 62)
234                         voltage = 2100 * 1000;
235                 break;
236
237         case DCDC_OFFSET_EN:
238                 if (index == 0)
239                         voltage = 0;
240                 else if (index < 58)
241                         voltage = (700000 + (12500 * (index - 1)));
242                 else if (index == 58)
243                         voltage = 1350 * 1000;
244                 else if (index == 59)
245                         voltage = 1500 * 1000;
246                 else if (index == 60)
247                         voltage = 1800 * 1000;
248                 else if (index == 61)
249                         voltage = 1900 * 1000;
250                 else if (index == 62)
251                         voltage = 2100 * 1000;
252                 break;
253
254         case DCDC_EXTENDED_EN:
255                 if (index == 0)
256                         voltage = 0;
257                 else if (index < 58)
258                         voltage = (1852000 + (38600 * (index - 1)));
259                 else if (index == 58)
260                         voltage = 2084 * 1000;
261                 else if (index == 59)
262                         voltage = 2315 * 1000;
263                 else if (index == 60)
264                         voltage = 2778 * 1000;
265                 else if (index == 61)
266                         voltage = 2932 * 1000;
267                 else if (index == 62)
268                         voltage = 3241 * 1000;
269                 break;
270
271         case DCDC_OFFSET_EN|DCDC_EXTENDED_EN:
272                 if (index == 0)
273                         voltage = 0;
274                 else if (index < 58)
275                         voltage = (2161000 + (38600 * (index - 1)));
276                 else if (index == 58)
277                         voltage = 4167 * 1000;
278                 else if (index == 59)
279                         voltage = 2315 * 1000;
280                 else if (index == 60)
281                         voltage = 2778 * 1000;
282                 else if (index == 61)
283                         voltage = 2932 * 1000;
284                 else if (index == 62)
285                         voltage = 3241 * 1000;
286                 break;
287         }
288
289         return voltage;
290 }
291
292 static int __tps80031_dcdc_set_voltage(struct device *parent,
293                                        struct tps80031_regulator *ri,
294                                        int min_uV, int max_uV,
295                                        unsigned *selector)
296 {
297         int vsel = 0;
298         int ret;
299
300         switch (ri->flags) {
301         case 0:
302                 if (min_uV >= (607700 + ri->tolerance_uv))
303                         min_uV = min_uV - ri->tolerance_uv;
304
305                 if (min_uV == 0)
306                         vsel = 0;
307                 else if ((min_uV >= 607700) && (min_uV <= 1300000)) {
308                         int cal_volt;
309                         vsel = (10 * (min_uV - 607700)) / 1266;
310                         if (vsel % 100)
311                                 vsel += 100;
312                         vsel /= 100;
313                         vsel++;
314                         cal_volt = (607700 + (12660 * (vsel - 1)));
315                         if (cal_volt > max_uV)
316                                 return -EINVAL;
317                 } else if ((min_uV > 1900000) && (max_uV >= 2100000))
318                         vsel = 62;
319                 else if ((min_uV > 1800000) && (max_uV >= 1900000))
320                         vsel = 61;
321                 else if ((min_uV > 1500000) && (max_uV >= 1800000))
322                         vsel = 60;
323                 else if ((min_uV > 1350000) && (max_uV >= 1500000))
324                         vsel = 59;
325                 else if ((min_uV > 1300000) && (max_uV >= 1350000))
326                         vsel = 58;
327                 else
328                         return -EINVAL;
329                 break;
330
331         case DCDC_OFFSET_EN:
332                 if (min_uV >= (700000 + ri->tolerance_uv))
333                         min_uV = min_uV - ri->tolerance_uv;
334                 if (min_uV == 0)
335                         vsel = 0;
336                 else if ((min_uV >= 700000) && (min_uV <= 1420000)) {
337                         int cal_volt;
338                         vsel = (min_uV - 700000) / 125;
339                         if (vsel % 100)
340                                 vsel += 100;
341                         vsel /= 100;
342                         vsel++;
343                         cal_volt = (700000 + (12500 * (vsel - 1)));
344                         if (cal_volt > max_uV)
345                                 return -EINVAL;
346                 } else if ((min_uV > 1900000) && (max_uV >= 2100000))
347                         vsel = 62;
348                 else if ((min_uV > 1800000) && (max_uV >= 1900000))
349                         vsel = 61;
350                 else if ((min_uV > 1500000) && (max_uV >= 1800000))
351                         vsel = 60;
352                 else if ((min_uV > 1350000) && (max_uV >= 1500000))
353                         vsel = 59;
354                 else if ((min_uV > 1300000) && (max_uV >= 1350000))
355                         vsel = 58;
356                 else
357                         return -EINVAL;
358                 break;
359
360         case DCDC_EXTENDED_EN:
361                 if (min_uV >= (1852000 + ri->tolerance_uv))
362                         min_uV = min_uV - ri->tolerance_uv;
363                 if (min_uV == 0)
364                         vsel = 0;
365                 else if ((min_uV >= 1852000) && (max_uV <= 4013600)) {
366                         vsel = (min_uV - 1852000) / 386;
367                         if (vsel % 100)
368                                 vsel += 100;
369                         vsel++;
370                 }
371                 break;
372
373         case DCDC_OFFSET_EN|DCDC_EXTENDED_EN:
374                 if (min_uV >= (2161000 + ri->tolerance_uv))
375                         min_uV = min_uV - ri->tolerance_uv;
376                 if (min_uV == 0)
377                         vsel = 0;
378                 else if ((min_uV >= 2161000) && (max_uV <= 4321000)) {
379                         vsel = (min_uV - 2161000) / 386;
380                         if (vsel % 100)
381                                 vsel += 100;
382                         vsel /= 100;
383                         vsel++;
384                 }
385                 break;
386         }
387
388         if (selector)
389                 *selector = vsel;
390
391         if (ri->force_reg) {
392                 if (((ri->force_reg_cache >> 6) & 0x3) == 0) {
393                         ret = tps80031_write(parent, ri->volt_id,
394                                                 ri->force_reg, vsel);
395                         if (ret < 0)
396                                 dev_err(ri->dev, "Error in writing the "
397                                                 "force register\n");
398                         else
399                                 ri->force_reg_cache = vsel;
400                         return ret;
401                 }
402         }
403         ret = tps80031_write(parent, ri->volt_id, ri->volt_reg, vsel);
404         if (ret < 0)
405                 dev_err(ri->dev, "Error in writing the Voltage register\n");
406         else
407                 ri->volt_reg_cache = vsel;
408         return ret;
409 }
410
411 static int tps80031dcdc_set_voltage(struct regulator_dev *rdev,
412                         int min_uV, int max_uV, unsigned *selector)
413 {
414         struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
415         struct device *parent = to_tps80031_dev(rdev);
416         return __tps80031_dcdc_set_voltage(parent, ri, min_uV, max_uV,
417                                            selector);
418 }
419
420 static int tps80031dcdc_get_voltage(struct regulator_dev *rdev)
421 {
422         struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
423         uint8_t vsel = 0;
424         int voltage = 0;
425
426         if (ri->force_reg) {
427                 vsel  = ri->force_reg_cache;
428                 if ((vsel & SMPS_CMD_MASK) == 0)
429                         goto decode;
430         }
431
432         vsel =  ri->volt_reg_cache;
433
434 decode:
435         vsel &= SMPS_VSEL_MASK;
436
437         switch (ri->flags) {
438         case 0:
439                 if (vsel == 0)
440                         voltage = 0;
441                 else if (vsel < 58)
442                         voltage = (607700 + (12660 * (vsel - 1)));
443                 else if (vsel == 58)
444                         voltage = 1350 * 1000;
445                 else if (vsel == 59)
446                         voltage = 1500 * 1000;
447                 else if (vsel == 60)
448                         voltage = 1800 * 1000;
449                 else if (vsel == 61)
450                         voltage = 1900 * 1000;
451                 else if (vsel == 62)
452                         voltage = 2100 * 1000;
453                 break;
454
455         case DCDC_OFFSET_EN:
456                 if (vsel == 0)
457                         voltage = 0;
458                 else if (vsel < 58)
459                         voltage = (700000 + (12500 * (vsel - 1)));
460                 else if (vsel == 58)
461                         voltage = 1350 * 1000;
462                 else if (vsel == 59)
463                         voltage = 1500 * 1000;
464                 else if (vsel == 60)
465                         voltage = 1800 * 1000;
466                 else if (vsel == 61)
467                         voltage = 1900 * 1000;
468                 else if (vsel == 62)
469                         voltage = 2100 * 1000;
470                 break;
471
472         case DCDC_EXTENDED_EN:
473                 if (vsel == 0)
474                         voltage = 0;
475                 else if (vsel < 58)
476                         voltage = (1852000 + (38600 * (vsel - 1)));
477                 else if (vsel == 58)
478                         voltage = 2084 * 1000;
479                 else if (vsel == 59)
480                         voltage = 2315 * 1000;
481                 else if (vsel == 60)
482                         voltage = 2778 * 1000;
483                 else if (vsel == 61)
484                         voltage = 2932 * 1000;
485                 else if (vsel == 62)
486                         voltage = 3241 * 1000;
487                 break;
488
489         case DCDC_EXTENDED_EN|DCDC_OFFSET_EN:
490                 if (vsel == 0)
491                         voltage = 0;
492                 else if (vsel < 58)
493                         voltage = (2161000 + (38600 * (vsel - 1)));
494                 else if (vsel == 58)
495                         voltage = 4167 * 1000;
496                 else if (vsel == 59)
497                         voltage = 2315 * 1000;
498                 else if (vsel == 60)
499                         voltage = 2778 * 1000;
500                 else if (vsel == 61)
501                         voltage = 2932 * 1000;
502                 else if (vsel == 62)
503                         voltage = 3241 * 1000;
504                 break;
505         }
506
507         return voltage;
508 }
509
510 static int tps80031ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
511 {
512         struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
513
514         if (index == 0)
515                 return 0;
516
517         if ((ri->desc.id == TPS80031_REGULATOR_LDO2) &&
518                         (ri->flags &  TRACK_MODE_ENABLE))
519                 return (ri->min_mV + (((index - 1) * 125))/10) * 1000;
520
521         return (ri->min_mV + ((index - 1) * 100)) * 1000;
522 }
523
524 static int __tps80031_ldo2_set_voltage_track_mode(struct device *parent,
525                 struct tps80031_regulator *ri, int min_uV, int max_uV)
526 {
527         int vsel = 0;
528         int ret;
529         int nvsel;
530
531         if (min_uV < 600000) {
532                 vsel = 0;
533         } else if ((min_uV >= 600000) && (max_uV <= 1300000)) {
534                 vsel = (min_uV - 600000) / 125;
535                 if (vsel % 100)
536                         vsel += 100;
537                 vsel /= 100;
538                 vsel++;
539         } else {
540                 return -EINVAL;
541         }
542
543         /* Check for valid setting for TPS80031 or TPS80032-ES1.0 */
544         if ((tps80031_get_chip_info(parent) == TPS80031) ||
545                 ((tps80031_get_chip_info(parent) == TPS80032) &&
546                 (tps80031_get_pmu_version(parent) == 0x0))) {
547                 nvsel = vsel & 0x1F;
548                 if ((nvsel == 0x0) || (nvsel >= 0x19 && nvsel <= 0x1F)) {
549                         dev_err(ri->dev, "Invalid value for track mode LDO2 "
550                                 "configuration for TPS8003x PMU\n");
551                         return -EINVAL;
552                 }
553         }
554
555         ret = tps80031_write(parent, ri->volt_id, ri->volt_reg, vsel);
556         if (ret < 0)
557                 dev_err(ri->dev, "Error in writing the Voltage register\n");
558         else
559                 ri->volt_reg_cache = vsel;
560         return ret;
561 }
562
563
564 static int __tps80031_ldo_set_voltage(struct device *parent,
565                                       struct tps80031_regulator *ri,
566                                       int min_uV, int max_uV,
567                                       unsigned *selector)
568 {
569         int vsel;
570         int ret;
571
572         if ((min_uV/1000 < ri->min_mV) || (max_uV/1000 > ri->max_mV))
573                 return -EDOM;
574
575         if ((ri->desc.id == TPS80031_REGULATOR_LDO2) &&
576                         (ri->flags &  TRACK_MODE_ENABLE))
577                 return __tps80031_ldo2_set_voltage_track_mode(parent, ri,
578                                 min_uV, max_uV);
579
580         /*
581          * Use the below formula to calculate vsel
582          * mV = 1000mv + 100mv * (vsel - 1)
583          */
584         vsel = (min_uV/1000 - 1000)/100 + 1;
585         if (selector)
586                 *selector = vsel;
587         ret = tps80031_write(parent, ri->volt_id, ri->volt_reg, vsel);
588         if (ret < 0)
589                 dev_err(ri->dev, "Error in writing the Voltage register\n");
590         else
591                 ri->volt_reg_cache = vsel;
592         return ret;
593 }
594
595 static int tps80031ldo_set_voltage(struct regulator_dev *rdev,
596                 int min_uV, int max_uV, unsigned *selector)
597 {
598         struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
599         struct device *parent = to_tps80031_dev(rdev);
600
601         return __tps80031_ldo_set_voltage(parent, ri, min_uV, max_uV,
602                                           selector);
603 }
604
605 static int tps80031ldo_get_voltage(struct regulator_dev *rdev)
606 {
607         struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
608         uint8_t vsel;
609
610
611         if ((ri->desc.id == TPS80031_REGULATOR_LDO2) &&
612                         (ri->flags &  TRACK_MODE_ENABLE)) {
613                 vsel = ri->volt_reg_cache & 0x3F;
614                 return (ri->min_mV + (((vsel - 1) * 125))/10) * 1000;
615         }
616
617         vsel = ri->volt_reg_cache & LDO_VSEL_MASK;
618         /*
619          * Use the below formula to calculate vsel
620          * mV = 1000mv + 100mv * (vsel - 1)
621          */
622         return (1000 + (100 * (vsel - 1))) * 1000;
623 }
624
625 /* VBUS */
626 static int tps80031_vbus_enable_time(struct regulator_dev *rdev)
627 {
628         /* Enable and settling time for vbus is 3ms */
629         return 3000;
630 }
631 static int tps80031_vbus_is_enabled(struct regulator_dev *rdev)
632 {
633         struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
634         struct device *parent = to_tps80031_dev(rdev);
635         uint8_t ctrl1, ctrl3;
636         int ret;
637
638         if (ri->platform_flags & VBUS_SW_ONLY) {
639                 ret = tps80031_read(parent, SLAVE_ID2,
640                                 CHARGERUSB_CTRL1_ADD, &ctrl1);
641                 if (!ret)
642                         ret = tps80031_read(parent, SLAVE_ID2,
643                                         CHARGERUSB_CTRL3_ADD, &ctrl3);
644                 if (ret < 0) {
645                         dev_err(&rdev->dev, "Error in reading control reg\n");
646                         return ret;
647                 }
648                 if ((ctrl1 & OPA_MODE_EN) && (ctrl3 & BOOST_HW_PWR_EN))
649                         return 1;
650                 return 0;
651         } else {
652                 return -EIO;
653         }
654 }
655
656 static int tps80031_vbus_enable(struct regulator_dev *rdev)
657 {
658         struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
659         struct device *parent = to_tps80031_dev(rdev);
660         int ret;
661
662         if (ri->platform_flags & VBUS_SW_ONLY) {
663                 ret = tps80031_set_bits(parent, SLAVE_ID2,
664                                 CHARGERUSB_CTRL1_ADD,  OPA_MODE_EN);
665                 if (!ret)
666                         ret = tps80031_set_bits(parent, SLAVE_ID2,
667                                         CHARGERUSB_CTRL3_ADD, BOOST_HW_PWR_EN);
668                 if (ret < 0) {
669                         dev_err(&rdev->dev, "Error in reading control reg\n");
670                         return ret;
671                 }
672                 udelay(ri->delay);
673                 return ret;
674         }
675         dev_err(&rdev->dev, "%s() is not supported with flag 0x%08x\n",
676                  __func__, ri->platform_flags);
677         return -EIO;
678 }
679
680 static int tps80031_vbus_disable(struct regulator_dev *rdev)
681 {
682         struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
683         struct device *parent = to_tps80031_dev(rdev);
684         int ret = 0;
685
686         if (ri->platform_flags & VBUS_SW_ONLY) {
687
688                 if (ri->platform_flags & VBUS_DISCHRG_EN_PDN)
689                         ret = tps80031_write(parent, SLAVE_ID2,
690                                 USB_VBUS_CTRL_SET, VBUS_DISCHRG);
691                 if (!ret)
692                         ret = tps80031_clr_bits(parent, SLAVE_ID2,
693                                 CHARGERUSB_CTRL1_ADD,  OPA_MODE_EN);
694                 if (!ret)
695                         ret = tps80031_clr_bits(parent, SLAVE_ID2,
696                                         CHARGERUSB_CTRL3_ADD, BOOST_HW_PWR_EN);
697                 if (!ret)
698                         mdelay((ri->delay + 999)/1000);
699
700                 if (ri->platform_flags & VBUS_DISCHRG_EN_PDN)
701                         tps80031_write(parent, SLAVE_ID2,
702                                 USB_VBUS_CTRL_CLR, VBUS_DISCHRG);
703
704                 if (ret < 0)
705                         dev_err(&rdev->dev, "Error in reading control reg\n");
706                 return ret;
707         }
708         dev_err(&rdev->dev, "%s() is not supported with flag 0x%08x\n",
709                  __func__, ri->platform_flags);
710         return -EIO;
711 }
712
713 static int tps80031vbus_get_voltage(struct regulator_dev *rdev)
714 {
715         int ret;
716         ret = tps80031_vbus_is_enabled(rdev);
717         if (ret > 0)
718                 return 5000000;
719         return ret;
720 }
721
722 static struct regulator_ops tps80031dcdc_ops = {
723         .list_voltage   = tps80031dcdc_list_voltage,
724         .set_voltage    = tps80031dcdc_set_voltage,
725         .get_voltage    = tps80031dcdc_get_voltage,
726         .enable         = tps80031_reg_enable,
727         .disable        = tps80031_reg_disable,
728         .is_enabled     = tps80031_reg_is_enabled,
729         .enable_time    = tps80031_regulator_enable_time,
730 };
731
732 static struct regulator_ops tps80031ldo_ops = {
733         .list_voltage   = tps80031ldo_list_voltage,
734         .set_voltage    = tps80031ldo_set_voltage,
735         .get_voltage    = tps80031ldo_get_voltage,
736         .enable         = tps80031_reg_enable,
737         .disable        = tps80031_reg_disable,
738         .is_enabled     = tps80031_reg_is_enabled,
739         .enable_time    = tps80031_regulator_enable_time,
740 };
741
742 static struct regulator_ops tps80031vbus_ops = {
743         .get_voltage    = tps80031vbus_get_voltage,
744         .enable         = tps80031_vbus_enable,
745         .disable        = tps80031_vbus_disable,
746         .is_enabled     = tps80031_vbus_is_enabled,
747         .enable_time    = tps80031_vbus_enable_time,
748 };
749
750 #define TPS80031_REG(_id, _trans_reg, _state_reg, _force_reg, _volt_reg, \
751                 _volt_id, min_mVolts, max_mVolts, _ops, _n_volt, _delay, \
752                 _preq_bit)                                               \
753 {                                                               \
754         .trans_reg = _trans_reg,                                \
755         .state_reg = _state_reg,                                \
756         .force_reg = _force_reg,                                \
757         .volt_reg = _volt_reg,                                  \
758         .volt_id = _volt_id,                                    \
759         .id = TPS80031_REGULATOR_##_id,                         \
760         .min_mV = min_mVolts,                                   \
761         .max_mV = max_mVolts,                                   \
762         .desc = {                                               \
763                 .name = tps80031_rails(_id),                    \
764                 .id = TPS80031_REGULATOR_##_id,                 \
765                 .n_voltages = _n_volt,                          \
766                 .ops = &_ops,                                   \
767                 .type = REGULATOR_VOLTAGE,                      \
768                 .owner = THIS_MODULE,                           \
769         },                                                      \
770         .delay = _delay,                                        \
771         .preq_bit = _preq_bit,                                  \
772 }
773
774 static struct tps80031_regulator tps80031_regulator[] = {
775         TPS80031_REG(VIO,   0x47, 0x48, 0x49, 0x4A, SLAVE_ID0, 600, 2100,
776                                 tps80031dcdc_ops, 63, 500, 4),
777         TPS80031_REG(SMPS1, 0x53, 0x54, 0x55, 0x56, SLAVE_ID0, 600, 2100,
778                                 tps80031dcdc_ops, 63, 500, 0),
779         TPS80031_REG(SMPS2, 0x59, 0x5A, 0x5B, 0x5C, SLAVE_ID0, 600, 2100,
780                                 tps80031dcdc_ops, 63, 500, 1),
781         TPS80031_REG(SMPS3, 0x65, 0x66, 0x00, 0x68, SLAVE_ID1, 600, 2100,
782                                 tps80031dcdc_ops, 63, 500, 2),
783         TPS80031_REG(SMPS4, 0x41, 0x42, 0x00, 0x44, SLAVE_ID1, 600, 2100,
784                                 tps80031dcdc_ops, 63, 500, 3),
785
786         TPS80031_REG(LDO1,   0x9D, 0x9E, 0x00, 0x9F, SLAVE_ID1, 1000, 3300,
787                                 tps80031ldo_ops, 25, 500, 8),
788         TPS80031_REG(LDO2,   0x85, 0x86, 0x00, 0x87, SLAVE_ID1, 1000, 3300,
789                                 tps80031ldo_ops, 25, 500, 9),
790         TPS80031_REG(LDO3,   0x8D, 0x8E, 0x00, 0x8F, SLAVE_ID1, 1000, 3300,
791                                 tps80031ldo_ops, 25, 500, 10),
792         TPS80031_REG(LDO4,   0x89, 0x8A, 0x00, 0x8B, SLAVE_ID1, 1000, 3300,
793                                 tps80031ldo_ops, 25, 500, 11),
794         TPS80031_REG(LDO5,   0x99, 0x9A, 0x00, 0x9B, SLAVE_ID1, 1000, 3300,
795                                 tps80031ldo_ops, 25, 500, 12),
796         TPS80031_REG(LDO6,   0x91, 0x92, 0x00, 0x93, SLAVE_ID1, 1000, 3300,
797                                 tps80031ldo_ops, 25, 500, 13),
798         TPS80031_REG(LDO7,   0xA5, 0xA6, 0x00, 0xA7, SLAVE_ID1, 1000, 3300,
799                                 tps80031ldo_ops, 25, 500, 14),
800         TPS80031_REG(LDOUSB, 0xA1, 0xA2, 0x00, 0xA3, SLAVE_ID1, 1000, 3300,
801                                 tps80031ldo_ops, 25, 500, 5),
802         TPS80031_REG(LDOLN,  0x95, 0x96, 0x00, 0x97, SLAVE_ID1, 1000, 3300,
803                                 tps80031ldo_ops, 25, 500, 15),
804         TPS80031_REG(VANA,   0x81, 0x82, 0x00, 0x83, SLAVE_ID1, 1000, 3300,
805                                 tps80031ldo_ops, 25, 500, -1),
806         TPS80031_REG(VBUS,   0x0,  0x0,  0x00, 0x0,  SLAVE_ID1, 0,    5000,
807                                 tps80031vbus_ops, 2, 200000, -1),
808 };
809
810 static int tps80031_power_req_config(struct device *parent,
811                 struct tps80031_regulator *ri,
812                 struct tps80031_regulator_platform_data *tps80031_pdata)
813 {
814         int ret = 0;
815         uint8_t reg_val;
816
817         if (ri->preq_bit < 0)
818                 goto skip_pwr_req_config;
819
820         ret = tps80031_ext_power_req_config(parent, ri->ext_ctrl_flag,
821                         ri->preq_bit, ri->state_reg, ri->trans_reg);
822         if (!ret)
823                 ret = tps80031_read(parent, SLAVE_ID1, ri->trans_reg,
824                         &ri->trans_reg_cache);
825
826         if (!ret && ri->state_reg)
827                 ret = tps80031_read(parent, SLAVE_ID1, ri->state_reg,
828                         &ri->state_reg_cache);
829         if (ret < 0) {
830                 dev_err(ri->dev, "%s() fails\n", __func__);
831                 return ret;
832         }
833
834 skip_pwr_req_config:
835         if (tps80031_pdata->ext_ctrl_flag &
836                         (PWR_OFF_ON_SLEEP | PWR_ON_ON_SLEEP)) {
837                 reg_val = (ri->trans_reg_cache & ~0xC);
838                 if (tps80031_pdata->ext_ctrl_flag & PWR_ON_ON_SLEEP)
839                         reg_val |= 0x4;
840
841                 ret = tps80031_write(parent, SLAVE_ID1, ri->trans_reg,
842                         reg_val);
843                 if (ret < 0)
844                         dev_err(ri->dev, "Not able to write reg 0x%02x\n",
845                                 ri->trans_reg);
846                 else
847                         ri->trans_reg_cache = reg_val;
848         }
849         return ret;
850 }
851
852 static int tps80031_regulator_preinit(struct device *parent,
853                 struct tps80031_regulator *ri,
854                 struct tps80031_regulator_platform_data *tps80031_pdata)
855 {
856         int ret = 0;
857         uint8_t reg_val;
858
859         if (ri->desc.id == TPS80031_REGULATOR_LDOUSB) {
860                 if (ri->platform_flags & USBLDO_INPUT_VSYS)
861                         ret = tps80031_update(parent, SLAVE_ID1,
862                                 TPS80031_MISC2_ADD,
863                                 MISC2_LDOUSB_IN_VSYS, MISC2_LDOUSB_IN_MASK);
864                 if (ri->platform_flags & USBLDO_INPUT_PMID)
865                         ret = tps80031_update(parent, SLAVE_ID1,
866                                 TPS80031_MISC2_ADD,
867                                 MISC2_LDOUSB_IN_PMID, MISC2_LDOUSB_IN_MASK);
868                 if (ret < 0) {
869                         dev_err(ri->dev, "Not able to configure the rail "
870                                 "LDOUSB as per platform data error %d\n", ret);
871                         return ret;
872                 }
873         }
874
875         if (ri->desc.id == TPS80031_REGULATOR_LDO3) {
876                 if (ri->platform_flags & LDO3_OUTPUT_VIB)
877                         ret = tps80031_update(parent, SLAVE_ID1,
878                                 TPS80031_MISC2_ADD,
879                                 MISC2_LDO3_SEL_VIB_VAL,
880                                 MISC2_LDO3_SEL_VIB_MASK);
881                 if (ret < 0) {
882                         dev_err(ri->dev, "Not able to configure the rail "
883                                 "LDO3 as per platform data error %d\n", ret);
884                         return ret;
885                 }
886         }
887
888         if (!tps80031_pdata->init_apply)
889                 return 0;
890
891         if (tps80031_pdata->init_uV >= 0) {
892                 switch (ri->desc.id) {
893                 case TPS80031_ID_VIO:
894                 case TPS80031_ID_SMPS1:
895                 case TPS80031_ID_SMPS2:
896                 case TPS80031_ID_SMPS3:
897                 case TPS80031_ID_SMPS4:
898                         ret = __tps80031_dcdc_set_voltage(parent, ri,
899                                         tps80031_pdata->init_uV,
900                                         tps80031_pdata->init_uV, 0);
901                         break;
902
903                 case TPS80031_ID_LDO1:
904                 case TPS80031_ID_LDO2:
905                 case TPS80031_ID_LDO3:
906                 case TPS80031_ID_LDO4:
907                 case TPS80031_ID_LDO5:
908                 case TPS80031_ID_LDO6:
909                 case TPS80031_ID_LDO7:
910                 case TPS80031_ID_LDOUSB:
911                 case TPS80031_ID_LDOLN:
912                 case TPS80031_ID_VANA:
913                         ret = __tps80031_ldo_set_voltage(parent, ri,
914                                         tps80031_pdata->init_uV,
915                                         tps80031_pdata->init_uV, 0);
916                         break;
917                 default:
918                         ret = -EINVAL;
919                         break;
920                 }
921
922                 if (ret < 0) {
923                         dev_err(ri->dev, "Not able to initialize voltage %d "
924                                 "for rail %d err %d\n", tps80031_pdata->init_uV,
925                                 ri->desc.id, ret);
926                         return ret;
927                 }
928         }
929
930         if (tps80031_pdata->init_enable)
931                 reg_val = (ri->state_reg_cache & ~STATE_MASK) |
932                                 (STATE_ON & STATE_MASK);
933         else
934                 reg_val = (ri->state_reg_cache & ~STATE_MASK) |
935                                 (STATE_OFF & STATE_MASK);
936
937         ret = tps80031_write(parent, SLAVE_ID1, ri->state_reg, reg_val);
938         if (ret < 0)
939                 dev_err(ri->dev, "Not able to %s rail %d err %d\n",
940                         (tps80031_pdata->init_enable) ? "enable" : "disable",
941                         ri->desc.id, ret);
942         else
943                 ri->state_reg_cache = reg_val;
944         return ret;
945 }
946
947 static inline struct tps80031_regulator *find_regulator_info(int id)
948 {
949         struct tps80031_regulator *ri;
950         int i;
951
952         for (i = 0; i < ARRAY_SIZE(tps80031_regulator); i++) {
953                 ri = &tps80031_regulator[i];
954                 if (ri->desc.id == id)
955                         return ri;
956         }
957         return NULL;
958 }
959 static void check_smps_mode_mult(struct device *parent,
960         struct tps80031_regulator *ri)
961 {
962         int mult_offset;
963         switch (ri->desc.id) {
964         case TPS80031_REGULATOR_VIO:
965                 mult_offset = SMPS_MULTOFFSET_VIO;
966                 break;
967         case TPS80031_REGULATOR_SMPS1:
968                 mult_offset = SMPS_MULTOFFSET_SMPS1;
969                 break;
970         case TPS80031_REGULATOR_SMPS2:
971                 mult_offset = SMPS_MULTOFFSET_SMPS2;
972                 break;
973         case TPS80031_REGULATOR_SMPS3:
974                 mult_offset = SMPS_MULTOFFSET_SMPS3;
975                 break;
976         case TPS80031_REGULATOR_SMPS4:
977                 mult_offset = SMPS_MULTOFFSET_SMPS4;
978                 break;
979         case TPS80031_REGULATOR_LDO2:
980                 ri->flags = (tps80031_get_smps_mult(parent) & (1 << 5)) ?
981                                                 TRACK_MODE_ENABLE : 0;
982                 /* TRACK mode the ldo2 varies from 600mV to 1300mV */
983                 if (ri->flags & TRACK_MODE_ENABLE) {
984                         ri->min_mV = 600;
985                         ri->max_mV = 1300;
986                         ri->desc.n_voltages = 57;
987                 }
988                 return;
989         default:
990                 return;
991         }
992
993         ri->flags = (tps80031_get_smps_offset(parent) & mult_offset) ?
994                                                 DCDC_OFFSET_EN : 0;
995         ri->flags |= (tps80031_get_smps_mult(parent) & mult_offset) ?
996                                                 DCDC_EXTENDED_EN : 0;
997         return;
998 }
999
1000 static inline int tps80031_cache_regulator_register(struct device *parent,
1001         struct tps80031_regulator *ri)
1002 {
1003         int ret;
1004
1005         ret = tps80031_read(parent, SLAVE_ID1, ri->trans_reg,
1006                         &ri->trans_reg_cache);
1007         if (!ret && ri->state_reg)
1008                 ret = tps80031_read(parent, SLAVE_ID1, ri->state_reg,
1009                         &ri->state_reg_cache);
1010         if (!ret && ri->force_reg)
1011                 ret = tps80031_read(parent, ri->volt_id, ri->force_reg,
1012                         &ri->force_reg_cache);
1013         if (!ret && ri->volt_reg)
1014                 ret = tps80031_read(parent, ri->volt_id, ri->volt_reg,
1015                         &ri->volt_reg_cache);
1016         return ret;
1017 }
1018
1019 static int __devinit tps80031_regulator_probe(struct platform_device *pdev)
1020 {
1021         struct tps80031_regulator *ri = NULL;
1022         struct regulator_dev *rdev;
1023         struct tps80031_regulator_platform_data *tps_pdata;
1024         int id = pdev->id;
1025         int err;
1026
1027         dev_dbg(&pdev->dev, "Probing reulator %d\n", id);
1028
1029         ri = find_regulator_info(id);
1030         if (ri == NULL) {
1031                 dev_err(&pdev->dev, "invalid regulator ID specified\n");
1032                 return -EINVAL;
1033         }
1034         tps_pdata = pdev->dev.platform_data;
1035         ri->dev = &pdev->dev;
1036         if (tps_pdata->delay_us > 0)
1037                 ri->delay = tps_pdata->delay_us;
1038         ri->tolerance_uv = tps_pdata->tolerance_uv;
1039
1040         check_smps_mode_mult(pdev->dev.parent, ri);
1041         ri->platform_flags = tps_pdata->flags;
1042         ri->ext_ctrl_flag = tps_pdata->ext_ctrl_flag;
1043
1044         err = tps80031_cache_regulator_register(pdev->dev.parent, ri);
1045         if (err) {
1046                 dev_err(&pdev->dev, "Register access for caching is failed\n");
1047                 return err;
1048         }
1049         err = tps80031_regulator_preinit(pdev->dev.parent, ri, tps_pdata);
1050         if (err)
1051                 return err;
1052
1053         err = tps80031_power_req_config(pdev->dev.parent, ri, tps_pdata);
1054         if (err)
1055                 return err;
1056
1057         rdev = regulator_register(&ri->desc, &pdev->dev,
1058                                 &tps_pdata->regulator, ri);
1059         if (IS_ERR_OR_NULL(rdev)) {
1060                 dev_err(&pdev->dev, "failed to register regulator %s\n",
1061                                 ri->desc.name);
1062                 return PTR_ERR(rdev);
1063         }
1064
1065         platform_set_drvdata(pdev, rdev);
1066
1067         return 0;
1068 }
1069
1070 static int __devexit tps80031_regulator_remove(struct platform_device *pdev)
1071 {
1072         struct regulator_dev *rdev = platform_get_drvdata(pdev);
1073
1074         regulator_unregister(rdev);
1075         return 0;
1076 }
1077
1078 static struct platform_driver tps80031_regulator_driver = {
1079         .driver = {
1080                 .name   = "tps80031-regulator",
1081                 .owner  = THIS_MODULE,
1082         },
1083         .probe          = tps80031_regulator_probe,
1084         .remove         = __devexit_p(tps80031_regulator_remove),
1085 };
1086
1087 static int __init tps80031_regulator_init(void)
1088 {
1089         return platform_driver_register(&tps80031_regulator_driver);
1090 }
1091 subsys_initcall(tps80031_regulator_init);
1092
1093 static void __exit tps80031_regulator_exit(void)
1094 {
1095         platform_driver_unregister(&tps80031_regulator_driver);
1096 }
1097 module_exit(tps80031_regulator_exit);
1098
1099 MODULE_LICENSE("GPL");
1100 MODULE_DESCRIPTION("Regulator Driver for TI TPS80031 PMIC");
1101 MODULE_ALIAS("platform:tps80031-regulator");