regulator: max77663: Add MAX77663 regulator driver
[linux-2.6.git] / drivers / regulator / max77663-regulator.c
1 /*
2  * drivers/regulator/max77663-regulator.c
3  * Maxim LDO and Buck regulators driver
4  *
5  * Copyright 2011 Maxim Integrated Products, Inc.
6  * Copyright (C) 2011 NVIDIA Corporation
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of the
11  * License, or (at your option) any later version.
12  *
13  */
14
15 #include <linux/err.h>
16 #include <linux/string.h>
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/slab.h>
21 #include <linux/debugfs.h>
22 #include <linux/uaccess.h>
23 #include <linux/i2c.h>
24 #include <linux/mfd/max77663-core.h>
25 #include <linux/regulator/driver.h>
26 #include <linux/regulator/machine.h>
27 #include <linux/regulator/max77663-regulator.h>
28
29 /* Regulator types */
30 #define REGULATOR_TYPE_SD               0
31 #define REGULATOR_TYPE_LDO              1
32
33 /* SD and LDO Registers */
34 #define MAX77663_REG_SD0                0x16
35 #define MAX77663_REG_SD1                0x17
36 #define MAX77663_REG_SD2                0x18
37 #define MAX77663_REG_SD3                0x19
38 #define MAX77663_REG_SD4                0x1A
39 #define MAX77663_REG_DVSSD0             0x1B
40 #define MAX77663_REG_DVSSD1             0x1C
41 #define MAX77663_REG_SD0_CFG            0x1D
42 #define MAX77663_REG_DVSSD0_CFG         MAX77663_REG_SD0_CFG
43 #define MAX77663_REG_SD1_CFG            0x1E
44 #define MAX77663_REG_DVSSD1_CFG         MAX77663_REG_SD1_CFG
45 #define MAX77663_REG_SD2_CFG            0x1F
46 #define MAX77663_REG_SD3_CFG            0x20
47 #define MAX77663_REG_SD4_CFG            0x21
48 #define MAX77663_REG_LDO0_CFG           0x23
49 #define MAX77663_REG_LDO0_CFG2          0x24
50 #define MAX77663_REG_LDO1_CFG           0x25
51 #define MAX77663_REG_LDO1_CFG2          0x26
52 #define MAX77663_REG_LDO2_CFG           0x27
53 #define MAX77663_REG_LDO2_CFG2          0x28
54 #define MAX77663_REG_LDO3_CFG           0x29
55 #define MAX77663_REG_LDO3_CFG2          0x2A
56 #define MAX77663_REG_LDO4_CFG           0x2B
57 #define MAX77663_REG_LDO4_CFG2          0x2C
58 #define MAX77663_REG_LDO5_CFG           0x2D
59 #define MAX77663_REG_LDO5_CFG2          0x2E
60 #define MAX77663_REG_LDO6_CFG           0x2F
61 #define MAX77663_REG_LDO6_CFG2          0x30
62 #define MAX77663_REG_LDO7_CFG           0x31
63 #define MAX77663_REG_LDO7_CFG2          0x32
64 #define MAX77663_REG_LDO8_CFG           0x33
65 #define MAX77663_REG_LDO8_CFG2          0x34
66
67 #define POWER_MODE_NORMAL               3
68 #define POWER_MODE_LPM                  2
69 #define POWER_MODE_GLPM                 1
70 #define POWER_MODE_DISABLE              0
71
72 #define SD_POWER_MODE_MASK              0x30
73 #define SD_POWER_MODE_SHIFT             4
74 #define LDO_POWER_MODE_MASK             0xC0
75 #define LDO_POWER_MODE_SHIFT            6
76
77 #define SDX_VOLT_MASK                   0xFF
78 #define SD1_VOLT_MASK                   0x3F
79 #define LDO_VOLT_MASK                   0x3F
80
81 /* FPS Registers */
82 #define MAX77663_REG_FPS_CFG0           0x43
83 #define MAX77663_REG_FPS_CFG1           0x44
84 #define MAX77663_REG_FPS_CFG2           0x45
85 #define MAX77663_REG_FPS_LDO0           0x46
86 #define MAX77663_REG_FPS_LDO1           0x47
87 #define MAX77663_REG_FPS_LDO2           0x48
88 #define MAX77663_REG_FPS_LDO3           0x49
89 #define MAX77663_REG_FPS_LDO4           0x4A
90 #define MAX77663_REG_FPS_LDO5           0x4B
91 #define MAX77663_REG_FPS_LDO6           0x4C
92 #define MAX77663_REG_FPS_LDO7           0x4D
93 #define MAX77663_REG_FPS_LDO8           0x4E
94 #define MAX77663_REG_FPS_SD0            0x4F
95 #define MAX77663_REG_FPS_SD1            0x50
96 #define MAX77663_REG_FPS_SD2            0x51
97 #define MAX77663_REG_FPS_SD3            0x52
98 #define MAX77663_REG_FPS_SD4            0x53
99 #define MAX77663_REG_FPS_NONE           0
100
101 #define FPS_TIME_PERIOD_MASK            0x38
102 #define FPS_TIME_PERIOD_SHIFT           3
103 #define FPS_EN_SRC_MASK                 0x06
104 #define FPS_EN_SRC_SHIFT                1
105 #define FPS_SW_EN_MASK                  0x01
106 #define FPS_SW_EN_SHIFT                 0
107 #define FPS_SRC_MASK                    0xC0
108 #define FPS_SRC_SHIFT                   6
109 #define FPS_PU_PERIOD_MASK              0x38
110 #define FPS_PU_PERIOD_SHIFT             3
111 #define FPS_PD_PERIOD_MASK              0x07
112 #define FPS_PD_PERIOD_SHIFT             0
113
114 struct max77663_regulator {
115         struct regulator_dev *rdev;
116         struct device *dev;
117
118         u8 id;
119         u8 type;
120         u32 min_uV;
121         u32 max_uV;
122         u32 step_uV;
123         u32 regulator_mode;
124
125         u8 volt_reg;
126         u8 cfg_reg;
127         u8 fps_reg;
128
129         int fps_src;
130
131         u8 volt_mask;
132
133         u8 power_mode;
134         u8 power_mode_mask;
135         u8 power_mode_shift;
136 };
137
138 #define fps_src_name(fps_src)   \
139         (fps_src == FPS_SRC_0 ? "FPS_SRC_0" :   \
140         fps_src == FPS_SRC_1 ? "FPS_SRC_1" :    \
141         fps_src == FPS_SRC_2 ? "FPS_SRC_2" : "FPS_SRC_NONE")
142
143 static int fps_cfg_init;
144 static u8 fps_cfg_reg[] = {
145         MAX77663_REG_FPS_CFG0,
146         MAX77663_REG_FPS_CFG1,
147         MAX77663_REG_FPS_CFG2
148 };
149
150 static inline struct max77663_regulator_platform_data
151 *_to_pdata(struct max77663_regulator *reg)
152 {
153         return reg->dev->platform_data;
154 }
155
156 static inline struct device *_to_parent(struct max77663_regulator *reg)
157 {
158         return reg->dev->parent;
159 }
160
161 static int max77663_regulator_set_fps_src(struct max77663_regulator *reg,
162                                           int fps_src)
163 {
164         struct device *parent = _to_parent(reg);
165         int ret;
166
167         if (reg->fps_reg == MAX77663_REG_FPS_NONE)
168                 return 0;
169
170         switch (fps_src) {
171         case FPS_SRC_0:
172         case FPS_SRC_1:
173         case FPS_SRC_2:
174         case FPS_SRC_NONE:
175                 break;
176         case FPS_SRC_DEF:
177                 return 0;
178         default:
179                 return -EINVAL;
180         }
181
182         ret = max77663_set_bits(parent, reg->fps_reg, FPS_SRC_MASK,
183                                 fps_src << FPS_SRC_SHIFT, 0);
184         if (ret < 0)
185                 return ret;
186
187         reg->fps_src = fps_src;
188         return 0;
189 }
190
191 static int max77663_regulator_set_fps(struct max77663_regulator *reg)
192 {
193         struct max77663_regulator_platform_data *pdata = _to_pdata(reg);
194         struct device *parent = _to_parent(reg);
195         u8 fps_val = 0, fps_mask = 0;
196         int ret = 0;
197
198         if (reg->fps_reg == MAX77663_REG_FPS_NONE)
199                 return 0;
200
201         if (reg->fps_src == FPS_SRC_NONE)
202                 return 0;
203
204         /* FPS power up period setting */
205         if (pdata->fps_pu_period != FPS_POWER_PERIOD_DEF) {
206                 fps_val |= (pdata->fps_pu_period << FPS_PU_PERIOD_SHIFT);
207                 fps_mask |= FPS_PU_PERIOD_MASK;
208         }
209
210         /* FPS power down period setting */
211         if (pdata->fps_pd_period != FPS_POWER_PERIOD_DEF) {
212                 fps_val |= (pdata->fps_pd_period << FPS_PD_PERIOD_SHIFT);
213                 fps_mask |= FPS_PD_PERIOD_MASK;
214         }
215
216         if (fps_val)
217                 ret = max77663_set_bits(parent, reg->fps_reg, fps_mask,
218                                         fps_val, 0);
219
220         return ret;
221 }
222
223 static int max77663_regulator_set_fps_cfg(struct max77663_regulator *reg)
224 {
225         struct max77663_regulator_platform_data *pdata = _to_pdata(reg);
226         struct device *parent = _to_parent(reg);
227         int i;
228         int ret = 0;
229
230         if (fps_cfg_init)
231                 return 0;
232
233         for (i = FPS_SRC_0; i <= FPS_SRC_2; i++) {
234                 struct max77663_regulator_fps_cfg *fps_cfg;
235                 u8 fps_cfg_val = 0, fps_cfg_mask = 0;
236
237                 fps_cfg = &pdata->fps_cfg[i];
238
239                 /* FPS enable source setting */
240                 fps_cfg_val = (fps_cfg->en_src << FPS_EN_SRC_SHIFT);
241                 fps_cfg_mask = FPS_EN_SRC_MASK;
242
243                 /* FPS time period setting */
244                 if (fps_cfg->time_period != FPS_TIME_PERIOD_DEF) {
245                         fps_cfg_val |= (fps_cfg->time_period
246                                         << FPS_TIME_PERIOD_SHIFT);
247                         fps_cfg_mask |= FPS_TIME_PERIOD_MASK;
248                 }
249
250                 ret = max77663_set_bits(parent, fps_cfg_reg[i], fps_cfg_mask,
251                                         fps_cfg_val, 0);
252                 if (ret < 0)
253                         goto out;
254         }
255
256         fps_cfg_init = 1;
257 out:
258         return ret;
259 }
260
261 static int
262 max77663_regulator_set_power_mode(struct max77663_regulator *reg, u8 power_mode)
263 {
264         struct device *parent = _to_parent(reg);
265         u8 addr;
266         u8 mask = reg->power_mode_mask;
267         u8 shift = reg->power_mode_shift;
268         int ret;
269
270         if (reg->type == REGULATOR_TYPE_SD)
271                 addr = reg->cfg_reg;
272         else
273                 addr = reg->volt_reg;
274
275         ret = max77663_set_bits(parent, addr, mask, power_mode << shift, 0);
276         if (ret < 0)
277                 return ret;
278
279         reg->power_mode = power_mode;
280         return ret;
281 }
282
283 static u8 max77663_regulator_get_power_mode(struct max77663_regulator *reg)
284 {
285         struct device *parent = _to_parent(reg);
286         u8 addr, val;
287         u8 mask = reg->power_mode_mask;
288         u8 shift = reg->power_mode_shift;
289         int ret;
290
291         if (reg->type == REGULATOR_TYPE_SD)
292                 addr = reg->cfg_reg;
293         else
294                 addr = reg->volt_reg;
295
296         ret = max77663_read(parent, addr, &val, 1, 0);
297         if (ret < 0)
298                 return ret;
299
300         reg->power_mode = (val & mask) >> shift;
301         return reg->power_mode;
302 }
303
304 static int max77663_regulator_do_set_voltage(struct max77663_regulator *reg,
305                                              int min_uV, int max_uV)
306 {
307         struct device *parent = _to_parent(reg);
308         u8 val;
309
310         if (min_uV < reg->min_uV || max_uV > reg->max_uV)
311                 return -EDOM;
312
313         val = (min_uV - reg->min_uV) / reg->step_uV;
314         return max77663_set_bits(parent, reg->volt_reg, reg->volt_mask, val, 0);
315 }
316
317 static int max77663_regulator_set_voltage(struct regulator_dev *rdev,
318                                           int min_uV, int max_uV)
319 {
320         struct max77663_regulator *reg = rdev_get_drvdata(rdev);
321
322         dev_dbg(&rdev->dev, "set_voltage: name=%s, min_uV=%d, max_uV=%d\n",
323                 rdev->desc->name, min_uV, max_uV);
324         return max77663_regulator_do_set_voltage(reg, min_uV, max_uV);
325 }
326
327 static int max77663_regulator_get_voltage(struct regulator_dev *rdev)
328 {
329         struct max77663_regulator *reg = rdev_get_drvdata(rdev);
330         struct device *parent = _to_parent(reg);
331         u8 val;
332         int volt;
333         int ret;
334
335         ret = max77663_read(parent, reg->volt_reg, &val, 1, 0);
336         if (ret < 0)
337                 return ret;
338
339         volt = (val & reg->volt_mask) * reg->step_uV + reg->min_uV;
340
341         dev_dbg(&rdev->dev, "get_voltage: name=%s, volt=%d, val=0x%02x\n",
342                 rdev->desc->name, volt, val);
343         return volt;
344 }
345
346 static int max77663_regulator_enable(struct regulator_dev *rdev)
347 {
348         struct max77663_regulator *reg = rdev_get_drvdata(rdev);
349         int power_mode = POWER_MODE_NORMAL;
350
351         if (reg->fps_src != FPS_SRC_NONE) {
352                 dev_warn(&rdev->dev, "enable: Regulator %s using %s\n",
353                          rdev->desc->name, fps_src_name(reg->fps_src));
354                 return 0;
355         }
356
357         if (reg->regulator_mode == REGULATOR_MODE_STANDBY)
358                 power_mode = POWER_MODE_LPM;
359
360         return max77663_regulator_set_power_mode(reg, power_mode);
361 }
362
363 static int max77663_regulator_disable(struct regulator_dev *rdev)
364 {
365         struct max77663_regulator *reg = rdev_get_drvdata(rdev);
366         int power_mode = POWER_MODE_DISABLE;
367
368         if (reg->fps_src != FPS_SRC_NONE) {
369                 dev_warn(&rdev->dev, "disable: Regulator %s using %s\n",
370                          rdev->desc->name, fps_src_name(reg->fps_src));
371                 return 0;
372         }
373
374         return max77663_regulator_set_power_mode(reg, power_mode);;
375 }
376
377 static int max77663_regulator_is_enabled(struct regulator_dev *rdev)
378 {
379         struct max77663_regulator *reg = rdev_get_drvdata(rdev);
380         int power_mode = max77663_regulator_get_power_mode(reg);
381         int ret = 1;
382
383         if (reg->fps_src != FPS_SRC_NONE) {
384                 dev_warn(&rdev->dev, "is_enable: Regulator %s using %s\n",
385                          rdev->desc->name, fps_src_name(reg->fps_src));
386                 return 1;
387         }
388
389         if (power_mode == POWER_MODE_DISABLE)
390                 ret = 0;
391
392         return ret;
393 }
394
395 static int max77663_regulator_set_mode(struct regulator_dev *rdev,
396                                        unsigned int mode)
397 {
398         struct max77663_regulator *reg = rdev_get_drvdata(rdev);
399         u8 power_mode;
400         int ret;
401
402         if (mode == REGULATOR_MODE_NORMAL)
403                 power_mode = POWER_MODE_NORMAL;
404         else if (mode == REGULATOR_MODE_STANDBY)
405                 power_mode = POWER_MODE_LPM;
406         else
407                 return -EINVAL;
408
409         ret = max77663_regulator_set_power_mode(reg, power_mode);
410         if (!ret)
411                 reg->regulator_mode = mode;
412
413         return ret;
414 }
415
416 static unsigned int max77663_regulator_get_mode(struct regulator_dev *rdev)
417 {
418         struct max77663_regulator *reg = rdev_get_drvdata(rdev);
419
420         return reg->regulator_mode;
421 }
422
423 static struct regulator_ops max77663_ldo_ops = {
424         .set_voltage = max77663_regulator_set_voltage,
425         .get_voltage = max77663_regulator_get_voltage,
426         .enable = max77663_regulator_enable,
427         .disable = max77663_regulator_disable,
428         .is_enabled = max77663_regulator_is_enabled,
429         .set_mode = max77663_regulator_set_mode,
430         .get_mode = max77663_regulator_get_mode,
431 };
432
433 static int max77663_regulator_preinit(struct max77663_regulator *reg)
434 {
435         struct max77663_regulator_platform_data *pdata = _to_pdata(reg);
436         struct device *parent = _to_parent(reg);
437         u8 val;
438         int ret;
439
440         /* Update FPS source */
441         if (reg->fps_reg == MAX77663_REG_FPS_NONE)
442                 reg->fps_src = FPS_SRC_NONE;
443         else {
444                 ret = max77663_read(parent, reg->fps_reg, &val, 1, 0);
445                 if (ret < 0) {
446                         dev_err(reg->dev,
447                                 "preinit: Failed to get FPS source\n");
448                         return ret;
449                 }
450                 reg->fps_src = (val & FPS_SRC_MASK) >> FPS_SRC_SHIFT;
451         }
452
453         /* Set initial state */
454         if (!pdata->init_apply)
455                 goto set_fps_cfg;
456
457         if (pdata->init_uV >= 0) {
458                 ret = max77663_regulator_do_set_voltage(reg, pdata->init_uV,
459                                                         pdata->init_uV);
460                 if (ret < 0) {
461                         dev_err(reg->dev, "preinit: Failed to set voltage to "
462                                 "%d\n", pdata->init_uV);
463                         return ret;
464                 }
465         }
466
467         if (pdata->init_enable)
468                 val = POWER_MODE_NORMAL;
469         else
470                 val = POWER_MODE_DISABLE;
471
472         ret = max77663_regulator_set_power_mode(reg, val);
473         if (ret < 0) {
474                 dev_err(reg->dev,
475                         "preinit: Failed to set power mode to %d\n", val);
476                 return ret;
477         }
478
479         if ((reg->id == MAX77663_REGULATOR_ID_SD0)
480                         && (pdata->flags & EN2_CTRL_SD0)) {
481                 val = POWER_MODE_DISABLE;
482                 ret = max77663_regulator_set_power_mode(reg, val);
483                 if (ret < 0) {
484                         dev_err(reg->dev, "preinit: Failed to set power mode to"
485                                 "%d for EN2_CTRL_SD0\n", val);
486                         return ret;
487                 }
488
489                 if (reg->fps_src == FPS_SRC_NONE)
490                         return 0;
491
492                 ret = max77663_regulator_set_fps_src(reg, FPS_SRC_NONE);
493                 if (ret < 0) {
494                         dev_err(reg->dev, "preinit: Failed to set FPSSRC to "
495                                 "FPS_SRC_NONE for EN2_CTRL_SD0\n");
496                         return ret;
497                 }
498         }
499
500 set_fps_cfg:
501         ret = max77663_regulator_set_fps_cfg(reg);
502         if (ret < 0) {
503                 dev_err(reg->dev, "preinit: Failed to set FPSCFG\n");
504                 return ret;
505         }
506
507         ret = max77663_regulator_set_fps_src(reg, pdata->fps_src);
508         if (ret < 0) {
509                 dev_err(reg->dev, "preinit: Failed to set FPSSRC to %d\n",
510                         pdata->fps_src);
511                 return ret;
512         }
513
514         ret = max77663_regulator_set_fps(reg);
515         if (ret < 0) {
516                 dev_err(reg->dev, "preinit: Failed to set FPS\n");
517                 return ret;
518         }
519
520         return 0;
521 }
522
523 #define REGULATOR_SD(_id, _volt_mask, _fps_reg, _min_uV, _max_uV, _step_uV) \
524         [MAX77663_REGULATOR_ID_##_id] = {                       \
525                 .id = MAX77663_REGULATOR_ID_##_id,              \
526                 .type = REGULATOR_TYPE_SD,                      \
527                 .volt_reg = MAX77663_REG_##_id,                 \
528                 .volt_mask = _volt_mask##_VOLT_MASK,            \
529                 .cfg_reg = MAX77663_REG_##_id##_CFG,            \
530                 .fps_reg = MAX77663_REG_FPS_##_fps_reg,         \
531                 .min_uV = _min_uV,                              \
532                 .max_uV = _max_uV,                              \
533                 .step_uV = _step_uV,                            \
534                 .regulator_mode = REGULATOR_MODE_NORMAL,        \
535                 .power_mode = POWER_MODE_NORMAL,                \
536                 .power_mode_mask = SD_POWER_MODE_MASK,          \
537                 .power_mode_shift = SD_POWER_MODE_SHIFT,        \
538         }
539
540 #define REGULATOR_LDO(_id, _min_uV, _max_uV, _step_uV)          \
541         [MAX77663_REGULATOR_ID_##_id] = {                       \
542                 .id = MAX77663_REGULATOR_ID_##_id,              \
543                 .type = REGULATOR_TYPE_LDO,                     \
544                 .volt_reg = MAX77663_REG_##_id##_CFG,           \
545                 .volt_mask = LDO_VOLT_MASK,                     \
546                 .cfg_reg = MAX77663_REG_##_id##_CFG2,           \
547                 .fps_reg = MAX77663_REG_FPS_##_id,              \
548                 .min_uV = _min_uV,                              \
549                 .max_uV = _max_uV,                              \
550                 .step_uV = _step_uV,                            \
551                 .regulator_mode = REGULATOR_MODE_NORMAL,        \
552                 .power_mode = POWER_MODE_NORMAL,                \
553                 .power_mode_mask = LDO_POWER_MODE_MASK,         \
554                 .power_mode_shift = LDO_POWER_MODE_SHIFT,       \
555         }
556
557 static struct max77663_regulator max77663_regs[MAX77663_REGULATOR_ID_NR] = {
558         REGULATOR_SD(SD0,    SDX, SD0,  600000, 3387500, 12500),
559         REGULATOR_SD(DVSSD0, SDX, NONE, 600000, 3387500, 12500),
560         REGULATOR_SD(SD1,    SD1, SD1,  800000, 1587500, 12500),
561         REGULATOR_SD(DVSSD1, SD1, NONE, 800000, 1587500, 12500),
562         REGULATOR_SD(SD2,    SDX, SD2,  600000, 3387500, 12500),
563         REGULATOR_SD(SD3,    SDX, SD3,  600000, 3387500, 12500),
564         REGULATOR_SD(SD4,    SDX, SD4,  600000, 3387500, 12500),
565
566         REGULATOR_LDO(LDO0, 800000, 2350000, 25000),
567         REGULATOR_LDO(LDO1, 800000, 2350000, 25000),
568         REGULATOR_LDO(LDO2, 800000, 3950000, 50000),
569         REGULATOR_LDO(LDO3, 800000, 3950000, 50000),
570         REGULATOR_LDO(LDO4, 800000, 1587500, 12500),
571         REGULATOR_LDO(LDO5, 800000, 3950000, 50000),
572         REGULATOR_LDO(LDO6, 800000, 3950000, 50000),
573         REGULATOR_LDO(LDO7, 800000, 3950000, 50000),
574         REGULATOR_LDO(LDO8, 800000, 3950000, 50000),
575 };
576
577 #define REGULATOR_DESC(_id, _name)                      \
578         [MAX77663_REGULATOR_ID_##_id] = {               \
579                 .name = max77663_rails(_name),          \
580                 .id = MAX77663_REGULATOR_ID_##_id,      \
581                 .ops = &max77663_ldo_ops,               \
582                 .type = REGULATOR_VOLTAGE,              \
583                 .owner = THIS_MODULE,                   \
584         }
585
586 static struct regulator_desc max77663_rdesc[MAX77663_REGULATOR_ID_NR] = {
587         REGULATOR_DESC(SD0, sd0),
588         REGULATOR_DESC(DVSSD0, dvssd0),
589         REGULATOR_DESC(SD1, sd1),
590         REGULATOR_DESC(DVSSD1, dvssd1),
591         REGULATOR_DESC(SD2, sd2),
592         REGULATOR_DESC(SD3, sd3),
593         REGULATOR_DESC(SD4, sd4),
594         REGULATOR_DESC(LDO0, ldo0),
595         REGULATOR_DESC(LDO1, ldo1),
596         REGULATOR_DESC(LDO2, ldo2),
597         REGULATOR_DESC(LDO3, ldo3),
598         REGULATOR_DESC(LDO4, ldo4),
599         REGULATOR_DESC(LDO5, ldo5),
600         REGULATOR_DESC(LDO6, ldo6),
601         REGULATOR_DESC(LDO7, ldo7),
602         REGULATOR_DESC(LDO8, ldo8),
603 };
604
605 static int max77663_regulator_probe(struct platform_device *pdev)
606 {
607         struct regulator_desc *rdesc;
608         struct max77663_regulator *reg;
609         struct max77663_regulator_platform_data *pdata;
610         int ret = 0;
611
612         if ((pdev->id < 0) || (pdev->id >= MAX77663_REGULATOR_ID_NR)) {
613                 dev_err(&pdev->dev, "Invalid device id %d\n", pdev->id);
614                 return -ENODEV;
615         }
616
617         rdesc = &max77663_rdesc[pdev->id];
618         reg = &max77663_regs[pdev->id];
619         reg->dev = &pdev->dev;
620         pdata = reg->dev->platform_data;
621
622         dev_dbg(&pdev->dev, "probe: name=%s\n", rdesc->name);
623
624         ret = max77663_regulator_preinit(reg);
625         if (ret) {
626                 dev_err(&pdev->dev, "probe: Failed to preinit regulator %s\n",
627                         rdesc->name);
628                 return ret;
629         }
630
631         reg->rdev = regulator_register(rdesc, &pdev->dev, &pdata->init_data,
632                                        reg);
633         if (IS_ERR(reg->rdev)) {
634                 dev_err(&pdev->dev, "probe: Failed to register regulator %s\n",
635                         rdesc->name);
636                 return PTR_ERR(reg->rdev);
637         }
638
639         return 0;
640 }
641
642 static int max77663_regulator_remove(struct platform_device *pdev)
643 {
644         struct regulator_dev *rdev = platform_get_drvdata(pdev);
645
646         regulator_unregister(rdev);
647         return 0;
648 }
649
650 static struct platform_driver max77663_regulator_driver = {
651         .probe = max77663_regulator_probe,
652         .remove = __devexit_p(max77663_regulator_remove),
653         .driver = {
654                 .name = "max77663-regulator",
655                 .owner = THIS_MODULE,
656         },
657 };
658
659 static int __init max77663_regulator_init(void)
660 {
661         return platform_driver_register(&max77663_regulator_driver);
662 }
663 subsys_initcall(max77663_regulator_init);
664
665 static void __exit max77663_reg_exit(void)
666 {
667         platform_driver_unregister(&max77663_regulator_driver);
668 }
669 module_exit(max77663_reg_exit);
670
671 MODULE_LICENSE("GPL v2");
672 MODULE_DESCRIPTION("max77663 regulator driver");
673 MODULE_VERSION("1.0");