regulator: max77663: Slew rate and forced PWM mode for SDx
[linux-2.6.git] / drivers / regulator / max77663-regulator.c
1 /*
2  * drivers/regulator/max77663-regulator.c
3  * Maxim LDO and Buck regulators driver
4  *
5  * Copyright 2011 Maxim Integrated Products, Inc.
6  * Copyright (C) 2011 NVIDIA Corporation
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of the
11  * License, or (at your option) any later version.
12  *
13  */
14
15 #include <linux/err.h>
16 #include <linux/string.h>
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/slab.h>
21 #include <linux/debugfs.h>
22 #include <linux/uaccess.h>
23 #include <linux/i2c.h>
24 #include <linux/mfd/max77663-core.h>
25 #include <linux/regulator/driver.h>
26 #include <linux/regulator/machine.h>
27 #include <linux/regulator/max77663-regulator.h>
28
29 /* Regulator types */
30 #define REGULATOR_TYPE_SD               0
31 #define REGULATOR_TYPE_LDO              1
32
33 /* SD and LDO Registers */
34 #define MAX77663_REG_SD0                0x16
35 #define MAX77663_REG_SD1                0x17
36 #define MAX77663_REG_SD2                0x18
37 #define MAX77663_REG_SD3                0x19
38 #define MAX77663_REG_SD4                0x1A
39 #define MAX77663_REG_DVSSD0             0x1B
40 #define MAX77663_REG_DVSSD1             0x1C
41 #define MAX77663_REG_SD0_CFG            0x1D
42 #define MAX77663_REG_DVSSD0_CFG         MAX77663_REG_SD0_CFG
43 #define MAX77663_REG_SD1_CFG            0x1E
44 #define MAX77663_REG_DVSSD1_CFG         MAX77663_REG_SD1_CFG
45 #define MAX77663_REG_SD2_CFG            0x1F
46 #define MAX77663_REG_SD3_CFG            0x20
47 #define MAX77663_REG_SD4_CFG            0x21
48 #define MAX77663_REG_LDO0_CFG           0x23
49 #define MAX77663_REG_LDO0_CFG2          0x24
50 #define MAX77663_REG_LDO1_CFG           0x25
51 #define MAX77663_REG_LDO1_CFG2          0x26
52 #define MAX77663_REG_LDO2_CFG           0x27
53 #define MAX77663_REG_LDO2_CFG2          0x28
54 #define MAX77663_REG_LDO3_CFG           0x29
55 #define MAX77663_REG_LDO3_CFG2          0x2A
56 #define MAX77663_REG_LDO4_CFG           0x2B
57 #define MAX77663_REG_LDO4_CFG2          0x2C
58 #define MAX77663_REG_LDO5_CFG           0x2D
59 #define MAX77663_REG_LDO5_CFG2          0x2E
60 #define MAX77663_REG_LDO6_CFG           0x2F
61 #define MAX77663_REG_LDO6_CFG2          0x30
62 #define MAX77663_REG_LDO7_CFG           0x31
63 #define MAX77663_REG_LDO7_CFG2          0x32
64 #define MAX77663_REG_LDO8_CFG           0x33
65 #define MAX77663_REG_LDO8_CFG2          0x34
66
67 /* Power Mode */
68 #define POWER_MODE_NORMAL               3
69 #define POWER_MODE_LPM                  2
70 #define POWER_MODE_GLPM                 1
71 #define POWER_MODE_DISABLE              0
72 #define SD_POWER_MODE_MASK              0x30
73 #define SD_POWER_MODE_SHIFT             4
74 #define LDO_POWER_MODE_MASK             0xC0
75 #define LDO_POWER_MODE_SHIFT            6
76
77 /* SD Slew Rate */
78 #define SD_SR_13_75                     0
79 #define SD_SR_27_5                      1
80 #define SD_SR_55                        2
81 #define SD_SR_100                       3
82 #define SD_SR_MASK                      0xC0
83 #define SD_SR_SHIFT                     6
84
85 /* SD Forced PWM Mode */
86 #define SD_FPWM_MASK                    0x04
87 #define SD_FPWM_SHIFT                   2
88
89 /* Voltage */
90 #define SDX_VOLT_MASK                   0xFF
91 #define SD1_VOLT_MASK                   0x3F
92 #define LDO_VOLT_MASK                   0x3F
93
94 /* FPS Registers */
95 #define MAX77663_REG_FPS_CFG0           0x43
96 #define MAX77663_REG_FPS_CFG1           0x44
97 #define MAX77663_REG_FPS_CFG2           0x45
98 #define MAX77663_REG_FPS_LDO0           0x46
99 #define MAX77663_REG_FPS_LDO1           0x47
100 #define MAX77663_REG_FPS_LDO2           0x48
101 #define MAX77663_REG_FPS_LDO3           0x49
102 #define MAX77663_REG_FPS_LDO4           0x4A
103 #define MAX77663_REG_FPS_LDO5           0x4B
104 #define MAX77663_REG_FPS_LDO6           0x4C
105 #define MAX77663_REG_FPS_LDO7           0x4D
106 #define MAX77663_REG_FPS_LDO8           0x4E
107 #define MAX77663_REG_FPS_SD0            0x4F
108 #define MAX77663_REG_FPS_SD1            0x50
109 #define MAX77663_REG_FPS_SD2            0x51
110 #define MAX77663_REG_FPS_SD3            0x52
111 #define MAX77663_REG_FPS_SD4            0x53
112 #define MAX77663_REG_FPS_NONE           0
113
114 #define FPS_TIME_PERIOD_MASK            0x38
115 #define FPS_TIME_PERIOD_SHIFT           3
116 #define FPS_EN_SRC_MASK                 0x06
117 #define FPS_EN_SRC_SHIFT                1
118 #define FPS_SW_EN_MASK                  0x01
119 #define FPS_SW_EN_SHIFT                 0
120 #define FPS_SRC_MASK                    0xC0
121 #define FPS_SRC_SHIFT                   6
122 #define FPS_PU_PERIOD_MASK              0x38
123 #define FPS_PU_PERIOD_SHIFT             3
124 #define FPS_PD_PERIOD_MASK              0x07
125 #define FPS_PD_PERIOD_SHIFT             0
126
127 struct max77663_regulator {
128         struct regulator_dev *rdev;
129         struct device *dev;
130
131         u8 id;
132         u8 type;
133         u32 min_uV;
134         u32 max_uV;
135         u32 step_uV;
136         u32 regulator_mode;
137
138         u8 volt_reg;
139         u8 cfg_reg;
140         u8 fps_reg;
141
142         enum max77663_regulator_fps_src fps_src;
143
144         u8 volt_mask;
145
146         u8 power_mode;
147         u8 power_mode_mask;
148         u8 power_mode_shift;
149 };
150
151 #define fps_src_name(fps_src)   \
152         (fps_src == FPS_SRC_0 ? "FPS_SRC_0" :   \
153         fps_src == FPS_SRC_1 ? "FPS_SRC_1" :    \
154         fps_src == FPS_SRC_2 ? "FPS_SRC_2" : "FPS_SRC_NONE")
155
156 static int fps_cfg_init;
157 static u8 fps_cfg_reg[] = {
158         MAX77663_REG_FPS_CFG0,
159         MAX77663_REG_FPS_CFG1,
160         MAX77663_REG_FPS_CFG2
161 };
162
163 static inline struct max77663_regulator_platform_data
164 *_to_pdata(struct max77663_regulator *reg)
165 {
166         return reg->dev->platform_data;
167 }
168
169 static inline struct device *_to_parent(struct max77663_regulator *reg)
170 {
171         return reg->dev->parent;
172 }
173
174 static int
175 max77663_regulator_set_fps_src(struct max77663_regulator *reg,
176                                enum max77663_regulator_fps_src fps_src)
177 {
178         struct device *parent = _to_parent(reg);
179         int ret;
180
181         if (reg->fps_reg == MAX77663_REG_FPS_NONE)
182                 return 0;
183
184         switch (fps_src) {
185         case FPS_SRC_0:
186         case FPS_SRC_1:
187         case FPS_SRC_2:
188         case FPS_SRC_NONE:
189                 break;
190         case FPS_SRC_DEF:
191                 return 0;
192         default:
193                 return -EINVAL;
194         }
195
196         ret = max77663_set_bits(parent, reg->fps_reg, FPS_SRC_MASK,
197                                 fps_src << FPS_SRC_SHIFT, 0);
198         if (ret < 0)
199                 return ret;
200
201         reg->fps_src = fps_src;
202         return 0;
203 }
204
205 static int max77663_regulator_set_fps(struct max77663_regulator *reg)
206 {
207         struct max77663_regulator_platform_data *pdata = _to_pdata(reg);
208         struct device *parent = _to_parent(reg);
209         u8 fps_val = 0, fps_mask = 0;
210         int ret = 0;
211
212         if (reg->fps_reg == MAX77663_REG_FPS_NONE)
213                 return 0;
214
215         if (reg->fps_src == FPS_SRC_NONE)
216                 return 0;
217
218         /* FPS power up period setting */
219         if (pdata->fps_pu_period != FPS_POWER_PERIOD_DEF) {
220                 fps_val |= (pdata->fps_pu_period << FPS_PU_PERIOD_SHIFT);
221                 fps_mask |= FPS_PU_PERIOD_MASK;
222         }
223
224         /* FPS power down period setting */
225         if (pdata->fps_pd_period != FPS_POWER_PERIOD_DEF) {
226                 fps_val |= (pdata->fps_pd_period << FPS_PD_PERIOD_SHIFT);
227                 fps_mask |= FPS_PD_PERIOD_MASK;
228         }
229
230         if (fps_val)
231                 ret = max77663_set_bits(parent, reg->fps_reg, fps_mask,
232                                         fps_val, 0);
233
234         return ret;
235 }
236
237 static int
238 max77663_regulator_set_fps_cfg(struct max77663_regulator *reg,
239                                struct max77663_regulator_fps_cfg *fps_cfg)
240 {
241         struct device *parent = _to_parent(reg);
242         u8 addr, val, mask;
243
244         if ((fps_cfg->src < FPS_SRC_0) || (fps_cfg->src > FPS_SRC_2))
245                 return -EINVAL;
246
247         addr = fps_cfg_reg[fps_cfg->src];
248         val = (fps_cfg->en_src << FPS_EN_SRC_SHIFT);
249         mask = FPS_EN_SRC_MASK;
250
251         if (fps_cfg->time_period != FPS_TIME_PERIOD_DEF) {
252                 val |= (fps_cfg->time_period << FPS_TIME_PERIOD_SHIFT);
253                 mask |= FPS_TIME_PERIOD_MASK;
254         }
255
256         return max77663_set_bits(parent, addr, mask, val, 0);
257 }
258
259 static int
260 max77663_regulator_set_fps_cfgs(struct max77663_regulator *reg,
261                                 struct max77663_regulator_fps_cfg *fps_cfgs,
262                                 int num_fps_cfgs)
263 {
264         int i, ret;
265
266         if (fps_cfg_init)
267                 return 0;
268
269         for (i = 0; i < num_fps_cfgs; i++) {
270                 ret = max77663_regulator_set_fps_cfg(reg, &fps_cfgs[i]);
271                 if (ret < 0)
272                         return ret;
273         }
274         fps_cfg_init = 1;
275
276         return 0;
277 }
278
279 static int
280 max77663_regulator_set_power_mode(struct max77663_regulator *reg, u8 power_mode)
281 {
282         struct device *parent = _to_parent(reg);
283         u8 addr;
284         u8 mask = reg->power_mode_mask;
285         u8 shift = reg->power_mode_shift;
286         int ret;
287
288         if (reg->type == REGULATOR_TYPE_SD)
289                 addr = reg->cfg_reg;
290         else
291                 addr = reg->volt_reg;
292
293         ret = max77663_set_bits(parent, addr, mask, power_mode << shift, 0);
294         if (ret < 0)
295                 return ret;
296
297         reg->power_mode = power_mode;
298         return ret;
299 }
300
301 static u8 max77663_regulator_get_power_mode(struct max77663_regulator *reg)
302 {
303         struct device *parent = _to_parent(reg);
304         u8 addr, val;
305         u8 mask = reg->power_mode_mask;
306         u8 shift = reg->power_mode_shift;
307         int ret;
308
309         if (reg->type == REGULATOR_TYPE_SD)
310                 addr = reg->cfg_reg;
311         else
312                 addr = reg->volt_reg;
313
314         ret = max77663_read(parent, addr, &val, 1, 0);
315         if (ret < 0)
316                 return ret;
317
318         reg->power_mode = (val & mask) >> shift;
319         return reg->power_mode;
320 }
321
322 static int max77663_regulator_do_set_voltage(struct max77663_regulator *reg,
323                                              int min_uV, int max_uV)
324 {
325         struct device *parent = _to_parent(reg);
326         u8 val;
327
328         if (min_uV < reg->min_uV || max_uV > reg->max_uV)
329                 return -EDOM;
330
331         val = (min_uV - reg->min_uV) / reg->step_uV;
332         return max77663_set_bits(parent, reg->volt_reg, reg->volt_mask, val, 0);
333 }
334
335 static int max77663_regulator_set_voltage(struct regulator_dev *rdev,
336                                           int min_uV, int max_uV)
337 {
338         struct max77663_regulator *reg = rdev_get_drvdata(rdev);
339
340         dev_dbg(&rdev->dev, "set_voltage: name=%s, min_uV=%d, max_uV=%d\n",
341                 rdev->desc->name, min_uV, max_uV);
342         return max77663_regulator_do_set_voltage(reg, min_uV, max_uV);
343 }
344
345 static int max77663_regulator_get_voltage(struct regulator_dev *rdev)
346 {
347         struct max77663_regulator *reg = rdev_get_drvdata(rdev);
348         struct device *parent = _to_parent(reg);
349         u8 val;
350         int volt;
351         int ret;
352
353         ret = max77663_read(parent, reg->volt_reg, &val, 1, 0);
354         if (ret < 0)
355                 return ret;
356
357         volt = (val & reg->volt_mask) * reg->step_uV + reg->min_uV;
358
359         dev_dbg(&rdev->dev, "get_voltage: name=%s, volt=%d, val=0x%02x\n",
360                 rdev->desc->name, volt, val);
361         return volt;
362 }
363
364 static int max77663_regulator_enable(struct regulator_dev *rdev)
365 {
366         struct max77663_regulator *reg = rdev_get_drvdata(rdev);
367         struct max77663_regulator_platform_data *pdata = _to_pdata(reg);
368         int power_mode = POWER_MODE_NORMAL;
369
370         if (reg->fps_src != FPS_SRC_NONE) {
371                 dev_dbg(&rdev->dev, "enable: Regulator %s using %s\n",
372                         rdev->desc->name, fps_src_name(reg->fps_src));
373                 return 0;
374         }
375
376         if ((reg->id == MAX77663_REGULATOR_ID_SD0)
377                         && (pdata->flags & EN2_CTRL_SD0)) {
378                 dev_dbg(&rdev->dev,
379                         "enable: Regulator %s is controlled by EN2\n",
380                         rdev->desc->name);
381                 return 0;
382         }
383
384         if (reg->regulator_mode == REGULATOR_MODE_STANDBY)
385                 power_mode = POWER_MODE_LPM;
386
387         return max77663_regulator_set_power_mode(reg, power_mode);
388 }
389
390 static int max77663_regulator_disable(struct regulator_dev *rdev)
391 {
392         struct max77663_regulator *reg = rdev_get_drvdata(rdev);
393         struct max77663_regulator_platform_data *pdata = _to_pdata(reg);
394         int power_mode = POWER_MODE_DISABLE;
395
396         if (reg->fps_src != FPS_SRC_NONE) {
397                 dev_dbg(&rdev->dev, "disable: Regulator %s using %s\n",
398                         rdev->desc->name, fps_src_name(reg->fps_src));
399                 return 0;
400         }
401
402         if ((reg->id == MAX77663_REGULATOR_ID_SD0)
403                         && (pdata->flags & EN2_CTRL_SD0)) {
404                 dev_dbg(&rdev->dev,
405                         "disable: Regulator %s is controlled by EN2\n",
406                         rdev->desc->name);
407                 return 0;
408         }
409
410         return max77663_regulator_set_power_mode(reg, power_mode);;
411 }
412
413 static int max77663_regulator_is_enabled(struct regulator_dev *rdev)
414 {
415         struct max77663_regulator *reg = rdev_get_drvdata(rdev);
416         struct max77663_regulator_platform_data *pdata = _to_pdata(reg);
417         int ret = 1;
418
419         if (reg->fps_src != FPS_SRC_NONE) {
420                 dev_dbg(&rdev->dev, "is_enable: Regulator %s using %s\n",
421                         rdev->desc->name, fps_src_name(reg->fps_src));
422                 return 1;
423         }
424
425         if ((reg->id == MAX77663_REGULATOR_ID_SD0)
426                         && (pdata->flags & EN2_CTRL_SD0)) {
427                 dev_dbg(&rdev->dev,
428                         "is_enable: Regulator %s is controlled by EN2\n",
429                         rdev->desc->name);
430                 return 1;
431         }
432
433         if (max77663_regulator_get_power_mode(reg) == POWER_MODE_DISABLE)
434                 ret = 0;
435
436         return ret;
437 }
438
439 static int max77663_regulator_set_mode(struct regulator_dev *rdev,
440                                        unsigned int mode)
441 {
442         struct max77663_regulator *reg = rdev_get_drvdata(rdev);
443         u8 power_mode;
444         int ret;
445
446         if (mode == REGULATOR_MODE_NORMAL)
447                 power_mode = POWER_MODE_NORMAL;
448         else if (mode == REGULATOR_MODE_STANDBY)
449                 power_mode = POWER_MODE_LPM;
450         else
451                 return -EINVAL;
452
453         ret = max77663_regulator_set_power_mode(reg, power_mode);
454         if (!ret)
455                 reg->regulator_mode = mode;
456
457         return ret;
458 }
459
460 static unsigned int max77663_regulator_get_mode(struct regulator_dev *rdev)
461 {
462         struct max77663_regulator *reg = rdev_get_drvdata(rdev);
463
464         return reg->regulator_mode;
465 }
466
467 static struct regulator_ops max77663_ldo_ops = {
468         .set_voltage = max77663_regulator_set_voltage,
469         .get_voltage = max77663_regulator_get_voltage,
470         .enable = max77663_regulator_enable,
471         .disable = max77663_regulator_disable,
472         .is_enabled = max77663_regulator_is_enabled,
473         .set_mode = max77663_regulator_set_mode,
474         .get_mode = max77663_regulator_get_mode,
475 };
476
477 static int max77663_regulator_preinit(struct max77663_regulator *reg)
478 {
479         struct max77663_regulator_platform_data *pdata = _to_pdata(reg);
480         struct device *parent = _to_parent(reg);
481         u8 val;
482         int ret;
483
484         /* Update FPS source */
485         if (reg->fps_reg == MAX77663_REG_FPS_NONE)
486                 reg->fps_src = FPS_SRC_NONE;
487         else {
488                 ret = max77663_read(parent, reg->fps_reg, &val, 1, 0);
489                 if (ret < 0) {
490                         dev_err(reg->dev,
491                                 "preinit: Failed to get FPS source\n");
492                         return ret;
493                 }
494                 reg->fps_src = (val & FPS_SRC_MASK) >> FPS_SRC_SHIFT;
495         }
496
497         /* Set initial state */
498         if (!pdata->init_apply)
499                 goto skip_init_apply;
500
501         if (pdata->init_uV >= 0) {
502                 ret = max77663_regulator_do_set_voltage(reg, pdata->init_uV,
503                                                         pdata->init_uV);
504                 if (ret < 0) {
505                         dev_err(reg->dev, "preinit: Failed to set voltage to "
506                                 "%d\n", pdata->init_uV);
507                         return ret;
508                 }
509         }
510
511         if (pdata->init_enable)
512                 val = POWER_MODE_NORMAL;
513         else
514                 val = POWER_MODE_DISABLE;
515
516         ret = max77663_regulator_set_power_mode(reg, val);
517         if (ret < 0) {
518                 dev_err(reg->dev,
519                         "preinit: Failed to set power mode to %d\n", val);
520                 return ret;
521         }
522
523
524 skip_init_apply:
525         if (reg->type == REGULATOR_TYPE_SD) {
526                 if (pdata->flags & SD_SLEW_RATE_MASK) {
527                         if (pdata->flags & SD_SLEW_RATE_SLOWEST)
528                                 val = SD_SR_13_75 << SD_SR_SHIFT;
529                         else if (pdata->flags & SD_SLEW_RATE_SLOW)
530                                 val = SD_SR_27_5 << SD_SR_SHIFT;
531                         else if (pdata->flags & SD_SLEW_RATE_FAST)
532                                 val = SD_SR_55 << SD_SR_SHIFT;
533                         else
534                                 val = SD_SR_100 << SD_SR_SHIFT;
535
536                         ret = max77663_set_bits(parent, reg->cfg_reg,
537                                                 SD_SR_MASK, val, 0);
538                         if (ret < 0) {
539                                 dev_err(reg->dev,
540                                         "preinit: Failed to set slew rate\n");
541                                 return ret;
542                         }
543                 }
544
545                 if (pdata->flags & SD_FORCED_PWM_MODE) {
546                         ret = max77663_set_bits(parent, reg->cfg_reg,
547                                                 SD_FPWM_MASK, SD_FPWM_MASK, 0);
548                         if (ret < 0) {
549                                 dev_err(reg->dev, "preinit: "
550                                         "Failed to set forced pwm mode\n");
551                                 return ret;
552                         }
553                 }
554
555                 if ((reg->id == MAX77663_REGULATOR_ID_SD0)
556                                 && (pdata->flags & EN2_CTRL_SD0)) {
557                         val = POWER_MODE_DISABLE;
558                         ret = max77663_regulator_set_power_mode(reg, val);
559                         if (ret < 0) {
560                                 dev_err(reg->dev, "preinit: "
561                                         "Failed to set power mode to %d for "
562                                         "EN2_CTRL_SD0\n", val);
563                                 return ret;
564                         }
565
566                         if (reg->fps_src == FPS_SRC_NONE)
567                                 return 0;
568
569                         ret = max77663_regulator_set_fps_src(reg, FPS_SRC_NONE);
570                         if (ret < 0) {
571                                 dev_err(reg->dev, "preinit: "
572                                         "Failed to set FPSSRC to FPS_SRC_NONE "
573                                         "for EN2_CTRL_SD0\n");
574                                 return ret;
575                         }
576                 }
577         }
578
579         ret = max77663_regulator_set_fps_cfgs(reg, pdata->fps_cfgs,
580                                               pdata->num_fps_cfgs);
581         if (ret < 0) {
582                 dev_err(reg->dev, "preinit: Failed to set FPSCFG\n");
583                 return ret;
584         }
585
586         ret = max77663_regulator_set_fps_src(reg, pdata->fps_src);
587         if (ret < 0) {
588                 dev_err(reg->dev, "preinit: Failed to set FPSSRC to %d\n",
589                         pdata->fps_src);
590                 return ret;
591         }
592
593         ret = max77663_regulator_set_fps(reg);
594         if (ret < 0) {
595                 dev_err(reg->dev, "preinit: Failed to set FPS\n");
596                 return ret;
597         }
598
599         return 0;
600 }
601
602 #define REGULATOR_SD(_id, _volt_mask, _fps_reg, _min_uV, _max_uV, _step_uV) \
603         [MAX77663_REGULATOR_ID_##_id] = {                       \
604                 .id = MAX77663_REGULATOR_ID_##_id,              \
605                 .type = REGULATOR_TYPE_SD,                      \
606                 .volt_reg = MAX77663_REG_##_id,                 \
607                 .volt_mask = _volt_mask##_VOLT_MASK,            \
608                 .cfg_reg = MAX77663_REG_##_id##_CFG,            \
609                 .fps_reg = MAX77663_REG_FPS_##_fps_reg,         \
610                 .min_uV = _min_uV,                              \
611                 .max_uV = _max_uV,                              \
612                 .step_uV = _step_uV,                            \
613                 .regulator_mode = REGULATOR_MODE_NORMAL,        \
614                 .power_mode = POWER_MODE_NORMAL,                \
615                 .power_mode_mask = SD_POWER_MODE_MASK,          \
616                 .power_mode_shift = SD_POWER_MODE_SHIFT,        \
617         }
618
619 #define REGULATOR_LDO(_id, _min_uV, _max_uV, _step_uV)          \
620         [MAX77663_REGULATOR_ID_##_id] = {                       \
621                 .id = MAX77663_REGULATOR_ID_##_id,              \
622                 .type = REGULATOR_TYPE_LDO,                     \
623                 .volt_reg = MAX77663_REG_##_id##_CFG,           \
624                 .volt_mask = LDO_VOLT_MASK,                     \
625                 .cfg_reg = MAX77663_REG_##_id##_CFG2,           \
626                 .fps_reg = MAX77663_REG_FPS_##_id,              \
627                 .min_uV = _min_uV,                              \
628                 .max_uV = _max_uV,                              \
629                 .step_uV = _step_uV,                            \
630                 .regulator_mode = REGULATOR_MODE_NORMAL,        \
631                 .power_mode = POWER_MODE_NORMAL,                \
632                 .power_mode_mask = LDO_POWER_MODE_MASK,         \
633                 .power_mode_shift = LDO_POWER_MODE_SHIFT,       \
634         }
635
636 static struct max77663_regulator max77663_regs[MAX77663_REGULATOR_ID_NR] = {
637         REGULATOR_SD(SD0,    SDX, SD0,  600000, 3387500, 12500),
638         REGULATOR_SD(DVSSD0, SDX, NONE, 600000, 3387500, 12500),
639         REGULATOR_SD(SD1,    SD1, SD1,  800000, 1587500, 12500),
640         REGULATOR_SD(DVSSD1, SD1, NONE, 800000, 1587500, 12500),
641         REGULATOR_SD(SD2,    SDX, SD2,  600000, 3387500, 12500),
642         REGULATOR_SD(SD3,    SDX, SD3,  600000, 3387500, 12500),
643         REGULATOR_SD(SD4,    SDX, SD4,  600000, 3387500, 12500),
644
645         REGULATOR_LDO(LDO0, 800000, 2350000, 25000),
646         REGULATOR_LDO(LDO1, 800000, 2350000, 25000),
647         REGULATOR_LDO(LDO2, 800000, 3950000, 50000),
648         REGULATOR_LDO(LDO3, 800000, 3950000, 50000),
649         REGULATOR_LDO(LDO4, 800000, 1587500, 12500),
650         REGULATOR_LDO(LDO5, 800000, 3950000, 50000),
651         REGULATOR_LDO(LDO6, 800000, 3950000, 50000),
652         REGULATOR_LDO(LDO7, 800000, 3950000, 50000),
653         REGULATOR_LDO(LDO8, 800000, 3950000, 50000),
654 };
655
656 #define REGULATOR_DESC(_id, _name)                      \
657         [MAX77663_REGULATOR_ID_##_id] = {               \
658                 .name = max77663_rails(_name),          \
659                 .id = MAX77663_REGULATOR_ID_##_id,      \
660                 .ops = &max77663_ldo_ops,               \
661                 .type = REGULATOR_VOLTAGE,              \
662                 .owner = THIS_MODULE,                   \
663         }
664
665 static struct regulator_desc max77663_rdesc[MAX77663_REGULATOR_ID_NR] = {
666         REGULATOR_DESC(SD0, sd0),
667         REGULATOR_DESC(DVSSD0, dvssd0),
668         REGULATOR_DESC(SD1, sd1),
669         REGULATOR_DESC(DVSSD1, dvssd1),
670         REGULATOR_DESC(SD2, sd2),
671         REGULATOR_DESC(SD3, sd3),
672         REGULATOR_DESC(SD4, sd4),
673         REGULATOR_DESC(LDO0, ldo0),
674         REGULATOR_DESC(LDO1, ldo1),
675         REGULATOR_DESC(LDO2, ldo2),
676         REGULATOR_DESC(LDO3, ldo3),
677         REGULATOR_DESC(LDO4, ldo4),
678         REGULATOR_DESC(LDO5, ldo5),
679         REGULATOR_DESC(LDO6, ldo6),
680         REGULATOR_DESC(LDO7, ldo7),
681         REGULATOR_DESC(LDO8, ldo8),
682 };
683
684 static int max77663_regulator_probe(struct platform_device *pdev)
685 {
686         struct regulator_desc *rdesc;
687         struct max77663_regulator *reg;
688         struct max77663_regulator_platform_data *pdata;
689         int ret = 0;
690
691         if ((pdev->id < 0) || (pdev->id >= MAX77663_REGULATOR_ID_NR)) {
692                 dev_err(&pdev->dev, "Invalid device id %d\n", pdev->id);
693                 return -ENODEV;
694         }
695
696         rdesc = &max77663_rdesc[pdev->id];
697         reg = &max77663_regs[pdev->id];
698         reg->dev = &pdev->dev;
699         pdata = reg->dev->platform_data;
700
701         dev_dbg(&pdev->dev, "probe: name=%s\n", rdesc->name);
702
703         ret = max77663_regulator_preinit(reg);
704         if (ret) {
705                 dev_err(&pdev->dev, "probe: Failed to preinit regulator %s\n",
706                         rdesc->name);
707                 return ret;
708         }
709
710         reg->rdev = regulator_register(rdesc, &pdev->dev, &pdata->init_data,
711                                        reg);
712         if (IS_ERR(reg->rdev)) {
713                 dev_err(&pdev->dev, "probe: Failed to register regulator %s\n",
714                         rdesc->name);
715                 return PTR_ERR(reg->rdev);
716         }
717
718         return 0;
719 }
720
721 static int max77663_regulator_remove(struct platform_device *pdev)
722 {
723         struct regulator_dev *rdev = platform_get_drvdata(pdev);
724
725         regulator_unregister(rdev);
726         return 0;
727 }
728
729 static struct platform_driver max77663_regulator_driver = {
730         .probe = max77663_regulator_probe,
731         .remove = __devexit_p(max77663_regulator_remove),
732         .driver = {
733                 .name = "max77663-regulator",
734                 .owner = THIS_MODULE,
735         },
736 };
737
738 static int __init max77663_regulator_init(void)
739 {
740         return platform_driver_register(&max77663_regulator_driver);
741 }
742 subsys_initcall(max77663_regulator_init);
743
744 static void __exit max77663_reg_exit(void)
745 {
746         platform_driver_unregister(&max77663_regulator_driver);
747 }
748 module_exit(max77663_reg_exit);
749
750 MODULE_LICENSE("GPL v2");
751 MODULE_DESCRIPTION("max77663 regulator driver");
752 MODULE_VERSION("1.0");