Linux-2.6.12-rc2
[linux-2.6.git] / drivers / pcmcia / i82092.c
1 /* 
2  * Driver for Intel I82092AA PCI-PCMCIA bridge.
3  *
4  * (C) 2001 Red Hat, Inc.
5  *
6  * Author: Arjan Van De Ven <arjanv@redhat.com>
7  * Loosly based on i82365.c from the pcmcia-cs package
8  *
9  * $Id: i82092aa.c,v 1.2 2001/10/23 14:43:34 arjanv Exp $
10  */
11
12 #include <linux/kernel.h>
13 #include <linux/config.h>
14 #include <linux/module.h>
15 #include <linux/pci.h>
16 #include <linux/init.h>
17 #include <linux/workqueue.h>
18 #include <linux/interrupt.h>
19 #include <linux/device.h>
20
21 #include <pcmcia/cs_types.h>
22 #include <pcmcia/ss.h>
23 #include <pcmcia/cs.h>
24
25 #include <asm/system.h>
26 #include <asm/io.h>
27
28 #include "i82092aa.h"
29 #include "i82365.h"
30
31 MODULE_LICENSE("GPL");
32
33 /* PCI core routines */
34 static struct pci_device_id i82092aa_pci_ids[] = {
35         {
36               .vendor = PCI_VENDOR_ID_INTEL,
37               .device = PCI_DEVICE_ID_INTEL_82092AA_0,
38               .subvendor = PCI_ANY_ID,
39               .subdevice = PCI_ANY_ID,
40          },
41          {} 
42 };
43 MODULE_DEVICE_TABLE(pci, i82092aa_pci_ids);
44
45 static int i82092aa_socket_suspend (struct pci_dev *dev, pm_message_t state)
46 {
47         return pcmcia_socket_dev_suspend(&dev->dev, state);
48 }
49
50 static int i82092aa_socket_resume (struct pci_dev *dev)
51 {
52         return pcmcia_socket_dev_resume(&dev->dev);
53 }
54
55 static struct pci_driver i82092aa_pci_drv = {
56         .name           = "i82092aa",
57         .id_table       = i82092aa_pci_ids,
58         .probe          = i82092aa_pci_probe,
59         .remove         = __devexit_p(i82092aa_pci_remove),
60         .suspend        = i82092aa_socket_suspend,
61         .resume         = i82092aa_socket_resume,
62 };
63
64
65 /* the pccard structure and its functions */
66 static struct pccard_operations i82092aa_operations = {
67         .init                   = i82092aa_init,
68         .get_status             = i82092aa_get_status,
69         .get_socket             = i82092aa_get_socket,
70         .set_socket             = i82092aa_set_socket,
71         .set_io_map             = i82092aa_set_io_map,
72         .set_mem_map            = i82092aa_set_mem_map,
73 };
74
75 /* The card can do upto 4 sockets, allocate a structure for each of them */
76
77 struct socket_info {
78         int     number;
79         int     card_state;     /*  0 = no socket,
80                                     1 = empty socket, 
81                                     2 = card but not initialized,
82                                     3 = operational card */
83         kio_addr_t io_base;     /* base io address of the socket */
84         
85         struct pcmcia_socket socket;
86         struct pci_dev *dev;    /* The PCI device for the socket */
87 };
88
89 #define MAX_SOCKETS 4
90 static struct socket_info sockets[MAX_SOCKETS];
91 static int socket_count;  /* shortcut */                                                                                
92
93
94 static int __devinit i82092aa_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
95 {
96         unsigned char configbyte;
97         int i, ret;
98         
99         enter("i82092aa_pci_probe");
100         
101         if ((ret = pci_enable_device(dev)))
102                 return ret;
103                 
104         pci_read_config_byte(dev, 0x40, &configbyte);  /* PCI Configuration Control */
105         switch(configbyte&6) {
106                 case 0:
107                         socket_count = 2;
108                         break;
109                 case 2:
110                         socket_count = 1;
111                         break;
112                 case 4:
113                 case 6:
114                         socket_count = 4;
115                         break;
116                         
117                 default:
118                         printk(KERN_ERR "i82092aa: Oops, you did something we didn't think of.\n");
119                         ret = -EIO;
120                         goto err_out_disable;
121         }
122         printk(KERN_INFO "i82092aa: configured as a %d socket device.\n", socket_count);
123
124         if (!request_region(pci_resource_start(dev, 0), 2, "i82092aa")) {
125                 ret = -EBUSY;
126                 goto err_out_disable;
127         }
128         
129         for (i = 0;i<socket_count;i++) {
130                 sockets[i].card_state = 1; /* 1 = present but empty */
131                 sockets[i].io_base = pci_resource_start(dev, 0);
132                 sockets[i].socket.features |= SS_CAP_PCCARD;
133                 sockets[i].socket.map_size = 0x1000;
134                 sockets[i].socket.irq_mask = 0;
135                 sockets[i].socket.pci_irq  = dev->irq;
136                 sockets[i].socket.owner = THIS_MODULE;
137
138                 sockets[i].number = i;
139                 
140                 if (card_present(i)) {
141                         sockets[i].card_state = 3;
142                         dprintk(KERN_DEBUG "i82092aa: slot %i is occupied\n",i);
143                 } else {
144                         dprintk(KERN_DEBUG "i82092aa: slot %i is vacant\n",i);
145                 }
146         }
147                 
148         /* Now, specifiy that all interrupts are to be done as PCI interrupts */
149         configbyte = 0xFF; /* bitmask, one bit per event, 1 = PCI interrupt, 0 = ISA interrupt */
150         pci_write_config_byte(dev, 0x50, configbyte); /* PCI Interrupt Routing Register */
151
152         /* Register the interrupt handler */
153         dprintk(KERN_DEBUG "Requesting interrupt %i \n",dev->irq);
154         if ((ret = request_irq(dev->irq, i82092aa_interrupt, SA_SHIRQ, "i82092aa", i82092aa_interrupt))) {
155                 printk(KERN_ERR "i82092aa: Failed to register IRQ %d, aborting\n", dev->irq);
156                 goto err_out_free_res;
157         }
158
159         pci_set_drvdata(dev, &sockets[i].socket);
160
161         for (i = 0; i<socket_count; i++) {
162                 sockets[i].socket.dev.dev = &dev->dev;
163                 sockets[i].socket.ops = &i82092aa_operations;
164                 sockets[i].socket.resource_ops = &pccard_nonstatic_ops;
165                 ret = pcmcia_register_socket(&sockets[i].socket);
166                 if (ret) {
167                         goto err_out_free_sockets;
168                 }
169         }
170
171         leave("i82092aa_pci_probe");
172         return 0;
173
174 err_out_free_sockets:
175         if (i) {
176                 for (i--;i>=0;i--) {
177                         pcmcia_unregister_socket(&sockets[i].socket);
178                 }
179         }
180         free_irq(dev->irq, i82092aa_interrupt);
181 err_out_free_res:
182         release_region(pci_resource_start(dev, 0), 2);
183 err_out_disable:
184         pci_disable_device(dev);
185         return ret;                     
186 }
187
188 static void __devexit i82092aa_pci_remove(struct pci_dev *dev)
189 {
190         struct pcmcia_socket *socket = pci_get_drvdata(dev);
191
192         enter("i82092aa_pci_remove");
193         
194         free_irq(dev->irq, i82092aa_interrupt);
195
196         if (socket)
197                 pcmcia_unregister_socket(socket);
198
199         leave("i82092aa_pci_remove");
200 }
201
202 static DEFINE_SPINLOCK(port_lock);
203
204 /* basic value read/write functions */
205
206 static unsigned char indirect_read(int socket, unsigned short reg)
207 {
208         unsigned short int port;
209         unsigned char val;
210         unsigned long flags;
211         spin_lock_irqsave(&port_lock,flags);
212         reg += socket * 0x40;
213         port = sockets[socket].io_base;
214         outb(reg,port);
215         val = inb(port+1);
216         spin_unlock_irqrestore(&port_lock,flags);
217         return val;
218 }
219
220 #if 0
221 static unsigned short indirect_read16(int socket, unsigned short reg)
222 {
223         unsigned short int port;
224         unsigned short tmp;
225         unsigned long flags;
226         spin_lock_irqsave(&port_lock,flags);
227         reg  = reg + socket * 0x40;
228         port = sockets[socket].io_base;
229         outb(reg,port);
230         tmp = inb(port+1);
231         reg++;
232         outb(reg,port);
233         tmp = tmp | (inb(port+1)<<8);
234         spin_unlock_irqrestore(&port_lock,flags);
235         return tmp;
236 }
237 #endif
238
239 static void indirect_write(int socket, unsigned short reg, unsigned char value)
240 {
241         unsigned short int port;
242         unsigned long flags;
243         spin_lock_irqsave(&port_lock,flags);
244         reg = reg + socket * 0x40;
245         port = sockets[socket].io_base; 
246         outb(reg,port);
247         outb(value,port+1);
248         spin_unlock_irqrestore(&port_lock,flags);
249 }
250
251 static void indirect_setbit(int socket, unsigned short reg, unsigned char mask)
252 {
253         unsigned short int port;
254         unsigned char val;
255         unsigned long flags;
256         spin_lock_irqsave(&port_lock,flags);
257         reg = reg + socket * 0x40;
258         port = sockets[socket].io_base; 
259         outb(reg,port);
260         val = inb(port+1);
261         val |= mask;
262         outb(reg,port);
263         outb(val,port+1);
264         spin_unlock_irqrestore(&port_lock,flags);
265 }
266
267
268 static void indirect_resetbit(int socket, unsigned short reg, unsigned char mask)
269 {
270         unsigned short int port;
271         unsigned char val;
272         unsigned long flags;
273         spin_lock_irqsave(&port_lock,flags);
274         reg = reg + socket * 0x40;
275         port = sockets[socket].io_base; 
276         outb(reg,port);
277         val = inb(port+1);
278         val &= ~mask;
279         outb(reg,port);
280         outb(val,port+1);
281         spin_unlock_irqrestore(&port_lock,flags);
282 }
283
284 static void indirect_write16(int socket, unsigned short reg, unsigned short value)
285 {
286         unsigned short int port;
287         unsigned char val;
288         unsigned long flags;
289         spin_lock_irqsave(&port_lock,flags);
290         reg = reg + socket * 0x40;
291         port = sockets[socket].io_base; 
292         
293         outb(reg,port);
294         val = value & 255;
295         outb(val,port+1);
296         
297         reg++;
298         
299         outb(reg,port);
300         val = value>>8;
301         outb(val,port+1);
302         spin_unlock_irqrestore(&port_lock,flags);
303 }
304
305 /* simple helper functions */
306 /* External clock time, in nanoseconds.  120 ns = 8.33 MHz */
307 static int cycle_time = 120;
308
309 static int to_cycles(int ns)
310 {
311         if (cycle_time!=0)
312                 return ns/cycle_time;
313         else
314                 return 0;
315 }
316     
317
318 /* Interrupt handler functionality */
319
320 static irqreturn_t i82092aa_interrupt(int irq, void *dev, struct pt_regs *regs)
321 {
322         int i;
323         int loopcount = 0;
324         int handled = 0;
325
326         unsigned int events, active=0;
327         
328 /*      enter("i82092aa_interrupt");*/
329         
330         while (1) {
331                 loopcount++;
332                 if (loopcount>20) {
333                         printk(KERN_ERR "i82092aa: infinite eventloop in interrupt \n");
334                         break;
335                 }
336                 
337                 active = 0;
338                 
339                 for (i=0;i<socket_count;i++) {
340                         int csc;
341                         if (sockets[i].card_state==0) /* Inactive socket, should not happen */
342                                 continue;
343                         
344                         csc = indirect_read(i,I365_CSC); /* card status change register */
345                         
346                         if (csc==0)  /* no events on this socket */
347                                 continue;
348                         handled = 1;
349                         events = 0;
350                          
351                         if (csc & I365_CSC_DETECT) {
352                                 events |= SS_DETECT;
353                                 printk("Card detected in socket %i!\n",i);
354                          }
355                         
356                         if (indirect_read(i,I365_INTCTL) & I365_PC_IOCARD) { 
357                                 /* For IO/CARDS, bit 0 means "read the card" */
358                                 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; 
359                         } else {
360                                 /* Check for battery/ready events */
361                                 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
362                                 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
363                                 events |= (csc & I365_CSC_READY) ? SS_READY : 0;
364                         }
365                         
366                         if (events) {
367                                 pcmcia_parse_events(&sockets[i].socket, events);
368                         }
369                         active |= events;
370                 }
371                                 
372                 if (active==0) /* no more events to handle */
373                         break;                          
374                 
375         }
376         return IRQ_RETVAL(handled);
377 /*      leave("i82092aa_interrupt");*/
378 }
379
380
381
382 /* socket functions */
383
384 static int card_present(int socketno)
385 {       
386         unsigned int val;
387         enter("card_present");
388         
389         if ((socketno<0) || (socketno >= MAX_SOCKETS))
390                 return 0;
391         if (sockets[socketno].io_base == 0)
392                 return 0;
393
394                 
395         val = indirect_read(socketno, 1); /* Interface status register */
396         if ((val&12)==12) {
397                 leave("card_present 1");
398                 return 1;
399         }
400                 
401         leave("card_present 0");
402         return 0;
403 }
404
405 static void set_bridge_state(int sock)
406 {
407         enter("set_bridge_state");
408         indirect_write(sock, I365_GBLCTL,0x00);
409         indirect_write(sock, I365_GENCTL,0x00);
410         
411         indirect_setbit(sock, I365_INTCTL,0x08);
412         leave("set_bridge_state");
413 }
414
415
416
417
418
419       
420 static int i82092aa_init(struct pcmcia_socket *sock)
421 {
422         int i;
423         struct resource res = { .start = 0, .end = 0x0fff };
424         pccard_io_map io = { 0, 0, 0, 0, 1 };
425         pccard_mem_map mem = { .res = &res, };
426         
427         enter("i82092aa_init");
428                         
429         for (i = 0; i < 2; i++) {
430                 io.map = i;
431                 i82092aa_set_io_map(sock, &io);
432         }
433         for (i = 0; i < 5; i++) {
434                 mem.map = i;
435                 i82092aa_set_mem_map(sock, &mem);
436         }
437         
438         leave("i82092aa_init");
439         return 0;
440 }
441                                                                                                                                                                                                                                               
442 static int i82092aa_get_status(struct pcmcia_socket *socket, u_int *value)
443 {
444         unsigned int sock = container_of(socket, struct socket_info, socket)->number;
445         unsigned int status;
446         
447         enter("i82092aa_get_status");
448         
449         status = indirect_read(sock,I365_STATUS); /* Interface Status Register */
450         *value = 0;
451         
452         if ((status & I365_CS_DETECT) == I365_CS_DETECT) {
453                 *value |= SS_DETECT;
454         }
455                 
456         /* IO cards have a different meaning of bits 0,1 */
457         /* Also notice the inverse-logic on the bits */
458          if (indirect_read(sock, I365_INTCTL) & I365_PC_IOCARD) {
459                 /* IO card */
460                 if (!(status & I365_CS_STSCHG))
461                         *value |= SS_STSCHG;
462          } else { /* non I/O card */
463                 if (!(status & I365_CS_BVD1))
464                         *value |= SS_BATDEAD;
465                 if (!(status & I365_CS_BVD2))
466                         *value |= SS_BATWARN;
467                         
468          }
469          
470          if (status & I365_CS_WRPROT)
471                 (*value) |= SS_WRPROT;  /* card is write protected */
472          
473          if (status & I365_CS_READY)
474                 (*value) |= SS_READY;    /* card is not busy */
475                 
476          if (status & I365_CS_POWERON)
477                 (*value) |= SS_POWERON;  /* power is applied to the card */
478
479
480         leave("i82092aa_get_status");
481         return 0;
482 }
483
484
485 static int i82092aa_get_socket(struct pcmcia_socket *socket, socket_state_t *state) 
486 {
487         unsigned int sock = container_of(socket, struct socket_info, socket)->number;
488         unsigned char reg,vcc,vpp;
489         
490         enter("i82092aa_get_socket");
491         state->flags    = 0;
492         state->Vcc      = 0;
493         state->Vpp      = 0;
494         state->io_irq   = 0;
495         state->csc_mask = 0;
496
497         /* First the power status of the socket */
498         reg = indirect_read(sock,I365_POWER); /* PCTRL - Power Control Register */
499
500         if (reg & I365_PWR_AUTO)
501                 state->flags |= SS_PWR_AUTO;  /* Automatic Power Switch */
502                 
503         if (reg & I365_PWR_OUT)
504                 state->flags |= SS_OUTPUT_ENA; /* Output signals are enabled */
505                 
506         vcc = reg & I365_VCC_MASK;    vpp = reg & I365_VPP1_MASK;
507         
508         if (reg & I365_VCC_5V) { /* Can still be 3.3V, in this case the Vcc value will be overwritten later */
509                 state->Vcc = 50;
510                 
511                 if (vpp == I365_VPP1_5V)
512                         state->Vpp = 50;
513                 if (vpp == I365_VPP1_12V)
514                         state->Vpp = 120;
515                         
516         }
517         
518         if ((reg & I365_VCC_3V)==I365_VCC_3V)
519                 state->Vcc = 33;
520         
521         
522         /* Now the IO card, RESET flags and IO interrupt */
523         
524         reg = indirect_read(sock, I365_INTCTL); /* IGENC, Interrupt and General Control */
525         
526         if ((reg & I365_PC_RESET)==0)
527                 state->flags |= SS_RESET;
528         if (reg & I365_PC_IOCARD) 
529                 state->flags |= SS_IOCARD; /* This is an IO card */
530         
531         /* Set the IRQ number */
532         if (sockets[sock].dev!=NULL)
533                 state->io_irq = sockets[sock].dev->irq;
534         
535         /* Card status change */
536         reg = indirect_read(sock, I365_CSCINT); /* CSCICR, Card Status Change Interrupt Configuration */
537         
538         if (reg & I365_CSC_DETECT) 
539                 state->csc_mask |= SS_DETECT; /* Card detect is enabled */
540         
541         if (state->flags & SS_IOCARD) {/* IO Cards behave different */
542                 if (reg & I365_CSC_STSCHG)
543                         state->csc_mask |= SS_STSCHG;
544         } else {
545                 if (reg & I365_CSC_BVD1) 
546                         state->csc_mask |= SS_BATDEAD;
547                 if (reg & I365_CSC_BVD2) 
548                         state->csc_mask |= SS_BATWARN;
549                 if (reg & I365_CSC_READY) 
550                         state->csc_mask |= SS_READY;
551         }
552                 
553         leave("i82092aa_get_socket");
554         return 0;
555 }
556
557 static int i82092aa_set_socket(struct pcmcia_socket *socket, socket_state_t *state) 
558 {
559         unsigned int sock = container_of(socket, struct socket_info, socket)->number;
560         unsigned char reg;
561         
562         enter("i82092aa_set_socket");
563         
564         /* First, set the global controller options */
565         
566         set_bridge_state(sock);
567         
568         /* Values for the IGENC register */
569         
570         reg = 0;
571         if (!(state->flags & SS_RESET))         /* The reset bit has "inverse" logic */
572                 reg = reg | I365_PC_RESET;  
573         if (state->flags & SS_IOCARD) 
574                 reg = reg | I365_PC_IOCARD;
575                 
576         indirect_write(sock,I365_INTCTL,reg); /* IGENC, Interrupt and General Control Register */
577         
578         /* Power registers */
579         
580         reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */
581         
582         if (state->flags & SS_PWR_AUTO) {
583                 printk("Auto power\n");
584                 reg |= I365_PWR_AUTO;   /* automatic power mngmnt */
585         }
586         if (state->flags & SS_OUTPUT_ENA) {
587                 printk("Power Enabled \n");
588                 reg |= I365_PWR_OUT;    /* enable power */
589         }
590         
591         switch (state->Vcc) {
592                 case 0: 
593                         break;
594                 case 50: 
595                         printk("setting voltage to Vcc to 5V on socket %i\n",sock);
596                         reg |= I365_VCC_5V;
597                         break;
598                 default:
599                         printk("i82092aa: i82092aa_set_socket called with invalid VCC power value: %i ", state->Vcc);
600                         leave("i82092aa_set_socket");
601                         return -EINVAL;
602         }
603         
604         
605         switch (state->Vpp) {
606                 case 0: 
607                         printk("not setting Vpp on socket %i\n",sock);
608                         break;
609                 case 50: 
610                         printk("setting Vpp to 5.0 for socket %i\n",sock);
611                         reg |= I365_VPP1_5V | I365_VPP2_5V;
612                         break;
613                 case 120: 
614                         printk("setting Vpp to 12.0\n");
615                         reg |= I365_VPP1_12V | I365_VPP2_12V;
616                         break;
617                 default:
618                         printk("i82092aa: i82092aa_set_socket called with invalid VPP power value: %i ", state->Vcc);
619                         leave("i82092aa_set_socket");
620                         return -EINVAL;
621         }
622         
623         if (reg != indirect_read(sock,I365_POWER)) /* only write if changed */
624                 indirect_write(sock,I365_POWER,reg);
625                 
626         /* Enable specific interrupt events */
627         
628         reg = 0x00;
629         if (state->csc_mask & SS_DETECT) {
630                 reg |= I365_CSC_DETECT;
631         }
632         if (state->flags & SS_IOCARD) {
633                 if (state->csc_mask & SS_STSCHG)
634                         reg |= I365_CSC_STSCHG;
635         } else {
636                 if (state->csc_mask & SS_BATDEAD) 
637                         reg |= I365_CSC_BVD1;
638                 if (state->csc_mask & SS_BATWARN) 
639                         reg |= I365_CSC_BVD2;
640                 if (state->csc_mask & SS_READY) 
641                         reg |= I365_CSC_READY; 
642                                         
643         }
644         
645         /* now write the value and clear the (probably bogus) pending stuff by doing a dummy read*/
646         
647         indirect_write(sock,I365_CSCINT,reg);
648         (void)indirect_read(sock,I365_CSC);
649
650         leave("i82092aa_set_socket");
651         return 0;
652 }
653
654 static int i82092aa_set_io_map(struct pcmcia_socket *socket, struct pccard_io_map *io)
655 {
656         unsigned int sock = container_of(socket, struct socket_info, socket)->number;
657         unsigned char map, ioctl;
658         
659         enter("i82092aa_set_io_map");
660         
661         map = io->map;
662         
663         /* Check error conditions */    
664         if (map > 1) {
665                 leave("i82092aa_set_io_map with invalid map");
666                 return -EINVAL;
667         }
668         if ((io->start > 0xffff) || (io->stop > 0xffff) || (io->stop < io->start)){
669                 leave("i82092aa_set_io_map with invalid io");
670                 return -EINVAL;
671         }
672
673         /* Turn off the window before changing anything */ 
674         if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_IO(map))
675                 indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_IO(map));
676
677 /*      printk("set_io_map: Setting range to %x - %x \n",io->start,io->stop);  */
678         
679         /* write the new values */
680         indirect_write16(sock,I365_IO(map)+I365_W_START,io->start);             
681         indirect_write16(sock,I365_IO(map)+I365_W_STOP,io->stop);               
682                         
683         ioctl = indirect_read(sock,I365_IOCTL) & ~I365_IOCTL_MASK(map);
684         
685         if (io->flags & (MAP_16BIT|MAP_AUTOSZ))
686                 ioctl |= I365_IOCTL_16BIT(map);
687                 
688         indirect_write(sock,I365_IOCTL,ioctl);
689         
690         /* Turn the window back on if needed */
691         if (io->flags & MAP_ACTIVE)
692                 indirect_setbit(sock,I365_ADDRWIN,I365_ENA_IO(map));
693                         
694         leave("i82092aa_set_io_map");   
695         return 0;
696 }
697
698 static int i82092aa_set_mem_map(struct pcmcia_socket *socket, struct pccard_mem_map *mem)
699 {
700         struct socket_info *sock_info = container_of(socket, struct socket_info, socket);
701         unsigned int sock = sock_info->number;
702         struct pci_bus_region region;
703         unsigned short base, i;
704         unsigned char map;
705         
706         enter("i82092aa_set_mem_map");
707
708         pcibios_resource_to_bus(sock_info->dev, &region, mem->res);
709         
710         map = mem->map;
711         if (map > 4) {
712                 leave("i82092aa_set_mem_map: invalid map");
713                 return -EINVAL;
714         }
715         
716         
717         if ( (mem->card_start > 0x3ffffff) || (region.start > region.end) ||
718              (mem->speed > 1000) ) {
719                 leave("i82092aa_set_mem_map: invalid address / speed");
720                 printk("invalid mem map for socket %i : %lx to %lx with a start of %x \n",sock,region.start, region.end, mem->card_start);
721                 return -EINVAL;
722         }
723         
724         /* Turn off the window before changing anything */
725         if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_MEM(map))
726                       indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));
727                          
728                          
729 /*      printk("set_mem_map: Setting map %i range to %x - %x on socket %i, speed is %i, active = %i \n",map, region.start,region.end,sock,mem->speed,mem->flags & MAP_ACTIVE);  */
730
731         /* write the start address */
732         base = I365_MEM(map);
733         i = (region.start >> 12) & 0x0fff;
734         if (mem->flags & MAP_16BIT) 
735                 i |= I365_MEM_16BIT;
736         if (mem->flags & MAP_0WS)
737                 i |= I365_MEM_0WS;      
738         indirect_write16(sock,base+I365_W_START,i);
739                                
740         /* write the stop address */
741         
742         i= (region.end >> 12) & 0x0fff;
743         switch (to_cycles(mem->speed)) {
744                 case 0:
745                         break;
746                 case 1:
747                         i |= I365_MEM_WS0;
748                         break;
749                 case 2:
750                         i |= I365_MEM_WS1;
751                         break;
752                 default:
753                         i |= I365_MEM_WS1 | I365_MEM_WS0;
754                         break;
755         }
756         
757         indirect_write16(sock,base+I365_W_STOP,i);
758         
759         /* card start */
760         
761         i = ((mem->card_start - region.start) >> 12) & 0x3fff;
762         if (mem->flags & MAP_WRPROT)
763                 i |= I365_MEM_WRPROT;
764         if (mem->flags & MAP_ATTRIB) {
765 /*              printk("requesting attribute memory for socket %i\n",sock);*/
766                 i |= I365_MEM_REG;
767         } else {
768 /*              printk("requesting normal memory for socket %i\n",sock);*/
769         }
770         indirect_write16(sock,base+I365_W_OFF,i);
771         
772         /* Enable the window if necessary */
773         if (mem->flags & MAP_ACTIVE)
774                 indirect_setbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));
775                     
776         leave("i82092aa_set_mem_map");
777         return 0;
778 }
779
780 static int i82092aa_module_init(void)
781 {
782         enter("i82092aa_module_init");
783         pci_register_driver(&i82092aa_pci_drv);
784         leave("i82092aa_module_init");
785         return 0;
786 }
787
788 static void i82092aa_module_exit(void)
789 {
790         enter("i82092aa_module_exit");
791         pci_unregister_driver(&i82092aa_pci_drv);
792         if (sockets[0].io_base>0)
793                          release_region(sockets[0].io_base, 2);
794         leave("i82092aa_module_exit");
795 }
796
797 module_init(i82092aa_module_init);
798 module_exit(i82092aa_module_exit);
799