device create: misc: convert device_create_drvdata to device_create
[linux-2.6.git] / drivers / pci / access.c
1 #include <linux/delay.h>
2 #include <linux/pci.h>
3 #include <linux/module.h>
4 #include <linux/sched.h>
5 #include <linux/ioport.h>
6 #include <linux/wait.h>
7
8 #include "pci.h"
9
10 /*
11  * This interrupt-safe spinlock protects all accesses to PCI
12  * configuration space.
13  */
14
15 static DEFINE_SPINLOCK(pci_lock);
16
17 /*
18  *  Wrappers for all PCI configuration access functions.  They just check
19  *  alignment, do locking and call the low-level functions pointed to
20  *  by pci_dev->ops.
21  */
22
23 #define PCI_byte_BAD 0
24 #define PCI_word_BAD (pos & 1)
25 #define PCI_dword_BAD (pos & 3)
26
27 #define PCI_OP_READ(size,type,len) \
28 int pci_bus_read_config_##size \
29         (struct pci_bus *bus, unsigned int devfn, int pos, type *value) \
30 {                                                                       \
31         int res;                                                        \
32         unsigned long flags;                                            \
33         u32 data = 0;                                                   \
34         if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;       \
35         spin_lock_irqsave(&pci_lock, flags);                            \
36         res = bus->ops->read(bus, devfn, pos, len, &data);              \
37         *value = (type)data;                                            \
38         spin_unlock_irqrestore(&pci_lock, flags);                       \
39         return res;                                                     \
40 }
41
42 #define PCI_OP_WRITE(size,type,len) \
43 int pci_bus_write_config_##size \
44         (struct pci_bus *bus, unsigned int devfn, int pos, type value)  \
45 {                                                                       \
46         int res;                                                        \
47         unsigned long flags;                                            \
48         if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;       \
49         spin_lock_irqsave(&pci_lock, flags);                            \
50         res = bus->ops->write(bus, devfn, pos, len, value);             \
51         spin_unlock_irqrestore(&pci_lock, flags);                       \
52         return res;                                                     \
53 }
54
55 PCI_OP_READ(byte, u8, 1)
56 PCI_OP_READ(word, u16, 2)
57 PCI_OP_READ(dword, u32, 4)
58 PCI_OP_WRITE(byte, u8, 1)
59 PCI_OP_WRITE(word, u16, 2)
60 PCI_OP_WRITE(dword, u32, 4)
61
62 EXPORT_SYMBOL(pci_bus_read_config_byte);
63 EXPORT_SYMBOL(pci_bus_read_config_word);
64 EXPORT_SYMBOL(pci_bus_read_config_dword);
65 EXPORT_SYMBOL(pci_bus_write_config_byte);
66 EXPORT_SYMBOL(pci_bus_write_config_word);
67 EXPORT_SYMBOL(pci_bus_write_config_dword);
68
69 /*
70  * The following routines are to prevent the user from accessing PCI config
71  * space when it's unsafe to do so.  Some devices require this during BIST and
72  * we're required to prevent it during D-state transitions.
73  *
74  * We have a bit per device to indicate it's blocked and a global wait queue
75  * for callers to sleep on until devices are unblocked.
76  */
77 static DECLARE_WAIT_QUEUE_HEAD(pci_ucfg_wait);
78
79 static noinline void pci_wait_ucfg(struct pci_dev *dev)
80 {
81         DECLARE_WAITQUEUE(wait, current);
82
83         __add_wait_queue(&pci_ucfg_wait, &wait);
84         do {
85                 set_current_state(TASK_UNINTERRUPTIBLE);
86                 spin_unlock_irq(&pci_lock);
87                 schedule();
88                 spin_lock_irq(&pci_lock);
89         } while (dev->block_ucfg_access);
90         __remove_wait_queue(&pci_ucfg_wait, &wait);
91 }
92
93 #define PCI_USER_READ_CONFIG(size,type)                                 \
94 int pci_user_read_config_##size                                         \
95         (struct pci_dev *dev, int pos, type *val)                       \
96 {                                                                       \
97         int ret = 0;                                                    \
98         u32 data = -1;                                                  \
99         if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;       \
100         spin_lock_irq(&pci_lock);                                       \
101         if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev);       \
102         ret = dev->bus->ops->read(dev->bus, dev->devfn,                 \
103                                         pos, sizeof(type), &data);      \
104         spin_unlock_irq(&pci_lock);                                     \
105         *val = (type)data;                                              \
106         return ret;                                                     \
107 }
108
109 #define PCI_USER_WRITE_CONFIG(size,type)                                \
110 int pci_user_write_config_##size                                        \
111         (struct pci_dev *dev, int pos, type val)                        \
112 {                                                                       \
113         int ret = -EIO;                                                 \
114         if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;       \
115         spin_lock_irq(&pci_lock);                                       \
116         if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev);       \
117         ret = dev->bus->ops->write(dev->bus, dev->devfn,                \
118                                         pos, sizeof(type), val);        \
119         spin_unlock_irq(&pci_lock);                                     \
120         return ret;                                                     \
121 }
122
123 PCI_USER_READ_CONFIG(byte, u8)
124 PCI_USER_READ_CONFIG(word, u16)
125 PCI_USER_READ_CONFIG(dword, u32)
126 PCI_USER_WRITE_CONFIG(byte, u8)
127 PCI_USER_WRITE_CONFIG(word, u16)
128 PCI_USER_WRITE_CONFIG(dword, u32)
129
130 /* VPD access through PCI 2.2+ VPD capability */
131
132 #define PCI_VPD_PCI22_SIZE (PCI_VPD_ADDR_MASK + 1)
133
134 struct pci_vpd_pci22 {
135         struct pci_vpd base;
136         spinlock_t lock; /* controls access to hardware and the flags */
137         u8      cap;
138         bool    busy;
139         bool    flag; /* value of F bit to wait for */
140 };
141
142 /* Wait for last operation to complete */
143 static int pci_vpd_pci22_wait(struct pci_dev *dev)
144 {
145         struct pci_vpd_pci22 *vpd =
146                 container_of(dev->vpd, struct pci_vpd_pci22, base);
147         u16 flag, status;
148         int wait;
149         int ret;
150
151         if (!vpd->busy)
152                 return 0;
153
154         flag = vpd->flag ? PCI_VPD_ADDR_F : 0;
155         wait = vpd->flag ? 10 : 1000; /* read: 100 us; write: 10 ms */
156         for (;;) {
157                 ret = pci_user_read_config_word(dev,
158                                                 vpd->cap + PCI_VPD_ADDR,
159                                                 &status);
160                 if (ret < 0)
161                         return ret;
162                 if ((status & PCI_VPD_ADDR_F) == flag) {
163                         vpd->busy = false;
164                         return 0;
165                 }
166                 if (wait-- == 0)
167                         return -ETIMEDOUT;
168                 udelay(10);
169         }
170 }
171
172 static int pci_vpd_pci22_read(struct pci_dev *dev, int pos, int size,
173                               char *buf)
174 {
175         struct pci_vpd_pci22 *vpd =
176                 container_of(dev->vpd, struct pci_vpd_pci22, base);
177         u32 val;
178         int ret;
179         int begin, end, i;
180
181         if (pos < 0 || pos > vpd->base.len || size > vpd->base.len  - pos)
182                 return -EINVAL;
183         if (size == 0)
184                 return 0;
185
186         spin_lock_irq(&vpd->lock);
187         ret = pci_vpd_pci22_wait(dev);
188         if (ret < 0)
189                 goto out;
190         ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
191                                          pos & ~3);
192         if (ret < 0)
193                 goto out;
194         vpd->busy = true;
195         vpd->flag = 1;
196         ret = pci_vpd_pci22_wait(dev);
197         if (ret < 0)
198                 goto out;
199         ret = pci_user_read_config_dword(dev, vpd->cap + PCI_VPD_DATA,
200                                          &val);
201 out:
202         spin_unlock_irq(&vpd->lock);
203         if (ret < 0)
204                 return ret;
205
206         /* Convert to bytes */
207         begin = pos & 3;
208         end = min(4, begin + size);
209         for (i = 0; i < end; ++i) {
210                 if (i >= begin)
211                         *buf++ = val;
212                 val >>= 8;
213         }
214         return end - begin;
215 }
216
217 static int pci_vpd_pci22_write(struct pci_dev *dev, int pos, int size,
218                                const char *buf)
219 {
220         struct pci_vpd_pci22 *vpd =
221                 container_of(dev->vpd, struct pci_vpd_pci22, base);
222         u32 val;
223         int ret;
224
225         if (pos < 0 || pos > vpd->base.len || pos & 3 ||
226             size > vpd->base.len - pos || size < 4)
227                 return -EINVAL;
228
229         val = (u8) *buf++;
230         val |= ((u8) *buf++) << 8;
231         val |= ((u8) *buf++) << 16;
232         val |= ((u32)(u8) *buf++) << 24;
233
234         spin_lock_irq(&vpd->lock);
235         ret = pci_vpd_pci22_wait(dev);
236         if (ret < 0)
237                 goto out;
238         ret = pci_user_write_config_dword(dev, vpd->cap + PCI_VPD_DATA,
239                                           val);
240         if (ret < 0)
241                 goto out;
242         ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
243                                          pos | PCI_VPD_ADDR_F);
244         if (ret < 0)
245                 goto out;
246         vpd->busy = true;
247         vpd->flag = 0;
248         ret = pci_vpd_pci22_wait(dev);
249 out:
250         spin_unlock_irq(&vpd->lock);
251         if (ret < 0)
252                 return ret;
253
254         return 4;
255 }
256
257 static void pci_vpd_pci22_release(struct pci_dev *dev)
258 {
259         kfree(container_of(dev->vpd, struct pci_vpd_pci22, base));
260 }
261
262 static struct pci_vpd_ops pci_vpd_pci22_ops = {
263         .read = pci_vpd_pci22_read,
264         .write = pci_vpd_pci22_write,
265         .release = pci_vpd_pci22_release,
266 };
267
268 int pci_vpd_pci22_init(struct pci_dev *dev)
269 {
270         struct pci_vpd_pci22 *vpd;
271         u8 cap;
272
273         cap = pci_find_capability(dev, PCI_CAP_ID_VPD);
274         if (!cap)
275                 return -ENODEV;
276         vpd = kzalloc(sizeof(*vpd), GFP_ATOMIC);
277         if (!vpd)
278                 return -ENOMEM;
279
280         vpd->base.len = PCI_VPD_PCI22_SIZE;
281         vpd->base.ops = &pci_vpd_pci22_ops;
282         spin_lock_init(&vpd->lock);
283         vpd->cap = cap;
284         vpd->busy = false;
285         dev->vpd = &vpd->base;
286         return 0;
287 }
288
289 /**
290  * pci_block_user_cfg_access - Block userspace PCI config reads/writes
291  * @dev:        pci device struct
292  *
293  * When user access is blocked, any reads or writes to config space will
294  * sleep until access is unblocked again.  We don't allow nesting of
295  * block/unblock calls.
296  */
297 void pci_block_user_cfg_access(struct pci_dev *dev)
298 {
299         unsigned long flags;
300         int was_blocked;
301
302         spin_lock_irqsave(&pci_lock, flags);
303         was_blocked = dev->block_ucfg_access;
304         dev->block_ucfg_access = 1;
305         spin_unlock_irqrestore(&pci_lock, flags);
306
307         /* If we BUG() inside the pci_lock, we're guaranteed to hose
308          * the machine */
309         BUG_ON(was_blocked);
310 }
311 EXPORT_SYMBOL_GPL(pci_block_user_cfg_access);
312
313 /**
314  * pci_unblock_user_cfg_access - Unblock userspace PCI config reads/writes
315  * @dev:        pci device struct
316  *
317  * This function allows userspace PCI config accesses to resume.
318  */
319 void pci_unblock_user_cfg_access(struct pci_dev *dev)
320 {
321         unsigned long flags;
322
323         spin_lock_irqsave(&pci_lock, flags);
324
325         /* This indicates a problem in the caller, but we don't need
326          * to kill them, unlike a double-block above. */
327         WARN_ON(!dev->block_ucfg_access);
328
329         dev->block_ucfg_access = 0;
330         wake_up_all(&pci_ucfg_wait);
331         spin_unlock_irqrestore(&pci_lock, flags);
332 }
333 EXPORT_SYMBOL_GPL(pci_unblock_user_cfg_access);