[PATCH] zd1211rw: AL2230 ZD1211B vendor sync
[linux-2.6.git] / drivers / net / wireless / zd1211rw / zd_rf_al2230.c
1 /* zd_rf_al2230.c: Functions for the AL2230 RF controller
2  *
3  * This program is free software; you can redistribute it and/or modify
4  * it under the terms of the GNU General Public License as published by
5  * the Free Software Foundation; either version 2 of the License, or
6  * (at your option) any later version.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  *
13  * You should have received a copy of the GNU General Public License
14  * along with this program; if not, write to the Free Software
15  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
16  */
17
18 #include <linux/kernel.h>
19
20 #include "zd_rf.h"
21 #include "zd_usb.h"
22 #include "zd_chip.h"
23
24 static const u32 zd1211_al2230_table[][3] = {
25         RF_CHANNEL( 1) = { 0x03f790, 0x033331, 0x00000d, },
26         RF_CHANNEL( 2) = { 0x03f790, 0x0b3331, 0x00000d, },
27         RF_CHANNEL( 3) = { 0x03e790, 0x033331, 0x00000d, },
28         RF_CHANNEL( 4) = { 0x03e790, 0x0b3331, 0x00000d, },
29         RF_CHANNEL( 5) = { 0x03f7a0, 0x033331, 0x00000d, },
30         RF_CHANNEL( 6) = { 0x03f7a0, 0x0b3331, 0x00000d, },
31         RF_CHANNEL( 7) = { 0x03e7a0, 0x033331, 0x00000d, },
32         RF_CHANNEL( 8) = { 0x03e7a0, 0x0b3331, 0x00000d, },
33         RF_CHANNEL( 9) = { 0x03f7b0, 0x033331, 0x00000d, },
34         RF_CHANNEL(10) = { 0x03f7b0, 0x0b3331, 0x00000d, },
35         RF_CHANNEL(11) = { 0x03e7b0, 0x033331, 0x00000d, },
36         RF_CHANNEL(12) = { 0x03e7b0, 0x0b3331, 0x00000d, },
37         RF_CHANNEL(13) = { 0x03f7c0, 0x033331, 0x00000d, },
38         RF_CHANNEL(14) = { 0x03e7c0, 0x066661, 0x00000d, },
39 };
40
41 static const u32 zd1211b_al2230_table[][3] = {
42         RF_CHANNEL( 1) = { 0x09efc0, 0x8cccc0, 0xb00000, },
43         RF_CHANNEL( 2) = { 0x09efc0, 0x8cccd0, 0xb00000, },
44         RF_CHANNEL( 3) = { 0x09e7c0, 0x8cccc0, 0xb00000, },
45         RF_CHANNEL( 4) = { 0x09e7c0, 0x8cccd0, 0xb00000, },
46         RF_CHANNEL( 5) = { 0x05efc0, 0x8cccc0, 0xb00000, },
47         RF_CHANNEL( 6) = { 0x05efc0, 0x8cccd0, 0xb00000, },
48         RF_CHANNEL( 7) = { 0x05e7c0, 0x8cccc0, 0xb00000, },
49         RF_CHANNEL( 8) = { 0x05e7c0, 0x8cccd0, 0xb00000, },
50         RF_CHANNEL( 9) = { 0x0defc0, 0x8cccc0, 0xb00000, },
51         RF_CHANNEL(10) = { 0x0defc0, 0x8cccd0, 0xb00000, },
52         RF_CHANNEL(11) = { 0x0de7c0, 0x8cccc0, 0xb00000, },
53         RF_CHANNEL(12) = { 0x0de7c0, 0x8cccd0, 0xb00000, },
54         RF_CHANNEL(13) = { 0x03efc0, 0x8cccc0, 0xb00000, },
55         RF_CHANNEL(14) = { 0x03e7c0, 0x866660, 0xb00000, },
56 };
57
58 static const struct zd_ioreq16 zd1211b_ioreqs_shared_1[] = {
59         { CR240, 0x57 }, { CR9,   0xe0 },
60 };
61
62 static int zd1211b_al2230_finalize_rf(struct zd_chip *chip)
63 {
64         int r;
65         static const struct zd_ioreq16 ioreqs[] = {
66                 { CR80,  0x30 }, { CR81,  0x30 }, { CR79,  0x58 },
67                 { CR12,  0xf0 }, { CR77,  0x1b }, { CR78,  0x58 },
68                 { CR203, 0x06 },
69                 { },
70
71                 { CR240, 0x80 },
72         };
73
74         r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
75         if (r)
76                 return r;
77
78         /* related to antenna selection? */
79         if (chip->new_phy_layout) {
80                 r = zd_iowrite16_locked(chip, 0xe1, CR9);
81                 if (r)
82                         return r;
83         }
84
85         return zd_iowrite16_locked(chip, 0x06, CR203);
86 }
87
88 static int zd1211_al2230_init_hw(struct zd_rf *rf)
89 {
90         int r;
91         struct zd_chip *chip = zd_rf_to_chip(rf);
92
93         static const struct zd_ioreq16 ioreqs[] = {
94                 { CR15,   0x20 }, { CR23,   0x40 }, { CR24,  0x20 },
95                 { CR26,   0x11 }, { CR28,   0x3e }, { CR29,  0x00 },
96                 { CR44,   0x33 }, { CR106,  0x2a }, { CR107, 0x1a },
97                 { CR109,  0x09 }, { CR110,  0x27 }, { CR111, 0x2b },
98                 { CR112,  0x2b }, { CR119,  0x0a }, { CR10,  0x89 },
99                 /* for newest (3rd cut) AL2300 */
100                 { CR17,   0x28 },
101                 { CR26,   0x93 }, { CR34,   0x30 },
102                 /* for newest (3rd cut) AL2300 */
103                 { CR35,   0x3e },
104                 { CR41,   0x24 }, { CR44,   0x32 },
105                 /* for newest (3rd cut) AL2300 */
106                 { CR46,   0x96 },
107                 { CR47,   0x1e }, { CR79,   0x58 }, { CR80,  0x30 },
108                 { CR81,   0x30 }, { CR87,   0x0a }, { CR89,  0x04 },
109                 { CR92,   0x0a }, { CR99,   0x28 }, { CR100, 0x00 },
110                 { CR101,  0x13 }, { CR102,  0x27 }, { CR106, 0x24 },
111                 { CR107,  0x2a }, { CR109,  0x09 }, { CR110, 0x13 },
112                 { CR111,  0x1f }, { CR112,  0x1f }, { CR113, 0x27 },
113                 { CR114,  0x27 },
114                 /* for newest (3rd cut) AL2300 */
115                 { CR115,  0x24 },
116                 { CR116,  0x24 }, { CR117,  0xf4 }, { CR118, 0xfc },
117                 { CR119,  0x10 }, { CR120,  0x4f }, { CR121, 0x77 },
118                 { CR122,  0xe0 }, { CR137,  0x88 }, { CR252, 0xff },
119                 { CR253,  0xff },
120
121                 /* These following happen separately in the vendor driver */
122                 { },
123
124                 /* shdnb(PLL_ON)=0 */
125                 { CR251,  0x2f },
126                 /* shdnb(PLL_ON)=1 */
127                 { CR251,  0x3f },
128                 { CR138,  0x28 }, { CR203,  0x06 },
129         };
130
131         static const u32 rv[] = {
132                 /* Channel 1 */
133                 0x03f790,
134                 0x033331,
135                 0x00000d,
136
137                 0x0b3331,
138                 0x03b812,
139                 0x00fff3,
140                 0x000da4,
141                 0x0f4dc5, /* fix freq shift, 0x04edc5 */
142                 0x0805b6,
143                 0x011687,
144                 0x000688,
145                 0x0403b9, /* external control TX power (CR31) */
146                 0x00dbba,
147                 0x00099b,
148                 0x0bdffc,
149                 0x00000d,
150                 0x00500f,
151
152                 /* These writes happen separately in the vendor driver */
153                 0x00d00f,
154                 0x004c0f,
155                 0x00540f,
156                 0x00700f,
157                 0x00500f,
158         };
159
160         r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
161         if (r)
162                 return r;
163
164         r = zd_rfwritev_locked(chip, rv, ARRAY_SIZE(rv), RF_RV_BITS);
165         if (r)
166                 return r;
167
168         return 0;
169 }
170
171 static int zd1211b_al2230_init_hw(struct zd_rf *rf)
172 {
173         int r;
174         struct zd_chip *chip = zd_rf_to_chip(rf);
175
176         static const struct zd_ioreq16 ioreqs1[] = {
177                 { CR10,  0x89 }, { CR15,  0x20 },
178                 { CR17,  0x2B }, /* for newest(3rd cut) AL2230 */
179                 { CR23,  0x40 }, { CR24,  0x20 }, { CR26,  0x93 },
180                 { CR28,  0x3e }, { CR29,  0x00 },
181                 { CR33,  0x28 }, /* 5621 */
182                 { CR34,  0x30 },
183                 { CR35,  0x3e }, /* for newest(3rd cut) AL2230 */
184                 { CR41,  0x24 }, { CR44,  0x32 },
185                 { CR46,  0x99 }, /* for newest(3rd cut) AL2230 */
186                 { CR47,  0x1e },
187
188                 /* ZD1211B 05.06.10 */
189                 { CR48,  0x06 }, { CR49,  0xf9 }, { CR51,  0x01 },
190                 { CR52,  0x80 }, { CR53,  0x7e }, { CR65,  0x00 },
191                 { CR66,  0x00 }, { CR67,  0x00 }, { CR68,  0x00 },
192                 { CR69,  0x28 },
193
194                 { CR79,  0x58 }, { CR80,  0x30 }, { CR81,  0x30 },
195                 { CR87,  0x0a }, { CR89,  0x04 },
196                 { CR91,  0x00 }, /* 5621 */
197                 { CR92,  0x0a },
198                 { CR98,  0x8d }, /* 4804,  for 1212 new algorithm */
199                 { CR99,  0x00 }, /* 5621 */
200                 { CR101, 0x13 }, { CR102, 0x27 },
201                 { CR106, 0x24 }, /* for newest(3rd cut) AL2230 */
202                 { CR107, 0x2a },
203                 { CR109, 0x13 }, /* 4804, for 1212 new algorithm */
204                 { CR110, 0x1f }, /* 4804, for 1212 new algorithm */
205                 { CR111, 0x1f }, { CR112, 0x1f }, { CR113, 0x27 },
206                 { CR114, 0x27 },
207                 { CR115, 0x26 }, /* 24->26 at 4902 for newest(3rd cut) AL2230 */
208                 { CR116, 0x24 },
209                 { CR117, 0xfa }, /* for 1211b */
210                 { CR118, 0xfa }, /* for 1211b */
211                 { CR119, 0x10 },
212                 { CR120, 0x4f },
213                 { CR121, 0x6c }, /* for 1211b */
214                 { CR122, 0xfc }, /* E0->FC at 4902 */
215                 { CR123, 0x57 }, /* 5623 */
216                 { CR125, 0xad }, /* 4804, for 1212 new algorithm */
217                 { CR126, 0x6c }, /* 5614 */
218                 { CR127, 0x03 }, /* 4804, for 1212 new algorithm */
219                 { CR137, 0x50 }, /* 5614 */
220                 { CR138, 0xa8 },
221                 { CR144, 0xac }, /* 5621 */
222                 { CR150, 0x0d }, { CR252, 0x34 }, { CR253, 0x34 },
223         };
224
225         static const u32 rv1[] = {
226                 0x8cccd0,
227                 0x481dc0,
228                 0xcfff00,
229                 0x25a000,
230
231                 /* To improve AL2230 yield, improve phase noise, 4713 */
232                 0x25a000,
233                 0xa3b2f0,
234
235                 0x6da010, /* Reg6 update for MP versio */
236                 0xe36280, /* Modified by jxiao for Bor-Chin on 2004/08/02 */
237                 0x116000,
238                 0x9dc020, /* External control TX power (CR31) */
239                 0x5ddb00, /* RegA update for MP version */
240                 0xd99000, /* RegB update for MP version */
241                 0x3ffbd0, /* RegC update for MP version */
242                 0xb00000, /* RegD update for MP version */
243
244                 /* improve phase noise and remove phase calibration,4713 */
245                 0xf01a00,
246         };
247
248         static const struct zd_ioreq16 ioreqs2[] = {
249                 { CR251, 0x2f }, /* shdnb(PLL_ON)=0 */
250                 { CR251, 0x7f }, /* shdnb(PLL_ON)=1 */
251         };
252
253         static const u32 rv2[] = {
254                 /* To improve AL2230 yield, 4713 */
255                 0xf01b00,
256                 0xf01e00,
257                 0xf01a00,
258         };
259
260         static const struct zd_ioreq16 ioreqs3[] = {
261                 /* related to 6M band edge patching, happens unconditionally */
262                 { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 },
263         };
264
265         r = zd_iowrite16a_locked(chip, zd1211b_ioreqs_shared_1,
266                 ARRAY_SIZE(zd1211b_ioreqs_shared_1));
267         if (r)
268                 return r;
269         r = zd_iowrite16a_locked(chip, ioreqs1, ARRAY_SIZE(ioreqs1));
270         if (r)
271                 return r;
272         r = zd_rfwritev_cr_locked(chip, zd1211b_al2230_table[0], 3);
273         if (r)
274                 return r;
275         r = zd_rfwritev_cr_locked(chip, rv1, ARRAY_SIZE(rv1));
276         if (r)
277                 return r;
278         r = zd_iowrite16a_locked(chip, ioreqs2, ARRAY_SIZE(ioreqs2));
279         if (r)
280                 return r;
281         r = zd_rfwritev_cr_locked(chip, rv2, ARRAY_SIZE(rv2));
282         if (r)
283                 return r;
284         r = zd_iowrite16a_locked(chip, ioreqs3, ARRAY_SIZE(ioreqs3));
285         if (r)
286                 return r;
287         return zd1211b_al2230_finalize_rf(chip);
288 }
289
290 static int zd1211_al2230_set_channel(struct zd_rf *rf, u8 channel)
291 {
292         int r;
293         const u32 *rv = zd1211_al2230_table[channel-1];
294         struct zd_chip *chip = zd_rf_to_chip(rf);
295         static const struct zd_ioreq16 ioreqs[] = {
296                 { CR138, 0x28 },
297                 { CR203, 0x06 },
298         };
299
300         r = zd_rfwritev_locked(chip, rv, 3, RF_RV_BITS);
301         if (r)
302                 return r;
303         return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
304 }
305
306 static int zd1211b_al2230_set_channel(struct zd_rf *rf, u8 channel)
307 {
308         int r;
309         const u32 *rv = zd1211b_al2230_table[channel-1];
310         struct zd_chip *chip = zd_rf_to_chip(rf);
311
312         r = zd_iowrite16a_locked(chip, zd1211b_ioreqs_shared_1,
313                 ARRAY_SIZE(zd1211b_ioreqs_shared_1));
314         if (r)
315                 return r;
316
317         r = zd_rfwritev_cr_locked(chip, rv, 3);
318         if (r)
319                 return r;
320
321         return zd1211b_al2230_finalize_rf(chip);
322 }
323
324 static int zd1211_al2230_switch_radio_on(struct zd_rf *rf)
325 {
326         struct zd_chip *chip = zd_rf_to_chip(rf);
327         static const struct zd_ioreq16 ioreqs[] = {
328                 { CR11,  0x00 },
329                 { CR251, 0x3f },
330         };
331
332         return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
333 }
334
335 static int zd1211b_al2230_switch_radio_on(struct zd_rf *rf)
336 {
337         struct zd_chip *chip = zd_rf_to_chip(rf);
338         static const struct zd_ioreq16 ioreqs[] = {
339                 { CR11,  0x00 },
340                 { CR251, 0x7f },
341         };
342
343         return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
344 }
345
346 static int al2230_switch_radio_off(struct zd_rf *rf)
347 {
348         struct zd_chip *chip = zd_rf_to_chip(rf);
349         static const struct zd_ioreq16 ioreqs[] = {
350                 { CR11,  0x04 },
351                 { CR251, 0x2f },
352         };
353
354         return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
355 }
356
357 int zd_rf_init_al2230(struct zd_rf *rf)
358 {
359         struct zd_chip *chip = zd_rf_to_chip(rf);
360
361         rf->switch_radio_off = al2230_switch_radio_off;
362         if (chip->is_zd1211b) {
363                 rf->init_hw = zd1211b_al2230_init_hw;
364                 rf->set_channel = zd1211b_al2230_set_channel;
365                 rf->switch_radio_on = zd1211b_al2230_switch_radio_on;
366         } else {
367                 rf->init_hw = zd1211_al2230_init_hw;
368                 rf->set_channel = zd1211_al2230_set_channel;
369                 rf->switch_radio_on = zd1211_al2230_switch_radio_on;
370         }
371         rf->patch_6m_band_edge = 1;
372         return 0;
373 }