rtl8187: Fix module so that rmmod/insmod does not error
[linux-2.6.git] / drivers / net / wireless / rtl818x / rtl8187_dev.c
1 /*
2  * Linux device driver for RTL8187
3  *
4  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
6  *
7  * Based on the r8187 driver, which is:
8  * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
9  *
10  * The driver was extended to the RTL8187B in 2008 by:
11  *      Herton Ronaldo Krzesinski <herton@mandriva.com.br>
12  *      Hin-Tak Leung <htl10@users.sourceforge.net>
13  *      Larry Finger <Larry.Finger@lwfinger.net>
14  *
15  * Magic delays and register offsets below are taken from the original
16  * r8187 driver sources.  Thanks to Realtek for their support!
17  *
18  * This program is free software; you can redistribute it and/or modify
19  * it under the terms of the GNU General Public License version 2 as
20  * published by the Free Software Foundation.
21  */
22
23 #include <linux/init.h>
24 #include <linux/usb.h>
25 #include <linux/delay.h>
26 #include <linux/etherdevice.h>
27 #include <linux/eeprom_93cx6.h>
28 #include <net/mac80211.h>
29
30 #include "rtl8187.h"
31 #include "rtl8187_rtl8225.h"
32
33 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
34 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
35 MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>");
36 MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>");
37 MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
38 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
39 MODULE_LICENSE("GPL");
40
41 static struct usb_device_id rtl8187_table[] __devinitdata = {
42         /* Asus */
43         {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
44         /* Belkin */
45         {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
46         /* Realtek */
47         {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
48         {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
49         {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
50         {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
51         /* Netgear */
52         {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
53         {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
54         {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
55         /* HP */
56         {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
57         /* Sitecom */
58         {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
59         {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
60         /* Abocom */
61         {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
62         {}
63 };
64
65 MODULE_DEVICE_TABLE(usb, rtl8187_table);
66
67 static const struct ieee80211_rate rtl818x_rates[] = {
68         { .bitrate = 10, .hw_value = 0, },
69         { .bitrate = 20, .hw_value = 1, },
70         { .bitrate = 55, .hw_value = 2, },
71         { .bitrate = 110, .hw_value = 3, },
72         { .bitrate = 60, .hw_value = 4, },
73         { .bitrate = 90, .hw_value = 5, },
74         { .bitrate = 120, .hw_value = 6, },
75         { .bitrate = 180, .hw_value = 7, },
76         { .bitrate = 240, .hw_value = 8, },
77         { .bitrate = 360, .hw_value = 9, },
78         { .bitrate = 480, .hw_value = 10, },
79         { .bitrate = 540, .hw_value = 11, },
80 };
81
82 static const struct ieee80211_channel rtl818x_channels[] = {
83         { .center_freq = 2412 },
84         { .center_freq = 2417 },
85         { .center_freq = 2422 },
86         { .center_freq = 2427 },
87         { .center_freq = 2432 },
88         { .center_freq = 2437 },
89         { .center_freq = 2442 },
90         { .center_freq = 2447 },
91         { .center_freq = 2452 },
92         { .center_freq = 2457 },
93         { .center_freq = 2462 },
94         { .center_freq = 2467 },
95         { .center_freq = 2472 },
96         { .center_freq = 2484 },
97 };
98
99 static void rtl8187_iowrite_async_cb(struct urb *urb)
100 {
101         kfree(urb->context);
102 }
103
104 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
105                                   void *data, u16 len)
106 {
107         struct usb_ctrlrequest *dr;
108         struct urb *urb;
109         struct rtl8187_async_write_data {
110                 u8 data[4];
111                 struct usb_ctrlrequest dr;
112         } *buf;
113         int rc;
114
115         buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
116         if (!buf)
117                 return;
118
119         urb = usb_alloc_urb(0, GFP_ATOMIC);
120         if (!urb) {
121                 kfree(buf);
122                 return;
123         }
124
125         dr = &buf->dr;
126
127         dr->bRequestType = RTL8187_REQT_WRITE;
128         dr->bRequest = RTL8187_REQ_SET_REG;
129         dr->wValue = addr;
130         dr->wIndex = 0;
131         dr->wLength = cpu_to_le16(len);
132
133         memcpy(buf, data, len);
134
135         usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
136                              (unsigned char *)dr, buf, len,
137                              rtl8187_iowrite_async_cb, buf);
138         usb_anchor_urb(urb, &priv->anchored);
139         rc = usb_submit_urb(urb, GFP_ATOMIC);
140         if (rc < 0) {
141                 kfree(buf);
142                 usb_unanchor_urb(urb);
143         }
144         usb_free_urb(urb);
145 }
146
147 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
148                                            __le32 *addr, u32 val)
149 {
150         __le32 buf = cpu_to_le32(val);
151
152         rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
153                               &buf, sizeof(buf));
154 }
155
156 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
157 {
158         struct rtl8187_priv *priv = dev->priv;
159
160         data <<= 8;
161         data |= addr | 0x80;
162
163         rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
164         rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
165         rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
166         rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
167 }
168
169 static void rtl8187_tx_cb(struct urb *urb)
170 {
171         struct sk_buff *skb = (struct sk_buff *)urb->context;
172         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
173         struct ieee80211_hw *hw = info->rate_driver_data[0];
174         struct rtl8187_priv *priv = hw->priv;
175
176         skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
177                                           sizeof(struct rtl8187_tx_hdr));
178         ieee80211_tx_info_clear_status(info);
179
180         if (!urb->status &&
181             !(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
182             priv->is_rtl8187b) {
183                 skb_queue_tail(&priv->b_tx_status.queue, skb);
184
185                 /* queue is "full", discard last items */
186                 while (skb_queue_len(&priv->b_tx_status.queue) > 5) {
187                         struct sk_buff *old_skb;
188
189                         dev_dbg(&priv->udev->dev,
190                                 "transmit status queue full\n");
191
192                         old_skb = skb_dequeue(&priv->b_tx_status.queue);
193                         ieee80211_tx_status_irqsafe(hw, old_skb);
194                 }
195         } else {
196                 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) && !urb->status)
197                         info->flags |= IEEE80211_TX_STAT_ACK;
198                 ieee80211_tx_status_irqsafe(hw, skb);
199         }
200 }
201
202 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
203 {
204         struct rtl8187_priv *priv = dev->priv;
205         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
206         unsigned int ep;
207         void *buf;
208         struct urb *urb;
209         __le16 rts_dur = 0;
210         u32 flags;
211         int rc;
212
213         urb = usb_alloc_urb(0, GFP_ATOMIC);
214         if (!urb) {
215                 kfree_skb(skb);
216                 return NETDEV_TX_OK;
217         }
218
219         flags = skb->len;
220         flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
221
222         flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
223         if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
224                 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
225         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
226                 flags |= RTL818X_TX_DESC_FLAG_RTS;
227                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
228                 rts_dur = ieee80211_rts_duration(dev, priv->vif,
229                                                  skb->len, info);
230         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
231                 flags |= RTL818X_TX_DESC_FLAG_CTS;
232                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
233         }
234
235         if (!priv->is_rtl8187b) {
236                 struct rtl8187_tx_hdr *hdr =
237                         (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
238                 hdr->flags = cpu_to_le32(flags);
239                 hdr->len = 0;
240                 hdr->rts_duration = rts_dur;
241                 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
242                 buf = hdr;
243
244                 ep = 2;
245         } else {
246                 /* fc needs to be calculated before skb_push() */
247                 unsigned int epmap[4] = { 6, 7, 5, 4 };
248                 struct ieee80211_hdr *tx_hdr =
249                         (struct ieee80211_hdr *)(skb->data);
250                 u16 fc = le16_to_cpu(tx_hdr->frame_control);
251
252                 struct rtl8187b_tx_hdr *hdr =
253                         (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
254                 struct ieee80211_rate *txrate =
255                         ieee80211_get_tx_rate(dev, info);
256                 memset(hdr, 0, sizeof(*hdr));
257                 hdr->flags = cpu_to_le32(flags);
258                 hdr->rts_duration = rts_dur;
259                 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
260                 hdr->tx_duration =
261                         ieee80211_generic_frame_duration(dev, priv->vif,
262                                                          skb->len, txrate);
263                 buf = hdr;
264
265                 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
266                         ep = 12;
267                 else
268                         ep = epmap[skb_get_queue_mapping(skb)];
269         }
270
271         info->rate_driver_data[0] = dev;
272         info->rate_driver_data[1] = urb;
273
274         usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
275                           buf, skb->len, rtl8187_tx_cb, skb);
276         usb_anchor_urb(urb, &priv->anchored);
277         rc = usb_submit_urb(urb, GFP_ATOMIC);
278         if (rc < 0) {
279                 usb_unanchor_urb(urb);
280                 kfree_skb(skb);
281         }
282         usb_free_urb(urb);
283
284         return NETDEV_TX_OK;
285 }
286
287 static void rtl8187_rx_cb(struct urb *urb)
288 {
289         struct sk_buff *skb = (struct sk_buff *)urb->context;
290         struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
291         struct ieee80211_hw *dev = info->dev;
292         struct rtl8187_priv *priv = dev->priv;
293         struct ieee80211_rx_status rx_status = { 0 };
294         int rate, signal;
295         u32 flags;
296         u32 quality;
297         unsigned long f;
298
299         spin_lock_irqsave(&priv->rx_queue.lock, f);
300         if (skb->next)
301                 __skb_unlink(skb, &priv->rx_queue);
302         else {
303                 spin_unlock_irqrestore(&priv->rx_queue.lock, f);
304                 return;
305         }
306         spin_unlock_irqrestore(&priv->rx_queue.lock, f);
307         skb_put(skb, urb->actual_length);
308
309         if (unlikely(urb->status)) {
310                 dev_kfree_skb_irq(skb);
311                 return;
312         }
313
314         if (!priv->is_rtl8187b) {
315                 struct rtl8187_rx_hdr *hdr =
316                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
317                 flags = le32_to_cpu(hdr->flags);
318                 /* As with the RTL8187B below, the AGC is used to calculate
319                  * signal strength and quality. In this case, the scaling
320                  * constants are derived from the output of p54usb.
321                  */
322                 quality = 130 - ((41 * hdr->agc) >> 6);
323                 signal = -4 - ((27 * hdr->agc) >> 6);
324                 rx_status.antenna = (hdr->signal >> 7) & 1;
325                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
326         } else {
327                 struct rtl8187b_rx_hdr *hdr =
328                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
329                 /* The Realtek datasheet for the RTL8187B shows that the RX
330                  * header contains the following quantities: signal quality,
331                  * RSSI, AGC, the received power in dB, and the measured SNR.
332                  * In testing, none of these quantities show qualitative
333                  * agreement with AP signal strength, except for the AGC,
334                  * which is inversely proportional to the strength of the
335                  * signal. In the following, the quality and signal strength
336                  * are derived from the AGC. The arbitrary scaling constants
337                  * are chosen to make the results close to the values obtained
338                  * for a BCM4312 using b43 as the driver. The noise is ignored
339                  * for now.
340                  */
341                 flags = le32_to_cpu(hdr->flags);
342                 quality = 170 - hdr->agc;
343                 signal = 14 - hdr->agc / 2;
344                 rx_status.antenna = (hdr->rssi >> 7) & 1;
345                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
346         }
347
348         if (quality > 100)
349                 quality = 100;
350         rx_status.qual = quality;
351         priv->quality = quality;
352         rx_status.signal = signal;
353         priv->signal = signal;
354         rate = (flags >> 20) & 0xF;
355         skb_trim(skb, flags & 0x0FFF);
356         rx_status.rate_idx = rate;
357         rx_status.freq = dev->conf.channel->center_freq;
358         rx_status.band = dev->conf.channel->band;
359         rx_status.flag |= RX_FLAG_TSFT;
360         if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
361                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
362         ieee80211_rx_irqsafe(dev, skb, &rx_status);
363
364         skb = dev_alloc_skb(RTL8187_MAX_RX);
365         if (unlikely(!skb)) {
366                 /* TODO check rx queue length and refill *somewhere* */
367                 return;
368         }
369
370         info = (struct rtl8187_rx_info *)skb->cb;
371         info->urb = urb;
372         info->dev = dev;
373         urb->transfer_buffer = skb_tail_pointer(skb);
374         urb->context = skb;
375         skb_queue_tail(&priv->rx_queue, skb);
376
377         usb_anchor_urb(urb, &priv->anchored);
378         if (usb_submit_urb(urb, GFP_ATOMIC)) {
379                 usb_unanchor_urb(urb);
380                 skb_unlink(skb, &priv->rx_queue);
381                 dev_kfree_skb_irq(skb);
382         }
383 }
384
385 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
386 {
387         struct rtl8187_priv *priv = dev->priv;
388         struct urb *entry = NULL;
389         struct sk_buff *skb;
390         struct rtl8187_rx_info *info;
391         int ret = 0;
392
393         while (skb_queue_len(&priv->rx_queue) < 8) {
394                 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
395                 if (!skb) {
396                         ret = -ENOMEM;
397                         goto err;
398                 }
399                 entry = usb_alloc_urb(0, GFP_KERNEL);
400                 if (!entry) {
401                         ret = -ENOMEM;
402                         goto err;
403                 }
404                 usb_fill_bulk_urb(entry, priv->udev,
405                                   usb_rcvbulkpipe(priv->udev,
406                                   priv->is_rtl8187b ? 3 : 1),
407                                   skb_tail_pointer(skb),
408                                   RTL8187_MAX_RX, rtl8187_rx_cb, skb);
409                 info = (struct rtl8187_rx_info *)skb->cb;
410                 info->urb = entry;
411                 info->dev = dev;
412                 skb_queue_tail(&priv->rx_queue, skb);
413                 usb_anchor_urb(entry, &priv->anchored);
414                 ret = usb_submit_urb(entry, GFP_KERNEL);
415                 if (ret) {
416                         skb_unlink(skb, &priv->rx_queue);
417                         usb_unanchor_urb(entry);
418                         goto err;
419                 }
420                 usb_free_urb(entry);
421         }
422         return ret;
423
424 err:
425         usb_free_urb(entry);
426         kfree_skb(skb);
427         usb_kill_anchored_urbs(&priv->anchored);
428         return ret;
429 }
430
431 static void rtl8187b_status_cb(struct urb *urb)
432 {
433         struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context;
434         struct rtl8187_priv *priv = hw->priv;
435         u64 val;
436         unsigned int cmd_type;
437
438         if (unlikely(urb->status))
439                 return;
440
441         /*
442          * Read from status buffer:
443          *
444          * bits [30:31] = cmd type:
445          * - 0 indicates tx beacon interrupt
446          * - 1 indicates tx close descriptor
447          *
448          * In the case of tx beacon interrupt:
449          * [0:9] = Last Beacon CW
450          * [10:29] = reserved
451          * [30:31] = 00b
452          * [32:63] = Last Beacon TSF
453          *
454          * If it's tx close descriptor:
455          * [0:7] = Packet Retry Count
456          * [8:14] = RTS Retry Count
457          * [15] = TOK
458          * [16:27] = Sequence No
459          * [28] = LS
460          * [29] = FS
461          * [30:31] = 01b
462          * [32:47] = unused (reserved?)
463          * [48:63] = MAC Used Time
464          */
465         val = le64_to_cpu(priv->b_tx_status.buf);
466
467         cmd_type = (val >> 30) & 0x3;
468         if (cmd_type == 1) {
469                 unsigned int pkt_rc, seq_no;
470                 bool tok;
471                 struct sk_buff *skb;
472                 struct ieee80211_hdr *ieee80211hdr;
473                 unsigned long flags;
474
475                 pkt_rc = val & 0xFF;
476                 tok = val & (1 << 15);
477                 seq_no = (val >> 16) & 0xFFF;
478
479                 spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags);
480                 skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) {
481                         ieee80211hdr = (struct ieee80211_hdr *)skb->data;
482
483                         /*
484                          * While testing, it was discovered that the seq_no
485                          * doesn't actually contains the sequence number.
486                          * Instead of returning just the 12 bits of sequence
487                          * number, hardware is returning entire sequence control
488                          * (fragment number plus sequence number) in a 12 bit
489                          * only field overflowing after some time. As a
490                          * workaround, just consider the lower bits, and expect
491                          * it's unlikely we wrongly ack some sent data
492                          */
493                         if ((le16_to_cpu(ieee80211hdr->seq_ctrl)
494                             & 0xFFF) == seq_no)
495                                 break;
496                 }
497                 if (skb != (struct sk_buff *) &priv->b_tx_status.queue) {
498                         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
499
500                         __skb_unlink(skb, &priv->b_tx_status.queue);
501                         if (tok)
502                                 info->flags |= IEEE80211_TX_STAT_ACK;
503                         info->status.rates[0].count = pkt_rc + 1;
504
505                         ieee80211_tx_status_irqsafe(hw, skb);
506                 }
507                 spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags);
508         }
509
510         usb_anchor_urb(urb, &priv->anchored);
511         if (usb_submit_urb(urb, GFP_ATOMIC))
512                 usb_unanchor_urb(urb);
513 }
514
515 static int rtl8187b_init_status_urb(struct ieee80211_hw *dev)
516 {
517         struct rtl8187_priv *priv = dev->priv;
518         struct urb *entry;
519         int ret = 0;
520
521         entry = usb_alloc_urb(0, GFP_KERNEL);
522         if (!entry)
523                 return -ENOMEM;
524
525         usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9),
526                           &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf),
527                           rtl8187b_status_cb, dev);
528
529         usb_anchor_urb(entry, &priv->anchored);
530         ret = usb_submit_urb(entry, GFP_KERNEL);
531         if (ret)
532                 usb_unanchor_urb(entry);
533         usb_free_urb(entry);
534
535         return ret;
536 }
537
538 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
539 {
540         struct rtl8187_priv *priv = dev->priv;
541         u8 reg;
542         int i;
543
544         reg = rtl818x_ioread8(priv, &priv->map->CMD);
545         reg &= (1 << 1);
546         reg |= RTL818X_CMD_RESET;
547         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
548
549         i = 10;
550         do {
551                 msleep(2);
552                 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
553                       RTL818X_CMD_RESET))
554                         break;
555         } while (--i);
556
557         if (!i) {
558                 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
559                 return -ETIMEDOUT;
560         }
561
562         /* reload registers from eeprom */
563         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
564
565         i = 10;
566         do {
567                 msleep(4);
568                 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
569                       RTL818X_EEPROM_CMD_CONFIG))
570                         break;
571         } while (--i);
572
573         if (!i) {
574                 printk(KERN_ERR "%s: eeprom reset timeout!\n",
575                        wiphy_name(dev->wiphy));
576                 return -ETIMEDOUT;
577         }
578
579         return 0;
580 }
581
582 static int rtl8187_init_hw(struct ieee80211_hw *dev)
583 {
584         struct rtl8187_priv *priv = dev->priv;
585         u8 reg;
586         int res;
587
588         /* reset */
589         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
590                          RTL818X_EEPROM_CMD_CONFIG);
591         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
592         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
593                          RTL818X_CONFIG3_ANAPARAM_WRITE);
594         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
595                           RTL8187_RTL8225_ANAPARAM_ON);
596         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
597                           RTL8187_RTL8225_ANAPARAM2_ON);
598         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
599                          ~RTL818X_CONFIG3_ANAPARAM_WRITE);
600         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
601                          RTL818X_EEPROM_CMD_NORMAL);
602
603         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
604
605         msleep(200);
606         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
607         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
608         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
609         msleep(200);
610
611         res = rtl8187_cmd_reset(dev);
612         if (res)
613                 return res;
614
615         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
616         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
617         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
618                         reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
619         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
620                           RTL8187_RTL8225_ANAPARAM_ON);
621         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
622                           RTL8187_RTL8225_ANAPARAM2_ON);
623         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
624                         reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
625         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
626
627         /* setup card */
628         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
629         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
630
631         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
632         rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
633         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
634
635         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
636
637         rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
638         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
639         reg &= 0x3F;
640         reg |= 0x80;
641         rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
642
643         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
644
645         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
646         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
647         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
648
649         // TODO: set RESP_RATE and BRSR properly
650         rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
651         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
652
653         /* host_usb_init */
654         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
655         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
656         reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
657         rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
658         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
659         rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
660         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
661         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
662         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
663         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
664         msleep(100);
665
666         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
667         rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
668         rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
669         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
670                          RTL818X_EEPROM_CMD_CONFIG);
671         rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
672         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
673                          RTL818X_EEPROM_CMD_NORMAL);
674         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
675         msleep(100);
676
677         priv->rf->init(dev);
678
679         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
680         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
681         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
682         rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
683         rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
684         rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
685         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
686
687         return 0;
688 }
689
690 static const u8 rtl8187b_reg_table[][3] = {
691         {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
692         {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
693         {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
694         {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
695
696         {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
697         {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
698         {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
699         {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
700         {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
701         {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
702
703         {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
704         {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
705         {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
706         {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
707         {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
708         {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
709         {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
710         {0x73, 0x9A, 2},
711
712         {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
713         {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
714         {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
715         {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
716         {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x91, 0x03, 0},
717
718         {0x4C, 0x00, 2}, {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0},
719         {0x8E, 0x08, 0}, {0x8F, 0x00, 0}
720 };
721
722 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
723 {
724         struct rtl8187_priv *priv = dev->priv;
725         int res, i;
726         u8 reg;
727
728         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
729                          RTL818X_EEPROM_CMD_CONFIG);
730
731         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
732         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT;
733         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
734         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
735                           RTL8187B_RTL8225_ANAPARAM2_ON);
736         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
737                           RTL8187B_RTL8225_ANAPARAM_ON);
738         rtl818x_iowrite8(priv, &priv->map->ANAPARAM3,
739                          RTL8187B_RTL8225_ANAPARAM3_ON);
740
741         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
742         reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
743         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
744         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
745
746         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
747         reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
748         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
749
750         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
751                          RTL818X_EEPROM_CMD_NORMAL);
752
753         res = rtl8187_cmd_reset(dev);
754         if (res)
755                 return res;
756
757         rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF);
758         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
759         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
760         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
761         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
762         reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT |
763                RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
764         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
765
766         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
767         reg = rtl818x_ioread8(priv, &priv->map->RATE_FALLBACK);
768         reg |= RTL818X_RATE_FALLBACK_ENABLE;
769         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, reg);
770
771         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
772         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
773         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
774
775         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
776                          RTL818X_EEPROM_CMD_CONFIG);
777         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
778         rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
779         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
780                          RTL818X_EEPROM_CMD_NORMAL);
781
782         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
783         for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
784                 rtl818x_iowrite8_idx(priv,
785                                      (u8 *)(uintptr_t)
786                                      (rtl8187b_reg_table[i][0] | 0xFF00),
787                                      rtl8187b_reg_table[i][1],
788                                      rtl8187b_reg_table[i][2]);
789         }
790
791         rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
792         rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
793
794         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
795         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
796         rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
797
798         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
799
800         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
801
802         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
803                          RTL818X_EEPROM_CMD_CONFIG);
804         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
805         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
806         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
807         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
808                          RTL818X_EEPROM_CMD_NORMAL);
809
810         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
811         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
812         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
813         msleep(100);
814
815         priv->rf->init(dev);
816
817         reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
818         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
819         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
820
821         rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
822         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
823         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
824         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
825         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
826         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
827         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
828
829         reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
830         rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
831         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
832         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
833         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
834         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
835         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
836         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
837         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
838         rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
839         rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
840         rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
841         rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
842
843         rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
844
845         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
846
847         priv->slot_time = 0x9;
848         priv->aifsn[0] = 2; /* AIFSN[AC_VO] */
849         priv->aifsn[1] = 2; /* AIFSN[AC_VI] */
850         priv->aifsn[2] = 7; /* AIFSN[AC_BK] */
851         priv->aifsn[3] = 3; /* AIFSN[AC_BE] */
852         rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0);
853
854         return 0;
855 }
856
857 static int rtl8187_start(struct ieee80211_hw *dev)
858 {
859         struct rtl8187_priv *priv = dev->priv;
860         u32 reg;
861         int ret;
862
863         ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
864                                      rtl8187b_init_hw(dev);
865         if (ret)
866                 return ret;
867
868         mutex_lock(&priv->conf_mutex);
869
870         init_usb_anchor(&priv->anchored);
871
872         if (priv->is_rtl8187b) {
873                 reg = RTL818X_RX_CONF_MGMT |
874                       RTL818X_RX_CONF_DATA |
875                       RTL818X_RX_CONF_BROADCAST |
876                       RTL818X_RX_CONF_NICMAC |
877                       RTL818X_RX_CONF_BSSID |
878                       (7 << 13 /* RX FIFO threshold NONE */) |
879                       (7 << 10 /* MAX RX DMA */) |
880                       RTL818X_RX_CONF_RX_AUTORESETPHY |
881                       RTL818X_RX_CONF_ONLYERLPKT |
882                       RTL818X_RX_CONF_MULTICAST;
883                 priv->rx_conf = reg;
884                 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
885
886                 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
887                                   RTL818X_TX_CONF_HW_SEQNUM |
888                                   RTL818X_TX_CONF_DISREQQSIZE |
889                                   (7 << 8  /* short retry limit */) |
890                                   (7 << 0  /* long retry limit */) |
891                                   (7 << 21 /* MAX TX DMA */));
892                 rtl8187_init_urbs(dev);
893                 rtl8187b_init_status_urb(dev);
894                 mutex_unlock(&priv->conf_mutex);
895                 return 0;
896         }
897
898         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
899
900         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
901         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
902
903         rtl8187_init_urbs(dev);
904
905         reg = RTL818X_RX_CONF_ONLYERLPKT |
906               RTL818X_RX_CONF_RX_AUTORESETPHY |
907               RTL818X_RX_CONF_BSSID |
908               RTL818X_RX_CONF_MGMT |
909               RTL818X_RX_CONF_DATA |
910               (7 << 13 /* RX FIFO threshold NONE */) |
911               (7 << 10 /* MAX RX DMA */) |
912               RTL818X_RX_CONF_BROADCAST |
913               RTL818X_RX_CONF_NICMAC;
914
915         priv->rx_conf = reg;
916         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
917
918         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
919         reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
920         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
921         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
922
923         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
924         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
925         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
926         reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
927         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
928
929         reg  = RTL818X_TX_CONF_CW_MIN |
930                (7 << 21 /* MAX TX DMA */) |
931                RTL818X_TX_CONF_NO_ICV;
932         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
933
934         reg = rtl818x_ioread8(priv, &priv->map->CMD);
935         reg |= RTL818X_CMD_TX_ENABLE;
936         reg |= RTL818X_CMD_RX_ENABLE;
937         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
938         mutex_unlock(&priv->conf_mutex);
939
940         return 0;
941 }
942
943 static void rtl8187_stop(struct ieee80211_hw *dev)
944 {
945         struct rtl8187_priv *priv = dev->priv;
946         struct sk_buff *skb;
947         u32 reg;
948
949         mutex_lock(&priv->conf_mutex);
950         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
951
952         reg = rtl818x_ioread8(priv, &priv->map->CMD);
953         reg &= ~RTL818X_CMD_TX_ENABLE;
954         reg &= ~RTL818X_CMD_RX_ENABLE;
955         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
956
957         priv->rf->stop(dev);
958
959         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
960         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
961         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
962         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
963
964         while ((skb = skb_dequeue(&priv->b_tx_status.queue)))
965                 dev_kfree_skb_any(skb);
966
967         usb_kill_anchored_urbs(&priv->anchored);
968         mutex_unlock(&priv->conf_mutex);
969 }
970
971 static int rtl8187_add_interface(struct ieee80211_hw *dev,
972                                  struct ieee80211_if_init_conf *conf)
973 {
974         struct rtl8187_priv *priv = dev->priv;
975         int i;
976
977         if (priv->mode != NL80211_IFTYPE_MONITOR)
978                 return -EOPNOTSUPP;
979
980         switch (conf->type) {
981         case NL80211_IFTYPE_STATION:
982                 priv->mode = conf->type;
983                 break;
984         default:
985                 return -EOPNOTSUPP;
986         }
987
988         mutex_lock(&priv->conf_mutex);
989         priv->vif = conf->vif;
990
991         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
992         for (i = 0; i < ETH_ALEN; i++)
993                 rtl818x_iowrite8(priv, &priv->map->MAC[i],
994                                  ((u8 *)conf->mac_addr)[i]);
995         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
996
997         mutex_unlock(&priv->conf_mutex);
998         return 0;
999 }
1000
1001 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
1002                                      struct ieee80211_if_init_conf *conf)
1003 {
1004         struct rtl8187_priv *priv = dev->priv;
1005         mutex_lock(&priv->conf_mutex);
1006         priv->mode = NL80211_IFTYPE_MONITOR;
1007         priv->vif = NULL;
1008         mutex_unlock(&priv->conf_mutex);
1009 }
1010
1011 static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
1012 {
1013         struct rtl8187_priv *priv = dev->priv;
1014         struct ieee80211_conf *conf = &dev->conf;
1015         u32 reg;
1016
1017         mutex_lock(&priv->conf_mutex);
1018         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1019         /* Enable TX loopback on MAC level to avoid TX during channel
1020          * changes, as this has be seen to causes problems and the
1021          * card will stop work until next reset
1022          */
1023         rtl818x_iowrite32(priv, &priv->map->TX_CONF,
1024                           reg | RTL818X_TX_CONF_LOOPBACK_MAC);
1025         priv->rf->set_chan(dev, conf);
1026         msleep(10);
1027         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1028
1029         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
1030         rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
1031         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
1032         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
1033         mutex_unlock(&priv->conf_mutex);
1034         return 0;
1035 }
1036
1037 static int rtl8187_config_interface(struct ieee80211_hw *dev,
1038                                     struct ieee80211_vif *vif,
1039                                     struct ieee80211_if_conf *conf)
1040 {
1041         struct rtl8187_priv *priv = dev->priv;
1042         int i;
1043         u8 reg;
1044
1045         mutex_lock(&priv->conf_mutex);
1046         for (i = 0; i < ETH_ALEN; i++)
1047                 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
1048
1049         if (is_valid_ether_addr(conf->bssid)) {
1050                 reg = RTL818X_MSR_INFRA;
1051                 if (priv->is_rtl8187b)
1052                         reg |= RTL818X_MSR_ENEDCA;
1053                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1054         } else {
1055                 reg = RTL818X_MSR_NO_LINK;
1056                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1057         }
1058
1059         mutex_unlock(&priv->conf_mutex);
1060         return 0;
1061 }
1062
1063 /*
1064  * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for
1065  * example. Thus we have to use raw values for AC_*_PARAM register addresses.
1066  */
1067 static __le32 *rtl8187b_ac_addr[4] = {
1068         (__le32 *) 0xFFF0, /* AC_VO */
1069         (__le32 *) 0xFFF4, /* AC_VI */
1070         (__le32 *) 0xFFFC, /* AC_BK */
1071         (__le32 *) 0xFFF8, /* AC_BE */
1072 };
1073
1074 #define SIFS_TIME 0xa
1075
1076 static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
1077                              bool use_short_preamble)
1078 {
1079         if (priv->is_rtl8187b) {
1080                 u8 difs, eifs;
1081                 u16 ack_timeout;
1082                 int queue;
1083
1084                 if (use_short_slot) {
1085                         priv->slot_time = 0x9;
1086                         difs = 0x1c;
1087                         eifs = 0x53;
1088                 } else {
1089                         priv->slot_time = 0x14;
1090                         difs = 0x32;
1091                         eifs = 0x5b;
1092                 }
1093                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1094                 rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
1095                 rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
1096
1097                 /*
1098                  * BRSR+1 on 8187B is in fact EIFS register
1099                  * Value in units of 4 us
1100                  */
1101                 rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
1102
1103                 /*
1104                  * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
1105                  * register. In units of 4 us like eifs register
1106                  * ack_timeout = ack duration + plcp + difs + preamble
1107                  */
1108                 ack_timeout = 112 + 48 + difs;
1109                 if (use_short_preamble)
1110                         ack_timeout += 72;
1111                 else
1112                         ack_timeout += 144;
1113                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
1114                                  DIV_ROUND_UP(ack_timeout, 4));
1115
1116                 for (queue = 0; queue < 4; queue++)
1117                         rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue],
1118                                          priv->aifsn[queue] * priv->slot_time +
1119                                          SIFS_TIME);
1120         } else {
1121                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1122                 if (use_short_slot) {
1123                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
1124                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
1125                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
1126                 } else {
1127                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
1128                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
1129                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
1130                 }
1131         }
1132 }
1133
1134 static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
1135                                      struct ieee80211_vif *vif,
1136                                      struct ieee80211_bss_conf *info,
1137                                      u32 changed)
1138 {
1139         struct rtl8187_priv *priv = dev->priv;
1140
1141         if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
1142                 rtl8187_conf_erp(priv, info->use_short_slot,
1143                                  info->use_short_preamble);
1144 }
1145
1146 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
1147                                      unsigned int changed_flags,
1148                                      unsigned int *total_flags,
1149                                      int mc_count, struct dev_addr_list *mclist)
1150 {
1151         struct rtl8187_priv *priv = dev->priv;
1152
1153         if (changed_flags & FIF_FCSFAIL)
1154                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
1155         if (changed_flags & FIF_CONTROL)
1156                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
1157         if (changed_flags & FIF_OTHER_BSS)
1158                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
1159         if (*total_flags & FIF_ALLMULTI || mc_count > 0)
1160                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
1161         else
1162                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
1163
1164         *total_flags = 0;
1165
1166         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
1167                 *total_flags |= FIF_FCSFAIL;
1168         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
1169                 *total_flags |= FIF_CONTROL;
1170         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
1171                 *total_flags |= FIF_OTHER_BSS;
1172         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
1173                 *total_flags |= FIF_ALLMULTI;
1174
1175         rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1176 }
1177
1178 static int rtl8187_conf_tx(struct ieee80211_hw *dev, u16 queue,
1179                            const struct ieee80211_tx_queue_params *params)
1180 {
1181         struct rtl8187_priv *priv = dev->priv;
1182         u8 cw_min, cw_max;
1183
1184         if (queue > 3)
1185                 return -EINVAL;
1186
1187         cw_min = fls(params->cw_min);
1188         cw_max = fls(params->cw_max);
1189
1190         if (priv->is_rtl8187b) {
1191                 priv->aifsn[queue] = params->aifs;
1192
1193                 /*
1194                  * This is the structure of AC_*_PARAM registers in 8187B:
1195                  * - TXOP limit field, bit offset = 16
1196                  * - ECWmax, bit offset = 12
1197                  * - ECWmin, bit offset = 8
1198                  * - AIFS, bit offset = 0
1199                  */
1200                 rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue],
1201                                   (params->txop << 16) | (cw_max << 12) |
1202                                   (cw_min << 8) | (params->aifs *
1203                                   priv->slot_time + SIFS_TIME));
1204         } else {
1205                 if (queue != 0)
1206                         return -EINVAL;
1207
1208                 rtl818x_iowrite8(priv, &priv->map->CW_VAL,
1209                                  cw_min | (cw_max << 4));
1210         }
1211         return 0;
1212 }
1213
1214 static const struct ieee80211_ops rtl8187_ops = {
1215         .tx                     = rtl8187_tx,
1216         .start                  = rtl8187_start,
1217         .stop                   = rtl8187_stop,
1218         .add_interface          = rtl8187_add_interface,
1219         .remove_interface       = rtl8187_remove_interface,
1220         .config                 = rtl8187_config,
1221         .config_interface       = rtl8187_config_interface,
1222         .bss_info_changed       = rtl8187_bss_info_changed,
1223         .configure_filter       = rtl8187_configure_filter,
1224         .conf_tx                = rtl8187_conf_tx
1225 };
1226
1227 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
1228 {
1229         struct ieee80211_hw *dev = eeprom->data;
1230         struct rtl8187_priv *priv = dev->priv;
1231         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1232
1233         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
1234         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
1235         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
1236         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
1237 }
1238
1239 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
1240 {
1241         struct ieee80211_hw *dev = eeprom->data;
1242         struct rtl8187_priv *priv = dev->priv;
1243         u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1244
1245         if (eeprom->reg_data_in)
1246                 reg |= RTL818X_EEPROM_CMD_WRITE;
1247         if (eeprom->reg_data_out)
1248                 reg |= RTL818X_EEPROM_CMD_READ;
1249         if (eeprom->reg_data_clock)
1250                 reg |= RTL818X_EEPROM_CMD_CK;
1251         if (eeprom->reg_chip_select)
1252                 reg |= RTL818X_EEPROM_CMD_CS;
1253
1254         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1255         udelay(10);
1256 }
1257
1258 static int __devinit rtl8187_probe(struct usb_interface *intf,
1259                                    const struct usb_device_id *id)
1260 {
1261         struct usb_device *udev = interface_to_usbdev(intf);
1262         struct ieee80211_hw *dev;
1263         struct rtl8187_priv *priv;
1264         struct eeprom_93cx6 eeprom;
1265         struct ieee80211_channel *channel;
1266         const char *chip_name;
1267         u16 txpwr, reg;
1268         int err, i;
1269
1270         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1271         if (!dev) {
1272                 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1273                 return -ENOMEM;
1274         }
1275
1276         priv = dev->priv;
1277         priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1278
1279         SET_IEEE80211_DEV(dev, &intf->dev);
1280         usb_set_intfdata(intf, dev);
1281         priv->udev = udev;
1282
1283         usb_get_dev(udev);
1284
1285         skb_queue_head_init(&priv->rx_queue);
1286
1287         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1288         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1289
1290         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1291         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1292         priv->map = (struct rtl818x_csr *)0xFF00;
1293
1294         priv->band.band = IEEE80211_BAND_2GHZ;
1295         priv->band.channels = priv->channels;
1296         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1297         priv->band.bitrates = priv->rates;
1298         priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1299         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1300
1301
1302         priv->mode = NL80211_IFTYPE_MONITOR;
1303         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1304                      IEEE80211_HW_SIGNAL_DBM |
1305                      IEEE80211_HW_RX_INCLUDES_FCS;
1306
1307         eeprom.data = dev;
1308         eeprom.register_read = rtl8187_eeprom_register_read;
1309         eeprom.register_write = rtl8187_eeprom_register_write;
1310         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1311                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1312         else
1313                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1314
1315         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1316         udelay(10);
1317
1318         eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1319                                (__le16 __force *)dev->wiphy->perm_addr, 3);
1320         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
1321                 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1322                        "generated MAC address\n");
1323                 random_ether_addr(dev->wiphy->perm_addr);
1324         }
1325
1326         channel = priv->channels;
1327         for (i = 0; i < 3; i++) {
1328                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1329                                   &txpwr);
1330                 (*channel++).hw_value = txpwr & 0xFF;
1331                 (*channel++).hw_value = txpwr >> 8;
1332         }
1333         for (i = 0; i < 2; i++) {
1334                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1335                                   &txpwr);
1336                 (*channel++).hw_value = txpwr & 0xFF;
1337                 (*channel++).hw_value = txpwr >> 8;
1338         }
1339
1340         eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1341                           &priv->txpwr_base);
1342
1343         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1344         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1345         /* 0 means asic B-cut, we should use SW 3 wire
1346          * bit-by-bit banging for radio. 1 means we can use
1347          * USB specific request to write radio registers */
1348         priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1349         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1350         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1351
1352         if (!priv->is_rtl8187b) {
1353                 u32 reg32;
1354                 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1355                 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1356                 switch (reg32) {
1357                 case RTL818X_TX_CONF_R8187vD_B:
1358                         /* Some RTL8187B devices have a USB ID of 0x8187
1359                          * detect them here */
1360                         chip_name = "RTL8187BvB(early)";
1361                         priv->is_rtl8187b = 1;
1362                         priv->hw_rev = RTL8187BvB;
1363                         break;
1364                 case RTL818X_TX_CONF_R8187vD:
1365                         chip_name = "RTL8187vD";
1366                         break;
1367                 default:
1368                         chip_name = "RTL8187vB (default)";
1369                 }
1370        } else {
1371                 /*
1372                  * Force USB request to write radio registers for 8187B, Realtek
1373                  * only uses it in their sources
1374                  */
1375                 /*if (priv->asic_rev == 0) {
1376                         printk(KERN_WARNING "rtl8187: Forcing use of USB "
1377                                "requests to write to radio registers\n");
1378                         priv->asic_rev = 1;
1379                 }*/
1380                 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1381                 case RTL818X_R8187B_B:
1382                         chip_name = "RTL8187BvB";
1383                         priv->hw_rev = RTL8187BvB;
1384                         break;
1385                 case RTL818X_R8187B_D:
1386                         chip_name = "RTL8187BvD";
1387                         priv->hw_rev = RTL8187BvD;
1388                         break;
1389                 case RTL818X_R8187B_E:
1390                         chip_name = "RTL8187BvE";
1391                         priv->hw_rev = RTL8187BvE;
1392                         break;
1393                 default:
1394                         chip_name = "RTL8187BvB (default)";
1395                         priv->hw_rev = RTL8187BvB;
1396                 }
1397         }
1398
1399         if (!priv->is_rtl8187b) {
1400                 for (i = 0; i < 2; i++) {
1401                         eeprom_93cx6_read(&eeprom,
1402                                           RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1403                                           &txpwr);
1404                         (*channel++).hw_value = txpwr & 0xFF;
1405                         (*channel++).hw_value = txpwr >> 8;
1406                 }
1407         } else {
1408                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1409                                   &txpwr);
1410                 (*channel++).hw_value = txpwr & 0xFF;
1411
1412                 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1413                 (*channel++).hw_value = txpwr & 0xFF;
1414
1415                 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1416                 (*channel++).hw_value = txpwr & 0xFF;
1417                 (*channel++).hw_value = txpwr >> 8;
1418         }
1419
1420         if (priv->is_rtl8187b)
1421                 printk(KERN_WARNING "rtl8187: 8187B chip detected.\n");
1422
1423         /*
1424          * XXX: Once this driver supports anything that requires
1425          *      beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ.
1426          */
1427         dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1428
1429         if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1430                 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1431                        " info!\n");
1432
1433         priv->rf = rtl8187_detect_rf(dev);
1434         dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1435                                   sizeof(struct rtl8187_tx_hdr) :
1436                                   sizeof(struct rtl8187b_tx_hdr);
1437         if (!priv->is_rtl8187b)
1438                 dev->queues = 1;
1439         else
1440                 dev->queues = 4;
1441
1442         err = ieee80211_register_hw(dev);
1443         if (err) {
1444                 printk(KERN_ERR "rtl8187: Cannot register device\n");
1445                 goto err_free_dev;
1446         }
1447         mutex_init(&priv->conf_mutex);
1448         skb_queue_head_init(&priv->b_tx_status.queue);
1449
1450         printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s\n",
1451                wiphy_name(dev->wiphy), dev->wiphy->perm_addr,
1452                chip_name, priv->asic_rev, priv->rf->name);
1453
1454         return 0;
1455
1456  err_free_dev:
1457         ieee80211_free_hw(dev);
1458         usb_set_intfdata(intf, NULL);
1459         usb_put_dev(udev);
1460         return err;
1461 }
1462
1463 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1464 {
1465         struct ieee80211_hw *dev = usb_get_intfdata(intf);
1466         struct rtl8187_priv *priv;
1467
1468         if (!dev)
1469                 return;
1470
1471         ieee80211_unregister_hw(dev);
1472
1473         priv = dev->priv;
1474         usb_reset_device(priv->udev);
1475         usb_put_dev(interface_to_usbdev(intf));
1476         ieee80211_free_hw(dev);
1477 }
1478
1479 static struct usb_driver rtl8187_driver = {
1480         .name           = KBUILD_MODNAME,
1481         .id_table       = rtl8187_table,
1482         .probe          = rtl8187_probe,
1483         .disconnect     = __devexit_p(rtl8187_disconnect),
1484 };
1485
1486 static int __init rtl8187_init(void)
1487 {
1488         return usb_register(&rtl8187_driver);
1489 }
1490
1491 static void __exit rtl8187_exit(void)
1492 {
1493         usb_deregister(&rtl8187_driver);
1494 }
1495
1496 module_init(rtl8187_init);
1497 module_exit(rtl8187_exit);