rtl8187: Add callback for get_tsf
[linux-2.6.git] / drivers / net / wireless / rtl818x / rtl8187_dev.c
1 /*
2  * Linux device driver for RTL8187
3  *
4  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
6  *
7  * Based on the r8187 driver, which is:
8  * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
9  *
10  * The driver was extended to the RTL8187B in 2008 by:
11  *      Herton Ronaldo Krzesinski <herton@mandriva.com.br>
12  *      Hin-Tak Leung <htl10@users.sourceforge.net>
13  *      Larry Finger <Larry.Finger@lwfinger.net>
14  *
15  * Magic delays and register offsets below are taken from the original
16  * r8187 driver sources.  Thanks to Realtek for their support!
17  *
18  * This program is free software; you can redistribute it and/or modify
19  * it under the terms of the GNU General Public License version 2 as
20  * published by the Free Software Foundation.
21  */
22
23 #include <linux/init.h>
24 #include <linux/usb.h>
25 #include <linux/delay.h>
26 #include <linux/etherdevice.h>
27 #include <linux/eeprom_93cx6.h>
28 #include <net/mac80211.h>
29
30 #include "rtl8187.h"
31 #include "rtl8187_rtl8225.h"
32 #ifdef CONFIG_RTL8187_LEDS
33 #include "rtl8187_leds.h"
34 #endif
35 #include "rtl8187_rfkill.h"
36
37 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
38 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
39 MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>");
40 MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>");
41 MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
42 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
43 MODULE_LICENSE("GPL");
44
45 static struct usb_device_id rtl8187_table[] __devinitdata = {
46         /* Asus */
47         {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
48         /* Belkin */
49         {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
50         /* Realtek */
51         {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
52         {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
53         {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
54         {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
55         /* Surecom */
56         {USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187},
57         /* Logitech */
58         {USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187},
59         /* Netgear */
60         {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
61         {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
62         {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
63         /* HP */
64         {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
65         /* Sitecom */
66         {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
67         {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
68         /* Sphairon Access Systems GmbH */
69         {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187},
70         /* Dick Smith Electronics */
71         {USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187},
72         /* Abocom */
73         {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
74         /* Qcom */
75         {USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187},
76         /* AirLive */
77         {USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187},
78         /* Linksys */
79         {USB_DEVICE(0x1737, 0x0073), .driver_info = DEVICE_RTL8187B},
80         {}
81 };
82
83 MODULE_DEVICE_TABLE(usb, rtl8187_table);
84
85 static const struct ieee80211_rate rtl818x_rates[] = {
86         { .bitrate = 10, .hw_value = 0, },
87         { .bitrate = 20, .hw_value = 1, },
88         { .bitrate = 55, .hw_value = 2, },
89         { .bitrate = 110, .hw_value = 3, },
90         { .bitrate = 60, .hw_value = 4, },
91         { .bitrate = 90, .hw_value = 5, },
92         { .bitrate = 120, .hw_value = 6, },
93         { .bitrate = 180, .hw_value = 7, },
94         { .bitrate = 240, .hw_value = 8, },
95         { .bitrate = 360, .hw_value = 9, },
96         { .bitrate = 480, .hw_value = 10, },
97         { .bitrate = 540, .hw_value = 11, },
98 };
99
100 static const struct ieee80211_channel rtl818x_channels[] = {
101         { .center_freq = 2412 },
102         { .center_freq = 2417 },
103         { .center_freq = 2422 },
104         { .center_freq = 2427 },
105         { .center_freq = 2432 },
106         { .center_freq = 2437 },
107         { .center_freq = 2442 },
108         { .center_freq = 2447 },
109         { .center_freq = 2452 },
110         { .center_freq = 2457 },
111         { .center_freq = 2462 },
112         { .center_freq = 2467 },
113         { .center_freq = 2472 },
114         { .center_freq = 2484 },
115 };
116
117 static void rtl8187_iowrite_async_cb(struct urb *urb)
118 {
119         kfree(urb->context);
120 }
121
122 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
123                                   void *data, u16 len)
124 {
125         struct usb_ctrlrequest *dr;
126         struct urb *urb;
127         struct rtl8187_async_write_data {
128                 u8 data[4];
129                 struct usb_ctrlrequest dr;
130         } *buf;
131         int rc;
132
133         buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
134         if (!buf)
135                 return;
136
137         urb = usb_alloc_urb(0, GFP_ATOMIC);
138         if (!urb) {
139                 kfree(buf);
140                 return;
141         }
142
143         dr = &buf->dr;
144
145         dr->bRequestType = RTL8187_REQT_WRITE;
146         dr->bRequest = RTL8187_REQ_SET_REG;
147         dr->wValue = addr;
148         dr->wIndex = 0;
149         dr->wLength = cpu_to_le16(len);
150
151         memcpy(buf, data, len);
152
153         usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
154                              (unsigned char *)dr, buf, len,
155                              rtl8187_iowrite_async_cb, buf);
156         usb_anchor_urb(urb, &priv->anchored);
157         rc = usb_submit_urb(urb, GFP_ATOMIC);
158         if (rc < 0) {
159                 kfree(buf);
160                 usb_unanchor_urb(urb);
161         }
162         usb_free_urb(urb);
163 }
164
165 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
166                                            __le32 *addr, u32 val)
167 {
168         __le32 buf = cpu_to_le32(val);
169
170         rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
171                               &buf, sizeof(buf));
172 }
173
174 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
175 {
176         struct rtl8187_priv *priv = dev->priv;
177
178         data <<= 8;
179         data |= addr | 0x80;
180
181         rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
182         rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
183         rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
184         rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
185 }
186
187 static void rtl8187_tx_cb(struct urb *urb)
188 {
189         struct sk_buff *skb = (struct sk_buff *)urb->context;
190         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
191         struct ieee80211_hw *hw = info->rate_driver_data[0];
192         struct rtl8187_priv *priv = hw->priv;
193
194         skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
195                                           sizeof(struct rtl8187_tx_hdr));
196         ieee80211_tx_info_clear_status(info);
197
198         if (!(urb->status) && !(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
199                 if (priv->is_rtl8187b) {
200                         skb_queue_tail(&priv->b_tx_status.queue, skb);
201
202                         /* queue is "full", discard last items */
203                         while (skb_queue_len(&priv->b_tx_status.queue) > 5) {
204                                 struct sk_buff *old_skb;
205
206                                 dev_dbg(&priv->udev->dev,
207                                         "transmit status queue full\n");
208
209                                 old_skb = skb_dequeue(&priv->b_tx_status.queue);
210                                 ieee80211_tx_status_irqsafe(hw, old_skb);
211                         }
212                         return;
213                 } else {
214                         info->flags |= IEEE80211_TX_STAT_ACK;
215                 }
216         }
217         if (priv->is_rtl8187b)
218                 ieee80211_tx_status_irqsafe(hw, skb);
219         else {
220                 /* Retry information for the RTI8187 is only available by
221                  * reading a register in the device. We are in interrupt mode
222                  * here, thus queue the skb and finish on a work queue. */
223                 skb_queue_tail(&priv->b_tx_status.queue, skb);
224                 ieee80211_queue_delayed_work(hw, &priv->work, 0);
225         }
226 }
227
228 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
229 {
230         struct rtl8187_priv *priv = dev->priv;
231         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
232         unsigned int ep;
233         void *buf;
234         struct urb *urb;
235         __le16 rts_dur = 0;
236         u32 flags;
237         int rc;
238
239         urb = usb_alloc_urb(0, GFP_ATOMIC);
240         if (!urb) {
241                 kfree_skb(skb);
242                 return NETDEV_TX_OK;
243         }
244
245         flags = skb->len;
246         flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
247
248         flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
249         if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
250                 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
251         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
252                 flags |= RTL818X_TX_DESC_FLAG_RTS;
253                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
254                 rts_dur = ieee80211_rts_duration(dev, priv->vif,
255                                                  skb->len, info);
256         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
257                 flags |= RTL818X_TX_DESC_FLAG_CTS;
258                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
259         }
260
261         if (!priv->is_rtl8187b) {
262                 struct rtl8187_tx_hdr *hdr =
263                         (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
264                 hdr->flags = cpu_to_le32(flags);
265                 hdr->len = 0;
266                 hdr->rts_duration = rts_dur;
267                 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
268                 buf = hdr;
269
270                 ep = 2;
271         } else {
272                 /* fc needs to be calculated before skb_push() */
273                 unsigned int epmap[4] = { 6, 7, 5, 4 };
274                 struct ieee80211_hdr *tx_hdr =
275                         (struct ieee80211_hdr *)(skb->data);
276                 u16 fc = le16_to_cpu(tx_hdr->frame_control);
277
278                 struct rtl8187b_tx_hdr *hdr =
279                         (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
280                 struct ieee80211_rate *txrate =
281                         ieee80211_get_tx_rate(dev, info);
282                 memset(hdr, 0, sizeof(*hdr));
283                 hdr->flags = cpu_to_le32(flags);
284                 hdr->rts_duration = rts_dur;
285                 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
286                 hdr->tx_duration =
287                         ieee80211_generic_frame_duration(dev, priv->vif,
288                                                          skb->len, txrate);
289                 buf = hdr;
290
291                 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
292                         ep = 12;
293                 else
294                         ep = epmap[skb_get_queue_mapping(skb)];
295         }
296
297         info->rate_driver_data[0] = dev;
298         info->rate_driver_data[1] = urb;
299
300         usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
301                           buf, skb->len, rtl8187_tx_cb, skb);
302         urb->transfer_flags |= URB_ZERO_PACKET;
303         usb_anchor_urb(urb, &priv->anchored);
304         rc = usb_submit_urb(urb, GFP_ATOMIC);
305         if (rc < 0) {
306                 usb_unanchor_urb(urb);
307                 kfree_skb(skb);
308         }
309         usb_free_urb(urb);
310
311         return NETDEV_TX_OK;
312 }
313
314 static void rtl8187_rx_cb(struct urb *urb)
315 {
316         struct sk_buff *skb = (struct sk_buff *)urb->context;
317         struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
318         struct ieee80211_hw *dev = info->dev;
319         struct rtl8187_priv *priv = dev->priv;
320         struct ieee80211_rx_status rx_status = { 0 };
321         int rate, signal;
322         u32 flags;
323         unsigned long f;
324
325         spin_lock_irqsave(&priv->rx_queue.lock, f);
326         __skb_unlink(skb, &priv->rx_queue);
327         spin_unlock_irqrestore(&priv->rx_queue.lock, f);
328         skb_put(skb, urb->actual_length);
329
330         if (unlikely(urb->status)) {
331                 dev_kfree_skb_irq(skb);
332                 return;
333         }
334
335         if (!priv->is_rtl8187b) {
336                 struct rtl8187_rx_hdr *hdr =
337                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
338                 flags = le32_to_cpu(hdr->flags);
339                 /* As with the RTL8187B below, the AGC is used to calculate
340                  * signal strength. In this case, the scaling
341                  * constants are derived from the output of p54usb.
342                  */
343                 signal = -4 - ((27 * hdr->agc) >> 6);
344                 rx_status.antenna = (hdr->signal >> 7) & 1;
345                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
346         } else {
347                 struct rtl8187b_rx_hdr *hdr =
348                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
349                 /* The Realtek datasheet for the RTL8187B shows that the RX
350                  * header contains the following quantities: signal quality,
351                  * RSSI, AGC, the received power in dB, and the measured SNR.
352                  * In testing, none of these quantities show qualitative
353                  * agreement with AP signal strength, except for the AGC,
354                  * which is inversely proportional to the strength of the
355                  * signal. In the following, the signal strength
356                  * is derived from the AGC. The arbitrary scaling constants
357                  * are chosen to make the results close to the values obtained
358                  * for a BCM4312 using b43 as the driver. The noise is ignored
359                  * for now.
360                  */
361                 flags = le32_to_cpu(hdr->flags);
362                 signal = 14 - hdr->agc / 2;
363                 rx_status.antenna = (hdr->rssi >> 7) & 1;
364                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
365         }
366
367         rx_status.signal = signal;
368         priv->signal = signal;
369         rate = (flags >> 20) & 0xF;
370         skb_trim(skb, flags & 0x0FFF);
371         rx_status.rate_idx = rate;
372         rx_status.freq = dev->conf.channel->center_freq;
373         rx_status.band = dev->conf.channel->band;
374         rx_status.flag |= RX_FLAG_TSFT;
375         if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
376                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
377         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
378         ieee80211_rx_irqsafe(dev, skb);
379
380         skb = dev_alloc_skb(RTL8187_MAX_RX);
381         if (unlikely(!skb)) {
382                 /* TODO check rx queue length and refill *somewhere* */
383                 return;
384         }
385
386         info = (struct rtl8187_rx_info *)skb->cb;
387         info->urb = urb;
388         info->dev = dev;
389         urb->transfer_buffer = skb_tail_pointer(skb);
390         urb->context = skb;
391         skb_queue_tail(&priv->rx_queue, skb);
392
393         usb_anchor_urb(urb, &priv->anchored);
394         if (usb_submit_urb(urb, GFP_ATOMIC)) {
395                 usb_unanchor_urb(urb);
396                 skb_unlink(skb, &priv->rx_queue);
397                 dev_kfree_skb_irq(skb);
398         }
399 }
400
401 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
402 {
403         struct rtl8187_priv *priv = dev->priv;
404         struct urb *entry = NULL;
405         struct sk_buff *skb;
406         struct rtl8187_rx_info *info;
407         int ret = 0;
408
409         while (skb_queue_len(&priv->rx_queue) < 16) {
410                 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
411                 if (!skb) {
412                         ret = -ENOMEM;
413                         goto err;
414                 }
415                 entry = usb_alloc_urb(0, GFP_KERNEL);
416                 if (!entry) {
417                         ret = -ENOMEM;
418                         goto err;
419                 }
420                 usb_fill_bulk_urb(entry, priv->udev,
421                                   usb_rcvbulkpipe(priv->udev,
422                                   priv->is_rtl8187b ? 3 : 1),
423                                   skb_tail_pointer(skb),
424                                   RTL8187_MAX_RX, rtl8187_rx_cb, skb);
425                 info = (struct rtl8187_rx_info *)skb->cb;
426                 info->urb = entry;
427                 info->dev = dev;
428                 skb_queue_tail(&priv->rx_queue, skb);
429                 usb_anchor_urb(entry, &priv->anchored);
430                 ret = usb_submit_urb(entry, GFP_KERNEL);
431                 if (ret) {
432                         skb_unlink(skb, &priv->rx_queue);
433                         usb_unanchor_urb(entry);
434                         goto err;
435                 }
436                 usb_free_urb(entry);
437         }
438         return ret;
439
440 err:
441         usb_free_urb(entry);
442         kfree_skb(skb);
443         usb_kill_anchored_urbs(&priv->anchored);
444         return ret;
445 }
446
447 static void rtl8187b_status_cb(struct urb *urb)
448 {
449         struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context;
450         struct rtl8187_priv *priv = hw->priv;
451         u64 val;
452         unsigned int cmd_type;
453
454         if (unlikely(urb->status))
455                 return;
456
457         /*
458          * Read from status buffer:
459          *
460          * bits [30:31] = cmd type:
461          * - 0 indicates tx beacon interrupt
462          * - 1 indicates tx close descriptor
463          *
464          * In the case of tx beacon interrupt:
465          * [0:9] = Last Beacon CW
466          * [10:29] = reserved
467          * [30:31] = 00b
468          * [32:63] = Last Beacon TSF
469          *
470          * If it's tx close descriptor:
471          * [0:7] = Packet Retry Count
472          * [8:14] = RTS Retry Count
473          * [15] = TOK
474          * [16:27] = Sequence No
475          * [28] = LS
476          * [29] = FS
477          * [30:31] = 01b
478          * [32:47] = unused (reserved?)
479          * [48:63] = MAC Used Time
480          */
481         val = le64_to_cpu(priv->b_tx_status.buf);
482
483         cmd_type = (val >> 30) & 0x3;
484         if (cmd_type == 1) {
485                 unsigned int pkt_rc, seq_no;
486                 bool tok;
487                 struct sk_buff *skb;
488                 struct ieee80211_hdr *ieee80211hdr;
489                 unsigned long flags;
490
491                 pkt_rc = val & 0xFF;
492                 tok = val & (1 << 15);
493                 seq_no = (val >> 16) & 0xFFF;
494
495                 spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags);
496                 skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) {
497                         ieee80211hdr = (struct ieee80211_hdr *)skb->data;
498
499                         /*
500                          * While testing, it was discovered that the seq_no
501                          * doesn't actually contains the sequence number.
502                          * Instead of returning just the 12 bits of sequence
503                          * number, hardware is returning entire sequence control
504                          * (fragment number plus sequence number) in a 12 bit
505                          * only field overflowing after some time. As a
506                          * workaround, just consider the lower bits, and expect
507                          * it's unlikely we wrongly ack some sent data
508                          */
509                         if ((le16_to_cpu(ieee80211hdr->seq_ctrl)
510                             & 0xFFF) == seq_no)
511                                 break;
512                 }
513                 if (skb != (struct sk_buff *) &priv->b_tx_status.queue) {
514                         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
515
516                         __skb_unlink(skb, &priv->b_tx_status.queue);
517                         if (tok)
518                                 info->flags |= IEEE80211_TX_STAT_ACK;
519                         info->status.rates[0].count = pkt_rc + 1;
520
521                         ieee80211_tx_status_irqsafe(hw, skb);
522                 }
523                 spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags);
524         }
525
526         usb_anchor_urb(urb, &priv->anchored);
527         if (usb_submit_urb(urb, GFP_ATOMIC))
528                 usb_unanchor_urb(urb);
529 }
530
531 static int rtl8187b_init_status_urb(struct ieee80211_hw *dev)
532 {
533         struct rtl8187_priv *priv = dev->priv;
534         struct urb *entry;
535         int ret = 0;
536
537         entry = usb_alloc_urb(0, GFP_KERNEL);
538         if (!entry)
539                 return -ENOMEM;
540
541         usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9),
542                           &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf),
543                           rtl8187b_status_cb, dev);
544
545         usb_anchor_urb(entry, &priv->anchored);
546         ret = usb_submit_urb(entry, GFP_KERNEL);
547         if (ret)
548                 usb_unanchor_urb(entry);
549         usb_free_urb(entry);
550
551         return ret;
552 }
553
554 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
555 {
556         struct rtl8187_priv *priv = dev->priv;
557         u8 reg;
558         int i;
559
560         reg = rtl818x_ioread8(priv, &priv->map->CMD);
561         reg &= (1 << 1);
562         reg |= RTL818X_CMD_RESET;
563         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
564
565         i = 10;
566         do {
567                 msleep(2);
568                 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
569                       RTL818X_CMD_RESET))
570                         break;
571         } while (--i);
572
573         if (!i) {
574                 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
575                 return -ETIMEDOUT;
576         }
577
578         /* reload registers from eeprom */
579         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
580
581         i = 10;
582         do {
583                 msleep(4);
584                 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
585                       RTL818X_EEPROM_CMD_CONFIG))
586                         break;
587         } while (--i);
588
589         if (!i) {
590                 printk(KERN_ERR "%s: eeprom reset timeout!\n",
591                        wiphy_name(dev->wiphy));
592                 return -ETIMEDOUT;
593         }
594
595         return 0;
596 }
597
598 static int rtl8187_init_hw(struct ieee80211_hw *dev)
599 {
600         struct rtl8187_priv *priv = dev->priv;
601         u8 reg;
602         int res;
603
604         /* reset */
605         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
606                          RTL818X_EEPROM_CMD_CONFIG);
607         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
608         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
609                          RTL818X_CONFIG3_ANAPARAM_WRITE);
610         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
611                           RTL8187_RTL8225_ANAPARAM_ON);
612         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
613                           RTL8187_RTL8225_ANAPARAM2_ON);
614         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
615                          ~RTL818X_CONFIG3_ANAPARAM_WRITE);
616         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
617                          RTL818X_EEPROM_CMD_NORMAL);
618
619         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
620
621         msleep(200);
622         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
623         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
624         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
625         msleep(200);
626
627         res = rtl8187_cmd_reset(dev);
628         if (res)
629                 return res;
630
631         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
632         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
633         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
634                         reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
635         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
636                           RTL8187_RTL8225_ANAPARAM_ON);
637         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
638                           RTL8187_RTL8225_ANAPARAM2_ON);
639         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
640                         reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
641         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
642
643         /* setup card */
644         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
645         rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
646
647         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
648         rtl818x_iowrite8(priv, &priv->map->GPIO0, 1);
649         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
650
651         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
652
653         rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
654         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
655         reg &= 0x3F;
656         reg |= 0x80;
657         rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
658
659         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
660
661         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
662         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
663         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0);
664
665         // TODO: set RESP_RATE and BRSR properly
666         rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
667         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
668
669         /* host_usb_init */
670         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
671         rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
672         reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
673         rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
674         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
675         rtl818x_iowrite8(priv, &priv->map->GPIO0, 0x20);
676         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
677         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
678         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
679         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
680         msleep(100);
681
682         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
683         rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
684         rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
685         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
686                          RTL818X_EEPROM_CMD_CONFIG);
687         rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
688         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
689                          RTL818X_EEPROM_CMD_NORMAL);
690         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
691         msleep(100);
692
693         priv->rf->init(dev);
694
695         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
696         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
697         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
698         rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
699         rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
700         rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
701         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
702
703         return 0;
704 }
705
706 static const u8 rtl8187b_reg_table[][3] = {
707         {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
708         {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
709         {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
710         {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
711
712         {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
713         {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
714         {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
715         {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
716         {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
717         {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
718
719         {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
720         {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
721         {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
722         {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
723         {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
724         {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
725         {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
726         {0x73, 0x9A, 2},
727
728         {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
729         {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
730         {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
731         {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
732         {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x4C, 0x00, 2},
733
734         {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0},
735         {0x8F, 0x00, 0}
736 };
737
738 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
739 {
740         struct rtl8187_priv *priv = dev->priv;
741         int res, i;
742         u8 reg;
743
744         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
745                          RTL818X_EEPROM_CMD_CONFIG);
746
747         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
748         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT;
749         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
750         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
751                           RTL8187B_RTL8225_ANAPARAM2_ON);
752         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
753                           RTL8187B_RTL8225_ANAPARAM_ON);
754         rtl818x_iowrite8(priv, &priv->map->ANAPARAM3,
755                          RTL8187B_RTL8225_ANAPARAM3_ON);
756
757         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
758         reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
759         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
760         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
761
762         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
763         reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
764         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
765
766         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
767                          RTL818X_EEPROM_CMD_NORMAL);
768
769         res = rtl8187_cmd_reset(dev);
770         if (res)
771                 return res;
772
773         rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF);
774         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
775         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
776         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
777         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
778         reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT |
779                RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
780         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
781
782         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
783
784         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
785         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
786         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
787
788         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
789                          RTL818X_EEPROM_CMD_CONFIG);
790         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
791         rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
792         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
793                          RTL818X_EEPROM_CMD_NORMAL);
794
795         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
796         for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
797                 rtl818x_iowrite8_idx(priv,
798                                      (u8 *)(uintptr_t)
799                                      (rtl8187b_reg_table[i][0] | 0xFF00),
800                                      rtl8187b_reg_table[i][1],
801                                      rtl8187b_reg_table[i][2]);
802         }
803
804         rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
805         rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
806
807         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
808         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
809         rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
810
811         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
812
813         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
814
815         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
816                          RTL818X_EEPROM_CMD_CONFIG);
817         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
818         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
819         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
820         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
821                          RTL818X_EEPROM_CMD_NORMAL);
822
823         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
824         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
825         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
826         msleep(100);
827
828         priv->rf->init(dev);
829
830         reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
831         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
832         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
833
834         rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
835         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
836         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
837         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
838         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
839         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
840         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
841
842         reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
843         rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
844         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
845         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
846         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
847         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
848         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
849         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
850         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
851         rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
852         rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
853         rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
854         rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
855
856         rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
857
858         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
859
860         priv->slot_time = 0x9;
861         priv->aifsn[0] = 2; /* AIFSN[AC_VO] */
862         priv->aifsn[1] = 2; /* AIFSN[AC_VI] */
863         priv->aifsn[2] = 7; /* AIFSN[AC_BK] */
864         priv->aifsn[3] = 3; /* AIFSN[AC_BE] */
865         rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0);
866
867         /* ENEDCA flag must always be set, transmit issues? */
868         rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA);
869
870         return 0;
871 }
872
873 static void rtl8187_work(struct work_struct *work)
874 {
875         /* The RTL8187 returns the retry count through register 0xFFFA. In
876          * addition, it appears to be a cumulative retry count, not the
877          * value for the current TX packet. When multiple TX entries are
878          * queued, the retry count will be valid for the last one in the queue.
879          * The "error" should not matter for purposes of rate setting. */
880         struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv,
881                                     work.work);
882         struct ieee80211_tx_info *info;
883         struct ieee80211_hw *dev = priv->dev;
884         static u16 retry;
885         u16 tmp;
886
887         mutex_lock(&priv->conf_mutex);
888         tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA);
889         while (skb_queue_len(&priv->b_tx_status.queue) > 0) {
890                 struct sk_buff *old_skb;
891
892                 old_skb = skb_dequeue(&priv->b_tx_status.queue);
893                 info = IEEE80211_SKB_CB(old_skb);
894                 info->status.rates[0].count = tmp - retry + 1;
895                 ieee80211_tx_status_irqsafe(dev, old_skb);
896         }
897         retry = tmp;
898         mutex_unlock(&priv->conf_mutex);
899 }
900
901 static int rtl8187_start(struct ieee80211_hw *dev)
902 {
903         struct rtl8187_priv *priv = dev->priv;
904         u32 reg;
905         int ret;
906
907         mutex_lock(&priv->conf_mutex);
908
909         ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
910                                      rtl8187b_init_hw(dev);
911         if (ret)
912                 goto rtl8187_start_exit;
913
914         init_usb_anchor(&priv->anchored);
915         priv->dev = dev;
916
917         if (priv->is_rtl8187b) {
918                 reg = RTL818X_RX_CONF_MGMT |
919                       RTL818X_RX_CONF_DATA |
920                       RTL818X_RX_CONF_BROADCAST |
921                       RTL818X_RX_CONF_NICMAC |
922                       RTL818X_RX_CONF_BSSID |
923                       (7 << 13 /* RX FIFO threshold NONE */) |
924                       (7 << 10 /* MAX RX DMA */) |
925                       RTL818X_RX_CONF_RX_AUTORESETPHY |
926                       RTL818X_RX_CONF_ONLYERLPKT |
927                       RTL818X_RX_CONF_MULTICAST;
928                 priv->rx_conf = reg;
929                 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
930
931                 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
932                                   RTL818X_TX_CONF_HW_SEQNUM |
933                                   RTL818X_TX_CONF_DISREQQSIZE |
934                                   (7 << 8  /* short retry limit */) |
935                                   (7 << 0  /* long retry limit */) |
936                                   (7 << 21 /* MAX TX DMA */));
937                 rtl8187_init_urbs(dev);
938                 rtl8187b_init_status_urb(dev);
939                 goto rtl8187_start_exit;
940         }
941
942         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
943
944         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
945         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
946
947         rtl8187_init_urbs(dev);
948
949         reg = RTL818X_RX_CONF_ONLYERLPKT |
950               RTL818X_RX_CONF_RX_AUTORESETPHY |
951               RTL818X_RX_CONF_BSSID |
952               RTL818X_RX_CONF_MGMT |
953               RTL818X_RX_CONF_DATA |
954               (7 << 13 /* RX FIFO threshold NONE */) |
955               (7 << 10 /* MAX RX DMA */) |
956               RTL818X_RX_CONF_BROADCAST |
957               RTL818X_RX_CONF_NICMAC;
958
959         priv->rx_conf = reg;
960         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
961
962         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
963         reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
964         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
965         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
966
967         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
968         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
969         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
970         reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
971         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
972
973         reg  = RTL818X_TX_CONF_CW_MIN |
974                (7 << 21 /* MAX TX DMA */) |
975                RTL818X_TX_CONF_NO_ICV;
976         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
977
978         reg = rtl818x_ioread8(priv, &priv->map->CMD);
979         reg |= RTL818X_CMD_TX_ENABLE;
980         reg |= RTL818X_CMD_RX_ENABLE;
981         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
982         INIT_DELAYED_WORK(&priv->work, rtl8187_work);
983
984 rtl8187_start_exit:
985         mutex_unlock(&priv->conf_mutex);
986         return ret;
987 }
988
989 static void rtl8187_stop(struct ieee80211_hw *dev)
990 {
991         struct rtl8187_priv *priv = dev->priv;
992         struct sk_buff *skb;
993         u32 reg;
994
995         mutex_lock(&priv->conf_mutex);
996         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
997
998         reg = rtl818x_ioread8(priv, &priv->map->CMD);
999         reg &= ~RTL818X_CMD_TX_ENABLE;
1000         reg &= ~RTL818X_CMD_RX_ENABLE;
1001         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1002
1003         priv->rf->stop(dev);
1004
1005         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1006         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
1007         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
1008         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1009
1010         while ((skb = skb_dequeue(&priv->b_tx_status.queue)))
1011                 dev_kfree_skb_any(skb);
1012
1013         usb_kill_anchored_urbs(&priv->anchored);
1014         mutex_unlock(&priv->conf_mutex);
1015
1016         if (!priv->is_rtl8187b)
1017                 cancel_delayed_work_sync(&priv->work);
1018 }
1019
1020 static int rtl8187_add_interface(struct ieee80211_hw *dev,
1021                                  struct ieee80211_vif *vif)
1022 {
1023         struct rtl8187_priv *priv = dev->priv;
1024         int i;
1025         int ret = -EOPNOTSUPP;
1026
1027         mutex_lock(&priv->conf_mutex);
1028         if (priv->vif)
1029                 goto exit;
1030
1031         switch (vif->type) {
1032         case NL80211_IFTYPE_STATION:
1033                 break;
1034         default:
1035                 goto exit;
1036         }
1037
1038         ret = 0;
1039         priv->vif = vif;
1040
1041         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1042         for (i = 0; i < ETH_ALEN; i++)
1043                 rtl818x_iowrite8(priv, &priv->map->MAC[i],
1044                                  ((u8 *)vif->addr)[i]);
1045         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1046
1047 exit:
1048         mutex_unlock(&priv->conf_mutex);
1049         return ret;
1050 }
1051
1052 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
1053                                      struct ieee80211_vif *vif)
1054 {
1055         struct rtl8187_priv *priv = dev->priv;
1056         mutex_lock(&priv->conf_mutex);
1057         priv->vif = NULL;
1058         mutex_unlock(&priv->conf_mutex);
1059 }
1060
1061 static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
1062 {
1063         struct rtl8187_priv *priv = dev->priv;
1064         struct ieee80211_conf *conf = &dev->conf;
1065         u32 reg;
1066
1067         mutex_lock(&priv->conf_mutex);
1068         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1069         /* Enable TX loopback on MAC level to avoid TX during channel
1070          * changes, as this has be seen to causes problems and the
1071          * card will stop work until next reset
1072          */
1073         rtl818x_iowrite32(priv, &priv->map->TX_CONF,
1074                           reg | RTL818X_TX_CONF_LOOPBACK_MAC);
1075         priv->rf->set_chan(dev, conf);
1076         msleep(10);
1077         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1078
1079         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
1080         rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
1081         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
1082         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
1083         mutex_unlock(&priv->conf_mutex);
1084         return 0;
1085 }
1086
1087 /*
1088  * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for
1089  * example. Thus we have to use raw values for AC_*_PARAM register addresses.
1090  */
1091 static __le32 *rtl8187b_ac_addr[4] = {
1092         (__le32 *) 0xFFF0, /* AC_VO */
1093         (__le32 *) 0xFFF4, /* AC_VI */
1094         (__le32 *) 0xFFFC, /* AC_BK */
1095         (__le32 *) 0xFFF8, /* AC_BE */
1096 };
1097
1098 #define SIFS_TIME 0xa
1099
1100 static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
1101                              bool use_short_preamble)
1102 {
1103         if (priv->is_rtl8187b) {
1104                 u8 difs, eifs;
1105                 u16 ack_timeout;
1106                 int queue;
1107
1108                 if (use_short_slot) {
1109                         priv->slot_time = 0x9;
1110                         difs = 0x1c;
1111                         eifs = 0x53;
1112                 } else {
1113                         priv->slot_time = 0x14;
1114                         difs = 0x32;
1115                         eifs = 0x5b;
1116                 }
1117                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1118                 rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
1119                 rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
1120
1121                 /*
1122                  * BRSR+1 on 8187B is in fact EIFS register
1123                  * Value in units of 4 us
1124                  */
1125                 rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
1126
1127                 /*
1128                  * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
1129                  * register. In units of 4 us like eifs register
1130                  * ack_timeout = ack duration + plcp + difs + preamble
1131                  */
1132                 ack_timeout = 112 + 48 + difs;
1133                 if (use_short_preamble)
1134                         ack_timeout += 72;
1135                 else
1136                         ack_timeout += 144;
1137                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
1138                                  DIV_ROUND_UP(ack_timeout, 4));
1139
1140                 for (queue = 0; queue < 4; queue++)
1141                         rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue],
1142                                          priv->aifsn[queue] * priv->slot_time +
1143                                          SIFS_TIME);
1144         } else {
1145                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1146                 if (use_short_slot) {
1147                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
1148                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
1149                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
1150                 } else {
1151                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
1152                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
1153                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
1154                 }
1155         }
1156 }
1157
1158 static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
1159                                      struct ieee80211_vif *vif,
1160                                      struct ieee80211_bss_conf *info,
1161                                      u32 changed)
1162 {
1163         struct rtl8187_priv *priv = dev->priv;
1164         int i;
1165         u8 reg;
1166
1167         if (changed & BSS_CHANGED_BSSID) {
1168                 mutex_lock(&priv->conf_mutex);
1169                 for (i = 0; i < ETH_ALEN; i++)
1170                         rtl818x_iowrite8(priv, &priv->map->BSSID[i],
1171                                          info->bssid[i]);
1172
1173                 if (priv->is_rtl8187b)
1174                         reg = RTL818X_MSR_ENEDCA;
1175                 else
1176                         reg = 0;
1177
1178                 if (is_valid_ether_addr(info->bssid)) {
1179                         reg |= RTL818X_MSR_INFRA;
1180                         rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1181                 } else {
1182                         reg |= RTL818X_MSR_NO_LINK;
1183                         rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1184                 }
1185
1186                 mutex_unlock(&priv->conf_mutex);
1187         }
1188
1189         if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
1190                 rtl8187_conf_erp(priv, info->use_short_slot,
1191                                  info->use_short_preamble);
1192 }
1193
1194 static u64 rtl8187_prepare_multicast(struct ieee80211_hw *dev,
1195                                      int mc_count, struct dev_addr_list *mc_list)
1196 {
1197         return mc_count;
1198 }
1199
1200 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
1201                                      unsigned int changed_flags,
1202                                      unsigned int *total_flags,
1203                                      u64 multicast)
1204 {
1205         struct rtl8187_priv *priv = dev->priv;
1206
1207         if (changed_flags & FIF_FCSFAIL)
1208                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
1209         if (changed_flags & FIF_CONTROL)
1210                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
1211         if (changed_flags & FIF_OTHER_BSS)
1212                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
1213         if (*total_flags & FIF_ALLMULTI || multicast > 0)
1214                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
1215         else
1216                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
1217
1218         *total_flags = 0;
1219
1220         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
1221                 *total_flags |= FIF_FCSFAIL;
1222         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
1223                 *total_flags |= FIF_CONTROL;
1224         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
1225                 *total_flags |= FIF_OTHER_BSS;
1226         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
1227                 *total_flags |= FIF_ALLMULTI;
1228
1229         rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1230 }
1231
1232 static int rtl8187_conf_tx(struct ieee80211_hw *dev, u16 queue,
1233                            const struct ieee80211_tx_queue_params *params)
1234 {
1235         struct rtl8187_priv *priv = dev->priv;
1236         u8 cw_min, cw_max;
1237
1238         if (queue > 3)
1239                 return -EINVAL;
1240
1241         cw_min = fls(params->cw_min);
1242         cw_max = fls(params->cw_max);
1243
1244         if (priv->is_rtl8187b) {
1245                 priv->aifsn[queue] = params->aifs;
1246
1247                 /*
1248                  * This is the structure of AC_*_PARAM registers in 8187B:
1249                  * - TXOP limit field, bit offset = 16
1250                  * - ECWmax, bit offset = 12
1251                  * - ECWmin, bit offset = 8
1252                  * - AIFS, bit offset = 0
1253                  */
1254                 rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue],
1255                                   (params->txop << 16) | (cw_max << 12) |
1256                                   (cw_min << 8) | (params->aifs *
1257                                   priv->slot_time + SIFS_TIME));
1258         } else {
1259                 if (queue != 0)
1260                         return -EINVAL;
1261
1262                 rtl818x_iowrite8(priv, &priv->map->CW_VAL,
1263                                  cw_min | (cw_max << 4));
1264         }
1265         return 0;
1266 }
1267
1268 static u64 rtl8187_get_tsf(struct ieee80211_hw *dev)
1269 {
1270         struct rtl8187_priv *priv = dev->priv;
1271
1272         return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
1273                (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
1274 }
1275
1276 static const struct ieee80211_ops rtl8187_ops = {
1277         .tx                     = rtl8187_tx,
1278         .start                  = rtl8187_start,
1279         .stop                   = rtl8187_stop,
1280         .add_interface          = rtl8187_add_interface,
1281         .remove_interface       = rtl8187_remove_interface,
1282         .config                 = rtl8187_config,
1283         .bss_info_changed       = rtl8187_bss_info_changed,
1284         .prepare_multicast      = rtl8187_prepare_multicast,
1285         .configure_filter       = rtl8187_configure_filter,
1286         .conf_tx                = rtl8187_conf_tx,
1287         .rfkill_poll            = rtl8187_rfkill_poll,
1288         .get_tsf                = rtl8187_get_tsf,
1289 };
1290
1291 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
1292 {
1293         struct ieee80211_hw *dev = eeprom->data;
1294         struct rtl8187_priv *priv = dev->priv;
1295         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1296
1297         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
1298         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
1299         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
1300         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
1301 }
1302
1303 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
1304 {
1305         struct ieee80211_hw *dev = eeprom->data;
1306         struct rtl8187_priv *priv = dev->priv;
1307         u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1308
1309         if (eeprom->reg_data_in)
1310                 reg |= RTL818X_EEPROM_CMD_WRITE;
1311         if (eeprom->reg_data_out)
1312                 reg |= RTL818X_EEPROM_CMD_READ;
1313         if (eeprom->reg_data_clock)
1314                 reg |= RTL818X_EEPROM_CMD_CK;
1315         if (eeprom->reg_chip_select)
1316                 reg |= RTL818X_EEPROM_CMD_CS;
1317
1318         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1319         udelay(10);
1320 }
1321
1322 static int __devinit rtl8187_probe(struct usb_interface *intf,
1323                                    const struct usb_device_id *id)
1324 {
1325         struct usb_device *udev = interface_to_usbdev(intf);
1326         struct ieee80211_hw *dev;
1327         struct rtl8187_priv *priv;
1328         struct eeprom_93cx6 eeprom;
1329         struct ieee80211_channel *channel;
1330         const char *chip_name;
1331         u16 txpwr, reg;
1332         u16 product_id = le16_to_cpu(udev->descriptor.idProduct);
1333         int err, i;
1334
1335         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1336         if (!dev) {
1337                 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1338                 return -ENOMEM;
1339         }
1340
1341         priv = dev->priv;
1342         priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1343
1344         /* allocate "DMA aware" buffer for register accesses */
1345         priv->io_dmabuf = kmalloc(sizeof(*priv->io_dmabuf), GFP_KERNEL);
1346         if (!priv->io_dmabuf) {
1347                 err = -ENOMEM;
1348                 goto err_free_dev;
1349         }
1350         mutex_init(&priv->io_mutex);
1351
1352         SET_IEEE80211_DEV(dev, &intf->dev);
1353         usb_set_intfdata(intf, dev);
1354         priv->udev = udev;
1355
1356         usb_get_dev(udev);
1357
1358         skb_queue_head_init(&priv->rx_queue);
1359
1360         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1361         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1362
1363         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1364         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1365         priv->map = (struct rtl818x_csr *)0xFF00;
1366
1367         priv->band.band = IEEE80211_BAND_2GHZ;
1368         priv->band.channels = priv->channels;
1369         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1370         priv->band.bitrates = priv->rates;
1371         priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1372         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1373
1374
1375         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1376                      IEEE80211_HW_SIGNAL_DBM |
1377                      IEEE80211_HW_RX_INCLUDES_FCS;
1378
1379         eeprom.data = dev;
1380         eeprom.register_read = rtl8187_eeprom_register_read;
1381         eeprom.register_write = rtl8187_eeprom_register_write;
1382         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1383                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1384         else
1385                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1386
1387         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1388         udelay(10);
1389
1390         eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1391                                (__le16 __force *)dev->wiphy->perm_addr, 3);
1392         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
1393                 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1394                        "generated MAC address\n");
1395                 random_ether_addr(dev->wiphy->perm_addr);
1396         }
1397
1398         channel = priv->channels;
1399         for (i = 0; i < 3; i++) {
1400                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1401                                   &txpwr);
1402                 (*channel++).hw_value = txpwr & 0xFF;
1403                 (*channel++).hw_value = txpwr >> 8;
1404         }
1405         for (i = 0; i < 2; i++) {
1406                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1407                                   &txpwr);
1408                 (*channel++).hw_value = txpwr & 0xFF;
1409                 (*channel++).hw_value = txpwr >> 8;
1410         }
1411
1412         eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1413                           &priv->txpwr_base);
1414
1415         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1416         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1417         /* 0 means asic B-cut, we should use SW 3 wire
1418          * bit-by-bit banging for radio. 1 means we can use
1419          * USB specific request to write radio registers */
1420         priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1421         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1422         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1423
1424         if (!priv->is_rtl8187b) {
1425                 u32 reg32;
1426                 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1427                 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1428                 switch (reg32) {
1429                 case RTL818X_TX_CONF_R8187vD_B:
1430                         /* Some RTL8187B devices have a USB ID of 0x8187
1431                          * detect them here */
1432                         chip_name = "RTL8187BvB(early)";
1433                         priv->is_rtl8187b = 1;
1434                         priv->hw_rev = RTL8187BvB;
1435                         break;
1436                 case RTL818X_TX_CONF_R8187vD:
1437                         chip_name = "RTL8187vD";
1438                         break;
1439                 default:
1440                         chip_name = "RTL8187vB (default)";
1441                 }
1442        } else {
1443                 /*
1444                  * Force USB request to write radio registers for 8187B, Realtek
1445                  * only uses it in their sources
1446                  */
1447                 /*if (priv->asic_rev == 0) {
1448                         printk(KERN_WARNING "rtl8187: Forcing use of USB "
1449                                "requests to write to radio registers\n");
1450                         priv->asic_rev = 1;
1451                 }*/
1452                 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1453                 case RTL818X_R8187B_B:
1454                         chip_name = "RTL8187BvB";
1455                         priv->hw_rev = RTL8187BvB;
1456                         break;
1457                 case RTL818X_R8187B_D:
1458                         chip_name = "RTL8187BvD";
1459                         priv->hw_rev = RTL8187BvD;
1460                         break;
1461                 case RTL818X_R8187B_E:
1462                         chip_name = "RTL8187BvE";
1463                         priv->hw_rev = RTL8187BvE;
1464                         break;
1465                 default:
1466                         chip_name = "RTL8187BvB (default)";
1467                         priv->hw_rev = RTL8187BvB;
1468                 }
1469         }
1470
1471         if (!priv->is_rtl8187b) {
1472                 for (i = 0; i < 2; i++) {
1473                         eeprom_93cx6_read(&eeprom,
1474                                           RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1475                                           &txpwr);
1476                         (*channel++).hw_value = txpwr & 0xFF;
1477                         (*channel++).hw_value = txpwr >> 8;
1478                 }
1479         } else {
1480                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1481                                   &txpwr);
1482                 (*channel++).hw_value = txpwr & 0xFF;
1483
1484                 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1485                 (*channel++).hw_value = txpwr & 0xFF;
1486
1487                 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1488                 (*channel++).hw_value = txpwr & 0xFF;
1489                 (*channel++).hw_value = txpwr >> 8;
1490         }
1491         /* Handle the differing rfkill GPIO bit in different models */
1492         priv->rfkill_mask = RFKILL_MASK_8187_89_97;
1493         if (product_id == 0x8197 || product_id == 0x8198) {
1494                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_SELECT_GPIO, &reg);
1495                 if (reg & 0xFF00)
1496                         priv->rfkill_mask = RFKILL_MASK_8198;
1497         }
1498
1499         /*
1500          * XXX: Once this driver supports anything that requires
1501          *      beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ.
1502          */
1503         dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1504
1505         if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1506                 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1507                        " info!\n");
1508
1509         priv->rf = rtl8187_detect_rf(dev);
1510         dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1511                                   sizeof(struct rtl8187_tx_hdr) :
1512                                   sizeof(struct rtl8187b_tx_hdr);
1513         if (!priv->is_rtl8187b)
1514                 dev->queues = 1;
1515         else
1516                 dev->queues = 4;
1517
1518         err = ieee80211_register_hw(dev);
1519         if (err) {
1520                 printk(KERN_ERR "rtl8187: Cannot register device\n");
1521                 goto err_free_dmabuf;
1522         }
1523         mutex_init(&priv->conf_mutex);
1524         skb_queue_head_init(&priv->b_tx_status.queue);
1525
1526         printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s, rfkill mask %d\n",
1527                wiphy_name(dev->wiphy), dev->wiphy->perm_addr,
1528                chip_name, priv->asic_rev, priv->rf->name, priv->rfkill_mask);
1529
1530 #ifdef CONFIG_RTL8187_LEDS
1531         eeprom_93cx6_read(&eeprom, 0x3F, &reg);
1532         reg &= 0xFF;
1533         rtl8187_leds_init(dev, reg);
1534 #endif
1535         rtl8187_rfkill_init(dev);
1536
1537         return 0;
1538
1539  err_free_dmabuf:
1540         kfree(priv->io_dmabuf);
1541  err_free_dev:
1542         ieee80211_free_hw(dev);
1543         usb_set_intfdata(intf, NULL);
1544         usb_put_dev(udev);
1545         return err;
1546 }
1547
1548 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1549 {
1550         struct ieee80211_hw *dev = usb_get_intfdata(intf);
1551         struct rtl8187_priv *priv;
1552
1553         if (!dev)
1554                 return;
1555
1556 #ifdef CONFIG_RTL8187_LEDS
1557         rtl8187_leds_exit(dev);
1558 #endif
1559         rtl8187_rfkill_exit(dev);
1560         ieee80211_unregister_hw(dev);
1561
1562         priv = dev->priv;
1563         usb_reset_device(priv->udev);
1564         usb_put_dev(interface_to_usbdev(intf));
1565         kfree(priv->io_dmabuf);
1566         ieee80211_free_hw(dev);
1567 }
1568
1569 static struct usb_driver rtl8187_driver = {
1570         .name           = KBUILD_MODNAME,
1571         .id_table       = rtl8187_table,
1572         .probe          = rtl8187_probe,
1573         .disconnect     = __devexit_p(rtl8187_disconnect),
1574 };
1575
1576 static int __init rtl8187_init(void)
1577 {
1578         return usb_register(&rtl8187_driver);
1579 }
1580
1581 static void __exit rtl8187_exit(void)
1582 {
1583         usb_deregister(&rtl8187_driver);
1584 }
1585
1586 module_init(rtl8187_init);
1587 module_exit(rtl8187_exit);