rtlwifi: use alloc_workqueue
[linux-2.6.git] / drivers / net / wireless / rtl818x / rtl8180 / dev.c
1
2 /*
3  * Linux device driver for RTL8180 / RTL8185
4  *
5  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
6  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
7  *
8  * Based on the r8180 driver, which is:
9  * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
10  *
11  * Thanks to Realtek for their support!
12  *
13  * This program is free software; you can redistribute it and/or modify
14  * it under the terms of the GNU General Public License version 2 as
15  * published by the Free Software Foundation.
16  */
17
18 #include <linux/init.h>
19 #include <linux/pci.h>
20 #include <linux/slab.h>
21 #include <linux/delay.h>
22 #include <linux/etherdevice.h>
23 #include <linux/eeprom_93cx6.h>
24 #include <net/mac80211.h>
25
26 #include "rtl8180.h"
27 #include "rtl8225.h"
28 #include "sa2400.h"
29 #include "max2820.h"
30 #include "grf5101.h"
31
32 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
33 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
34 MODULE_DESCRIPTION("RTL8180 / RTL8185 PCI wireless driver");
35 MODULE_LICENSE("GPL");
36
37 static DEFINE_PCI_DEVICE_TABLE(rtl8180_table) = {
38         /* rtl8185 */
39         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8185) },
40         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x700f) },
41         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x701f) },
42
43         /* rtl8180 */
44         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8180) },
45         { PCI_DEVICE(0x1799, 0x6001) },
46         { PCI_DEVICE(0x1799, 0x6020) },
47         { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x3300) },
48         { }
49 };
50
51 MODULE_DEVICE_TABLE(pci, rtl8180_table);
52
53 static const struct ieee80211_rate rtl818x_rates[] = {
54         { .bitrate = 10, .hw_value = 0, },
55         { .bitrate = 20, .hw_value = 1, },
56         { .bitrate = 55, .hw_value = 2, },
57         { .bitrate = 110, .hw_value = 3, },
58         { .bitrate = 60, .hw_value = 4, },
59         { .bitrate = 90, .hw_value = 5, },
60         { .bitrate = 120, .hw_value = 6, },
61         { .bitrate = 180, .hw_value = 7, },
62         { .bitrate = 240, .hw_value = 8, },
63         { .bitrate = 360, .hw_value = 9, },
64         { .bitrate = 480, .hw_value = 10, },
65         { .bitrate = 540, .hw_value = 11, },
66 };
67
68 static const struct ieee80211_channel rtl818x_channels[] = {
69         { .center_freq = 2412 },
70         { .center_freq = 2417 },
71         { .center_freq = 2422 },
72         { .center_freq = 2427 },
73         { .center_freq = 2432 },
74         { .center_freq = 2437 },
75         { .center_freq = 2442 },
76         { .center_freq = 2447 },
77         { .center_freq = 2452 },
78         { .center_freq = 2457 },
79         { .center_freq = 2462 },
80         { .center_freq = 2467 },
81         { .center_freq = 2472 },
82         { .center_freq = 2484 },
83 };
84
85
86 void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
87 {
88         struct rtl8180_priv *priv = dev->priv;
89         int i = 10;
90         u32 buf;
91
92         buf = (data << 8) | addr;
93
94         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf | 0x80);
95         while (i--) {
96                 rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf);
97                 if (rtl818x_ioread8(priv, &priv->map->PHY[2]) == (data & 0xFF))
98                         return;
99         }
100 }
101
102 static void rtl8180_handle_rx(struct ieee80211_hw *dev)
103 {
104         struct rtl8180_priv *priv = dev->priv;
105         unsigned int count = 32;
106         u8 signal, agc, sq;
107
108         while (count--) {
109                 struct rtl8180_rx_desc *entry = &priv->rx_ring[priv->rx_idx];
110                 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];
111                 u32 flags = le32_to_cpu(entry->flags);
112
113                 if (flags & RTL818X_RX_DESC_FLAG_OWN)
114                         return;
115
116                 if (unlikely(flags & (RTL818X_RX_DESC_FLAG_DMA_FAIL |
117                                       RTL818X_RX_DESC_FLAG_FOF |
118                                       RTL818X_RX_DESC_FLAG_RX_ERR)))
119                         goto done;
120                 else {
121                         u32 flags2 = le32_to_cpu(entry->flags2);
122                         struct ieee80211_rx_status rx_status = {0};
123                         struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_SIZE);
124
125                         if (unlikely(!new_skb))
126                                 goto done;
127
128                         pci_unmap_single(priv->pdev,
129                                          *((dma_addr_t *)skb->cb),
130                                          MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
131                         skb_put(skb, flags & 0xFFF);
132
133                         rx_status.antenna = (flags2 >> 15) & 1;
134                         rx_status.rate_idx = (flags >> 20) & 0xF;
135                         agc = (flags2 >> 17) & 0x7F;
136                         if (priv->r8185) {
137                                 if (rx_status.rate_idx > 3)
138                                         signal = 90 - clamp_t(u8, agc, 25, 90);
139                                 else
140                                         signal = 95 - clamp_t(u8, agc, 30, 95);
141                         } else {
142                                 sq = flags2 & 0xff;
143                                 signal = priv->rf->calc_rssi(agc, sq);
144                         }
145                         rx_status.signal = signal;
146                         rx_status.freq = dev->conf.channel->center_freq;
147                         rx_status.band = dev->conf.channel->band;
148                         rx_status.mactime = le64_to_cpu(entry->tsft);
149                         rx_status.flag |= RX_FLAG_TSFT;
150                         if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
151                                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
152
153                         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
154                         ieee80211_rx_irqsafe(dev, skb);
155
156                         skb = new_skb;
157                         priv->rx_buf[priv->rx_idx] = skb;
158                         *((dma_addr_t *) skb->cb) =
159                                 pci_map_single(priv->pdev, skb_tail_pointer(skb),
160                                                MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
161                 }
162
163         done:
164                 entry->rx_buf = cpu_to_le32(*((dma_addr_t *)skb->cb));
165                 entry->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN |
166                                            MAX_RX_SIZE);
167                 if (priv->rx_idx == 31)
168                         entry->flags |= cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR);
169                 priv->rx_idx = (priv->rx_idx + 1) % 32;
170         }
171 }
172
173 static void rtl8180_handle_tx(struct ieee80211_hw *dev, unsigned int prio)
174 {
175         struct rtl8180_priv *priv = dev->priv;
176         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
177
178         while (skb_queue_len(&ring->queue)) {
179                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
180                 struct sk_buff *skb;
181                 struct ieee80211_tx_info *info;
182                 u32 flags = le32_to_cpu(entry->flags);
183
184                 if (flags & RTL818X_TX_DESC_FLAG_OWN)
185                         return;
186
187                 ring->idx = (ring->idx + 1) % ring->entries;
188                 skb = __skb_dequeue(&ring->queue);
189                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
190                                  skb->len, PCI_DMA_TODEVICE);
191
192                 info = IEEE80211_SKB_CB(skb);
193                 ieee80211_tx_info_clear_status(info);
194
195                 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
196                     (flags & RTL818X_TX_DESC_FLAG_TX_OK))
197                         info->flags |= IEEE80211_TX_STAT_ACK;
198
199                 info->status.rates[0].count = (flags & 0xFF) + 1;
200                 info->status.rates[1].idx = -1;
201
202                 ieee80211_tx_status_irqsafe(dev, skb);
203                 if (ring->entries - skb_queue_len(&ring->queue) == 2)
204                         ieee80211_wake_queue(dev, prio);
205         }
206 }
207
208 static irqreturn_t rtl8180_interrupt(int irq, void *dev_id)
209 {
210         struct ieee80211_hw *dev = dev_id;
211         struct rtl8180_priv *priv = dev->priv;
212         u16 reg;
213
214         spin_lock(&priv->lock);
215         reg = rtl818x_ioread16(priv, &priv->map->INT_STATUS);
216         if (unlikely(reg == 0xFFFF)) {
217                 spin_unlock(&priv->lock);
218                 return IRQ_HANDLED;
219         }
220
221         rtl818x_iowrite16(priv, &priv->map->INT_STATUS, reg);
222
223         if (reg & (RTL818X_INT_TXB_OK | RTL818X_INT_TXB_ERR))
224                 rtl8180_handle_tx(dev, 3);
225
226         if (reg & (RTL818X_INT_TXH_OK | RTL818X_INT_TXH_ERR))
227                 rtl8180_handle_tx(dev, 2);
228
229         if (reg & (RTL818X_INT_TXN_OK | RTL818X_INT_TXN_ERR))
230                 rtl8180_handle_tx(dev, 1);
231
232         if (reg & (RTL818X_INT_TXL_OK | RTL818X_INT_TXL_ERR))
233                 rtl8180_handle_tx(dev, 0);
234
235         if (reg & (RTL818X_INT_RX_OK | RTL818X_INT_RX_ERR))
236                 rtl8180_handle_rx(dev);
237
238         spin_unlock(&priv->lock);
239
240         return IRQ_HANDLED;
241 }
242
243 static int rtl8180_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
244 {
245         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
246         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
247         struct rtl8180_priv *priv = dev->priv;
248         struct rtl8180_tx_ring *ring;
249         struct rtl8180_tx_desc *entry;
250         unsigned long flags;
251         unsigned int idx, prio;
252         dma_addr_t mapping;
253         u32 tx_flags;
254         u8 rc_flags;
255         u16 plcp_len = 0;
256         __le16 rts_duration = 0;
257
258         prio = skb_get_queue_mapping(skb);
259         ring = &priv->tx_ring[prio];
260
261         mapping = pci_map_single(priv->pdev, skb->data,
262                                  skb->len, PCI_DMA_TODEVICE);
263
264         tx_flags = RTL818X_TX_DESC_FLAG_OWN | RTL818X_TX_DESC_FLAG_FS |
265                    RTL818X_TX_DESC_FLAG_LS |
266                    (ieee80211_get_tx_rate(dev, info)->hw_value << 24) |
267                    skb->len;
268
269         if (priv->r8185)
270                 tx_flags |= RTL818X_TX_DESC_FLAG_DMA |
271                             RTL818X_TX_DESC_FLAG_NO_ENC;
272
273         rc_flags = info->control.rates[0].flags;
274         if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
275                 tx_flags |= RTL818X_TX_DESC_FLAG_RTS;
276                 tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
277         } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
278                 tx_flags |= RTL818X_TX_DESC_FLAG_CTS;
279                 tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
280         }
281
282         if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS)
283                 rts_duration = ieee80211_rts_duration(dev, priv->vif, skb->len,
284                                                       info);
285
286         if (!priv->r8185) {
287                 unsigned int remainder;
288
289                 plcp_len = DIV_ROUND_UP(16 * (skb->len + 4),
290                                 (ieee80211_get_tx_rate(dev, info)->bitrate * 2) / 10);
291                 remainder = (16 * (skb->len + 4)) %
292                             ((ieee80211_get_tx_rate(dev, info)->bitrate * 2) / 10);
293                 if (remainder <= 6)
294                         plcp_len |= 1 << 15;
295         }
296
297         spin_lock_irqsave(&priv->lock, flags);
298
299         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
300                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
301                         priv->seqno += 0x10;
302                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
303                 hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
304         }
305
306         idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
307         entry = &ring->desc[idx];
308
309         entry->rts_duration = rts_duration;
310         entry->plcp_len = cpu_to_le16(plcp_len);
311         entry->tx_buf = cpu_to_le32(mapping);
312         entry->frame_len = cpu_to_le32(skb->len);
313         entry->flags2 = info->control.rates[1].idx >= 0 ?
314                 ieee80211_get_alt_retry_rate(dev, info, 0)->bitrate << 4 : 0;
315         entry->retry_limit = info->control.rates[0].count;
316         entry->flags = cpu_to_le32(tx_flags);
317         __skb_queue_tail(&ring->queue, skb);
318         if (ring->entries - skb_queue_len(&ring->queue) < 2)
319                 ieee80211_stop_queue(dev, prio);
320
321         spin_unlock_irqrestore(&priv->lock, flags);
322
323         rtl818x_iowrite8(priv, &priv->map->TX_DMA_POLLING, (1 << (prio + 4)));
324
325         return 0;
326 }
327
328 void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam)
329 {
330         u8 reg;
331
332         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
333         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
334         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
335                  reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
336         rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
337         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
338                  reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
339         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
340 }
341
342 static int rtl8180_init_hw(struct ieee80211_hw *dev)
343 {
344         struct rtl8180_priv *priv = dev->priv;
345         u16 reg;
346
347         rtl818x_iowrite8(priv, &priv->map->CMD, 0);
348         rtl818x_ioread8(priv, &priv->map->CMD);
349         msleep(10);
350
351         /* reset */
352         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
353         rtl818x_ioread8(priv, &priv->map->CMD);
354
355         reg = rtl818x_ioread8(priv, &priv->map->CMD);
356         reg &= (1 << 1);
357         reg |= RTL818X_CMD_RESET;
358         rtl818x_iowrite8(priv, &priv->map->CMD, RTL818X_CMD_RESET);
359         rtl818x_ioread8(priv, &priv->map->CMD);
360         msleep(200);
361
362         /* check success of reset */
363         if (rtl818x_ioread8(priv, &priv->map->CMD) & RTL818X_CMD_RESET) {
364                 wiphy_err(dev->wiphy, "reset timeout!\n");
365                 return -ETIMEDOUT;
366         }
367
368         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
369         rtl818x_ioread8(priv, &priv->map->CMD);
370         msleep(200);
371
372         if (rtl818x_ioread8(priv, &priv->map->CONFIG3) & (1 << 3)) {
373                 /* For cardbus */
374                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
375                 reg |= 1 << 1;
376                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
377                 reg = rtl818x_ioread16(priv, &priv->map->FEMR);
378                 reg |= (1 << 15) | (1 << 14) | (1 << 4);
379                 rtl818x_iowrite16(priv, &priv->map->FEMR, reg);
380         }
381
382         rtl818x_iowrite8(priv, &priv->map->MSR, 0);
383
384         if (!priv->r8185)
385                 rtl8180_set_anaparam(priv, priv->anaparam);
386
387         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
388         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
389         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
390         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
391         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
392
393         /* TODO: necessary? specs indicate not */
394         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
395         reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
396         rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg & ~(1 << 3));
397         if (priv->r8185) {
398                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
399                 rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg | (1 << 4));
400         }
401         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
402
403         /* TODO: set CONFIG5 for calibrating AGC on rtl8180 + philips radio? */
404
405         /* TODO: turn off hw wep on rtl8180 */
406
407         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
408
409         if (priv->r8185) {
410                 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
411                 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
412                 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
413
414                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
415
416                 /* TODO: set ClkRun enable? necessary? */
417                 reg = rtl818x_ioread8(priv, &priv->map->GP_ENABLE);
418                 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, reg & ~(1 << 6));
419                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
420                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
421                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | (1 << 2));
422                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
423         } else {
424                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x1);
425                 rtl818x_iowrite8(priv, &priv->map->SECURITY, 0);
426
427                 rtl818x_iowrite8(priv, &priv->map->PHY_DELAY, 0x6);
428                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 0x4C);
429         }
430
431         priv->rf->init(dev);
432         if (priv->r8185)
433                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
434         return 0;
435 }
436
437 static int rtl8180_init_rx_ring(struct ieee80211_hw *dev)
438 {
439         struct rtl8180_priv *priv = dev->priv;
440         struct rtl8180_rx_desc *entry;
441         int i;
442
443         priv->rx_ring = pci_alloc_consistent(priv->pdev,
444                                              sizeof(*priv->rx_ring) * 32,
445                                              &priv->rx_ring_dma);
446
447         if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
448                 wiphy_err(dev->wiphy, "Cannot allocate RX ring\n");
449                 return -ENOMEM;
450         }
451
452         memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * 32);
453         priv->rx_idx = 0;
454
455         for (i = 0; i < 32; i++) {
456                 struct sk_buff *skb = dev_alloc_skb(MAX_RX_SIZE);
457                 dma_addr_t *mapping;
458                 entry = &priv->rx_ring[i];
459                 if (!skb)
460                         return 0;
461
462                 priv->rx_buf[i] = skb;
463                 mapping = (dma_addr_t *)skb->cb;
464                 *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
465                                           MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
466                 entry->rx_buf = cpu_to_le32(*mapping);
467                 entry->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN |
468                                            MAX_RX_SIZE);
469         }
470         entry->flags |= cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR);
471         return 0;
472 }
473
474 static void rtl8180_free_rx_ring(struct ieee80211_hw *dev)
475 {
476         struct rtl8180_priv *priv = dev->priv;
477         int i;
478
479         for (i = 0; i < 32; i++) {
480                 struct sk_buff *skb = priv->rx_buf[i];
481                 if (!skb)
482                         continue;
483
484                 pci_unmap_single(priv->pdev,
485                                  *((dma_addr_t *)skb->cb),
486                                  MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
487                 kfree_skb(skb);
488         }
489
490         pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * 32,
491                             priv->rx_ring, priv->rx_ring_dma);
492         priv->rx_ring = NULL;
493 }
494
495 static int rtl8180_init_tx_ring(struct ieee80211_hw *dev,
496                                 unsigned int prio, unsigned int entries)
497 {
498         struct rtl8180_priv *priv = dev->priv;
499         struct rtl8180_tx_desc *ring;
500         dma_addr_t dma;
501         int i;
502
503         ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
504         if (!ring || (unsigned long)ring & 0xFF) {
505                 wiphy_err(dev->wiphy, "Cannot allocate TX ring (prio = %d)\n",
506                           prio);
507                 return -ENOMEM;
508         }
509
510         memset(ring, 0, sizeof(*ring)*entries);
511         priv->tx_ring[prio].desc = ring;
512         priv->tx_ring[prio].dma = dma;
513         priv->tx_ring[prio].idx = 0;
514         priv->tx_ring[prio].entries = entries;
515         skb_queue_head_init(&priv->tx_ring[prio].queue);
516
517         for (i = 0; i < entries; i++)
518                 ring[i].next_tx_desc =
519                         cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
520
521         return 0;
522 }
523
524 static void rtl8180_free_tx_ring(struct ieee80211_hw *dev, unsigned int prio)
525 {
526         struct rtl8180_priv *priv = dev->priv;
527         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
528
529         while (skb_queue_len(&ring->queue)) {
530                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
531                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
532
533                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
534                                  skb->len, PCI_DMA_TODEVICE);
535                 kfree_skb(skb);
536                 ring->idx = (ring->idx + 1) % ring->entries;
537         }
538
539         pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
540                             ring->desc, ring->dma);
541         ring->desc = NULL;
542 }
543
544 static int rtl8180_start(struct ieee80211_hw *dev)
545 {
546         struct rtl8180_priv *priv = dev->priv;
547         int ret, i;
548         u32 reg;
549
550         ret = rtl8180_init_rx_ring(dev);
551         if (ret)
552                 return ret;
553
554         for (i = 0; i < 4; i++)
555                 if ((ret = rtl8180_init_tx_ring(dev, i, 16)))
556                         goto err_free_rings;
557
558         ret = rtl8180_init_hw(dev);
559         if (ret)
560                 goto err_free_rings;
561
562         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
563         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
564         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
565         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
566         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
567
568         ret = request_irq(priv->pdev->irq, rtl8180_interrupt,
569                           IRQF_SHARED, KBUILD_MODNAME, dev);
570         if (ret) {
571                 wiphy_err(dev->wiphy, "failed to register IRQ handler\n");
572                 goto err_free_rings;
573         }
574
575         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
576
577         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
578         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
579
580         reg = RTL818X_RX_CONF_ONLYERLPKT |
581               RTL818X_RX_CONF_RX_AUTORESETPHY |
582               RTL818X_RX_CONF_MGMT |
583               RTL818X_RX_CONF_DATA |
584               (7 << 8 /* MAX RX DMA */) |
585               RTL818X_RX_CONF_BROADCAST |
586               RTL818X_RX_CONF_NICMAC;
587
588         if (priv->r8185)
589                 reg |= RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2;
590         else {
591                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE1)
592                         ? RTL818X_RX_CONF_CSDM1 : 0;
593                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE2)
594                         ? RTL818X_RX_CONF_CSDM2 : 0;
595         }
596
597         priv->rx_conf = reg;
598         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
599
600         if (priv->r8185) {
601                 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
602                 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
603                 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
604                 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
605
606                 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
607                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
608                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
609                 reg |=  RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
610                 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
611
612                 /* disable early TX */
613                 rtl818x_iowrite8(priv, (u8 __iomem *)priv->map + 0xec, 0x3f);
614         }
615
616         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
617         reg |= (6 << 21 /* MAX TX DMA */) |
618                RTL818X_TX_CONF_NO_ICV;
619
620         if (priv->r8185)
621                 reg &= ~RTL818X_TX_CONF_PROBE_DTS;
622         else
623                 reg &= ~RTL818X_TX_CONF_HW_SEQNUM;
624
625         /* different meaning, same value on both rtl8185 and rtl8180 */
626         reg &= ~RTL818X_TX_CONF_SAT_HWPLCP;
627
628         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
629
630         reg = rtl818x_ioread8(priv, &priv->map->CMD);
631         reg |= RTL818X_CMD_RX_ENABLE;
632         reg |= RTL818X_CMD_TX_ENABLE;
633         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
634
635         return 0;
636
637  err_free_rings:
638         rtl8180_free_rx_ring(dev);
639         for (i = 0; i < 4; i++)
640                 if (priv->tx_ring[i].desc)
641                         rtl8180_free_tx_ring(dev, i);
642
643         return ret;
644 }
645
646 static void rtl8180_stop(struct ieee80211_hw *dev)
647 {
648         struct rtl8180_priv *priv = dev->priv;
649         u8 reg;
650         int i;
651
652         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
653
654         reg = rtl818x_ioread8(priv, &priv->map->CMD);
655         reg &= ~RTL818X_CMD_TX_ENABLE;
656         reg &= ~RTL818X_CMD_RX_ENABLE;
657         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
658
659         priv->rf->stop(dev);
660
661         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
662         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
663         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
664         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
665
666         free_irq(priv->pdev->irq, dev);
667
668         rtl8180_free_rx_ring(dev);
669         for (i = 0; i < 4; i++)
670                 rtl8180_free_tx_ring(dev, i);
671 }
672
673 static u64 rtl8180_get_tsf(struct ieee80211_hw *dev)
674 {
675         struct rtl8180_priv *priv = dev->priv;
676
677         return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
678                (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
679 }
680
681 static void rtl8180_beacon_work(struct work_struct *work)
682 {
683         struct rtl8180_vif *vif_priv =
684                 container_of(work, struct rtl8180_vif, beacon_work.work);
685         struct ieee80211_vif *vif =
686                 container_of((void *)vif_priv, struct ieee80211_vif, drv_priv);
687         struct ieee80211_hw *dev = vif_priv->dev;
688         struct ieee80211_mgmt *mgmt;
689         struct sk_buff *skb;
690         int err = 0;
691
692         /* don't overflow the tx ring */
693         if (ieee80211_queue_stopped(dev, 0))
694                 goto resched;
695
696         /* grab a fresh beacon */
697         skb = ieee80211_beacon_get(dev, vif);
698         if (!skb)
699                 goto resched;
700
701         /*
702          * update beacon timestamp w/ TSF value
703          * TODO: make hardware update beacon timestamp
704          */
705         mgmt = (struct ieee80211_mgmt *)skb->data;
706         mgmt->u.beacon.timestamp = cpu_to_le64(rtl8180_get_tsf(dev));
707
708         /* TODO: use actual beacon queue */
709         skb_set_queue_mapping(skb, 0);
710
711         err = rtl8180_tx(dev, skb);
712         WARN_ON(err);
713
714 resched:
715         /*
716          * schedule next beacon
717          * TODO: use hardware support for beacon timing
718          */
719         schedule_delayed_work(&vif_priv->beacon_work,
720                         usecs_to_jiffies(1024 * vif->bss_conf.beacon_int));
721 }
722
723 static int rtl8180_add_interface(struct ieee80211_hw *dev,
724                                  struct ieee80211_vif *vif)
725 {
726         struct rtl8180_priv *priv = dev->priv;
727         struct rtl8180_vif *vif_priv;
728
729         /*
730          * We only support one active interface at a time.
731          */
732         if (priv->vif)
733                 return -EBUSY;
734
735         switch (vif->type) {
736         case NL80211_IFTYPE_STATION:
737         case NL80211_IFTYPE_ADHOC:
738                 break;
739         default:
740                 return -EOPNOTSUPP;
741         }
742
743         priv->vif = vif;
744
745         /* Initialize driver private area */
746         vif_priv = (struct rtl8180_vif *)&vif->drv_priv;
747         vif_priv->dev = dev;
748         INIT_DELAYED_WORK(&vif_priv->beacon_work, rtl8180_beacon_work);
749         vif_priv->enable_beacon = false;
750
751         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
752         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->MAC[0],
753                           le32_to_cpu(*(__le32 *)vif->addr));
754         rtl818x_iowrite16(priv, (__le16 __iomem *)&priv->map->MAC[4],
755                           le16_to_cpu(*(__le16 *)(vif->addr + 4)));
756         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
757
758         return 0;
759 }
760
761 static void rtl8180_remove_interface(struct ieee80211_hw *dev,
762                                      struct ieee80211_vif *vif)
763 {
764         struct rtl8180_priv *priv = dev->priv;
765         priv->vif = NULL;
766 }
767
768 static int rtl8180_config(struct ieee80211_hw *dev, u32 changed)
769 {
770         struct rtl8180_priv *priv = dev->priv;
771         struct ieee80211_conf *conf = &dev->conf;
772
773         priv->rf->set_chan(dev, conf);
774
775         return 0;
776 }
777
778 static void rtl8180_bss_info_changed(struct ieee80211_hw *dev,
779                                      struct ieee80211_vif *vif,
780                                      struct ieee80211_bss_conf *info,
781                                      u32 changed)
782 {
783         struct rtl8180_priv *priv = dev->priv;
784         struct rtl8180_vif *vif_priv;
785         int i;
786         u8 reg;
787
788         vif_priv = (struct rtl8180_vif *)&vif->drv_priv;
789
790         if (changed & BSS_CHANGED_BSSID) {
791                 for (i = 0; i < ETH_ALEN; i++)
792                         rtl818x_iowrite8(priv, &priv->map->BSSID[i],
793                                          info->bssid[i]);
794
795                 if (is_valid_ether_addr(info->bssid)) {
796                         if (vif->type == NL80211_IFTYPE_ADHOC)
797                                 reg = RTL818X_MSR_ADHOC;
798                         else
799                                 reg = RTL818X_MSR_INFRA;
800                 } else
801                         reg = RTL818X_MSR_NO_LINK;
802                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
803         }
804
805         if (changed & BSS_CHANGED_ERP_SLOT && priv->rf->conf_erp)
806                 priv->rf->conf_erp(dev, info);
807
808         if (changed & BSS_CHANGED_BEACON_ENABLED)
809                 vif_priv->enable_beacon = info->enable_beacon;
810
811         if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) {
812                 cancel_delayed_work_sync(&vif_priv->beacon_work);
813                 if (vif_priv->enable_beacon)
814                         schedule_work(&vif_priv->beacon_work.work);
815         }
816 }
817
818 static u64 rtl8180_prepare_multicast(struct ieee80211_hw *dev,
819                                      struct netdev_hw_addr_list *mc_list)
820 {
821         return netdev_hw_addr_list_count(mc_list);
822 }
823
824 static void rtl8180_configure_filter(struct ieee80211_hw *dev,
825                                      unsigned int changed_flags,
826                                      unsigned int *total_flags,
827                                      u64 multicast)
828 {
829         struct rtl8180_priv *priv = dev->priv;
830
831         if (changed_flags & FIF_FCSFAIL)
832                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
833         if (changed_flags & FIF_CONTROL)
834                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
835         if (changed_flags & FIF_OTHER_BSS)
836                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
837         if (*total_flags & FIF_ALLMULTI || multicast > 0)
838                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
839         else
840                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
841
842         *total_flags = 0;
843
844         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
845                 *total_flags |= FIF_FCSFAIL;
846         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
847                 *total_flags |= FIF_CONTROL;
848         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
849                 *total_flags |= FIF_OTHER_BSS;
850         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
851                 *total_flags |= FIF_ALLMULTI;
852
853         rtl818x_iowrite32(priv, &priv->map->RX_CONF, priv->rx_conf);
854 }
855
856 static const struct ieee80211_ops rtl8180_ops = {
857         .tx                     = rtl8180_tx,
858         .start                  = rtl8180_start,
859         .stop                   = rtl8180_stop,
860         .add_interface          = rtl8180_add_interface,
861         .remove_interface       = rtl8180_remove_interface,
862         .config                 = rtl8180_config,
863         .bss_info_changed       = rtl8180_bss_info_changed,
864         .prepare_multicast      = rtl8180_prepare_multicast,
865         .configure_filter       = rtl8180_configure_filter,
866         .get_tsf                = rtl8180_get_tsf,
867 };
868
869 static void rtl8180_eeprom_register_read(struct eeprom_93cx6 *eeprom)
870 {
871         struct ieee80211_hw *dev = eeprom->data;
872         struct rtl8180_priv *priv = dev->priv;
873         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
874
875         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
876         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
877         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
878         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
879 }
880
881 static void rtl8180_eeprom_register_write(struct eeprom_93cx6 *eeprom)
882 {
883         struct ieee80211_hw *dev = eeprom->data;
884         struct rtl8180_priv *priv = dev->priv;
885         u8 reg = 2 << 6;
886
887         if (eeprom->reg_data_in)
888                 reg |= RTL818X_EEPROM_CMD_WRITE;
889         if (eeprom->reg_data_out)
890                 reg |= RTL818X_EEPROM_CMD_READ;
891         if (eeprom->reg_data_clock)
892                 reg |= RTL818X_EEPROM_CMD_CK;
893         if (eeprom->reg_chip_select)
894                 reg |= RTL818X_EEPROM_CMD_CS;
895
896         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
897         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
898         udelay(10);
899 }
900
901 static int __devinit rtl8180_probe(struct pci_dev *pdev,
902                                    const struct pci_device_id *id)
903 {
904         struct ieee80211_hw *dev;
905         struct rtl8180_priv *priv;
906         unsigned long mem_addr, mem_len;
907         unsigned int io_addr, io_len;
908         int err, i;
909         struct eeprom_93cx6 eeprom;
910         const char *chip_name, *rf_name = NULL;
911         u32 reg;
912         u16 eeprom_val;
913         u8 mac_addr[ETH_ALEN];
914
915         err = pci_enable_device(pdev);
916         if (err) {
917                 printk(KERN_ERR "%s (rtl8180): Cannot enable new PCI device\n",
918                        pci_name(pdev));
919                 return err;
920         }
921
922         err = pci_request_regions(pdev, KBUILD_MODNAME);
923         if (err) {
924                 printk(KERN_ERR "%s (rtl8180): Cannot obtain PCI resources\n",
925                        pci_name(pdev));
926                 return err;
927         }
928
929         io_addr = pci_resource_start(pdev, 0);
930         io_len = pci_resource_len(pdev, 0);
931         mem_addr = pci_resource_start(pdev, 1);
932         mem_len = pci_resource_len(pdev, 1);
933
934         if (mem_len < sizeof(struct rtl818x_csr) ||
935             io_len < sizeof(struct rtl818x_csr)) {
936                 printk(KERN_ERR "%s (rtl8180): Too short PCI resources\n",
937                        pci_name(pdev));
938                 err = -ENOMEM;
939                 goto err_free_reg;
940         }
941
942         if ((err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) ||
943             (err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))) {
944                 printk(KERN_ERR "%s (rtl8180): No suitable DMA available\n",
945                        pci_name(pdev));
946                 goto err_free_reg;
947         }
948
949         pci_set_master(pdev);
950
951         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8180_ops);
952         if (!dev) {
953                 printk(KERN_ERR "%s (rtl8180): ieee80211 alloc failed\n",
954                        pci_name(pdev));
955                 err = -ENOMEM;
956                 goto err_free_reg;
957         }
958
959         priv = dev->priv;
960         priv->pdev = pdev;
961
962         dev->max_rates = 2;
963         SET_IEEE80211_DEV(dev, &pdev->dev);
964         pci_set_drvdata(pdev, dev);
965
966         priv->map = pci_iomap(pdev, 1, mem_len);
967         if (!priv->map)
968                 priv->map = pci_iomap(pdev, 0, io_len);
969
970         if (!priv->map) {
971                 printk(KERN_ERR "%s (rtl8180): Cannot map device memory\n",
972                        pci_name(pdev));
973                 goto err_free_dev;
974         }
975
976         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
977         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
978
979         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
980         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
981
982         priv->band.band = IEEE80211_BAND_2GHZ;
983         priv->band.channels = priv->channels;
984         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
985         priv->band.bitrates = priv->rates;
986         priv->band.n_bitrates = 4;
987         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
988
989         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
990                      IEEE80211_HW_RX_INCLUDES_FCS |
991                      IEEE80211_HW_SIGNAL_UNSPEC;
992         dev->vif_data_size = sizeof(struct rtl8180_vif);
993         dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
994                                         BIT(NL80211_IFTYPE_ADHOC);
995         dev->queues = 1;
996         dev->max_signal = 65;
997
998         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
999         reg &= RTL818X_TX_CONF_HWVER_MASK;
1000         switch (reg) {
1001         case RTL818X_TX_CONF_R8180_ABCD:
1002                 chip_name = "RTL8180";
1003                 break;
1004         case RTL818X_TX_CONF_R8180_F:
1005                 chip_name = "RTL8180vF";
1006                 break;
1007         case RTL818X_TX_CONF_R8185_ABC:
1008                 chip_name = "RTL8185";
1009                 break;
1010         case RTL818X_TX_CONF_R8185_D:
1011                 chip_name = "RTL8185vD";
1012                 break;
1013         default:
1014                 printk(KERN_ERR "%s (rtl8180): Unknown chip! (0x%x)\n",
1015                        pci_name(pdev), reg >> 25);
1016                 goto err_iounmap;
1017         }
1018
1019         priv->r8185 = reg & RTL818X_TX_CONF_R8185_ABC;
1020         if (priv->r8185) {
1021                 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1022                 pci_try_set_mwi(pdev);
1023         }
1024
1025         eeprom.data = dev;
1026         eeprom.register_read = rtl8180_eeprom_register_read;
1027         eeprom.register_write = rtl8180_eeprom_register_write;
1028         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1029                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1030         else
1031                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1032
1033         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_PROGRAM);
1034         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1035         udelay(10);
1036
1037         eeprom_93cx6_read(&eeprom, 0x06, &eeprom_val);
1038         eeprom_val &= 0xFF;
1039         switch (eeprom_val) {
1040         case 1: rf_name = "Intersil";
1041                 break;
1042         case 2: rf_name = "RFMD";
1043                 break;
1044         case 3: priv->rf = &sa2400_rf_ops;
1045                 break;
1046         case 4: priv->rf = &max2820_rf_ops;
1047                 break;
1048         case 5: priv->rf = &grf5101_rf_ops;
1049                 break;
1050         case 9: priv->rf = rtl8180_detect_rf(dev);
1051                 break;
1052         case 10:
1053                 rf_name = "RTL8255";
1054                 break;
1055         default:
1056                 printk(KERN_ERR "%s (rtl8180): Unknown RF! (0x%x)\n",
1057                        pci_name(pdev), eeprom_val);
1058                 goto err_iounmap;
1059         }
1060
1061         if (!priv->rf) {
1062                 printk(KERN_ERR "%s (rtl8180): %s RF frontend not supported!\n",
1063                        pci_name(pdev), rf_name);
1064                 goto err_iounmap;
1065         }
1066
1067         eeprom_93cx6_read(&eeprom, 0x17, &eeprom_val);
1068         priv->csthreshold = eeprom_val >> 8;
1069         if (!priv->r8185) {
1070                 __le32 anaparam;
1071                 eeprom_93cx6_multiread(&eeprom, 0xD, (__le16 *)&anaparam, 2);
1072                 priv->anaparam = le32_to_cpu(anaparam);
1073                 eeprom_93cx6_read(&eeprom, 0x19, &priv->rfparam);
1074         }
1075
1076         eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)mac_addr, 3);
1077         if (!is_valid_ether_addr(mac_addr)) {
1078                 printk(KERN_WARNING "%s (rtl8180): Invalid hwaddr! Using"
1079                        " randomly generated MAC addr\n", pci_name(pdev));
1080                 random_ether_addr(mac_addr);
1081         }
1082         SET_IEEE80211_PERM_ADDR(dev, mac_addr);
1083
1084         /* CCK TX power */
1085         for (i = 0; i < 14; i += 2) {
1086                 u16 txpwr;
1087                 eeprom_93cx6_read(&eeprom, 0x10 + (i >> 1), &txpwr);
1088                 priv->channels[i].hw_value = txpwr & 0xFF;
1089                 priv->channels[i + 1].hw_value = txpwr >> 8;
1090         }
1091
1092         /* OFDM TX power */
1093         if (priv->r8185) {
1094                 for (i = 0; i < 14; i += 2) {
1095                         u16 txpwr;
1096                         eeprom_93cx6_read(&eeprom, 0x20 + (i >> 1), &txpwr);
1097                         priv->channels[i].hw_value |= (txpwr & 0xFF) << 8;
1098                         priv->channels[i + 1].hw_value |= txpwr & 0xFF00;
1099                 }
1100         }
1101
1102         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1103
1104         spin_lock_init(&priv->lock);
1105
1106         err = ieee80211_register_hw(dev);
1107         if (err) {
1108                 printk(KERN_ERR "%s (rtl8180): Cannot register device\n",
1109                        pci_name(pdev));
1110                 goto err_iounmap;
1111         }
1112
1113         wiphy_info(dev->wiphy, "hwaddr %pm, %s + %s\n",
1114                    mac_addr, chip_name, priv->rf->name);
1115
1116         return 0;
1117
1118  err_iounmap:
1119         iounmap(priv->map);
1120
1121  err_free_dev:
1122         pci_set_drvdata(pdev, NULL);
1123         ieee80211_free_hw(dev);
1124
1125  err_free_reg:
1126         pci_release_regions(pdev);
1127         pci_disable_device(pdev);
1128         return err;
1129 }
1130
1131 static void __devexit rtl8180_remove(struct pci_dev *pdev)
1132 {
1133         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
1134         struct rtl8180_priv *priv;
1135
1136         if (!dev)
1137                 return;
1138
1139         ieee80211_unregister_hw(dev);
1140
1141         priv = dev->priv;
1142
1143         pci_iounmap(pdev, priv->map);
1144         pci_release_regions(pdev);
1145         pci_disable_device(pdev);
1146         ieee80211_free_hw(dev);
1147 }
1148
1149 #ifdef CONFIG_PM
1150 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
1151 {
1152         pci_save_state(pdev);
1153         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1154         return 0;
1155 }
1156
1157 static int rtl8180_resume(struct pci_dev *pdev)
1158 {
1159         pci_set_power_state(pdev, PCI_D0);
1160         pci_restore_state(pdev);
1161         return 0;
1162 }
1163
1164 #endif /* CONFIG_PM */
1165
1166 static struct pci_driver rtl8180_driver = {
1167         .name           = KBUILD_MODNAME,
1168         .id_table       = rtl8180_table,
1169         .probe          = rtl8180_probe,
1170         .remove         = __devexit_p(rtl8180_remove),
1171 #ifdef CONFIG_PM
1172         .suspend        = rtl8180_suspend,
1173         .resume         = rtl8180_resume,
1174 #endif /* CONFIG_PM */
1175 };
1176
1177 static int __init rtl8180_init(void)
1178 {
1179         return pci_register_driver(&rtl8180_driver);
1180 }
1181
1182 static void __exit rtl8180_exit(void)
1183 {
1184         pci_unregister_driver(&rtl8180_driver);
1185 }
1186
1187 module_init(rtl8180_init);
1188 module_exit(rtl8180_exit);