p54pci: increase ring buffer index counter when skipping
[linux-2.6.git] / drivers / net / wireless / p54 / p54pci.c
1
2 /*
3  * Linux device driver for PCI based Prism54
4  *
5  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
6  * Copyright (c) 2008, Christian Lamparter <chunkeey@web.de>
7  *
8  * Based on the islsm (softmac prism54) driver, which is:
9  * Copyright 2004-2006 Jean-Baptiste Note <jean-baptiste.note@m4x.org>, et al.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License version 2 as
13  * published by the Free Software Foundation.
14  */
15
16 #include <linux/init.h>
17 #include <linux/pci.h>
18 #include <linux/firmware.h>
19 #include <linux/etherdevice.h>
20 #include <linux/delay.h>
21 #include <linux/completion.h>
22 #include <net/mac80211.h>
23
24 #include "p54.h"
25 #include "p54pci.h"
26
27 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
28 MODULE_DESCRIPTION("Prism54 PCI wireless driver");
29 MODULE_LICENSE("GPL");
30 MODULE_ALIAS("prism54pci");
31
32 static struct pci_device_id p54p_table[] __devinitdata = {
33         /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
34         { PCI_DEVICE(0x1260, 0x3890) },
35         /* 3COM 3CRWE154G72 Wireless LAN adapter */
36         { PCI_DEVICE(0x10b7, 0x6001) },
37         /* Intersil PRISM Indigo Wireless LAN adapter */
38         { PCI_DEVICE(0x1260, 0x3877) },
39         /* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
40         { PCI_DEVICE(0x1260, 0x3886) },
41         { },
42 };
43
44 MODULE_DEVICE_TABLE(pci, p54p_table);
45
46 static int p54p_upload_firmware(struct ieee80211_hw *dev)
47 {
48         struct p54p_priv *priv = dev->priv;
49         const struct firmware *fw_entry = NULL;
50         __le32 reg;
51         int err;
52         __le32 *data;
53         u32 remains, left, device_addr;
54
55         P54P_WRITE(int_enable, cpu_to_le32(0));
56         P54P_READ(int_enable);
57         udelay(10);
58
59         reg = P54P_READ(ctrl_stat);
60         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
61         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RAMBOOT);
62         P54P_WRITE(ctrl_stat, reg);
63         P54P_READ(ctrl_stat);
64         udelay(10);
65
66         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
67         P54P_WRITE(ctrl_stat, reg);
68         wmb();
69         udelay(10);
70
71         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
72         P54P_WRITE(ctrl_stat, reg);
73         wmb();
74
75         mdelay(50);
76
77         err = request_firmware(&fw_entry, "isl3886", &priv->pdev->dev);
78         if (err) {
79                 printk(KERN_ERR "%s (p54pci): cannot find firmware "
80                        "(isl3886)\n", pci_name(priv->pdev));
81                 return err;
82         }
83
84         p54_parse_firmware(dev, fw_entry);
85
86         data = (__le32 *) fw_entry->data;
87         remains = fw_entry->size;
88         device_addr = ISL38XX_DEV_FIRMWARE_ADDR;
89         while (remains) {
90                 u32 i = 0;
91                 left = min((u32)0x1000, remains);
92                 P54P_WRITE(direct_mem_base, cpu_to_le32(device_addr));
93                 P54P_READ(int_enable);
94
95                 device_addr += 0x1000;
96                 while (i < left) {
97                         P54P_WRITE(direct_mem_win[i], *data++);
98                         i += sizeof(u32);
99                 }
100
101                 remains -= left;
102                 P54P_READ(int_enable);
103         }
104
105         release_firmware(fw_entry);
106
107         reg = P54P_READ(ctrl_stat);
108         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_CLKRUN);
109         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
110         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RAMBOOT);
111         P54P_WRITE(ctrl_stat, reg);
112         P54P_READ(ctrl_stat);
113         udelay(10);
114
115         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
116         P54P_WRITE(ctrl_stat, reg);
117         wmb();
118         udelay(10);
119
120         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
121         P54P_WRITE(ctrl_stat, reg);
122         wmb();
123         udelay(10);
124
125         return 0;
126 }
127
128 static irqreturn_t p54p_simple_interrupt(int irq, void *dev_id)
129 {
130         struct p54p_priv *priv = (struct p54p_priv *) dev_id;
131         __le32 reg;
132
133         reg = P54P_READ(int_ident);
134         P54P_WRITE(int_ack, reg);
135
136         if (reg & P54P_READ(int_enable))
137                 complete(&priv->boot_comp);
138
139         return IRQ_HANDLED;
140 }
141
142 static int p54p_read_eeprom(struct ieee80211_hw *dev)
143 {
144         struct p54p_priv *priv = dev->priv;
145         struct p54p_ring_control *ring_control = priv->ring_control;
146         int err;
147         struct p54_control_hdr *hdr;
148         void *eeprom;
149         dma_addr_t rx_mapping, tx_mapping;
150         u16 alen;
151
152         init_completion(&priv->boot_comp);
153         err = request_irq(priv->pdev->irq, &p54p_simple_interrupt,
154                           IRQF_SHARED, "p54pci", priv);
155         if (err) {
156                 printk(KERN_ERR "%s (p54pci): failed to register IRQ handler\n",
157                        pci_name(priv->pdev));
158                 return err;
159         }
160
161         eeprom = kmalloc(0x2010 + EEPROM_READBACK_LEN, GFP_KERNEL);
162         if (!eeprom) {
163                 printk(KERN_ERR "%s (p54pci): no memory for eeprom!\n",
164                        pci_name(priv->pdev));
165                 err = -ENOMEM;
166                 goto out;
167         }
168
169         memset(ring_control, 0, sizeof(*ring_control));
170         P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma));
171         P54P_READ(ring_control_base);
172         udelay(10);
173
174         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
175         P54P_READ(int_enable);
176         udelay(10);
177
178         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
179
180         if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
181                 printk(KERN_ERR "%s (p54pci): Cannot boot firmware!\n",
182                        pci_name(priv->pdev));
183                 err = -EINVAL;
184                 goto out;
185         }
186
187         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
188         P54P_READ(int_enable);
189
190         hdr = eeprom + 0x2010;
191         p54_fill_eeprom_readback(hdr);
192         hdr->req_id = cpu_to_le32(priv->common.rx_start);
193
194         rx_mapping = pci_map_single(priv->pdev, eeprom,
195                                     0x2010, PCI_DMA_FROMDEVICE);
196         tx_mapping = pci_map_single(priv->pdev, (void *)hdr,
197                                     EEPROM_READBACK_LEN, PCI_DMA_TODEVICE);
198
199         ring_control->rx_mgmt[0].host_addr = cpu_to_le32(rx_mapping);
200         ring_control->rx_mgmt[0].len = cpu_to_le16(0x2010);
201         ring_control->tx_data[0].host_addr = cpu_to_le32(tx_mapping);
202         ring_control->tx_data[0].device_addr = hdr->req_id;
203         ring_control->tx_data[0].len = cpu_to_le16(EEPROM_READBACK_LEN);
204
205         ring_control->host_idx[2] = cpu_to_le32(1);
206         ring_control->host_idx[1] = cpu_to_le32(1);
207
208         wmb();
209         mdelay(100);
210         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
211
212         wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ);
213         wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ);
214
215         pci_unmap_single(priv->pdev, tx_mapping,
216                          EEPROM_READBACK_LEN, PCI_DMA_TODEVICE);
217         pci_unmap_single(priv->pdev, rx_mapping,
218                          0x2010, PCI_DMA_FROMDEVICE);
219
220         alen = le16_to_cpu(ring_control->rx_mgmt[0].len);
221         if (le32_to_cpu(ring_control->device_idx[2]) != 1 ||
222             alen < 0x10) {
223                 printk(KERN_ERR "%s (p54pci): Cannot read eeprom!\n",
224                        pci_name(priv->pdev));
225                 err = -EINVAL;
226                 goto out;
227         }
228
229         p54_parse_eeprom(dev, (u8 *)eeprom + 0x10, alen - 0x10);
230
231  out:
232         kfree(eeprom);
233         P54P_WRITE(int_enable, cpu_to_le32(0));
234         P54P_READ(int_enable);
235         udelay(10);
236         free_irq(priv->pdev->irq, priv);
237         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
238         return err;
239 }
240
241 static void p54p_refill_rx_ring(struct ieee80211_hw *dev,
242         int ring_index, struct p54p_desc *ring, u32 ring_limit,
243         struct sk_buff **rx_buf)
244 {
245         struct p54p_priv *priv = dev->priv;
246         struct p54p_ring_control *ring_control = priv->ring_control;
247         u32 limit, idx, i;
248
249         idx = le32_to_cpu(ring_control->host_idx[ring_index]);
250         limit = idx;
251         limit -= le32_to_cpu(ring_control->device_idx[ring_index]);
252         limit = ring_limit - limit;
253
254         i = idx % ring_limit;
255         while (limit-- > 1) {
256                 struct p54p_desc *desc = &ring[i];
257
258                 if (!desc->host_addr) {
259                         struct sk_buff *skb;
260                         dma_addr_t mapping;
261                         skb = dev_alloc_skb(MAX_RX_SIZE);
262                         if (!skb)
263                                 break;
264
265                         mapping = pci_map_single(priv->pdev,
266                                                  skb_tail_pointer(skb),
267                                                  MAX_RX_SIZE,
268                                                  PCI_DMA_FROMDEVICE);
269                         desc->host_addr = cpu_to_le32(mapping);
270                         desc->device_addr = 0;  // FIXME: necessary?
271                         desc->len = cpu_to_le16(MAX_RX_SIZE);
272                         desc->flags = 0;
273                         rx_buf[i] = skb;
274                 }
275
276                 i++;
277                 idx++;
278                 i %= ring_limit;
279         }
280
281         wmb();
282         ring_control->host_idx[ring_index] = cpu_to_le32(idx);
283 }
284
285 static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index,
286         int ring_index, struct p54p_desc *ring, u32 ring_limit,
287         struct sk_buff **rx_buf)
288 {
289         struct p54p_priv *priv = dev->priv;
290         struct p54p_ring_control *ring_control = priv->ring_control;
291         struct p54p_desc *desc;
292         u32 idx, i;
293
294         i = (*index) % ring_limit;
295         (*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]);
296         idx %= ring_limit;
297         while (i != idx) {
298                 u16 len;
299                 struct sk_buff *skb;
300                 desc = &ring[i];
301                 len = le16_to_cpu(desc->len);
302                 skb = rx_buf[i];
303
304                 if (!skb) {
305                         i++;
306                         i %= ring_limit;
307                         continue;
308                 }
309                 skb_put(skb, len);
310
311                 if (p54_rx(dev, skb)) {
312                         pci_unmap_single(priv->pdev,
313                                          le32_to_cpu(desc->host_addr),
314                                          MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
315                         rx_buf[i] = NULL;
316                         desc->host_addr = 0;
317                 } else {
318                         skb_trim(skb, 0);
319                         desc->len = cpu_to_le16(MAX_RX_SIZE);
320                 }
321
322                 i++;
323                 i %= ring_limit;
324         }
325
326         p54p_refill_rx_ring(dev, ring_index, ring, ring_limit, rx_buf);
327 }
328
329 /* caller must hold priv->lock */
330 static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index,
331         int ring_index, struct p54p_desc *ring, u32 ring_limit,
332         void **tx_buf)
333 {
334         struct p54p_priv *priv = dev->priv;
335         struct p54p_ring_control *ring_control = priv->ring_control;
336         struct p54p_desc *desc;
337         u32 idx, i;
338
339         i = (*index) % ring_limit;
340         (*index) = idx = le32_to_cpu(ring_control->device_idx[1]);
341         idx %= ring_limit;
342
343         while (i != idx) {
344                 desc = &ring[i];
345                 kfree(tx_buf[i]);
346                 tx_buf[i] = NULL;
347
348                 pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
349                                  le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
350
351                 desc->host_addr = 0;
352                 desc->device_addr = 0;
353                 desc->len = 0;
354                 desc->flags = 0;
355
356                 i++;
357                 i %= ring_limit;
358         }
359 }
360
361 static void p54p_rx_tasklet(unsigned long dev_id)
362 {
363         struct ieee80211_hw *dev = (struct ieee80211_hw *)dev_id;
364         struct p54p_priv *priv = dev->priv;
365         struct p54p_ring_control *ring_control = priv->ring_control;
366
367         p54p_check_rx_ring(dev, &priv->rx_idx_mgmt, 2, ring_control->rx_mgmt,
368                 ARRAY_SIZE(ring_control->rx_mgmt), priv->rx_buf_mgmt);
369
370         p54p_check_rx_ring(dev, &priv->rx_idx_data, 0, ring_control->rx_data,
371                 ARRAY_SIZE(ring_control->rx_data), priv->rx_buf_data);
372
373         wmb();
374         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
375 }
376
377 static irqreturn_t p54p_interrupt(int irq, void *dev_id)
378 {
379         struct ieee80211_hw *dev = dev_id;
380         struct p54p_priv *priv = dev->priv;
381         struct p54p_ring_control *ring_control = priv->ring_control;
382         __le32 reg;
383
384         spin_lock(&priv->lock);
385         reg = P54P_READ(int_ident);
386         if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) {
387                 spin_unlock(&priv->lock);
388                 return IRQ_HANDLED;
389         }
390
391         P54P_WRITE(int_ack, reg);
392
393         reg &= P54P_READ(int_enable);
394
395         if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE)) {
396                 p54p_check_tx_ring(dev, &priv->tx_idx_mgmt,
397                                    3, ring_control->tx_mgmt,
398                                    ARRAY_SIZE(ring_control->tx_mgmt),
399                                    priv->tx_buf_mgmt);
400
401                 p54p_check_tx_ring(dev, &priv->tx_idx_data,
402                                    1, ring_control->tx_data,
403                                    ARRAY_SIZE(ring_control->tx_data),
404                                    priv->tx_buf_data);
405
406                 tasklet_schedule(&priv->rx_tasklet);
407
408         } else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT))
409                 complete(&priv->boot_comp);
410
411         spin_unlock(&priv->lock);
412
413         return reg ? IRQ_HANDLED : IRQ_NONE;
414 }
415
416 static void p54p_tx(struct ieee80211_hw *dev, struct p54_control_hdr *data,
417                     size_t len, int free_on_tx)
418 {
419         struct p54p_priv *priv = dev->priv;
420         struct p54p_ring_control *ring_control = priv->ring_control;
421         unsigned long flags;
422         struct p54p_desc *desc;
423         dma_addr_t mapping;
424         u32 device_idx, idx, i;
425
426         spin_lock_irqsave(&priv->lock, flags);
427
428         device_idx = le32_to_cpu(ring_control->device_idx[1]);
429         idx = le32_to_cpu(ring_control->host_idx[1]);
430         i = idx % ARRAY_SIZE(ring_control->tx_data);
431
432         mapping = pci_map_single(priv->pdev, data, len, PCI_DMA_TODEVICE);
433         desc = &ring_control->tx_data[i];
434         desc->host_addr = cpu_to_le32(mapping);
435         desc->device_addr = data->req_id;
436         desc->len = cpu_to_le16(len);
437         desc->flags = 0;
438
439         wmb();
440         ring_control->host_idx[1] = cpu_to_le32(idx + 1);
441
442         if (free_on_tx)
443                 priv->tx_buf_data[i] = data;
444
445         spin_unlock_irqrestore(&priv->lock, flags);
446
447         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
448         P54P_READ(dev_int);
449
450         /* FIXME: unlikely to happen because the device usually runs out of
451            memory before we fill the ring up, but we can make it impossible */
452         if (idx - device_idx > ARRAY_SIZE(ring_control->tx_data) - 2)
453                 printk(KERN_INFO "%s: tx overflow.\n", wiphy_name(dev->wiphy));
454 }
455
456 static int p54p_open(struct ieee80211_hw *dev)
457 {
458         struct p54p_priv *priv = dev->priv;
459         int err;
460
461         init_completion(&priv->boot_comp);
462         err = request_irq(priv->pdev->irq, &p54p_interrupt,
463                           IRQF_SHARED, "p54pci", dev);
464         if (err) {
465                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
466                        wiphy_name(dev->wiphy));
467                 return err;
468         }
469
470         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
471         priv->rx_idx_data = priv->tx_idx_data = 0;
472         priv->rx_idx_mgmt = priv->tx_idx_mgmt = 0;
473
474         p54p_refill_rx_ring(dev, 0, priv->ring_control->rx_data,
475                 ARRAY_SIZE(priv->ring_control->rx_data), priv->rx_buf_data);
476
477         p54p_refill_rx_ring(dev, 2, priv->ring_control->rx_mgmt,
478                 ARRAY_SIZE(priv->ring_control->rx_mgmt), priv->rx_buf_mgmt);
479
480         p54p_upload_firmware(dev);
481
482         P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma));
483         P54P_READ(ring_control_base);
484         wmb();
485         udelay(10);
486
487         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
488         P54P_READ(int_enable);
489         wmb();
490         udelay(10);
491
492         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
493         P54P_READ(dev_int);
494
495         if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
496                 printk(KERN_ERR "%s: Cannot boot firmware!\n",
497                        wiphy_name(dev->wiphy));
498                 free_irq(priv->pdev->irq, dev);
499                 return -ETIMEDOUT;
500         }
501
502         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
503         P54P_READ(int_enable);
504         wmb();
505         udelay(10);
506
507         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
508         P54P_READ(dev_int);
509         wmb();
510         udelay(10);
511
512         return 0;
513 }
514
515 static void p54p_stop(struct ieee80211_hw *dev)
516 {
517         struct p54p_priv *priv = dev->priv;
518         struct p54p_ring_control *ring_control = priv->ring_control;
519         unsigned int i;
520         struct p54p_desc *desc;
521
522         tasklet_kill(&priv->rx_tasklet);
523
524         P54P_WRITE(int_enable, cpu_to_le32(0));
525         P54P_READ(int_enable);
526         udelay(10);
527
528         free_irq(priv->pdev->irq, dev);
529
530         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
531
532         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_data); i++) {
533                 desc = &ring_control->rx_data[i];
534                 if (desc->host_addr)
535                         pci_unmap_single(priv->pdev,
536                                          le32_to_cpu(desc->host_addr),
537                                          MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
538                 kfree_skb(priv->rx_buf_data[i]);
539                 priv->rx_buf_data[i] = NULL;
540         }
541
542         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_mgmt); i++) {
543                 desc = &ring_control->rx_mgmt[i];
544                 if (desc->host_addr)
545                         pci_unmap_single(priv->pdev,
546                                          le32_to_cpu(desc->host_addr),
547                                          MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
548                 kfree_skb(priv->rx_buf_mgmt[i]);
549                 priv->rx_buf_mgmt[i] = NULL;
550         }
551
552         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_data); i++) {
553                 desc = &ring_control->tx_data[i];
554                 if (desc->host_addr)
555                         pci_unmap_single(priv->pdev,
556                                          le32_to_cpu(desc->host_addr),
557                                          le16_to_cpu(desc->len),
558                                          PCI_DMA_TODEVICE);
559
560                 kfree(priv->tx_buf_data[i]);
561                 priv->tx_buf_data[i] = NULL;
562         }
563
564         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_mgmt); i++) {
565                 desc = &ring_control->tx_mgmt[i];
566                 if (desc->host_addr)
567                         pci_unmap_single(priv->pdev,
568                                          le32_to_cpu(desc->host_addr),
569                                          le16_to_cpu(desc->len),
570                                          PCI_DMA_TODEVICE);
571
572                 kfree(priv->tx_buf_mgmt[i]);
573                 priv->tx_buf_mgmt[i] = NULL;
574         }
575
576         memset(ring_control, 0, sizeof(*ring_control));
577 }
578
579 static int __devinit p54p_probe(struct pci_dev *pdev,
580                                 const struct pci_device_id *id)
581 {
582         struct p54p_priv *priv;
583         struct ieee80211_hw *dev;
584         unsigned long mem_addr, mem_len;
585         int err;
586         DECLARE_MAC_BUF(mac);
587
588         err = pci_enable_device(pdev);
589         if (err) {
590                 printk(KERN_ERR "%s (p54pci): Cannot enable new PCI device\n",
591                        pci_name(pdev));
592                 return err;
593         }
594
595         mem_addr = pci_resource_start(pdev, 0);
596         mem_len = pci_resource_len(pdev, 0);
597         if (mem_len < sizeof(struct p54p_csr)) {
598                 printk(KERN_ERR "%s (p54pci): Too short PCI resources\n",
599                        pci_name(pdev));
600                 pci_disable_device(pdev);
601                 return err;
602         }
603
604         err = pci_request_regions(pdev, "p54pci");
605         if (err) {
606                 printk(KERN_ERR "%s (p54pci): Cannot obtain PCI resources\n",
607                        pci_name(pdev));
608                 return err;
609         }
610
611         if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) ||
612             pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
613                 printk(KERN_ERR "%s (p54pci): No suitable DMA available\n",
614                        pci_name(pdev));
615                 goto err_free_reg;
616         }
617
618         pci_set_master(pdev);
619         pci_try_set_mwi(pdev);
620
621         pci_write_config_byte(pdev, 0x40, 0);
622         pci_write_config_byte(pdev, 0x41, 0);
623
624         dev = p54_init_common(sizeof(*priv));
625         if (!dev) {
626                 printk(KERN_ERR "%s (p54pci): ieee80211 alloc failed\n",
627                        pci_name(pdev));
628                 err = -ENOMEM;
629                 goto err_free_reg;
630         }
631
632         priv = dev->priv;
633         priv->pdev = pdev;
634
635         SET_IEEE80211_DEV(dev, &pdev->dev);
636         pci_set_drvdata(pdev, dev);
637
638         priv->map = ioremap(mem_addr, mem_len);
639         if (!priv->map) {
640                 printk(KERN_ERR "%s (p54pci): Cannot map device memory\n",
641                        pci_name(pdev));
642                 err = -EINVAL;  // TODO: use a better error code?
643                 goto err_free_dev;
644         }
645
646         priv->ring_control = pci_alloc_consistent(pdev, sizeof(*priv->ring_control),
647                                                   &priv->ring_control_dma);
648         if (!priv->ring_control) {
649                 printk(KERN_ERR "%s (p54pci): Cannot allocate rings\n",
650                        pci_name(pdev));
651                 err = -ENOMEM;
652                 goto err_iounmap;
653         }
654         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
655
656         err = p54p_upload_firmware(dev);
657         if (err)
658                 goto err_free_desc;
659
660         err = p54p_read_eeprom(dev);
661         if (err)
662                 goto err_free_desc;
663
664         priv->common.open = p54p_open;
665         priv->common.stop = p54p_stop;
666         priv->common.tx = p54p_tx;
667
668         spin_lock_init(&priv->lock);
669         tasklet_init(&priv->rx_tasklet, p54p_rx_tasklet, (unsigned long)dev);
670
671         err = ieee80211_register_hw(dev);
672         if (err) {
673                 printk(KERN_ERR "%s (p54pci): Cannot register netdevice\n",
674                        pci_name(pdev));
675                 goto err_free_common;
676         }
677
678         printk(KERN_INFO "%s: hwaddr %s, isl38%02x\n",
679                wiphy_name(dev->wiphy),
680                print_mac(mac, dev->wiphy->perm_addr),
681                priv->common.version);
682
683         return 0;
684
685  err_free_common:
686         p54_free_common(dev);
687
688  err_free_desc:
689         pci_free_consistent(pdev, sizeof(*priv->ring_control),
690                             priv->ring_control, priv->ring_control_dma);
691
692  err_iounmap:
693         iounmap(priv->map);
694
695  err_free_dev:
696         pci_set_drvdata(pdev, NULL);
697         ieee80211_free_hw(dev);
698
699  err_free_reg:
700         pci_release_regions(pdev);
701         pci_disable_device(pdev);
702         return err;
703 }
704
705 static void __devexit p54p_remove(struct pci_dev *pdev)
706 {
707         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
708         struct p54p_priv *priv;
709
710         if (!dev)
711                 return;
712
713         ieee80211_unregister_hw(dev);
714         priv = dev->priv;
715         pci_free_consistent(pdev, sizeof(*priv->ring_control),
716                             priv->ring_control, priv->ring_control_dma);
717         p54_free_common(dev);
718         iounmap(priv->map);
719         pci_release_regions(pdev);
720         pci_disable_device(pdev);
721         ieee80211_free_hw(dev);
722 }
723
724 #ifdef CONFIG_PM
725 static int p54p_suspend(struct pci_dev *pdev, pm_message_t state)
726 {
727         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
728         struct p54p_priv *priv = dev->priv;
729
730         if (priv->common.mode != IEEE80211_IF_TYPE_INVALID) {
731                 ieee80211_stop_queues(dev);
732                 p54p_stop(dev);
733         }
734
735         pci_save_state(pdev);
736         pci_set_power_state(pdev, pci_choose_state(pdev, state));
737         return 0;
738 }
739
740 static int p54p_resume(struct pci_dev *pdev)
741 {
742         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
743         struct p54p_priv *priv = dev->priv;
744
745         pci_set_power_state(pdev, PCI_D0);
746         pci_restore_state(pdev);
747
748         if (priv->common.mode != IEEE80211_IF_TYPE_INVALID) {
749                 p54p_open(dev);
750                 ieee80211_wake_queues(dev);
751         }
752
753         return 0;
754 }
755 #endif /* CONFIG_PM */
756
757 static struct pci_driver p54p_driver = {
758         .name           = "p54pci",
759         .id_table       = p54p_table,
760         .probe          = p54p_probe,
761         .remove         = __devexit_p(p54p_remove),
762 #ifdef CONFIG_PM
763         .suspend        = p54p_suspend,
764         .resume         = p54p_resume,
765 #endif /* CONFIG_PM */
766 };
767
768 static int __init p54p_init(void)
769 {
770         return pci_register_driver(&p54p_driver);
771 }
772
773 static void __exit p54p_exit(void)
774 {
775         pci_unregister_driver(&p54p_driver);
776 }
777
778 module_init(p54p_init);
779 module_exit(p54p_exit);