p54: p54: refactor p54_rx_frame_sent
[linux-2.6.git] / drivers / net / wireless / p54 / p54common.c
1 /*
2  * Common code for mac80211 Prism54 drivers
3  *
4  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
5  * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
6  * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
7  *
8  * Based on the islsm (softmac prism54) driver, which is:
9  * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License version 2 as
13  * published by the Free Software Foundation.
14  */
15
16 #include <linux/init.h>
17 #include <linux/firmware.h>
18 #include <linux/etherdevice.h>
19
20 #include <net/mac80211.h>
21
22 #include "p54.h"
23 #include "p54common.h"
24
25 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
26 MODULE_DESCRIPTION("Softmac Prism54 common code");
27 MODULE_LICENSE("GPL");
28 MODULE_ALIAS("prism54common");
29
30 static struct ieee80211_rate p54_bgrates[] = {
31         { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
32         { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
33         { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
34         { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
35         { .bitrate = 60, .hw_value = 4, },
36         { .bitrate = 90, .hw_value = 5, },
37         { .bitrate = 120, .hw_value = 6, },
38         { .bitrate = 180, .hw_value = 7, },
39         { .bitrate = 240, .hw_value = 8, },
40         { .bitrate = 360, .hw_value = 9, },
41         { .bitrate = 480, .hw_value = 10, },
42         { .bitrate = 540, .hw_value = 11, },
43 };
44
45 static struct ieee80211_channel p54_bgchannels[] = {
46         { .center_freq = 2412, .hw_value = 1, },
47         { .center_freq = 2417, .hw_value = 2, },
48         { .center_freq = 2422, .hw_value = 3, },
49         { .center_freq = 2427, .hw_value = 4, },
50         { .center_freq = 2432, .hw_value = 5, },
51         { .center_freq = 2437, .hw_value = 6, },
52         { .center_freq = 2442, .hw_value = 7, },
53         { .center_freq = 2447, .hw_value = 8, },
54         { .center_freq = 2452, .hw_value = 9, },
55         { .center_freq = 2457, .hw_value = 10, },
56         { .center_freq = 2462, .hw_value = 11, },
57         { .center_freq = 2467, .hw_value = 12, },
58         { .center_freq = 2472, .hw_value = 13, },
59         { .center_freq = 2484, .hw_value = 14, },
60 };
61
62 static struct ieee80211_supported_band band_2GHz = {
63         .channels = p54_bgchannels,
64         .n_channels = ARRAY_SIZE(p54_bgchannels),
65         .bitrates = p54_bgrates,
66         .n_bitrates = ARRAY_SIZE(p54_bgrates),
67 };
68
69 static struct ieee80211_rate p54_arates[] = {
70         { .bitrate = 60, .hw_value = 4, },
71         { .bitrate = 90, .hw_value = 5, },
72         { .bitrate = 120, .hw_value = 6, },
73         { .bitrate = 180, .hw_value = 7, },
74         { .bitrate = 240, .hw_value = 8, },
75         { .bitrate = 360, .hw_value = 9, },
76         { .bitrate = 480, .hw_value = 10, },
77         { .bitrate = 540, .hw_value = 11, },
78 };
79
80 static struct ieee80211_channel p54_achannels[] = {
81         { .center_freq = 4920 },
82         { .center_freq = 4940 },
83         { .center_freq = 4960 },
84         { .center_freq = 4980 },
85         { .center_freq = 5040 },
86         { .center_freq = 5060 },
87         { .center_freq = 5080 },
88         { .center_freq = 5170 },
89         { .center_freq = 5180 },
90         { .center_freq = 5190 },
91         { .center_freq = 5200 },
92         { .center_freq = 5210 },
93         { .center_freq = 5220 },
94         { .center_freq = 5230 },
95         { .center_freq = 5240 },
96         { .center_freq = 5260 },
97         { .center_freq = 5280 },
98         { .center_freq = 5300 },
99         { .center_freq = 5320 },
100         { .center_freq = 5500 },
101         { .center_freq = 5520 },
102         { .center_freq = 5540 },
103         { .center_freq = 5560 },
104         { .center_freq = 5580 },
105         { .center_freq = 5600 },
106         { .center_freq = 5620 },
107         { .center_freq = 5640 },
108         { .center_freq = 5660 },
109         { .center_freq = 5680 },
110         { .center_freq = 5700 },
111         { .center_freq = 5745 },
112         { .center_freq = 5765 },
113         { .center_freq = 5785 },
114         { .center_freq = 5805 },
115         { .center_freq = 5825 },
116 };
117
118 static struct ieee80211_supported_band band_5GHz = {
119         .channels = p54_achannels,
120         .n_channels = ARRAY_SIZE(p54_achannels),
121         .bitrates = p54_arates,
122         .n_bitrates = ARRAY_SIZE(p54_arates),
123 };
124
125 int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
126 {
127         struct p54_common *priv = dev->priv;
128         struct bootrec_exp_if *exp_if;
129         struct bootrec *bootrec;
130         u32 *data = (u32 *)fw->data;
131         u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
132         u8 *fw_version = NULL;
133         size_t len;
134         int i;
135
136         if (priv->rx_start)
137                 return 0;
138
139         while (data < end_data && *data)
140                 data++;
141
142         while (data < end_data && !*data)
143                 data++;
144
145         bootrec = (struct bootrec *) data;
146
147         while (bootrec->data <= end_data &&
148                (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
149                 u32 code = le32_to_cpu(bootrec->code);
150                 switch (code) {
151                 case BR_CODE_COMPONENT_ID:
152                         priv->fw_interface = be32_to_cpup((__be32 *)
153                                              bootrec->data);
154                         switch (priv->fw_interface) {
155                         case FW_FMAC:
156                                 printk(KERN_INFO "p54: FreeMAC firmware\n");
157                                 break;
158                         case FW_LM20:
159                                 printk(KERN_INFO "p54: LM20 firmware\n");
160                                 break;
161                         case FW_LM86:
162                                 printk(KERN_INFO "p54: LM86 firmware\n");
163                                 break;
164                         case FW_LM87:
165                                 printk(KERN_INFO "p54: LM87 firmware\n");
166                                 break;
167                         default:
168                                 printk(KERN_INFO "p54: unknown firmware\n");
169                                 break;
170                         }
171                         break;
172                 case BR_CODE_COMPONENT_VERSION:
173                         /* 24 bytes should be enough for all firmwares */
174                         if (strnlen((unsigned char*)bootrec->data, 24) < 24)
175                                 fw_version = (unsigned char*)bootrec->data;
176                         break;
177                 case BR_CODE_DESCR: {
178                         struct bootrec_desc *desc =
179                                 (struct bootrec_desc *)bootrec->data;
180                         priv->rx_start = le32_to_cpu(desc->rx_start);
181                         /* FIXME add sanity checking */
182                         priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
183                         priv->headroom = desc->headroom;
184                         priv->tailroom = desc->tailroom;
185                         if (le32_to_cpu(bootrec->len) == 11)
186                                 priv->rx_mtu = le16_to_cpu(desc->rx_mtu);
187                         else
188                                 priv->rx_mtu = (size_t)
189                                         0x620 - priv->tx_hdr_len;
190                         break;
191                         }
192                 case BR_CODE_EXPOSED_IF:
193                         exp_if = (struct bootrec_exp_if *) bootrec->data;
194                         for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
195                                 if (exp_if[i].if_id == cpu_to_le16(0x1a))
196                                         priv->fw_var = le16_to_cpu(exp_if[i].variant);
197                         break;
198                 case BR_CODE_DEPENDENT_IF:
199                         break;
200                 case BR_CODE_END_OF_BRA:
201                 case LEGACY_BR_CODE_END_OF_BRA:
202                         end_data = NULL;
203                         break;
204                 default:
205                         break;
206                 }
207                 bootrec = (struct bootrec *)&bootrec->data[len];
208         }
209
210         if (fw_version)
211                 printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
212                         fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
213
214         if (priv->fw_var >= 0x300) {
215                 /* Firmware supports QoS, use it! */
216                 priv->tx_stats[4].limit = 3;
217                 priv->tx_stats[5].limit = 4;
218                 priv->tx_stats[6].limit = 3;
219                 priv->tx_stats[7].limit = 1;
220                 dev->queues = 4;
221         }
222
223         return 0;
224 }
225 EXPORT_SYMBOL_GPL(p54_parse_firmware);
226
227 static int p54_convert_rev0(struct ieee80211_hw *dev,
228                             struct pda_pa_curve_data *curve_data)
229 {
230         struct p54_common *priv = dev->priv;
231         struct p54_pa_curve_data_sample *dst;
232         struct pda_pa_curve_data_sample_rev0 *src;
233         size_t cd_len = sizeof(*curve_data) +
234                 (curve_data->points_per_channel*sizeof(*dst) + 2) *
235                  curve_data->channels;
236         unsigned int i, j;
237         void *source, *target;
238
239         priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
240         if (!priv->curve_data)
241                 return -ENOMEM;
242
243         memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
244         source = curve_data->data;
245         target = priv->curve_data->data;
246         for (i = 0; i < curve_data->channels; i++) {
247                 __le16 *freq = source;
248                 source += sizeof(__le16);
249                 *((__le16 *)target) = *freq;
250                 target += sizeof(__le16);
251                 for (j = 0; j < curve_data->points_per_channel; j++) {
252                         dst = target;
253                         src = source;
254
255                         dst->rf_power = src->rf_power;
256                         dst->pa_detector = src->pa_detector;
257                         dst->data_64qam = src->pcv;
258                         /* "invent" the points for the other modulations */
259 #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
260                         dst->data_16qam = SUB(src->pcv, 12);
261                         dst->data_qpsk = SUB(dst->data_16qam, 12);
262                         dst->data_bpsk = SUB(dst->data_qpsk, 12);
263                         dst->data_barker = SUB(dst->data_bpsk, 14);
264 #undef SUB
265                         target += sizeof(*dst);
266                         source += sizeof(*src);
267                 }
268         }
269
270         return 0;
271 }
272
273 static int p54_convert_rev1(struct ieee80211_hw *dev,
274                             struct pda_pa_curve_data *curve_data)
275 {
276         struct p54_common *priv = dev->priv;
277         struct p54_pa_curve_data_sample *dst;
278         struct pda_pa_curve_data_sample_rev1 *src;
279         size_t cd_len = sizeof(*curve_data) +
280                 (curve_data->points_per_channel*sizeof(*dst) + 2) *
281                  curve_data->channels;
282         unsigned int i, j;
283         void *source, *target;
284
285         priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
286         if (!priv->curve_data)
287                 return -ENOMEM;
288
289         memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
290         source = curve_data->data;
291         target = priv->curve_data->data;
292         for (i = 0; i < curve_data->channels; i++) {
293                 __le16 *freq = source;
294                 source += sizeof(__le16);
295                 *((__le16 *)target) = *freq;
296                 target += sizeof(__le16);
297                 for (j = 0; j < curve_data->points_per_channel; j++) {
298                         memcpy(target, source, sizeof(*src));
299
300                         target += sizeof(*dst);
301                         source += sizeof(*src);
302                 }
303                 source++;
304         }
305
306         return 0;
307 }
308
309 static const char *p54_rf_chips[] = { "NULL", "Duette3", "Duette2",
310                               "Frisbee", "Xbow", "Longbow", "NULL", "NULL" };
311 static int p54_init_xbow_synth(struct ieee80211_hw *dev);
312
313 static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
314 {
315         struct p54_common *priv = dev->priv;
316         struct eeprom_pda_wrap *wrap = NULL;
317         struct pda_entry *entry;
318         unsigned int data_len, entry_len;
319         void *tmp;
320         int err;
321         u8 *end = (u8 *)eeprom + len;
322         u16 synth = 0;
323
324         wrap = (struct eeprom_pda_wrap *) eeprom;
325         entry = (void *)wrap->data + le16_to_cpu(wrap->len);
326
327         /* verify that at least the entry length/code fits */
328         while ((u8 *)entry <= end - sizeof(*entry)) {
329                 entry_len = le16_to_cpu(entry->len);
330                 data_len = ((entry_len - 1) << 1);
331
332                 /* abort if entry exceeds whole structure */
333                 if ((u8 *)entry + sizeof(*entry) + data_len > end)
334                         break;
335
336                 switch (le16_to_cpu(entry->code)) {
337                 case PDR_MAC_ADDRESS:
338                         SET_IEEE80211_PERM_ADDR(dev, entry->data);
339                         break;
340                 case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
341                         if (data_len < 2) {
342                                 err = -EINVAL;
343                                 goto err;
344                         }
345
346                         if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
347                                 err = -EINVAL;
348                                 goto err;
349                         }
350
351                         priv->output_limit = kmalloc(entry->data[1] *
352                                 sizeof(*priv->output_limit), GFP_KERNEL);
353
354                         if (!priv->output_limit) {
355                                 err = -ENOMEM;
356                                 goto err;
357                         }
358
359                         memcpy(priv->output_limit, &entry->data[2],
360                                entry->data[1]*sizeof(*priv->output_limit));
361                         priv->output_limit_len = entry->data[1];
362                         break;
363                 case PDR_PRISM_PA_CAL_CURVE_DATA: {
364                         struct pda_pa_curve_data *curve_data =
365                                 (struct pda_pa_curve_data *)entry->data;
366                         if (data_len < sizeof(*curve_data)) {
367                                 err = -EINVAL;
368                                 goto err;
369                         }
370
371                         switch (curve_data->cal_method_rev) {
372                         case 0:
373                                 err = p54_convert_rev0(dev, curve_data);
374                                 break;
375                         case 1:
376                                 err = p54_convert_rev1(dev, curve_data);
377                                 break;
378                         default:
379                                 printk(KERN_ERR "p54: unknown curve data "
380                                                 "revision %d\n",
381                                                 curve_data->cal_method_rev);
382                                 err = -ENODEV;
383                                 break;
384                         }
385                         if (err)
386                                 goto err;
387
388                 }
389                 case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
390                         priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
391                         if (!priv->iq_autocal) {
392                                 err = -ENOMEM;
393                                 goto err;
394                         }
395
396                         memcpy(priv->iq_autocal, entry->data, data_len);
397                         priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
398                         break;
399                 case PDR_INTERFACE_LIST:
400                         tmp = entry->data;
401                         while ((u8 *)tmp < entry->data + data_len) {
402                                 struct bootrec_exp_if *exp_if = tmp;
403                                 if (le16_to_cpu(exp_if->if_id) == 0xf)
404                                         synth = le16_to_cpu(exp_if->variant);
405                                 tmp += sizeof(struct bootrec_exp_if);
406                         }
407                         break;
408                 case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
409                         priv->version = *(u8 *)(entry->data + 1);
410                         break;
411                 case PDR_END:
412                         /* make it overrun */
413                         entry_len = len;
414                         break;
415                 default:
416                         printk(KERN_INFO "p54: unknown eeprom code : 0x%x\n",
417                                 le16_to_cpu(entry->code));
418                         break;
419                 }
420
421                 entry = (void *)entry + (entry_len + 1)*2;
422         }
423
424         if (!synth || !priv->iq_autocal || !priv->output_limit ||
425             !priv->curve_data) {
426                 printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
427                 err = -EINVAL;
428                 goto err;
429         }
430
431         priv->rxhw = synth & 0x07;
432         if (priv->rxhw == 4)
433                 p54_init_xbow_synth(dev);
434         if (!(synth & 0x40))
435                 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
436         if (!(synth & 0x80))
437                 dev->wiphy->bands[IEEE80211_BAND_5GHZ] = &band_5GHz;
438
439         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
440                 u8 perm_addr[ETH_ALEN];
441
442                 printk(KERN_WARNING "%s: Invalid hwaddr! Using randomly generated MAC addr\n",
443                         wiphy_name(dev->wiphy));
444                 random_ether_addr(perm_addr);
445                 SET_IEEE80211_PERM_ADDR(dev, perm_addr);
446         }
447
448         printk(KERN_INFO "%s: hwaddr %pM, MAC:isl38%02x RF:%s\n",
449                 wiphy_name(dev->wiphy),
450                 dev->wiphy->perm_addr,
451                 priv->version, p54_rf_chips[priv->rxhw]);
452
453         return 0;
454
455   err:
456         if (priv->iq_autocal) {
457                 kfree(priv->iq_autocal);
458                 priv->iq_autocal = NULL;
459         }
460
461         if (priv->output_limit) {
462                 kfree(priv->output_limit);
463                 priv->output_limit = NULL;
464         }
465
466         if (priv->curve_data) {
467                 kfree(priv->curve_data);
468                 priv->curve_data = NULL;
469         }
470
471         printk(KERN_ERR "p54: eeprom parse failed!\n");
472         return err;
473 }
474
475 static int p54_rssi_to_dbm(struct ieee80211_hw *dev, int rssi)
476 {
477         /* TODO: get the rssi_add & rssi_mul data from the eeprom */
478         return ((rssi * 0x83) / 64 - 400) / 4;
479 }
480
481 static int p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
482 {
483         struct p54_common *priv = dev->priv;
484         struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
485         struct ieee80211_rx_status rx_status = {0};
486         u16 freq = le16_to_cpu(hdr->freq);
487         size_t header_len = sizeof(*hdr);
488         u32 tsf32;
489
490         if (!(hdr->magic & cpu_to_le16(0x0001))) {
491                 if (priv->filter_flags & FIF_FCSFAIL)
492                         rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
493                 else
494                         return 0;
495         }
496
497         rx_status.signal = p54_rssi_to_dbm(dev, hdr->rssi);
498         rx_status.noise = priv->noise;
499         /* XX correct? */
500         rx_status.qual = (100 * hdr->rssi) / 127;
501         rx_status.rate_idx = (dev->conf.channel->band == IEEE80211_BAND_2GHZ ?
502                         hdr->rate : (hdr->rate - 4)) & 0xf;
503         rx_status.freq = freq;
504         rx_status.band =  dev->conf.channel->band;
505         rx_status.antenna = hdr->antenna;
506
507         tsf32 = le32_to_cpu(hdr->tsf32);
508         if (tsf32 < priv->tsf_low32)
509                 priv->tsf_high32++;
510         rx_status.mactime = ((u64)priv->tsf_high32) << 32 | tsf32;
511         priv->tsf_low32 = tsf32;
512
513         rx_status.flag |= RX_FLAG_TSFT;
514
515         if (hdr->magic & cpu_to_le16(0x4000))
516                 header_len += hdr->align[0];
517
518         skb_pull(skb, header_len);
519         skb_trim(skb, le16_to_cpu(hdr->len));
520
521         ieee80211_rx_irqsafe(dev, skb, &rx_status);
522
523         return -1;
524 }
525
526 static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
527 {
528         struct p54_common *priv = dev->priv;
529         int i;
530
531         for (i = 0; i < dev->queues; i++)
532                 if (priv->tx_stats[i + 4].len < priv->tx_stats[i + 4].limit)
533                         ieee80211_wake_queue(dev, i);
534 }
535
536 static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
537 {
538         struct p54_common *priv = dev->priv;
539         struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
540         struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
541         struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
542         u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom;
543         struct memrecord *range = NULL;
544         u32 freed = 0;
545         u32 last_addr = priv->rx_start;
546         unsigned long flags;
547         int count, idx;
548
549         spin_lock_irqsave(&priv->tx_queue.lock, flags);
550         while (entry != (struct sk_buff *)&priv->tx_queue) {
551                 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
552                 struct p54_control_hdr *entry_hdr;
553                 struct p54_tx_control_allocdata *entry_data;
554                 int pad = 0;
555
556                 range = (void *)info->rate_driver_data;
557                 if (range->start_addr != addr) {
558                         last_addr = range->end_addr;
559                         entry = entry->next;
560                         continue;
561                 }
562
563                 if (entry->next != (struct sk_buff *)&priv->tx_queue) {
564                         struct ieee80211_tx_info *ni;
565                         struct memrecord *mr;
566
567                         ni = IEEE80211_SKB_CB(entry->next);
568                         mr = (struct memrecord *)ni->rate_driver_data;
569                         freed = mr->start_addr - last_addr;
570                 } else
571                         freed = priv->rx_end - last_addr;
572
573                 last_addr = range->end_addr;
574                 __skb_unlink(entry, &priv->tx_queue);
575                 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
576
577                 /*
578                  * Clear manually, ieee80211_tx_info_clear_status would
579                  * clear the counts too and we need them.
580                  */
581                 memset(&info->status.ampdu_ack_len, 0,
582                        sizeof(struct ieee80211_tx_info) -
583                        offsetof(struct ieee80211_tx_info, status.ampdu_ack_len));
584                 BUILD_BUG_ON(offsetof(struct ieee80211_tx_info,
585                                       status.ampdu_ack_len) != 23);
586
587                 entry_hdr = (struct p54_control_hdr *) entry->data;
588                 entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
589                 if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
590                         pad = entry_data->align[0];
591
592                 /* walk through the rates array and adjust the counts */
593                 count = payload->retries;
594                 for (idx = 0; idx < 4; idx++) {
595                         if (count >= info->status.rates[idx].count) {
596                                 count -= info->status.rates[idx].count;
597                         } else if (count > 0) {
598                                 info->status.rates[idx].count = count;
599                                 count = 0;
600                         } else {
601                                 info->status.rates[idx].idx = -1;
602                                 info->status.rates[idx].count = 0;
603                         }
604                 }
605
606                 priv->tx_stats[entry_data->hw_queue].len--;
607                 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
608                      (!payload->status))
609                         info->flags |= IEEE80211_TX_STAT_ACK;
610                 if (payload->status & 0x02)
611                         info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
612                 info->status.ack_signal = p54_rssi_to_dbm(dev,
613                                 le16_to_cpu(payload->ack_rssi));
614                 skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
615                 ieee80211_tx_status_irqsafe(dev, entry);
616                 goto out;
617         }
618         spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
619
620 out:
621         if (freed >= priv->headroom + sizeof(struct p54_control_hdr) + 48 +
622                      IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
623                 p54_wake_free_queues(dev);
624 }
625
626 static void p54_rx_eeprom_readback(struct ieee80211_hw *dev,
627                                    struct sk_buff *skb)
628 {
629         struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
630         struct p54_eeprom_lm86 *eeprom = (struct p54_eeprom_lm86 *) hdr->data;
631         struct p54_common *priv = dev->priv;
632
633         if (!priv->eeprom)
634                 return ;
635
636         memcpy(priv->eeprom, eeprom->data, le16_to_cpu(eeprom->len));
637
638         complete(&priv->eeprom_comp);
639 }
640
641 static void p54_rx_stats(struct ieee80211_hw *dev, struct sk_buff *skb)
642 {
643         struct p54_common *priv = dev->priv;
644         struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
645         struct p54_statistics *stats = (struct p54_statistics *) hdr->data;
646         u32 tsf32 = le32_to_cpu(stats->tsf32);
647
648         if (tsf32 < priv->tsf_low32)
649                 priv->tsf_high32++;
650         priv->tsf_low32 = tsf32;
651
652         priv->stats.dot11RTSFailureCount = le32_to_cpu(stats->rts_fail);
653         priv->stats.dot11RTSSuccessCount = le32_to_cpu(stats->rts_success);
654         priv->stats.dot11FCSErrorCount = le32_to_cpu(stats->rx_bad_fcs);
655
656         priv->noise = p54_rssi_to_dbm(dev, le32_to_cpu(stats->noise));
657         complete(&priv->stats_comp);
658
659         mod_timer(&priv->stats_timer, jiffies + 5 * HZ);
660 }
661
662 static int p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
663 {
664         struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
665
666         switch (le16_to_cpu(hdr->type)) {
667         case P54_CONTROL_TYPE_TXDONE:
668                 p54_rx_frame_sent(dev, skb);
669                 break;
670         case P54_CONTROL_TYPE_BBP:
671                 break;
672         case P54_CONTROL_TYPE_STAT_READBACK:
673                 p54_rx_stats(dev, skb);
674                 break;
675         case P54_CONTROL_TYPE_EEPROM_READBACK:
676                 p54_rx_eeprom_readback(dev, skb);
677                 break;
678         default:
679                 printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
680                        wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
681                 break;
682         }
683
684         return 0;
685 }
686
687 /* returns zero if skb can be reused */
688 int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
689 {
690         u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
691
692         if (type == 0x80)
693                 return p54_rx_control(dev, skb);
694         else
695                 return p54_rx_data(dev, skb);
696 }
697 EXPORT_SYMBOL_GPL(p54_rx);
698
699 /*
700  * So, the firmware is somewhat stupid and doesn't know what places in its
701  * memory incoming data should go to. By poking around in the firmware, we
702  * can find some unused memory to upload our packets to. However, data that we
703  * want the card to TX needs to stay intact until the card has told us that
704  * it is done with it. This function finds empty places we can upload to and
705  * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
706  * allocated areas.
707  */
708 static void p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
709                                struct p54_control_hdr *data, u32 len)
710 {
711         struct p54_common *priv = dev->priv;
712         struct sk_buff *entry = priv->tx_queue.next;
713         struct sk_buff *target_skb = NULL;
714         u32 last_addr = priv->rx_start;
715         u32 largest_hole = 0;
716         u32 target_addr = priv->rx_start;
717         unsigned long flags;
718         unsigned int left;
719         len = (len + priv->headroom + priv->tailroom + 3) & ~0x3;
720
721         spin_lock_irqsave(&priv->tx_queue.lock, flags);
722         left = skb_queue_len(&priv->tx_queue);
723         while (left--) {
724                 u32 hole_size;
725                 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
726                 struct memrecord *range = (void *)info->rate_driver_data;
727                 hole_size = range->start_addr - last_addr;
728                 if (!target_skb && hole_size >= len) {
729                         target_skb = entry->prev;
730                         hole_size -= len;
731                         target_addr = last_addr;
732                 }
733                 largest_hole = max(largest_hole, hole_size);
734                 last_addr = range->end_addr;
735                 entry = entry->next;
736         }
737         if (!target_skb && priv->rx_end - last_addr >= len) {
738                 target_skb = priv->tx_queue.prev;
739                 largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
740                 if (!skb_queue_empty(&priv->tx_queue)) {
741                         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(target_skb);
742                         struct memrecord *range = (void *)info->rate_driver_data;
743                         target_addr = range->end_addr;
744                 }
745         } else
746                 largest_hole = max(largest_hole, priv->rx_end - last_addr);
747
748         if (skb) {
749                 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
750                 struct memrecord *range = (void *)info->rate_driver_data;
751                 range->start_addr = target_addr;
752                 range->end_addr = target_addr + len;
753                 __skb_queue_after(&priv->tx_queue, target_skb, skb);
754                 if (largest_hole < priv->rx_mtu + priv->headroom +
755                                    priv->tailroom +
756                                    sizeof(struct p54_control_hdr))
757                         ieee80211_stop_queues(dev);
758         }
759         spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
760
761         data->req_id = cpu_to_le32(target_addr + priv->headroom);
762 }
763
764 int p54_read_eeprom(struct ieee80211_hw *dev)
765 {
766         struct p54_common *priv = dev->priv;
767         struct p54_control_hdr *hdr = NULL;
768         struct p54_eeprom_lm86 *eeprom_hdr;
769         size_t eeprom_size = 0x2020, offset = 0, blocksize;
770         int ret = -ENOMEM;
771         void *eeprom = NULL;
772
773         hdr = (struct p54_control_hdr *)kzalloc(sizeof(*hdr) +
774                 sizeof(*eeprom_hdr) + EEPROM_READBACK_LEN, GFP_KERNEL);
775         if (!hdr)
776                 goto free;
777
778         priv->eeprom = kzalloc(EEPROM_READBACK_LEN, GFP_KERNEL);
779         if (!priv->eeprom)
780                 goto free;
781
782         eeprom = kzalloc(eeprom_size, GFP_KERNEL);
783         if (!eeprom)
784                 goto free;
785
786         hdr->magic1 = cpu_to_le16(0x8000);
787         hdr->type = cpu_to_le16(P54_CONTROL_TYPE_EEPROM_READBACK);
788         hdr->retry1 = hdr->retry2 = 0;
789         eeprom_hdr = (struct p54_eeprom_lm86 *) hdr->data;
790
791         while (eeprom_size) {
792                 blocksize = min(eeprom_size, (size_t)EEPROM_READBACK_LEN);
793                 hdr->len = cpu_to_le16(blocksize + sizeof(*eeprom_hdr));
794                 eeprom_hdr->offset = cpu_to_le16(offset);
795                 eeprom_hdr->len = cpu_to_le16(blocksize);
796                 p54_assign_address(dev, NULL, hdr, le16_to_cpu(hdr->len) +
797                                    sizeof(*hdr));
798                 priv->tx(dev, hdr, le16_to_cpu(hdr->len) + sizeof(*hdr), 0);
799
800                 if (!wait_for_completion_interruptible_timeout(&priv->eeprom_comp, HZ)) {
801                         printk(KERN_ERR "%s: device does not respond!\n",
802                                 wiphy_name(dev->wiphy));
803                         ret = -EBUSY;
804                         goto free;
805                 }
806
807                 memcpy(eeprom + offset, priv->eeprom, blocksize);
808                 offset += blocksize;
809                 eeprom_size -= blocksize;
810         }
811
812         ret = p54_parse_eeprom(dev, eeprom, offset);
813 free:
814         kfree(priv->eeprom);
815         priv->eeprom = NULL;
816         kfree(hdr);
817         kfree(eeprom);
818
819         return ret;
820 }
821 EXPORT_SYMBOL_GPL(p54_read_eeprom);
822
823 static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
824 {
825         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
826         struct ieee80211_tx_queue_stats *current_queue;
827         struct p54_common *priv = dev->priv;
828         struct p54_control_hdr *hdr;
829         struct p54_tx_control_allocdata *txhdr;
830         size_t padding, len;
831         int i, j, ridx;
832         u8 rate;
833         u8 cts_rate = 0x20;
834         u8 rc_flags;
835         u8 calculated_tries[4];
836         u8 nrates = 0, nremaining = 8;
837
838         current_queue = &priv->tx_stats[skb_get_queue_mapping(skb) + 4];
839         if (unlikely(current_queue->len > current_queue->limit))
840                 return NETDEV_TX_BUSY;
841         current_queue->len++;
842         current_queue->count++;
843         if (current_queue->len == current_queue->limit)
844                 ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
845
846         padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
847         len = skb->len;
848
849         txhdr = (struct p54_tx_control_allocdata *)
850                         skb_push(skb, sizeof(*txhdr) + padding);
851         hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
852
853         if (padding)
854                 hdr->magic1 = cpu_to_le16(0x4010);
855         else
856                 hdr->magic1 = cpu_to_le16(0x0010);
857         hdr->len = cpu_to_le16(len);
858         hdr->type = (info->flags & IEEE80211_TX_CTL_NO_ACK) ? 0 : cpu_to_le16(1);
859         hdr->retry1 = info->control.rates[0].count;
860
861         /*
862          * we register the rates in perfect order, and
863          * RTS/CTS won't happen on 5 GHz
864          */
865         cts_rate = info->control.rts_cts_rate_idx;
866
867         memset(&txhdr->rateset, 0, sizeof(txhdr->rateset));
868
869         /* see how many rates got used */
870         for (i = 0; i < 4; i++) {
871                 if (info->control.rates[i].idx < 0)
872                         break;
873                 nrates++;
874         }
875
876         /* limit tries to 8/nrates per rate */
877         for (i = 0; i < nrates; i++) {
878                 /*
879                  * The magic expression here is equivalent to 8/nrates for
880                  * all values that matter, but avoids division and jumps.
881                  * Note that nrates can only take the values 1 through 4.
882                  */
883                 calculated_tries[i] = min_t(int, ((15 >> nrates) | 1) + 1,
884                                                  info->control.rates[i].count);
885                 nremaining -= calculated_tries[i];
886         }
887
888         /* if there are tries left, distribute from back to front */
889         for (i = nrates - 1; nremaining > 0 && i >= 0; i--) {
890                 int tmp = info->control.rates[i].count - calculated_tries[i];
891
892                 if (tmp <= 0)
893                         continue;
894                 /* RC requested more tries at this rate */
895
896                 tmp = min_t(int, tmp, nremaining);
897                 calculated_tries[i] += tmp;
898                 nremaining -= tmp;
899         }
900
901         ridx = 0;
902         for (i = 0; i < nrates && ridx < 8; i++) {
903                 /* we register the rates in perfect order */
904                 rate = info->control.rates[i].idx;
905                 if (info->band == IEEE80211_BAND_5GHZ)
906                         rate += 4;
907
908                 /* store the count we actually calculated for TX status */
909                 info->control.rates[i].count = calculated_tries[i];
910
911                 rc_flags = info->control.rates[i].flags;
912                 if (rc_flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) {
913                         rate |= 0x10;
914                         cts_rate |= 0x10;
915                 }
916                 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS)
917                         rate |= 0x40;
918                 else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT)
919                         rate |= 0x20;
920                 for (j = 0; j < calculated_tries[i] && ridx < 8; j++) {
921                         txhdr->rateset[ridx] = rate;
922                         ridx++;
923                 }
924         }
925         hdr->retry2 = ridx;
926
927         txhdr->key_type = 0;
928         txhdr->key_len = 0;
929         txhdr->hw_queue = skb_get_queue_mapping(skb) + 4;
930         txhdr->tx_antenna = (info->antenna_sel_tx == 0) ?
931                 2 : info->antenna_sel_tx - 1;
932         txhdr->output_power = priv->output_power;
933         txhdr->cts_rate = (info->flags & IEEE80211_TX_CTL_NO_ACK) ?
934                           0 : cts_rate;
935         if (padding)
936                 txhdr->align[0] = padding;
937
938         /* modifies skb->cb and with it info, so must be last! */
939         p54_assign_address(dev, skb, hdr, skb->len);
940
941         priv->tx(dev, hdr, skb->len, 0);
942         return 0;
943 }
944
945 static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type,
946                           const u8 *bssid)
947 {
948         struct p54_common *priv = dev->priv;
949         struct p54_control_hdr *hdr;
950         struct p54_tx_control_filter *filter;
951         size_t data_len;
952
953         hdr = kzalloc(sizeof(*hdr) + sizeof(*filter) +
954                       priv->tx_hdr_len, GFP_ATOMIC);
955         if (!hdr)
956                 return -ENOMEM;
957
958         hdr = (void *)hdr + priv->tx_hdr_len;
959
960         filter = (struct p54_tx_control_filter *) hdr->data;
961         hdr->magic1 = cpu_to_le16(0x8001);
962         hdr->type = cpu_to_le16(P54_CONTROL_TYPE_FILTER_SET);
963
964         priv->filter_type = filter->filter_type = cpu_to_le16(filter_type);
965         memcpy(filter->mac_addr, priv->mac_addr, ETH_ALEN);
966         if (!bssid)
967                 memset(filter->bssid, ~0, ETH_ALEN);
968         else
969                 memcpy(filter->bssid, bssid, ETH_ALEN);
970         filter->rx_antenna = priv->rx_antenna;
971         if (priv->fw_var < 0x500) {
972                 data_len = P54_TX_CONTROL_FILTER_V1_LEN;
973                 filter->v1.basic_rate_mask = cpu_to_le32(0x15f);
974                 filter->v1.rx_addr = cpu_to_le32(priv->rx_end);
975                 filter->v1.max_rx = cpu_to_le16(priv->rx_mtu);
976                 filter->v1.rxhw = cpu_to_le16(priv->rxhw);
977                 filter->v1.wakeup_timer = cpu_to_le16(500);
978         } else {
979                 data_len = P54_TX_CONTROL_FILTER_V2_LEN;
980                 filter->v2.rx_addr = cpu_to_le32(priv->rx_end);
981                 filter->v2.max_rx = cpu_to_le16(priv->rx_mtu);
982                 filter->v2.rxhw = cpu_to_le16(priv->rxhw);
983                 filter->v2.timer = cpu_to_le16(1000);
984         }
985         hdr->len = cpu_to_le16(data_len);
986         p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + data_len);
987         priv->tx(dev, hdr, sizeof(*hdr) + data_len, 1);
988         return 0;
989 }
990
991 static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
992 {
993         struct p54_common *priv = dev->priv;
994         struct p54_control_hdr *hdr;
995         struct p54_tx_control_channel *chan;
996         unsigned int i;
997         size_t data_len;
998         void *entry;
999
1000         hdr = kzalloc(sizeof(*hdr) + sizeof(*chan) +
1001                       priv->tx_hdr_len, GFP_KERNEL);
1002         if (!hdr)
1003                 return -ENOMEM;
1004
1005         hdr = (void *)hdr + priv->tx_hdr_len;
1006
1007         chan = (struct p54_tx_control_channel *) hdr->data;
1008
1009         hdr->magic1 = cpu_to_le16(0x8001);
1010
1011         hdr->type = cpu_to_le16(P54_CONTROL_TYPE_CHANNEL_CHANGE);
1012
1013         chan->flags = cpu_to_le16(0x1);
1014         chan->dwell = cpu_to_le16(0x0);
1015
1016         for (i = 0; i < priv->iq_autocal_len; i++) {
1017                 if (priv->iq_autocal[i].freq != freq)
1018                         continue;
1019
1020                 memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
1021                        sizeof(*priv->iq_autocal));
1022                 break;
1023         }
1024         if (i == priv->iq_autocal_len)
1025                 goto err;
1026
1027         for (i = 0; i < priv->output_limit_len; i++) {
1028                 if (priv->output_limit[i].freq != freq)
1029                         continue;
1030
1031                 chan->val_barker = 0x38;
1032                 chan->val_bpsk = chan->dup_bpsk =
1033                         priv->output_limit[i].val_bpsk;
1034                 chan->val_qpsk = chan->dup_qpsk =
1035                         priv->output_limit[i].val_qpsk;
1036                 chan->val_16qam = chan->dup_16qam =
1037                         priv->output_limit[i].val_16qam;
1038                 chan->val_64qam = chan->dup_64qam =
1039                         priv->output_limit[i].val_64qam;
1040                 break;
1041         }
1042         if (i == priv->output_limit_len)
1043                 goto err;
1044
1045         entry = priv->curve_data->data;
1046         for (i = 0; i < priv->curve_data->channels; i++) {
1047                 if (*((__le16 *)entry) != freq) {
1048                         entry += sizeof(__le16);
1049                         entry += sizeof(struct p54_pa_curve_data_sample) *
1050                                  priv->curve_data->points_per_channel;
1051                         continue;
1052                 }
1053
1054                 entry += sizeof(__le16);
1055                 chan->pa_points_per_curve =
1056                         min(priv->curve_data->points_per_channel, (u8) 8);
1057
1058                 memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
1059                        chan->pa_points_per_curve);
1060                 break;
1061         }
1062
1063         if (priv->fw_var < 0x500) {
1064                 data_len = P54_TX_CONTROL_CHANNEL_V1_LEN;
1065                 chan->v1.rssical_mul = cpu_to_le16(130);
1066                 chan->v1.rssical_add = cpu_to_le16(0xfe70);
1067         } else {
1068                 data_len = P54_TX_CONTROL_CHANNEL_V2_LEN;
1069                 chan->v2.rssical_mul = cpu_to_le16(130);
1070                 chan->v2.rssical_add = cpu_to_le16(0xfe70);
1071                 chan->v2.basic_rate_mask = cpu_to_le32(0x15f);
1072         }
1073
1074         hdr->len = cpu_to_le16(data_len);
1075         p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + data_len);
1076         priv->tx(dev, hdr, sizeof(*hdr) + data_len, 1);
1077         return 0;
1078
1079  err:
1080         printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
1081         kfree(hdr);
1082         return -EINVAL;
1083 }
1084
1085 static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
1086 {
1087         struct p54_common *priv = dev->priv;
1088         struct p54_control_hdr *hdr;
1089         struct p54_tx_control_led *led;
1090
1091         hdr = kzalloc(sizeof(*hdr) + sizeof(*led) +
1092                       priv->tx_hdr_len, GFP_KERNEL);
1093         if (!hdr)
1094                 return -ENOMEM;
1095
1096         hdr = (void *)hdr + priv->tx_hdr_len;
1097         hdr->magic1 = cpu_to_le16(0x8001);
1098         hdr->len = cpu_to_le16(sizeof(*led));
1099         hdr->type = cpu_to_le16(P54_CONTROL_TYPE_LED);
1100         p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*led));
1101
1102         led = (struct p54_tx_control_led *) hdr->data;
1103         led->mode = cpu_to_le16(mode);
1104         led->led_permanent = cpu_to_le16(link);
1105         led->led_temporary = cpu_to_le16(act);
1106         led->duration = cpu_to_le16(1000);
1107
1108         priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*led), 1);
1109
1110         return 0;
1111 }
1112
1113 #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop)      \
1114 do {                                                            \
1115         queue.aifs = cpu_to_le16(ai_fs);                        \
1116         queue.cwmin = cpu_to_le16(cw_min);                      \
1117         queue.cwmax = cpu_to_le16(cw_max);                      \
1118         queue.txop = cpu_to_le16(_txop);                        \
1119 } while(0)
1120
1121 static int p54_set_edcf(struct ieee80211_hw *dev)
1122 {
1123         struct p54_common *priv = dev->priv;
1124         struct p54_control_hdr *hdr;
1125         struct p54_edcf *edcf;
1126
1127         hdr = kzalloc(priv->tx_hdr_len + sizeof(*hdr) + sizeof(*edcf),
1128                         GFP_ATOMIC);
1129         if (!hdr)
1130                 return -ENOMEM;
1131
1132         hdr = (void *)hdr + priv->tx_hdr_len;
1133         hdr->magic1 = cpu_to_le16(0x8001);
1134         hdr->len = cpu_to_le16(sizeof(*edcf));
1135         hdr->type = cpu_to_le16(P54_CONTROL_TYPE_DCFINIT);
1136         hdr->retry1 = hdr->retry2 = 0;
1137         edcf = (struct p54_edcf *)hdr->data;
1138         if (priv->use_short_slot) {
1139                 edcf->slottime = 9;
1140                 edcf->sifs = 0x10;
1141                 edcf->eofpad = 0x00;
1142         } else {
1143                 edcf->slottime = 20;
1144                 edcf->sifs = 0x0a;
1145                 edcf->eofpad = 0x06;
1146         }
1147         /* (see prism54/isl_oid.h for further details) */
1148         edcf->frameburst = cpu_to_le16(0);
1149         edcf->round_trip_delay = cpu_to_le16(0);
1150         memset(edcf->mapping, 0, sizeof(edcf->mapping));
1151         memcpy(edcf->queue, priv->qos_params, sizeof(edcf->queue));
1152
1153         p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*edcf));
1154         priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*edcf), 1);
1155         return 0;
1156 }
1157
1158 static int p54_init_stats(struct ieee80211_hw *dev)
1159 {
1160         struct p54_common *priv = dev->priv;
1161         struct p54_control_hdr *hdr;
1162         struct p54_statistics *stats;
1163
1164         priv->cached_stats = kzalloc(priv->tx_hdr_len +
1165                         sizeof(*hdr) + sizeof(*stats), GFP_KERNEL);
1166
1167         if (!priv->cached_stats)
1168                         return -ENOMEM;
1169
1170         hdr = (void *) priv->cached_stats + priv->tx_hdr_len;
1171         hdr->magic1 = cpu_to_le16(0x8000);
1172         hdr->len = cpu_to_le16(sizeof(*stats));
1173         hdr->type = cpu_to_le16(P54_CONTROL_TYPE_STAT_READBACK);
1174         hdr->retry1 = hdr->retry2 = 0;
1175
1176         mod_timer(&priv->stats_timer, jiffies + HZ);
1177         return 0;
1178 }
1179
1180 static int p54_start(struct ieee80211_hw *dev)
1181 {
1182         struct p54_common *priv = dev->priv;
1183         int err;
1184
1185         err = priv->open(dev);
1186         if (!err)
1187                 priv->mode = NL80211_IFTYPE_MONITOR;
1188         P54_SET_QUEUE(priv->qos_params[0], 0x0002, 0x0003, 0x0007, 47);
1189         P54_SET_QUEUE(priv->qos_params[1], 0x0002, 0x0007, 0x000f, 94);
1190         P54_SET_QUEUE(priv->qos_params[2], 0x0003, 0x000f, 0x03ff, 0);
1191         P54_SET_QUEUE(priv->qos_params[3], 0x0007, 0x000f, 0x03ff, 0);
1192         err = p54_set_edcf(dev);
1193         if (!err)
1194                 err = p54_init_stats(dev);
1195
1196         return err;
1197 }
1198
1199 static void p54_stop(struct ieee80211_hw *dev)
1200 {
1201         struct p54_common *priv = dev->priv;
1202         struct sk_buff *skb;
1203
1204         del_timer(&priv->stats_timer);
1205         kfree(priv->cached_stats);
1206         priv->cached_stats = NULL;
1207         while ((skb = skb_dequeue(&priv->tx_queue)))
1208                 kfree_skb(skb);
1209         priv->stop(dev);
1210         priv->tsf_high32 = priv->tsf_low32 = 0;
1211         priv->mode = NL80211_IFTYPE_UNSPECIFIED;
1212 }
1213
1214 static int p54_add_interface(struct ieee80211_hw *dev,
1215                              struct ieee80211_if_init_conf *conf)
1216 {
1217         struct p54_common *priv = dev->priv;
1218
1219         if (priv->mode != NL80211_IFTYPE_MONITOR)
1220                 return -EOPNOTSUPP;
1221
1222         switch (conf->type) {
1223         case NL80211_IFTYPE_STATION:
1224                 priv->mode = conf->type;
1225                 break;
1226         default:
1227                 return -EOPNOTSUPP;
1228         }
1229
1230         memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
1231
1232         p54_set_filter(dev, 0, NULL);
1233
1234         switch (conf->type) {
1235         case NL80211_IFTYPE_STATION:
1236                 p54_set_filter(dev, 1, NULL);
1237                 break;
1238         default:
1239                 BUG();  /* impossible */
1240                 break;
1241         }
1242
1243         p54_set_leds(dev, 1, 0, 0);
1244
1245         return 0;
1246 }
1247
1248 static void p54_remove_interface(struct ieee80211_hw *dev,
1249                                  struct ieee80211_if_init_conf *conf)
1250 {
1251         struct p54_common *priv = dev->priv;
1252         priv->mode = NL80211_IFTYPE_MONITOR;
1253         memset(priv->mac_addr, 0, ETH_ALEN);
1254         p54_set_filter(dev, 0, NULL);
1255 }
1256
1257 static int p54_config(struct ieee80211_hw *dev, u32 changed)
1258 {
1259         int ret;
1260         struct p54_common *priv = dev->priv;
1261         struct ieee80211_conf *conf = &dev->conf;
1262
1263         mutex_lock(&priv->conf_mutex);
1264         priv->rx_antenna = 2; /* automatic */
1265         priv->output_power = conf->power_level << 2;
1266         ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq));
1267         if (!ret)
1268                 ret = p54_set_edcf(dev);
1269         mutex_unlock(&priv->conf_mutex);
1270         return ret;
1271 }
1272
1273 static int p54_config_interface(struct ieee80211_hw *dev,
1274                                 struct ieee80211_vif *vif,
1275                                 struct ieee80211_if_conf *conf)
1276 {
1277         struct p54_common *priv = dev->priv;
1278
1279         mutex_lock(&priv->conf_mutex);
1280         p54_set_filter(dev, 0, conf->bssid);
1281         p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
1282         memcpy(priv->bssid, conf->bssid, ETH_ALEN);
1283         mutex_unlock(&priv->conf_mutex);
1284         return 0;
1285 }
1286
1287 static void p54_configure_filter(struct ieee80211_hw *dev,
1288                                  unsigned int changed_flags,
1289                                  unsigned int *total_flags,
1290                                  int mc_count, struct dev_mc_list *mclist)
1291 {
1292         struct p54_common *priv = dev->priv;
1293
1294         *total_flags &= FIF_BCN_PRBRESP_PROMISC |
1295                         FIF_PROMISC_IN_BSS |
1296                         FIF_FCSFAIL;
1297
1298         priv->filter_flags = *total_flags;
1299
1300         if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1301                 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1302                         p54_set_filter(dev, le16_to_cpu(priv->filter_type),
1303                                  NULL);
1304                 else
1305                         p54_set_filter(dev, le16_to_cpu(priv->filter_type),
1306                                  priv->bssid);
1307         }
1308
1309         if (changed_flags & FIF_PROMISC_IN_BSS) {
1310                 if (*total_flags & FIF_PROMISC_IN_BSS)
1311                         p54_set_filter(dev, le16_to_cpu(priv->filter_type) |
1312                                 0x8, NULL);
1313                 else
1314                         p54_set_filter(dev, le16_to_cpu(priv->filter_type) &
1315                                 ~0x8, priv->bssid);
1316         }
1317 }
1318
1319 static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
1320                        const struct ieee80211_tx_queue_params *params)
1321 {
1322         struct p54_common *priv = dev->priv;
1323
1324         if ((params) && !(queue > 4)) {
1325                 P54_SET_QUEUE(priv->qos_params[queue], params->aifs,
1326                         params->cw_min, params->cw_max, params->txop);
1327         } else
1328                 return -EINVAL;
1329
1330         return p54_set_edcf(dev);
1331 }
1332
1333 static int p54_init_xbow_synth(struct ieee80211_hw *dev)
1334 {
1335         struct p54_common *priv = dev->priv;
1336         struct p54_control_hdr *hdr;
1337         struct p54_tx_control_xbow_synth *xbow;
1338
1339         hdr = kzalloc(sizeof(*hdr) + sizeof(*xbow) +
1340                       priv->tx_hdr_len, GFP_KERNEL);
1341         if (!hdr)
1342                 return -ENOMEM;
1343
1344         hdr = (void *)hdr + priv->tx_hdr_len;
1345         hdr->magic1 = cpu_to_le16(0x8001);
1346         hdr->len = cpu_to_le16(sizeof(*xbow));
1347         hdr->type = cpu_to_le16(P54_CONTROL_TYPE_XBOW_SYNTH_CFG);
1348         p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*xbow));
1349
1350         xbow = (struct p54_tx_control_xbow_synth *) hdr->data;
1351         xbow->magic1 = cpu_to_le16(0x1);
1352         xbow->magic2 = cpu_to_le16(0x2);
1353         xbow->freq = cpu_to_le16(5390);
1354
1355         priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*xbow), 1);
1356
1357         return 0;
1358 }
1359
1360 static void p54_statistics_timer(unsigned long data)
1361 {
1362         struct ieee80211_hw *dev = (struct ieee80211_hw *) data;
1363         struct p54_common *priv = dev->priv;
1364         struct p54_control_hdr *hdr;
1365         struct p54_statistics *stats;
1366
1367         BUG_ON(!priv->cached_stats);
1368         hdr = (void *) priv->cached_stats + priv->tx_hdr_len;
1369         p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*stats));
1370
1371         priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*stats), 0);
1372 }
1373
1374 static int p54_get_stats(struct ieee80211_hw *dev,
1375                          struct ieee80211_low_level_stats *stats)
1376 {
1377         struct p54_common *priv = dev->priv;
1378
1379         del_timer(&priv->stats_timer);
1380         p54_statistics_timer((unsigned long)dev);
1381
1382         if (!wait_for_completion_interruptible_timeout(&priv->stats_comp, HZ)) {
1383                 printk(KERN_ERR "%s: device does not respond!\n",
1384                         wiphy_name(dev->wiphy));
1385                 return -EBUSY;
1386         }
1387
1388         memcpy(stats, &priv->stats, sizeof(*stats));
1389
1390         return 0;
1391 }
1392
1393 static int p54_get_tx_stats(struct ieee80211_hw *dev,
1394                             struct ieee80211_tx_queue_stats *stats)
1395 {
1396         struct p54_common *priv = dev->priv;
1397
1398         memcpy(stats, &priv->tx_stats[4], sizeof(stats[0]) * dev->queues);
1399
1400         return 0;
1401 }
1402
1403 static void p54_bss_info_changed(struct ieee80211_hw *dev,
1404                                  struct ieee80211_vif *vif,
1405                                  struct ieee80211_bss_conf *info,
1406                                  u32 changed)
1407 {
1408         struct p54_common *priv = dev->priv;
1409
1410         if (changed & BSS_CHANGED_ERP_SLOT) {
1411                 priv->use_short_slot = info->use_short_slot;
1412                 p54_set_edcf(dev);
1413         }
1414 }
1415
1416 static const struct ieee80211_ops p54_ops = {
1417         .tx                     = p54_tx,
1418         .start                  = p54_start,
1419         .stop                   = p54_stop,
1420         .add_interface          = p54_add_interface,
1421         .remove_interface       = p54_remove_interface,
1422         .config                 = p54_config,
1423         .config_interface       = p54_config_interface,
1424         .bss_info_changed       = p54_bss_info_changed,
1425         .configure_filter       = p54_configure_filter,
1426         .conf_tx                = p54_conf_tx,
1427         .get_stats              = p54_get_stats,
1428         .get_tx_stats           = p54_get_tx_stats
1429 };
1430
1431 struct ieee80211_hw *p54_init_common(size_t priv_data_len)
1432 {
1433         struct ieee80211_hw *dev;
1434         struct p54_common *priv;
1435
1436         dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
1437         if (!dev)
1438                 return NULL;
1439
1440         priv = dev->priv;
1441         priv->mode = NL80211_IFTYPE_UNSPECIFIED;
1442         skb_queue_head_init(&priv->tx_queue);
1443         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */
1444                      IEEE80211_HW_RX_INCLUDES_FCS |
1445                      IEEE80211_HW_SIGNAL_DBM |
1446                      IEEE80211_HW_NOISE_DBM;
1447
1448         /*
1449          * XXX: when this driver gets support for any mode that
1450          *      requires beacons (AP, MESH, IBSS) then it must
1451          *      implement IEEE80211_TX_CTL_ASSIGN_SEQ.
1452          */
1453         dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1454
1455         dev->channel_change_time = 1000;        /* TODO: find actual value */
1456         priv->tx_stats[0].limit = 1;
1457         priv->tx_stats[1].limit = 1;
1458         priv->tx_stats[2].limit = 1;
1459         priv->tx_stats[3].limit = 1;
1460         priv->tx_stats[4].limit = 5;
1461         dev->queues = 1;
1462         priv->noise = -94;
1463         /*
1464          * We support at most 8 tries no matter which rate they're at,
1465          * we cannot support max_rates * max_rate_tries as we set it
1466          * here, but setting it correctly to 4/2 or so would limit us
1467          * artificially if the RC algorithm wants just two rates, so
1468          * let's say 4/7, we'll redistribute it at TX time, see the
1469          * comments there.
1470          */
1471         dev->max_rates = 4;
1472         dev->max_rate_tries = 7;
1473         dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
1474                                  sizeof(struct p54_tx_control_allocdata);
1475
1476         mutex_init(&priv->conf_mutex);
1477         init_completion(&priv->eeprom_comp);
1478         init_completion(&priv->stats_comp);
1479         setup_timer(&priv->stats_timer, p54_statistics_timer,
1480                 (unsigned long)dev);
1481
1482         return dev;
1483 }
1484 EXPORT_SYMBOL_GPL(p54_init_common);
1485
1486 void p54_free_common(struct ieee80211_hw *dev)
1487 {
1488         struct p54_common *priv = dev->priv;
1489         kfree(priv->cached_stats);
1490         kfree(priv->iq_autocal);
1491         kfree(priv->output_limit);
1492         kfree(priv->curve_data);
1493 }
1494 EXPORT_SYMBOL_GPL(p54_free_common);
1495
1496 static int __init p54_init(void)
1497 {
1498         return 0;
1499 }
1500
1501 static void __exit p54_exit(void)
1502 {
1503 }
1504
1505 module_init(p54_init);
1506 module_exit(p54_exit);