p54: fix memory management
[linux-2.6.git] / drivers / net / wireless / p54 / p54common.c
1 /*
2  * Common code for mac80211 Prism54 drivers
3  *
4  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
5  * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
6  * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
7  *
8  * Based on the islsm (softmac prism54) driver, which is:
9  * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License version 2 as
13  * published by the Free Software Foundation.
14  */
15
16 #include <linux/init.h>
17 #include <linux/firmware.h>
18 #include <linux/etherdevice.h>
19
20 #include <net/mac80211.h>
21
22 #include "p54.h"
23 #include "p54common.h"
24
25 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
26 MODULE_DESCRIPTION("Softmac Prism54 common code");
27 MODULE_LICENSE("GPL");
28 MODULE_ALIAS("prism54common");
29
30 static struct ieee80211_rate p54_bgrates[] = {
31         { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
32         { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
33         { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
34         { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
35         { .bitrate = 60, .hw_value = 4, },
36         { .bitrate = 90, .hw_value = 5, },
37         { .bitrate = 120, .hw_value = 6, },
38         { .bitrate = 180, .hw_value = 7, },
39         { .bitrate = 240, .hw_value = 8, },
40         { .bitrate = 360, .hw_value = 9, },
41         { .bitrate = 480, .hw_value = 10, },
42         { .bitrate = 540, .hw_value = 11, },
43 };
44
45 static struct ieee80211_channel p54_bgchannels[] = {
46         { .center_freq = 2412, .hw_value = 1, },
47         { .center_freq = 2417, .hw_value = 2, },
48         { .center_freq = 2422, .hw_value = 3, },
49         { .center_freq = 2427, .hw_value = 4, },
50         { .center_freq = 2432, .hw_value = 5, },
51         { .center_freq = 2437, .hw_value = 6, },
52         { .center_freq = 2442, .hw_value = 7, },
53         { .center_freq = 2447, .hw_value = 8, },
54         { .center_freq = 2452, .hw_value = 9, },
55         { .center_freq = 2457, .hw_value = 10, },
56         { .center_freq = 2462, .hw_value = 11, },
57         { .center_freq = 2467, .hw_value = 12, },
58         { .center_freq = 2472, .hw_value = 13, },
59         { .center_freq = 2484, .hw_value = 14, },
60 };
61
62 static struct ieee80211_supported_band band_2GHz = {
63         .channels = p54_bgchannels,
64         .n_channels = ARRAY_SIZE(p54_bgchannels),
65         .bitrates = p54_bgrates,
66         .n_bitrates = ARRAY_SIZE(p54_bgrates),
67 };
68
69 static struct ieee80211_rate p54_arates[] = {
70         { .bitrate = 60, .hw_value = 4, },
71         { .bitrate = 90, .hw_value = 5, },
72         { .bitrate = 120, .hw_value = 6, },
73         { .bitrate = 180, .hw_value = 7, },
74         { .bitrate = 240, .hw_value = 8, },
75         { .bitrate = 360, .hw_value = 9, },
76         { .bitrate = 480, .hw_value = 10, },
77         { .bitrate = 540, .hw_value = 11, },
78 };
79
80 static struct ieee80211_channel p54_achannels[] = {
81         { .center_freq = 4920 },
82         { .center_freq = 4940 },
83         { .center_freq = 4960 },
84         { .center_freq = 4980 },
85         { .center_freq = 5040 },
86         { .center_freq = 5060 },
87         { .center_freq = 5080 },
88         { .center_freq = 5170 },
89         { .center_freq = 5180 },
90         { .center_freq = 5190 },
91         { .center_freq = 5200 },
92         { .center_freq = 5210 },
93         { .center_freq = 5220 },
94         { .center_freq = 5230 },
95         { .center_freq = 5240 },
96         { .center_freq = 5260 },
97         { .center_freq = 5280 },
98         { .center_freq = 5300 },
99         { .center_freq = 5320 },
100         { .center_freq = 5500 },
101         { .center_freq = 5520 },
102         { .center_freq = 5540 },
103         { .center_freq = 5560 },
104         { .center_freq = 5580 },
105         { .center_freq = 5600 },
106         { .center_freq = 5620 },
107         { .center_freq = 5640 },
108         { .center_freq = 5660 },
109         { .center_freq = 5680 },
110         { .center_freq = 5700 },
111         { .center_freq = 5745 },
112         { .center_freq = 5765 },
113         { .center_freq = 5785 },
114         { .center_freq = 5805 },
115         { .center_freq = 5825 },
116 };
117
118 static struct ieee80211_supported_band band_5GHz = {
119         .channels = p54_achannels,
120         .n_channels = ARRAY_SIZE(p54_achannels),
121         .bitrates = p54_arates,
122         .n_bitrates = ARRAY_SIZE(p54_arates),
123 };
124
125 int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
126 {
127         struct p54_common *priv = dev->priv;
128         struct bootrec_exp_if *exp_if;
129         struct bootrec *bootrec;
130         u32 *data = (u32 *)fw->data;
131         u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
132         u8 *fw_version = NULL;
133         size_t len;
134         int i;
135
136         if (priv->rx_start)
137                 return 0;
138
139         while (data < end_data && *data)
140                 data++;
141
142         while (data < end_data && !*data)
143                 data++;
144
145         bootrec = (struct bootrec *) data;
146
147         while (bootrec->data <= end_data &&
148                (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
149                 u32 code = le32_to_cpu(bootrec->code);
150                 switch (code) {
151                 case BR_CODE_COMPONENT_ID:
152                         priv->fw_interface = be32_to_cpup((__be32 *)
153                                              bootrec->data);
154                         switch (priv->fw_interface) {
155                         case FW_FMAC:
156                                 printk(KERN_INFO "p54: FreeMAC firmware\n");
157                                 break;
158                         case FW_LM20:
159                                 printk(KERN_INFO "p54: LM20 firmware\n");
160                                 break;
161                         case FW_LM86:
162                                 printk(KERN_INFO "p54: LM86 firmware\n");
163                                 break;
164                         case FW_LM87:
165                                 printk(KERN_INFO "p54: LM87 firmware\n");
166                                 break;
167                         default:
168                                 printk(KERN_INFO "p54: unknown firmware\n");
169                                 break;
170                         }
171                         break;
172                 case BR_CODE_COMPONENT_VERSION:
173                         /* 24 bytes should be enough for all firmwares */
174                         if (strnlen((unsigned char*)bootrec->data, 24) < 24)
175                                 fw_version = (unsigned char*)bootrec->data;
176                         break;
177                 case BR_CODE_DESCR: {
178                         struct bootrec_desc *desc =
179                                 (struct bootrec_desc *)bootrec->data;
180                         priv->rx_start = le32_to_cpu(desc->rx_start);
181                         /* FIXME add sanity checking */
182                         priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
183                         priv->headroom = desc->headroom;
184                         priv->tailroom = desc->tailroom;
185                         if (le32_to_cpu(bootrec->len) == 11)
186                                 priv->rx_mtu = le16_to_cpu(desc->rx_mtu);
187                         else
188                                 priv->rx_mtu = (size_t)
189                                         0x620 - priv->tx_hdr_len;
190                         break;
191                         }
192                 case BR_CODE_EXPOSED_IF:
193                         exp_if = (struct bootrec_exp_if *) bootrec->data;
194                         for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
195                                 if (exp_if[i].if_id == cpu_to_le16(0x1a))
196                                         priv->fw_var = le16_to_cpu(exp_if[i].variant);
197                         break;
198                 case BR_CODE_DEPENDENT_IF:
199                         break;
200                 case BR_CODE_END_OF_BRA:
201                 case LEGACY_BR_CODE_END_OF_BRA:
202                         end_data = NULL;
203                         break;
204                 default:
205                         break;
206                 }
207                 bootrec = (struct bootrec *)&bootrec->data[len];
208         }
209
210         if (fw_version)
211                 printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
212                         fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
213
214         if (priv->fw_var >= 0x300) {
215                 /* Firmware supports QoS, use it! */
216                 priv->tx_stats[4].limit = 3;
217                 priv->tx_stats[5].limit = 4;
218                 priv->tx_stats[6].limit = 3;
219                 priv->tx_stats[7].limit = 1;
220                 dev->queues = 4;
221         }
222
223         return 0;
224 }
225 EXPORT_SYMBOL_GPL(p54_parse_firmware);
226
227 static int p54_convert_rev0(struct ieee80211_hw *dev,
228                             struct pda_pa_curve_data *curve_data)
229 {
230         struct p54_common *priv = dev->priv;
231         struct p54_pa_curve_data_sample *dst;
232         struct pda_pa_curve_data_sample_rev0 *src;
233         size_t cd_len = sizeof(*curve_data) +
234                 (curve_data->points_per_channel*sizeof(*dst) + 2) *
235                  curve_data->channels;
236         unsigned int i, j;
237         void *source, *target;
238
239         priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
240         if (!priv->curve_data)
241                 return -ENOMEM;
242
243         memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
244         source = curve_data->data;
245         target = priv->curve_data->data;
246         for (i = 0; i < curve_data->channels; i++) {
247                 __le16 *freq = source;
248                 source += sizeof(__le16);
249                 *((__le16 *)target) = *freq;
250                 target += sizeof(__le16);
251                 for (j = 0; j < curve_data->points_per_channel; j++) {
252                         dst = target;
253                         src = source;
254
255                         dst->rf_power = src->rf_power;
256                         dst->pa_detector = src->pa_detector;
257                         dst->data_64qam = src->pcv;
258                         /* "invent" the points for the other modulations */
259 #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
260                         dst->data_16qam = SUB(src->pcv, 12);
261                         dst->data_qpsk = SUB(dst->data_16qam, 12);
262                         dst->data_bpsk = SUB(dst->data_qpsk, 12);
263                         dst->data_barker = SUB(dst->data_bpsk, 14);
264 #undef SUB
265                         target += sizeof(*dst);
266                         source += sizeof(*src);
267                 }
268         }
269
270         return 0;
271 }
272
273 static int p54_convert_rev1(struct ieee80211_hw *dev,
274                             struct pda_pa_curve_data *curve_data)
275 {
276         struct p54_common *priv = dev->priv;
277         struct p54_pa_curve_data_sample *dst;
278         struct pda_pa_curve_data_sample_rev1 *src;
279         size_t cd_len = sizeof(*curve_data) +
280                 (curve_data->points_per_channel*sizeof(*dst) + 2) *
281                  curve_data->channels;
282         unsigned int i, j;
283         void *source, *target;
284
285         priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
286         if (!priv->curve_data)
287                 return -ENOMEM;
288
289         memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
290         source = curve_data->data;
291         target = priv->curve_data->data;
292         for (i = 0; i < curve_data->channels; i++) {
293                 __le16 *freq = source;
294                 source += sizeof(__le16);
295                 *((__le16 *)target) = *freq;
296                 target += sizeof(__le16);
297                 for (j = 0; j < curve_data->points_per_channel; j++) {
298                         memcpy(target, source, sizeof(*src));
299
300                         target += sizeof(*dst);
301                         source += sizeof(*src);
302                 }
303                 source++;
304         }
305
306         return 0;
307 }
308
309 static const char *p54_rf_chips[] = { "NULL", "Duette3", "Duette2",
310                               "Frisbee", "Xbow", "Longbow", "NULL", "NULL" };
311 static int p54_init_xbow_synth(struct ieee80211_hw *dev);
312
313 static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
314 {
315         struct p54_common *priv = dev->priv;
316         struct eeprom_pda_wrap *wrap = NULL;
317         struct pda_entry *entry;
318         unsigned int data_len, entry_len;
319         void *tmp;
320         int err;
321         u8 *end = (u8 *)eeprom + len;
322         u16 synth = 0;
323
324         wrap = (struct eeprom_pda_wrap *) eeprom;
325         entry = (void *)wrap->data + le16_to_cpu(wrap->len);
326
327         /* verify that at least the entry length/code fits */
328         while ((u8 *)entry <= end - sizeof(*entry)) {
329                 entry_len = le16_to_cpu(entry->len);
330                 data_len = ((entry_len - 1) << 1);
331
332                 /* abort if entry exceeds whole structure */
333                 if ((u8 *)entry + sizeof(*entry) + data_len > end)
334                         break;
335
336                 switch (le16_to_cpu(entry->code)) {
337                 case PDR_MAC_ADDRESS:
338                         SET_IEEE80211_PERM_ADDR(dev, entry->data);
339                         break;
340                 case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
341                         if (data_len < 2) {
342                                 err = -EINVAL;
343                                 goto err;
344                         }
345
346                         if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
347                                 err = -EINVAL;
348                                 goto err;
349                         }
350
351                         priv->output_limit = kmalloc(entry->data[1] *
352                                 sizeof(*priv->output_limit), GFP_KERNEL);
353
354                         if (!priv->output_limit) {
355                                 err = -ENOMEM;
356                                 goto err;
357                         }
358
359                         memcpy(priv->output_limit, &entry->data[2],
360                                entry->data[1]*sizeof(*priv->output_limit));
361                         priv->output_limit_len = entry->data[1];
362                         break;
363                 case PDR_PRISM_PA_CAL_CURVE_DATA: {
364                         struct pda_pa_curve_data *curve_data =
365                                 (struct pda_pa_curve_data *)entry->data;
366                         if (data_len < sizeof(*curve_data)) {
367                                 err = -EINVAL;
368                                 goto err;
369                         }
370
371                         switch (curve_data->cal_method_rev) {
372                         case 0:
373                                 err = p54_convert_rev0(dev, curve_data);
374                                 break;
375                         case 1:
376                                 err = p54_convert_rev1(dev, curve_data);
377                                 break;
378                         default:
379                                 printk(KERN_ERR "p54: unknown curve data "
380                                                 "revision %d\n",
381                                                 curve_data->cal_method_rev);
382                                 err = -ENODEV;
383                                 break;
384                         }
385                         if (err)
386                                 goto err;
387
388                 }
389                 case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
390                         priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
391                         if (!priv->iq_autocal) {
392                                 err = -ENOMEM;
393                                 goto err;
394                         }
395
396                         memcpy(priv->iq_autocal, entry->data, data_len);
397                         priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
398                         break;
399                 case PDR_INTERFACE_LIST:
400                         tmp = entry->data;
401                         while ((u8 *)tmp < entry->data + data_len) {
402                                 struct bootrec_exp_if *exp_if = tmp;
403                                 if (le16_to_cpu(exp_if->if_id) == 0xf)
404                                         synth = le16_to_cpu(exp_if->variant);
405                                 tmp += sizeof(struct bootrec_exp_if);
406                         }
407                         break;
408                 case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
409                         priv->version = *(u8 *)(entry->data + 1);
410                         break;
411                 case PDR_END:
412                         /* make it overrun */
413                         entry_len = len;
414                         break;
415                 default:
416                         printk(KERN_INFO "p54: unknown eeprom code : 0x%x\n",
417                                 le16_to_cpu(entry->code));
418                         break;
419                 }
420
421                 entry = (void *)entry + (entry_len + 1)*2;
422         }
423
424         if (!synth || !priv->iq_autocal || !priv->output_limit ||
425             !priv->curve_data) {
426                 printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
427                 err = -EINVAL;
428                 goto err;
429         }
430
431         priv->rxhw = synth & 0x07;
432         if (priv->rxhw == 4)
433                 p54_init_xbow_synth(dev);
434         if (!(synth & 0x40))
435                 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
436         if (!(synth & 0x80))
437                 dev->wiphy->bands[IEEE80211_BAND_5GHZ] = &band_5GHz;
438
439         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
440                 u8 perm_addr[ETH_ALEN];
441
442                 printk(KERN_WARNING "%s: Invalid hwaddr! Using randomly generated MAC addr\n",
443                         wiphy_name(dev->wiphy));
444                 random_ether_addr(perm_addr);
445                 SET_IEEE80211_PERM_ADDR(dev, perm_addr);
446         }
447
448         printk(KERN_INFO "%s: hwaddr %pM, MAC:isl38%02x RF:%s\n",
449                 wiphy_name(dev->wiphy),
450                 dev->wiphy->perm_addr,
451                 priv->version, p54_rf_chips[priv->rxhw]);
452
453         return 0;
454
455   err:
456         if (priv->iq_autocal) {
457                 kfree(priv->iq_autocal);
458                 priv->iq_autocal = NULL;
459         }
460
461         if (priv->output_limit) {
462                 kfree(priv->output_limit);
463                 priv->output_limit = NULL;
464         }
465
466         if (priv->curve_data) {
467                 kfree(priv->curve_data);
468                 priv->curve_data = NULL;
469         }
470
471         printk(KERN_ERR "p54: eeprom parse failed!\n");
472         return err;
473 }
474
475 static int p54_rssi_to_dbm(struct ieee80211_hw *dev, int rssi)
476 {
477         /* TODO: get the rssi_add & rssi_mul data from the eeprom */
478         return ((rssi * 0x83) / 64 - 400) / 4;
479 }
480
481 static int p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
482 {
483         struct p54_common *priv = dev->priv;
484         struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
485         struct ieee80211_rx_status rx_status = {0};
486         u16 freq = le16_to_cpu(hdr->freq);
487         size_t header_len = sizeof(*hdr);
488         u32 tsf32;
489
490         if (!(hdr->magic & cpu_to_le16(0x0001))) {
491                 if (priv->filter_flags & FIF_FCSFAIL)
492                         rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
493                 else
494                         return 0;
495         }
496
497         rx_status.signal = p54_rssi_to_dbm(dev, hdr->rssi);
498         rx_status.noise = priv->noise;
499         /* XX correct? */
500         rx_status.qual = (100 * hdr->rssi) / 127;
501         rx_status.rate_idx = (dev->conf.channel->band == IEEE80211_BAND_2GHZ ?
502                         hdr->rate : (hdr->rate - 4)) & 0xf;
503         rx_status.freq = freq;
504         rx_status.band =  dev->conf.channel->band;
505         rx_status.antenna = hdr->antenna;
506
507         tsf32 = le32_to_cpu(hdr->tsf32);
508         if (tsf32 < priv->tsf_low32)
509                 priv->tsf_high32++;
510         rx_status.mactime = ((u64)priv->tsf_high32) << 32 | tsf32;
511         priv->tsf_low32 = tsf32;
512
513         rx_status.flag |= RX_FLAG_TSFT;
514
515         if (hdr->magic & cpu_to_le16(0x4000))
516                 header_len += hdr->align[0];
517
518         skb_pull(skb, header_len);
519         skb_trim(skb, le16_to_cpu(hdr->len));
520
521         ieee80211_rx_irqsafe(dev, skb, &rx_status);
522
523         return -1;
524 }
525
526 static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
527 {
528         struct p54_common *priv = dev->priv;
529         int i;
530
531         if (priv->mode == NL80211_IFTYPE_UNSPECIFIED)
532                 return ;
533
534         for (i = 0; i < dev->queues; i++)
535                 if (priv->tx_stats[i + 4].len < priv->tx_stats[i + 4].limit)
536                         ieee80211_wake_queue(dev, i);
537 }
538
539 void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb)
540 {
541         struct p54_common *priv = dev->priv;
542         struct ieee80211_tx_info *info;
543         struct memrecord *range;
544         unsigned long flags;
545         u32 freed = 0, last_addr = priv->rx_start;
546
547         if (!skb || !dev)
548                 return;
549
550         spin_lock_irqsave(&priv->tx_queue.lock, flags);
551         info = IEEE80211_SKB_CB(skb);
552         range = (void *)info->rate_driver_data;
553         if (skb->prev != (struct sk_buff *)&priv->tx_queue) {
554                 struct ieee80211_tx_info *ni;
555                 struct memrecord *mr;
556
557                 ni = IEEE80211_SKB_CB(skb->prev);
558                 mr = (struct memrecord *)ni->rate_driver_data;
559                 last_addr = mr->end_addr;
560         }
561         if (skb->next != (struct sk_buff *)&priv->tx_queue) {
562                 struct ieee80211_tx_info *ni;
563                 struct memrecord *mr;
564
565                 ni = IEEE80211_SKB_CB(skb->next);
566                 mr = (struct memrecord *)ni->rate_driver_data;
567                 freed = mr->start_addr - last_addr;
568         } else
569                 freed = priv->rx_end - last_addr;
570         __skb_unlink(skb, &priv->tx_queue);
571         spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
572         kfree_skb(skb);
573
574         if (freed >= priv->headroom + sizeof(struct p54_control_hdr) + 48 +
575                      IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
576                 p54_wake_free_queues(dev);
577 }
578 EXPORT_SYMBOL_GPL(p54_free_skb);
579
580 static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
581 {
582         struct p54_common *priv = dev->priv;
583         struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
584         struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
585         struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
586         u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom;
587         struct memrecord *range = NULL;
588         u32 freed = 0;
589         u32 last_addr = priv->rx_start;
590         unsigned long flags;
591         int count, idx;
592
593         spin_lock_irqsave(&priv->tx_queue.lock, flags);
594         while (entry != (struct sk_buff *)&priv->tx_queue) {
595                 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
596                 struct p54_control_hdr *entry_hdr;
597                 struct p54_tx_control_allocdata *entry_data;
598                 int pad = 0;
599
600                 range = (void *)info->rate_driver_data;
601                 if (range->start_addr != addr) {
602                         last_addr = range->end_addr;
603                         entry = entry->next;
604                         continue;
605                 }
606
607                 if (entry->next != (struct sk_buff *)&priv->tx_queue) {
608                         struct ieee80211_tx_info *ni;
609                         struct memrecord *mr;
610
611                         ni = IEEE80211_SKB_CB(entry->next);
612                         mr = (struct memrecord *)ni->rate_driver_data;
613                         freed = mr->start_addr - last_addr;
614                 } else
615                         freed = priv->rx_end - last_addr;
616
617                 last_addr = range->end_addr;
618                 __skb_unlink(entry, &priv->tx_queue);
619                 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
620
621                 /*
622                  * Clear manually, ieee80211_tx_info_clear_status would
623                  * clear the counts too and we need them.
624                  */
625                 memset(&info->status.ampdu_ack_len, 0,
626                        sizeof(struct ieee80211_tx_info) -
627                        offsetof(struct ieee80211_tx_info, status.ampdu_ack_len));
628                 BUILD_BUG_ON(offsetof(struct ieee80211_tx_info,
629                                       status.ampdu_ack_len) != 23);
630
631                 entry_hdr = (struct p54_control_hdr *) entry->data;
632                 entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
633                 if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
634                         pad = entry_data->align[0];
635
636                 /* walk through the rates array and adjust the counts */
637                 count = payload->retries;
638                 for (idx = 0; idx < 4; idx++) {
639                         if (count >= info->status.rates[idx].count) {
640                                 count -= info->status.rates[idx].count;
641                         } else if (count > 0) {
642                                 info->status.rates[idx].count = count;
643                                 count = 0;
644                         } else {
645                                 info->status.rates[idx].idx = -1;
646                                 info->status.rates[idx].count = 0;
647                         }
648                 }
649
650                 priv->tx_stats[entry_data->hw_queue].len--;
651                 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
652                      (!payload->status))
653                         info->flags |= IEEE80211_TX_STAT_ACK;
654                 if (payload->status & 0x02)
655                         info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
656                 info->status.ack_signal = p54_rssi_to_dbm(dev,
657                                 le16_to_cpu(payload->ack_rssi));
658                 skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
659                 ieee80211_tx_status_irqsafe(dev, entry);
660                 goto out;
661         }
662         spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
663
664 out:
665         if (freed >= priv->headroom + sizeof(struct p54_control_hdr) + 48 +
666                      IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
667                 p54_wake_free_queues(dev);
668 }
669
670 static void p54_rx_eeprom_readback(struct ieee80211_hw *dev,
671                                    struct sk_buff *skb)
672 {
673         struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
674         struct p54_eeprom_lm86 *eeprom = (struct p54_eeprom_lm86 *) hdr->data;
675         struct p54_common *priv = dev->priv;
676
677         if (!priv->eeprom)
678                 return ;
679
680         memcpy(priv->eeprom, eeprom->data, le16_to_cpu(eeprom->len));
681
682         complete(&priv->eeprom_comp);
683 }
684
685 static void p54_rx_stats(struct ieee80211_hw *dev, struct sk_buff *skb)
686 {
687         struct p54_common *priv = dev->priv;
688         struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
689         struct p54_statistics *stats = (struct p54_statistics *) hdr->data;
690         u32 tsf32 = le32_to_cpu(stats->tsf32);
691
692         if (tsf32 < priv->tsf_low32)
693                 priv->tsf_high32++;
694         priv->tsf_low32 = tsf32;
695
696         priv->stats.dot11RTSFailureCount = le32_to_cpu(stats->rts_fail);
697         priv->stats.dot11RTSSuccessCount = le32_to_cpu(stats->rts_success);
698         priv->stats.dot11FCSErrorCount = le32_to_cpu(stats->rx_bad_fcs);
699
700         priv->noise = p54_rssi_to_dbm(dev, le32_to_cpu(stats->noise));
701         complete(&priv->stats_comp);
702
703         mod_timer(&priv->stats_timer, jiffies + 5 * HZ);
704 }
705
706 static int p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
707 {
708         struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
709
710         switch (le16_to_cpu(hdr->type)) {
711         case P54_CONTROL_TYPE_TXDONE:
712                 p54_rx_frame_sent(dev, skb);
713                 break;
714         case P54_CONTROL_TYPE_BBP:
715                 break;
716         case P54_CONTROL_TYPE_STAT_READBACK:
717                 p54_rx_stats(dev, skb);
718                 break;
719         case P54_CONTROL_TYPE_EEPROM_READBACK:
720                 p54_rx_eeprom_readback(dev, skb);
721                 break;
722         default:
723                 printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
724                        wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
725                 break;
726         }
727
728         return 0;
729 }
730
731 /* returns zero if skb can be reused */
732 int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
733 {
734         u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
735
736         if (type == 0x80)
737                 return p54_rx_control(dev, skb);
738         else
739                 return p54_rx_data(dev, skb);
740 }
741 EXPORT_SYMBOL_GPL(p54_rx);
742
743 /*
744  * So, the firmware is somewhat stupid and doesn't know what places in its
745  * memory incoming data should go to. By poking around in the firmware, we
746  * can find some unused memory to upload our packets to. However, data that we
747  * want the card to TX needs to stay intact until the card has told us that
748  * it is done with it. This function finds empty places we can upload to and
749  * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
750  * allocated areas.
751  */
752 static int p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
753                                struct p54_control_hdr *data, u32 len)
754 {
755         struct p54_common *priv = dev->priv;
756         struct sk_buff *entry = priv->tx_queue.next;
757         struct sk_buff *target_skb = NULL;
758         struct ieee80211_tx_info *info;
759         struct memrecord *range;
760         u32 last_addr = priv->rx_start;
761         u32 largest_hole = 0;
762         u32 target_addr = priv->rx_start;
763         unsigned long flags;
764         unsigned int left;
765         len = (len + priv->headroom + priv->tailroom + 3) & ~0x3;
766
767         if (!skb)
768                 return -EINVAL;
769
770         spin_lock_irqsave(&priv->tx_queue.lock, flags);
771         left = skb_queue_len(&priv->tx_queue);
772         while (left--) {
773                 u32 hole_size;
774                 info = IEEE80211_SKB_CB(entry);
775                 range = (void *)info->rate_driver_data;
776                 hole_size = range->start_addr - last_addr;
777                 if (!target_skb && hole_size >= len) {
778                         target_skb = entry->prev;
779                         hole_size -= len;
780                         target_addr = last_addr;
781                 }
782                 largest_hole = max(largest_hole, hole_size);
783                 last_addr = range->end_addr;
784                 entry = entry->next;
785         }
786         if (!target_skb && priv->rx_end - last_addr >= len) {
787                 target_skb = priv->tx_queue.prev;
788                 largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
789                 if (!skb_queue_empty(&priv->tx_queue)) {
790                         info = IEEE80211_SKB_CB(target_skb);
791                         range = (void *)info->rate_driver_data;
792                         target_addr = range->end_addr;
793                 }
794         } else
795                 largest_hole = max(largest_hole, priv->rx_end - last_addr);
796
797         if (!target_skb) {
798                 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
799                 ieee80211_stop_queues(dev);
800                 return -ENOMEM;
801         }
802
803         info = IEEE80211_SKB_CB(skb);
804         range = (void *)info->rate_driver_data;
805         range->start_addr = target_addr;
806         range->end_addr = target_addr + len;
807         __skb_queue_after(&priv->tx_queue, target_skb, skb);
808         spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
809
810         if (largest_hole < priv->headroom + sizeof(struct p54_control_hdr) +
811                            48 + IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
812                 ieee80211_stop_queues(dev);
813
814         data->req_id = cpu_to_le32(target_addr + priv->headroom);
815         return 0;
816 }
817
818 static struct sk_buff *p54_alloc_skb(struct ieee80211_hw *dev,
819                 u16 hdr_flags, u16 len, u16 type, gfp_t memflags)
820 {
821         struct p54_common *priv = dev->priv;
822         struct p54_control_hdr *hdr;
823         struct sk_buff *skb;
824
825         skb = __dev_alloc_skb(len + priv->tx_hdr_len, memflags);
826         if (!skb)
827                 return NULL;
828         skb_reserve(skb, priv->tx_hdr_len);
829
830         hdr = (struct p54_control_hdr *) skb_put(skb, sizeof(*hdr));
831         hdr->magic1 = cpu_to_le16(hdr_flags);
832         hdr->len = cpu_to_le16(len - sizeof(*hdr));
833         hdr->type = cpu_to_le16(type);
834         hdr->retry1 = hdr->retry2 = 0;
835
836         if (unlikely(p54_assign_address(dev, skb, hdr, len))) {
837                 kfree_skb(skb);
838                 return NULL;
839         }
840         return skb;
841 }
842
843 int p54_read_eeprom(struct ieee80211_hw *dev)
844 {
845         struct p54_common *priv = dev->priv;
846         struct p54_control_hdr *hdr = NULL;
847         struct p54_eeprom_lm86 *eeprom_hdr;
848         struct sk_buff *skb;
849         size_t eeprom_size = 0x2020, offset = 0, blocksize;
850         int ret = -ENOMEM;
851         void *eeprom = NULL;
852
853         skb = p54_alloc_skb(dev, 0x8000, sizeof(*hdr) + sizeof(*eeprom_hdr) +
854                             EEPROM_READBACK_LEN,
855                             P54_CONTROL_TYPE_EEPROM_READBACK, GFP_KERNEL);
856         if (!skb)
857                 goto free;
858         priv->eeprom = kzalloc(EEPROM_READBACK_LEN, GFP_KERNEL);
859         if (!priv->eeprom)
860                 goto free;
861         eeprom = kzalloc(eeprom_size, GFP_KERNEL);
862         if (!eeprom)
863                 goto free;
864
865         eeprom_hdr = (struct p54_eeprom_lm86 *) skb_put(skb,
866                      sizeof(*eeprom_hdr) + EEPROM_READBACK_LEN);
867
868         while (eeprom_size) {
869                 blocksize = min(eeprom_size, (size_t)EEPROM_READBACK_LEN);
870                 eeprom_hdr->offset = cpu_to_le16(offset);
871                 eeprom_hdr->len = cpu_to_le16(blocksize);
872                 priv->tx(dev, skb, 0);
873
874                 if (!wait_for_completion_interruptible_timeout(&priv->eeprom_comp, HZ)) {
875                         printk(KERN_ERR "%s: device does not respond!\n",
876                                 wiphy_name(dev->wiphy));
877                         ret = -EBUSY;
878                         goto free;
879                 }
880
881                 memcpy(eeprom + offset, priv->eeprom, blocksize);
882                 offset += blocksize;
883                 eeprom_size -= blocksize;
884         }
885
886         ret = p54_parse_eeprom(dev, eeprom, offset);
887 free:
888         kfree(priv->eeprom);
889         priv->eeprom = NULL;
890         p54_free_skb(dev, skb);
891         kfree(eeprom);
892
893         return ret;
894 }
895 EXPORT_SYMBOL_GPL(p54_read_eeprom);
896
897 static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
898 {
899         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
900         struct ieee80211_tx_queue_stats *current_queue;
901         struct p54_common *priv = dev->priv;
902         struct p54_control_hdr *hdr;
903         struct p54_tx_control_allocdata *txhdr;
904         size_t padding, len;
905         int i, j, ridx;
906         u8 rate;
907         u8 cts_rate = 0x20;
908         u8 rc_flags;
909         u8 calculated_tries[4];
910         u8 nrates = 0, nremaining = 8;
911
912         current_queue = &priv->tx_stats[skb_get_queue_mapping(skb) + 4];
913         if (unlikely(current_queue->len > current_queue->limit))
914                 return NETDEV_TX_BUSY;
915         current_queue->len++;
916         current_queue->count++;
917         if (current_queue->len == current_queue->limit)
918                 ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
919
920         padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
921         len = skb->len;
922
923         txhdr = (struct p54_tx_control_allocdata *)
924                         skb_push(skb, sizeof(*txhdr) + padding);
925         hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
926
927         if (padding)
928                 hdr->magic1 = cpu_to_le16(0x4010);
929         else
930                 hdr->magic1 = cpu_to_le16(0x0010);
931         hdr->len = cpu_to_le16(len);
932         hdr->type = (info->flags & IEEE80211_TX_CTL_NO_ACK) ? 0 : cpu_to_le16(1);
933         hdr->retry1 = info->control.rates[0].count;
934
935         /*
936          * we register the rates in perfect order, and
937          * RTS/CTS won't happen on 5 GHz
938          */
939         cts_rate = info->control.rts_cts_rate_idx;
940
941         memset(&txhdr->rateset, 0, sizeof(txhdr->rateset));
942
943         /* see how many rates got used */
944         for (i = 0; i < 4; i++) {
945                 if (info->control.rates[i].idx < 0)
946                         break;
947                 nrates++;
948         }
949
950         /* limit tries to 8/nrates per rate */
951         for (i = 0; i < nrates; i++) {
952                 /*
953                  * The magic expression here is equivalent to 8/nrates for
954                  * all values that matter, but avoids division and jumps.
955                  * Note that nrates can only take the values 1 through 4.
956                  */
957                 calculated_tries[i] = min_t(int, ((15 >> nrates) | 1) + 1,
958                                                  info->control.rates[i].count);
959                 nremaining -= calculated_tries[i];
960         }
961
962         /* if there are tries left, distribute from back to front */
963         for (i = nrates - 1; nremaining > 0 && i >= 0; i--) {
964                 int tmp = info->control.rates[i].count - calculated_tries[i];
965
966                 if (tmp <= 0)
967                         continue;
968                 /* RC requested more tries at this rate */
969
970                 tmp = min_t(int, tmp, nremaining);
971                 calculated_tries[i] += tmp;
972                 nremaining -= tmp;
973         }
974
975         ridx = 0;
976         for (i = 0; i < nrates && ridx < 8; i++) {
977                 /* we register the rates in perfect order */
978                 rate = info->control.rates[i].idx;
979                 if (info->band == IEEE80211_BAND_5GHZ)
980                         rate += 4;
981
982                 /* store the count we actually calculated for TX status */
983                 info->control.rates[i].count = calculated_tries[i];
984
985                 rc_flags = info->control.rates[i].flags;
986                 if (rc_flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) {
987                         rate |= 0x10;
988                         cts_rate |= 0x10;
989                 }
990                 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS)
991                         rate |= 0x40;
992                 else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT)
993                         rate |= 0x20;
994                 for (j = 0; j < calculated_tries[i] && ridx < 8; j++) {
995                         txhdr->rateset[ridx] = rate;
996                         ridx++;
997                 }
998         }
999         hdr->retry2 = ridx;
1000
1001         txhdr->key_type = 0;
1002         txhdr->key_len = 0;
1003         txhdr->hw_queue = skb_get_queue_mapping(skb) + 4;
1004         txhdr->tx_antenna = (info->antenna_sel_tx == 0) ?
1005                 2 : info->antenna_sel_tx - 1;
1006         txhdr->output_power = priv->output_power;
1007         txhdr->cts_rate = (info->flags & IEEE80211_TX_CTL_NO_ACK) ?
1008                           0 : cts_rate;
1009         if (padding)
1010                 txhdr->align[0] = padding;
1011
1012         /* modifies skb->cb and with it info, so must be last! */
1013         if (unlikely(p54_assign_address(dev, skb, hdr, skb->len))) {
1014                 skb_pull(skb, sizeof(*hdr) + sizeof(*txhdr) + padding);
1015                 return NETDEV_TX_BUSY;
1016         }
1017         priv->tx(dev, skb, 0);
1018         return 0;
1019 }
1020
1021 static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type,
1022                           const u8 *bssid)
1023 {
1024         struct p54_common *priv = dev->priv;
1025         struct sk_buff *skb;
1026         struct p54_tx_control_filter *filter;
1027         u16 data_len = sizeof(struct p54_control_hdr) + sizeof(*filter);
1028
1029         if (priv->fw_var < 0x500)
1030                 data_len += P54_TX_CONTROL_FILTER_V1_LEN;
1031         else
1032                 data_len += P54_TX_CONTROL_FILTER_V2_LEN;
1033
1034         skb = p54_alloc_skb(dev, 0x8001, data_len, P54_CONTROL_TYPE_FILTER_SET,
1035                             GFP_ATOMIC);
1036         if (!skb)
1037                 return -ENOMEM;
1038
1039         filter = (struct p54_tx_control_filter *) skb_put(skb, sizeof(*filter));
1040         filter->filter_type = priv->filter_type = cpu_to_le16(filter_type);
1041         memcpy(filter->mac_addr, priv->mac_addr, ETH_ALEN);
1042         if (!bssid)
1043                 memset(filter->bssid, ~0, ETH_ALEN);
1044         else
1045                 memcpy(filter->bssid, bssid, ETH_ALEN);
1046         filter->rx_antenna = priv->rx_antenna;
1047         if (priv->fw_var < 0x500) {
1048                 filter->v1.basic_rate_mask = cpu_to_le32(0x15f);
1049                 filter->v1.rx_addr = cpu_to_le32(priv->rx_end);
1050                 filter->v1.max_rx = cpu_to_le16(priv->rx_mtu);
1051                 filter->v1.rxhw = cpu_to_le16(priv->rxhw);
1052                 filter->v1.wakeup_timer = cpu_to_le16(500);
1053         } else {
1054                 filter->v2.rx_addr = cpu_to_le32(priv->rx_end);
1055                 filter->v2.max_rx = cpu_to_le16(priv->rx_mtu);
1056                 filter->v2.rxhw = cpu_to_le16(priv->rxhw);
1057                 filter->v2.timer = cpu_to_le16(1000);
1058         }
1059         priv->tx(dev, skb, 1);
1060         return 0;
1061 }
1062
1063 static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
1064 {
1065         struct p54_common *priv = dev->priv;
1066         struct sk_buff *skb;
1067         struct p54_tx_control_channel *chan;
1068         unsigned int i;
1069         size_t data_len = sizeof(struct p54_control_hdr) + sizeof(*chan);
1070         void *entry;
1071
1072         skb = p54_alloc_skb(dev, 0x8001, data_len,
1073                             P54_CONTROL_TYPE_CHANNEL_CHANGE, GFP_ATOMIC);
1074         if (!skb)
1075                 return -ENOMEM;
1076
1077         chan = (struct p54_tx_control_channel *) skb_put(skb, sizeof(*chan));
1078         memset(chan->padding1, 0, sizeof(chan->padding1));
1079         chan->flags = cpu_to_le16(0x1);
1080         chan->dwell = cpu_to_le16(0x0);
1081
1082         for (i = 0; i < priv->iq_autocal_len; i++) {
1083                 if (priv->iq_autocal[i].freq != freq)
1084                         continue;
1085
1086                 memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
1087                        sizeof(*priv->iq_autocal));
1088                 break;
1089         }
1090         if (i == priv->iq_autocal_len)
1091                 goto err;
1092
1093         for (i = 0; i < priv->output_limit_len; i++) {
1094                 if (priv->output_limit[i].freq != freq)
1095                         continue;
1096
1097                 chan->val_barker = 0x38;
1098                 chan->val_bpsk = chan->dup_bpsk =
1099                         priv->output_limit[i].val_bpsk;
1100                 chan->val_qpsk = chan->dup_qpsk =
1101                         priv->output_limit[i].val_qpsk;
1102                 chan->val_16qam = chan->dup_16qam =
1103                         priv->output_limit[i].val_16qam;
1104                 chan->val_64qam = chan->dup_64qam =
1105                         priv->output_limit[i].val_64qam;
1106                 break;
1107         }
1108         if (i == priv->output_limit_len)
1109                 goto err;
1110
1111         entry = priv->curve_data->data;
1112         for (i = 0; i < priv->curve_data->channels; i++) {
1113                 if (*((__le16 *)entry) != freq) {
1114                         entry += sizeof(__le16);
1115                         entry += sizeof(struct p54_pa_curve_data_sample) *
1116                                  priv->curve_data->points_per_channel;
1117                         continue;
1118                 }
1119
1120                 entry += sizeof(__le16);
1121                 chan->pa_points_per_curve =
1122                         min(priv->curve_data->points_per_channel, (u8) 8);
1123
1124                 memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
1125                        chan->pa_points_per_curve);
1126                 break;
1127         }
1128
1129         if (priv->fw_var < 0x500) {
1130                 data_len = P54_TX_CONTROL_CHANNEL_V1_LEN;
1131                 chan->v1.rssical_mul = cpu_to_le16(130);
1132                 chan->v1.rssical_add = cpu_to_le16(0xfe70);
1133         } else {
1134                 chan->v2.rssical_mul = cpu_to_le16(130);
1135                 chan->v2.rssical_add = cpu_to_le16(0xfe70);
1136                 chan->v2.basic_rate_mask = cpu_to_le32(0x15f);
1137         }
1138         priv->tx(dev, skb, 1);
1139         return 0;
1140
1141  err:
1142         printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
1143         kfree_skb(skb);
1144         return -EINVAL;
1145 }
1146
1147 static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
1148 {
1149         struct p54_common *priv = dev->priv;
1150         struct sk_buff *skb;
1151         struct p54_tx_control_led *led;
1152
1153         skb = p54_alloc_skb(dev, 0x8001, sizeof(*led) +
1154                         sizeof(struct p54_control_hdr),
1155                         P54_CONTROL_TYPE_LED, GFP_ATOMIC);
1156         if (!skb)
1157                 return -ENOMEM;
1158
1159         led = (struct p54_tx_control_led *)skb_put(skb, sizeof(*led));
1160         led->mode = cpu_to_le16(mode);
1161         led->led_permanent = cpu_to_le16(link);
1162         led->led_temporary = cpu_to_le16(act);
1163         led->duration = cpu_to_le16(1000);
1164         priv->tx(dev, skb, 1);
1165         return 0;
1166 }
1167
1168 #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop)      \
1169 do {                                                            \
1170         queue.aifs = cpu_to_le16(ai_fs);                        \
1171         queue.cwmin = cpu_to_le16(cw_min);                      \
1172         queue.cwmax = cpu_to_le16(cw_max);                      \
1173         queue.txop = cpu_to_le16(_txop);                        \
1174 } while(0)
1175
1176 static int p54_set_edcf(struct ieee80211_hw *dev)
1177 {
1178         struct p54_common *priv = dev->priv;
1179         struct sk_buff *skb;
1180         struct p54_edcf *edcf;
1181
1182         skb = p54_alloc_skb(dev, 0x8001, sizeof(struct p54_control_hdr) +
1183                         sizeof(*edcf), P54_CONTROL_TYPE_DCFINIT, GFP_ATOMIC);
1184         if (!skb)
1185                 return -ENOMEM;
1186
1187         edcf = (struct p54_edcf *)skb_put(skb, sizeof(*edcf));
1188         if (priv->use_short_slot) {
1189                 edcf->slottime = 9;
1190                 edcf->sifs = 0x10;
1191                 edcf->eofpad = 0x00;
1192         } else {
1193                 edcf->slottime = 20;
1194                 edcf->sifs = 0x0a;
1195                 edcf->eofpad = 0x06;
1196         }
1197         /* (see prism54/isl_oid.h for further details) */
1198         edcf->frameburst = cpu_to_le16(0);
1199         edcf->round_trip_delay = cpu_to_le16(0);
1200         memset(edcf->mapping, 0, sizeof(edcf->mapping));
1201         memcpy(edcf->queue, priv->qos_params, sizeof(edcf->queue));
1202         priv->tx(dev, skb, 1);
1203         return 0;
1204 }
1205
1206 static int p54_init_stats(struct ieee80211_hw *dev)
1207 {
1208         struct p54_common *priv = dev->priv;
1209
1210         priv->cached_stats = p54_alloc_skb(dev, 0x8000,
1211                         sizeof(struct p54_control_hdr) +
1212                         sizeof(struct p54_statistics),
1213                         P54_CONTROL_TYPE_STAT_READBACK,
1214                         GFP_KERNEL);
1215         if (!priv->cached_stats)
1216                         return -ENOMEM;
1217
1218         mod_timer(&priv->stats_timer, jiffies + HZ);
1219         return 0;
1220 }
1221
1222 static int p54_start(struct ieee80211_hw *dev)
1223 {
1224         struct p54_common *priv = dev->priv;
1225         int err;
1226
1227         err = priv->open(dev);
1228         if (!err)
1229                 priv->mode = NL80211_IFTYPE_MONITOR;
1230         P54_SET_QUEUE(priv->qos_params[0], 0x0002, 0x0003, 0x0007, 47);
1231         P54_SET_QUEUE(priv->qos_params[1], 0x0002, 0x0007, 0x000f, 94);
1232         P54_SET_QUEUE(priv->qos_params[2], 0x0003, 0x000f, 0x03ff, 0);
1233         P54_SET_QUEUE(priv->qos_params[3], 0x0007, 0x000f, 0x03ff, 0);
1234         err = p54_set_edcf(dev);
1235         if (!err)
1236                 err = p54_init_stats(dev);
1237
1238         return err;
1239 }
1240
1241 static void p54_stop(struct ieee80211_hw *dev)
1242 {
1243         struct p54_common *priv = dev->priv;
1244         struct sk_buff *skb;
1245
1246         del_timer(&priv->stats_timer);
1247         p54_free_skb(dev, priv->cached_stats);
1248         priv->cached_stats = NULL;
1249         while ((skb = skb_dequeue(&priv->tx_queue)))
1250                 kfree_skb(skb);
1251
1252         priv->stop(dev);
1253         priv->tsf_high32 = priv->tsf_low32 = 0;
1254         priv->mode = NL80211_IFTYPE_UNSPECIFIED;
1255 }
1256
1257 static int p54_add_interface(struct ieee80211_hw *dev,
1258                              struct ieee80211_if_init_conf *conf)
1259 {
1260         struct p54_common *priv = dev->priv;
1261
1262         if (priv->mode != NL80211_IFTYPE_MONITOR)
1263                 return -EOPNOTSUPP;
1264
1265         switch (conf->type) {
1266         case NL80211_IFTYPE_STATION:
1267                 priv->mode = conf->type;
1268                 break;
1269         default:
1270                 return -EOPNOTSUPP;
1271         }
1272
1273         memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
1274
1275         p54_set_filter(dev, 0, NULL);
1276
1277         switch (conf->type) {
1278         case NL80211_IFTYPE_STATION:
1279                 p54_set_filter(dev, 1, NULL);
1280                 break;
1281         default:
1282                 BUG();  /* impossible */
1283                 break;
1284         }
1285
1286         p54_set_leds(dev, 1, 0, 0);
1287
1288         return 0;
1289 }
1290
1291 static void p54_remove_interface(struct ieee80211_hw *dev,
1292                                  struct ieee80211_if_init_conf *conf)
1293 {
1294         struct p54_common *priv = dev->priv;
1295         priv->mode = NL80211_IFTYPE_MONITOR;
1296         memset(priv->mac_addr, 0, ETH_ALEN);
1297         p54_set_filter(dev, 0, NULL);
1298 }
1299
1300 static int p54_config(struct ieee80211_hw *dev, u32 changed)
1301 {
1302         int ret;
1303         struct p54_common *priv = dev->priv;
1304         struct ieee80211_conf *conf = &dev->conf;
1305
1306         mutex_lock(&priv->conf_mutex);
1307         priv->rx_antenna = 2; /* automatic */
1308         priv->output_power = conf->power_level << 2;
1309         ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq));
1310         if (!ret)
1311                 ret = p54_set_edcf(dev);
1312         mutex_unlock(&priv->conf_mutex);
1313         return ret;
1314 }
1315
1316 static int p54_config_interface(struct ieee80211_hw *dev,
1317                                 struct ieee80211_vif *vif,
1318                                 struct ieee80211_if_conf *conf)
1319 {
1320         struct p54_common *priv = dev->priv;
1321
1322         mutex_lock(&priv->conf_mutex);
1323         p54_set_filter(dev, 0, conf->bssid);
1324         p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
1325         memcpy(priv->bssid, conf->bssid, ETH_ALEN);
1326         mutex_unlock(&priv->conf_mutex);
1327         return 0;
1328 }
1329
1330 static void p54_configure_filter(struct ieee80211_hw *dev,
1331                                  unsigned int changed_flags,
1332                                  unsigned int *total_flags,
1333                                  int mc_count, struct dev_mc_list *mclist)
1334 {
1335         struct p54_common *priv = dev->priv;
1336
1337         *total_flags &= FIF_BCN_PRBRESP_PROMISC |
1338                         FIF_PROMISC_IN_BSS |
1339                         FIF_FCSFAIL;
1340
1341         priv->filter_flags = *total_flags;
1342
1343         if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1344                 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1345                         p54_set_filter(dev, le16_to_cpu(priv->filter_type),
1346                                  NULL);
1347                 else
1348                         p54_set_filter(dev, le16_to_cpu(priv->filter_type),
1349                                  priv->bssid);
1350         }
1351
1352         if (changed_flags & FIF_PROMISC_IN_BSS) {
1353                 if (*total_flags & FIF_PROMISC_IN_BSS)
1354                         p54_set_filter(dev, le16_to_cpu(priv->filter_type) |
1355                                 0x8, NULL);
1356                 else
1357                         p54_set_filter(dev, le16_to_cpu(priv->filter_type) &
1358                                 ~0x8, priv->bssid);
1359         }
1360 }
1361
1362 static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
1363                        const struct ieee80211_tx_queue_params *params)
1364 {
1365         struct p54_common *priv = dev->priv;
1366
1367         if ((params) && !(queue > 4)) {
1368                 P54_SET_QUEUE(priv->qos_params[queue], params->aifs,
1369                         params->cw_min, params->cw_max, params->txop);
1370         } else
1371                 return -EINVAL;
1372
1373         return p54_set_edcf(dev);
1374 }
1375
1376 static int p54_init_xbow_synth(struct ieee80211_hw *dev)
1377 {
1378         struct p54_common *priv = dev->priv;
1379         struct sk_buff *skb;
1380         struct p54_tx_control_xbow_synth *xbow;
1381
1382         skb = p54_alloc_skb(dev, 0x8001, sizeof(struct p54_control_hdr) +
1383                             sizeof(*xbow), P54_CONTROL_TYPE_XBOW_SYNTH_CFG,
1384                             GFP_KERNEL);
1385         if (!skb)
1386                 return -ENOMEM;
1387
1388         xbow = (struct p54_tx_control_xbow_synth *)skb_put(skb, sizeof(*xbow));
1389         xbow->magic1 = cpu_to_le16(0x1);
1390         xbow->magic2 = cpu_to_le16(0x2);
1391         xbow->freq = cpu_to_le16(5390);
1392         memset(xbow->padding, 0, sizeof(xbow->padding));
1393         priv->tx(dev, skb, 1);
1394         return 0;
1395 }
1396
1397 static void p54_statistics_timer(unsigned long data)
1398 {
1399         struct ieee80211_hw *dev = (struct ieee80211_hw *) data;
1400         struct p54_common *priv = dev->priv;
1401
1402         BUG_ON(!priv->cached_stats);
1403
1404         priv->tx(dev, priv->cached_stats, 0);
1405 }
1406
1407 static int p54_get_stats(struct ieee80211_hw *dev,
1408                          struct ieee80211_low_level_stats *stats)
1409 {
1410         struct p54_common *priv = dev->priv;
1411
1412         del_timer(&priv->stats_timer);
1413         p54_statistics_timer((unsigned long)dev);
1414
1415         if (!wait_for_completion_interruptible_timeout(&priv->stats_comp, HZ)) {
1416                 printk(KERN_ERR "%s: device does not respond!\n",
1417                         wiphy_name(dev->wiphy));
1418                 return -EBUSY;
1419         }
1420
1421         memcpy(stats, &priv->stats, sizeof(*stats));
1422
1423         return 0;
1424 }
1425
1426 static int p54_get_tx_stats(struct ieee80211_hw *dev,
1427                             struct ieee80211_tx_queue_stats *stats)
1428 {
1429         struct p54_common *priv = dev->priv;
1430
1431         memcpy(stats, &priv->tx_stats[4], sizeof(stats[0]) * dev->queues);
1432
1433         return 0;
1434 }
1435
1436 static void p54_bss_info_changed(struct ieee80211_hw *dev,
1437                                  struct ieee80211_vif *vif,
1438                                  struct ieee80211_bss_conf *info,
1439                                  u32 changed)
1440 {
1441         struct p54_common *priv = dev->priv;
1442
1443         if (changed & BSS_CHANGED_ERP_SLOT) {
1444                 priv->use_short_slot = info->use_short_slot;
1445                 p54_set_edcf(dev);
1446         }
1447 }
1448
1449 static const struct ieee80211_ops p54_ops = {
1450         .tx                     = p54_tx,
1451         .start                  = p54_start,
1452         .stop                   = p54_stop,
1453         .add_interface          = p54_add_interface,
1454         .remove_interface       = p54_remove_interface,
1455         .config                 = p54_config,
1456         .config_interface       = p54_config_interface,
1457         .bss_info_changed       = p54_bss_info_changed,
1458         .configure_filter       = p54_configure_filter,
1459         .conf_tx                = p54_conf_tx,
1460         .get_stats              = p54_get_stats,
1461         .get_tx_stats           = p54_get_tx_stats
1462 };
1463
1464 struct ieee80211_hw *p54_init_common(size_t priv_data_len)
1465 {
1466         struct ieee80211_hw *dev;
1467         struct p54_common *priv;
1468
1469         dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
1470         if (!dev)
1471                 return NULL;
1472
1473         priv = dev->priv;
1474         priv->mode = NL80211_IFTYPE_UNSPECIFIED;
1475         skb_queue_head_init(&priv->tx_queue);
1476         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */
1477                      IEEE80211_HW_RX_INCLUDES_FCS |
1478                      IEEE80211_HW_SIGNAL_DBM |
1479                      IEEE80211_HW_NOISE_DBM;
1480
1481         /*
1482          * XXX: when this driver gets support for any mode that
1483          *      requires beacons (AP, MESH, IBSS) then it must
1484          *      implement IEEE80211_TX_CTL_ASSIGN_SEQ.
1485          */
1486         dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1487
1488         dev->channel_change_time = 1000;        /* TODO: find actual value */
1489         priv->tx_stats[0].limit = 1;
1490         priv->tx_stats[1].limit = 1;
1491         priv->tx_stats[2].limit = 1;
1492         priv->tx_stats[3].limit = 1;
1493         priv->tx_stats[4].limit = 5;
1494         dev->queues = 1;
1495         priv->noise = -94;
1496         /*
1497          * We support at most 8 tries no matter which rate they're at,
1498          * we cannot support max_rates * max_rate_tries as we set it
1499          * here, but setting it correctly to 4/2 or so would limit us
1500          * artificially if the RC algorithm wants just two rates, so
1501          * let's say 4/7, we'll redistribute it at TX time, see the
1502          * comments there.
1503          */
1504         dev->max_rates = 4;
1505         dev->max_rate_tries = 7;
1506         dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
1507                                  sizeof(struct p54_tx_control_allocdata);
1508
1509         mutex_init(&priv->conf_mutex);
1510         init_completion(&priv->eeprom_comp);
1511         init_completion(&priv->stats_comp);
1512         setup_timer(&priv->stats_timer, p54_statistics_timer,
1513                 (unsigned long)dev);
1514
1515         return dev;
1516 }
1517 EXPORT_SYMBOL_GPL(p54_init_common);
1518
1519 void p54_free_common(struct ieee80211_hw *dev)
1520 {
1521         struct p54_common *priv = dev->priv;
1522         del_timer(&priv->stats_timer);
1523         kfree_skb(priv->cached_stats);
1524         kfree(priv->iq_autocal);
1525         kfree(priv->output_limit);
1526         kfree(priv->curve_data);
1527 }
1528 EXPORT_SYMBOL_GPL(p54_free_common);
1529
1530 static int __init p54_init(void)
1531 {
1532         return 0;
1533 }
1534
1535 static void __exit p54_exit(void)
1536 {
1537 }
1538
1539 module_init(p54_init);
1540 module_exit(p54_exit);