iwl3945: kill iwl3945_x2_queue_used
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/ieee80211_radiotap.h>
44 #include <net/lib80211.h>
45 #include <net/mac80211.h>
46
47 #include <asm/div64.h>
48
49 #define DRV_NAME        "iwl3945"
50
51 #include "iwl-fh.h"
52 #include "iwl-3945-fh.h"
53 #include "iwl-commands.h"
54 #include "iwl-3945.h"
55 #include "iwl-helpers.h"
56 #include "iwl-core.h"
57 #include "iwl-dev.h"
58
59 static int iwl3945_tx_queue_update_write_ptr(struct iwl_priv *priv,
60                                   struct iwl_tx_queue *txq);
61
62 /*
63  * module name, copyright, version, etc.
64  */
65
66 #define DRV_DESCRIPTION \
67 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
68
69 #ifdef CONFIG_IWL3945_DEBUG
70 #define VD "d"
71 #else
72 #define VD
73 #endif
74
75 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
76 #define VS "s"
77 #else
78 #define VS
79 #endif
80
81 #define IWL39_VERSION "1.2.26k" VD VS
82 #define DRV_COPYRIGHT   "Copyright(c) 2003-2008 Intel Corporation"
83 #define DRV_AUTHOR     "<ilw@linux.intel.com>"
84 #define DRV_VERSION     IWL39_VERSION
85
86
87 MODULE_DESCRIPTION(DRV_DESCRIPTION);
88 MODULE_VERSION(DRV_VERSION);
89 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
90 MODULE_LICENSE("GPL");
91
92  /* module parameters */
93 struct iwl_mod_params iwl3945_mod_params = {
94         .num_of_queues = IWL39_MAX_NUM_QUEUES,
95         /* the rest are 0 by default */
96 };
97
98 /*************** DMA-QUEUE-GENERAL-FUNCTIONS  *****
99  * DMA services
100  *
101  * Theory of operation
102  *
103  * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
104  * of buffer descriptors, each of which points to one or more data buffers for
105  * the device to read from or fill.  Driver and device exchange status of each
106  * queue via "read" and "write" pointers.  Driver keeps minimum of 2 empty
107  * entries in each circular buffer, to protect against confusing empty and full
108  * queue states.
109  *
110  * The device reads or writes the data in the queues via the device's several
111  * DMA/FIFO channels.  Each queue is mapped to a single DMA channel.
112  *
113  * For Tx queue, there are low mark and high mark limits. If, after queuing
114  * the packet for Tx, free space become < low mark, Tx queue stopped. When
115  * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
116  * Tx queue resumed.
117  *
118  * The 3945 operates with six queues:  One receive queue, one transmit queue
119  * (#4) for sending commands to the device firmware, and four transmit queues
120  * (#0-3) for data tx via EDCA.  An additional 2 HCCA queues are unused.
121  ***************************************************/
122
123 /**
124  * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
125  */
126 static int iwl3945_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
127                           int count, int slots_num, u32 id)
128 {
129         q->n_bd = count;
130         q->n_window = slots_num;
131         q->id = id;
132
133         /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
134          * and iwl_queue_dec_wrap are broken. */
135         BUG_ON(!is_power_of_2(count));
136
137         /* slots_num must be power-of-two size, otherwise
138          * get_cmd_index is broken. */
139         BUG_ON(!is_power_of_2(slots_num));
140
141         q->low_mark = q->n_window / 4;
142         if (q->low_mark < 4)
143                 q->low_mark = 4;
144
145         q->high_mark = q->n_window / 8;
146         if (q->high_mark < 2)
147                 q->high_mark = 2;
148
149         q->write_ptr = q->read_ptr = 0;
150
151         return 0;
152 }
153
154 /**
155  * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
156  */
157 static int iwl3945_tx_queue_alloc(struct iwl_priv *priv,
158                               struct iwl_tx_queue *txq, u32 id)
159 {
160         struct pci_dev *dev = priv->pci_dev;
161
162         /* Driver private data, only for Tx (not command) queues,
163          * not shared with device. */
164         if (id != IWL_CMD_QUEUE_NUM) {
165                 txq->txb = kmalloc(sizeof(txq->txb[0]) *
166                                    TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
167                 if (!txq->txb) {
168                         IWL_ERR(priv, "kmalloc for auxiliary BD "
169                                   "structures failed\n");
170                         goto error;
171                 }
172         } else
173                 txq->txb = NULL;
174
175         /* Circular buffer of transmit frame descriptors (TFDs),
176          * shared with device */
177         txq->tfds39 = pci_alloc_consistent(dev,
178                         sizeof(txq->tfds39[0]) * TFD_QUEUE_SIZE_MAX,
179                         &txq->q.dma_addr);
180
181         if (!txq->tfds39) {
182                 IWL_ERR(priv, "pci_alloc_consistent(%zd) failed\n",
183                           sizeof(txq->tfds39[0]) * TFD_QUEUE_SIZE_MAX);
184                 goto error;
185         }
186         txq->q.id = id;
187
188         return 0;
189
190  error:
191         kfree(txq->txb);
192         txq->txb = NULL;
193
194         return -ENOMEM;
195 }
196
197 /**
198  * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
199  */
200 int iwl3945_tx_queue_init(struct iwl_priv *priv,
201                       struct iwl_tx_queue *txq, int slots_num, u32 txq_id)
202 {
203         int len, i;
204         int rc = 0;
205
206         /*
207          * Alloc buffer array for commands (Tx or other types of commands).
208          * For the command queue (#4), allocate command space + one big
209          * command for scan, since scan command is very huge; the system will
210          * not have two scans at the same time, so only one is needed.
211          * For data Tx queues (all other queues), no super-size command
212          * space is needed.
213          */
214         len = sizeof(struct iwl_cmd);
215         for (i = 0; i <= slots_num; i++) {
216                 if (i == slots_num) {
217                         if (txq_id == IWL_CMD_QUEUE_NUM)
218                                 len += IWL_MAX_SCAN_SIZE;
219                         else
220                                 continue;
221                 }
222
223                 txq->cmd[i] = kmalloc(len, GFP_KERNEL);
224                 if (!txq->cmd[i])
225                         goto err;
226         }
227
228         /* Alloc driver data array and TFD circular buffer */
229         rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
230         if (rc)
231                 goto err;
232
233         txq->need_update = 0;
234
235         /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
236          * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
237         BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
238
239         /* Initialize queue high/low-water, head/tail indexes */
240         iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
241
242         /* Tell device where to find queue, enable DMA channel. */
243         iwl3945_hw_tx_queue_init(priv, txq);
244
245         return 0;
246 err:
247         for (i = 0; i < slots_num; i++) {
248                 kfree(txq->cmd[i]);
249                 txq->cmd[i] = NULL;
250         }
251
252         if (txq_id == IWL_CMD_QUEUE_NUM) {
253                 kfree(txq->cmd[slots_num]);
254                 txq->cmd[slots_num] = NULL;
255         }
256         return -ENOMEM;
257 }
258
259 /**
260  * iwl3945_tx_queue_free - Deallocate DMA queue.
261  * @txq: Transmit queue to deallocate.
262  *
263  * Empty queue by removing and destroying all BD's.
264  * Free all buffers.
265  * 0-fill, but do not free "txq" descriptor structure.
266  */
267 void iwl3945_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq)
268 {
269         struct iwl_queue *q = &txq->q;
270         struct pci_dev *dev = priv->pci_dev;
271         int len, i;
272
273         if (q->n_bd == 0)
274                 return;
275
276         /* first, empty all BD's */
277         for (; q->write_ptr != q->read_ptr;
278              q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
279                 iwl3945_hw_txq_free_tfd(priv, txq);
280
281         len = sizeof(struct iwl_cmd) * q->n_window;
282         if (q->id == IWL_CMD_QUEUE_NUM)
283                 len += IWL_MAX_SCAN_SIZE;
284
285         /* De-alloc array of command/tx buffers */
286         for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
287                 kfree(txq->cmd[i]);
288
289         /* De-alloc circular buffer of TFDs */
290         if (txq->q.n_bd)
291                 pci_free_consistent(dev, sizeof(struct iwl3945_tfd) *
292                                     txq->q.n_bd, txq->tfds39, txq->q.dma_addr);
293
294         /* De-alloc array of per-TFD driver data */
295         kfree(txq->txb);
296         txq->txb = NULL;
297
298         /* 0-fill queue descriptor structure */
299         memset(txq, 0, sizeof(*txq));
300 }
301
302 /*************** STATION TABLE MANAGEMENT ****
303  * mac80211 should be examined to determine if sta_info is duplicating
304  * the functionality provided here
305  */
306
307 /**************************************************************/
308 #if 0 /* temporary disable till we add real remove station */
309 /**
310  * iwl3945_remove_station - Remove driver's knowledge of station.
311  *
312  * NOTE:  This does not remove station from device's station table.
313  */
314 static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
315 {
316         int index = IWL_INVALID_STATION;
317         int i;
318         unsigned long flags;
319
320         spin_lock_irqsave(&priv->sta_lock, flags);
321
322         if (is_ap)
323                 index = IWL_AP_ID;
324         else if (is_broadcast_ether_addr(addr))
325                 index = priv->hw_params.bcast_sta_id;
326         else
327                 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
328                         if (priv->stations_39[i].used &&
329                             !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
330                                                 addr)) {
331                                 index = i;
332                                 break;
333                         }
334
335         if (unlikely(index == IWL_INVALID_STATION))
336                 goto out;
337
338         if (priv->stations_39[index].used) {
339                 priv->stations_39[index].used = 0;
340                 priv->num_stations--;
341         }
342
343         BUG_ON(priv->num_stations < 0);
344
345 out:
346         spin_unlock_irqrestore(&priv->sta_lock, flags);
347         return 0;
348 }
349 #endif
350
351 /**
352  * iwl3945_clear_stations_table - Clear the driver's station table
353  *
354  * NOTE:  This does not clear or otherwise alter the device's station table.
355  */
356 static void iwl3945_clear_stations_table(struct iwl_priv *priv)
357 {
358         unsigned long flags;
359
360         spin_lock_irqsave(&priv->sta_lock, flags);
361
362         priv->num_stations = 0;
363         memset(priv->stations_39, 0, sizeof(priv->stations_39));
364
365         spin_unlock_irqrestore(&priv->sta_lock, flags);
366 }
367
368 /**
369  * iwl3945_add_station - Add station to station tables in driver and device
370  */
371 u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
372 {
373         int i;
374         int index = IWL_INVALID_STATION;
375         struct iwl3945_station_entry *station;
376         unsigned long flags_spin;
377         u8 rate;
378
379         spin_lock_irqsave(&priv->sta_lock, flags_spin);
380         if (is_ap)
381                 index = IWL_AP_ID;
382         else if (is_broadcast_ether_addr(addr))
383                 index = priv->hw_params.bcast_sta_id;
384         else
385                 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
386                         if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
387                                                 addr)) {
388                                 index = i;
389                                 break;
390                         }
391
392                         if (!priv->stations_39[i].used &&
393                             index == IWL_INVALID_STATION)
394                                 index = i;
395                 }
396
397         /* These two conditions has the same outcome but keep them separate
398           since they have different meaning */
399         if (unlikely(index == IWL_INVALID_STATION)) {
400                 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
401                 return index;
402         }
403
404         if (priv->stations_39[index].used &&
405            !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
406                 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
407                 return index;
408         }
409
410         IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
411         station = &priv->stations_39[index];
412         station->used = 1;
413         priv->num_stations++;
414
415         /* Set up the REPLY_ADD_STA command to send to device */
416         memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
417         memcpy(station->sta.sta.addr, addr, ETH_ALEN);
418         station->sta.mode = 0;
419         station->sta.sta.sta_id = index;
420         station->sta.station_flags = 0;
421
422         if (priv->band == IEEE80211_BAND_5GHZ)
423                 rate = IWL_RATE_6M_PLCP;
424         else
425                 rate =  IWL_RATE_1M_PLCP;
426
427         /* Turn on both antennas for the station... */
428         station->sta.rate_n_flags =
429                         iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
430
431         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
432
433         /* Add station to device's station table */
434         iwl3945_send_add_station(priv, &station->sta, flags);
435         return index;
436
437 }
438
439
440 /*************** HOST COMMAND QUEUE FUNCTIONS   *****/
441
442 #define IWL_CMD(x) case x: return #x
443 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
444
445 /**
446  * iwl3945_enqueue_hcmd - enqueue a uCode command
447  * @priv: device private data point
448  * @cmd: a point to the ucode command structure
449  *
450  * The function returns < 0 values to indicate the operation is
451  * failed. On success, it turns the index (> 0) of command in the
452  * command queue.
453  */
454 static int iwl3945_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
455 {
456         struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
457         struct iwl_queue *q = &txq->q;
458         struct iwl3945_tfd *tfd;
459         struct iwl_cmd *out_cmd;
460         u32 idx;
461         u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
462         dma_addr_t phys_addr;
463         int pad;
464         int ret, len;
465         unsigned long flags;
466
467         /* If any of the command structures end up being larger than
468          * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
469          * we will need to increase the size of the TFD entries */
470         BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
471                !(cmd->meta.flags & CMD_SIZE_HUGE));
472
473
474         if (iwl_is_rfkill(priv)) {
475                 IWL_DEBUG_INFO("Not sending command - RF KILL");
476                 return -EIO;
477         }
478
479         if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
480                 IWL_ERR(priv, "No space for Tx\n");
481                 return -ENOSPC;
482         }
483
484         spin_lock_irqsave(&priv->hcmd_lock, flags);
485
486         tfd = &txq->tfds39[q->write_ptr];
487         memset(tfd, 0, sizeof(*tfd));
488
489         idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
490         out_cmd = txq->cmd[idx];
491
492         out_cmd->hdr.cmd = cmd->id;
493         memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
494         memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
495
496         /* At this point, the out_cmd now has all of the incoming cmd
497          * information */
498
499         out_cmd->hdr.flags = 0;
500         out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
501                         INDEX_TO_SEQ(q->write_ptr));
502         if (out_cmd->meta.flags & CMD_SIZE_HUGE)
503                 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
504
505         len = (idx == TFD_CMD_SLOTS) ?
506                         IWL_MAX_SCAN_SIZE : sizeof(struct iwl_cmd);
507
508         phys_addr = pci_map_single(priv->pci_dev, out_cmd,
509                                         len, PCI_DMA_TODEVICE);
510         pci_unmap_addr_set(&out_cmd->meta, mapping, phys_addr);
511         pci_unmap_len_set(&out_cmd->meta, len, len);
512         phys_addr += offsetof(struct iwl_cmd, hdr);
513
514         iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
515
516         pad = U32_PAD(cmd->len);
517         tfd->control_flags |= cpu_to_le32(TFD_CTL_PAD_SET(pad));
518
519         IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
520                      "%d bytes at %d[%d]:%d\n",
521                      get_cmd_string(out_cmd->hdr.cmd),
522                      out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
523                      fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
524
525         txq->need_update = 1;
526
527         /* Increment and update queue's write index */
528         q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
529         ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
530
531         spin_unlock_irqrestore(&priv->hcmd_lock, flags);
532         return ret ? ret : idx;
533 }
534
535 static int iwl3945_send_cmd_async(struct iwl_priv *priv,
536                                   struct iwl_host_cmd *cmd)
537 {
538         int ret;
539
540         BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
541
542         /* An asynchronous command can not expect an SKB to be set. */
543         BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
544
545         /* An asynchronous command MUST have a callback. */
546         BUG_ON(!cmd->meta.u.callback);
547
548         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
549                 return -EBUSY;
550
551         ret = iwl3945_enqueue_hcmd(priv, cmd);
552         if (ret < 0) {
553                 IWL_ERR(priv,
554                         "Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
555                         get_cmd_string(cmd->id), ret);
556                 return ret;
557         }
558         return 0;
559 }
560
561 static int iwl3945_send_cmd_sync(struct iwl_priv *priv,
562                                  struct iwl_host_cmd *cmd)
563 {
564         int cmd_idx;
565         int ret;
566
567         BUG_ON(cmd->meta.flags & CMD_ASYNC);
568
569          /* A synchronous command can not have a callback set. */
570         BUG_ON(cmd->meta.u.callback != NULL);
571
572         if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) {
573                 IWL_ERR(priv,
574                         "Error sending %s: Already sending a host command\n",
575                         get_cmd_string(cmd->id));
576                 ret = -EBUSY;
577                 goto out;
578         }
579
580         set_bit(STATUS_HCMD_ACTIVE, &priv->status);
581
582         if (cmd->meta.flags & CMD_WANT_SKB)
583                 cmd->meta.source = &cmd->meta;
584
585         cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
586         if (cmd_idx < 0) {
587                 ret = cmd_idx;
588                 IWL_ERR(priv,
589                         "Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
590                         get_cmd_string(cmd->id), ret);
591                 goto out;
592         }
593
594         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
595                         !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
596                         HOST_COMPLETE_TIMEOUT);
597         if (!ret) {
598                 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
599                         IWL_ERR(priv, "Error sending %s: time out after %dms\n",
600                                   get_cmd_string(cmd->id),
601                                   jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
602
603                         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
604                         ret = -ETIMEDOUT;
605                         goto cancel;
606                 }
607         }
608
609         if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
610                 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
611                                get_cmd_string(cmd->id));
612                 ret = -ECANCELED;
613                 goto fail;
614         }
615         if (test_bit(STATUS_FW_ERROR, &priv->status)) {
616                 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
617                                get_cmd_string(cmd->id));
618                 ret = -EIO;
619                 goto fail;
620         }
621         if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
622                 IWL_ERR(priv, "Error: Response NULL in '%s'\n",
623                           get_cmd_string(cmd->id));
624                 ret = -EIO;
625                 goto cancel;
626         }
627
628         ret = 0;
629         goto out;
630
631 cancel:
632         if (cmd->meta.flags & CMD_WANT_SKB) {
633                 struct iwl_cmd *qcmd;
634
635                 /* Cancel the CMD_WANT_SKB flag for the cmd in the
636                  * TX cmd queue. Otherwise in case the cmd comes
637                  * in later, it will possibly set an invalid
638                  * address (cmd->meta.source). */
639                 qcmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
640                 qcmd->meta.flags &= ~CMD_WANT_SKB;
641         }
642 fail:
643         if (cmd->meta.u.skb) {
644                 dev_kfree_skb_any(cmd->meta.u.skb);
645                 cmd->meta.u.skb = NULL;
646         }
647 out:
648         clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status);
649         return ret;
650 }
651
652 int iwl3945_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
653 {
654         if (cmd->meta.flags & CMD_ASYNC)
655                 return iwl3945_send_cmd_async(priv, cmd);
656
657         return iwl3945_send_cmd_sync(priv, cmd);
658 }
659
660 int iwl3945_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
661 {
662         struct iwl_host_cmd cmd = {
663                 .id = id,
664                 .len = len,
665                 .data = data,
666         };
667
668         return iwl3945_send_cmd_sync(priv, &cmd);
669 }
670
671 static int __must_check iwl3945_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
672 {
673         struct iwl_host_cmd cmd = {
674                 .id = id,
675                 .len = sizeof(val),
676                 .data = &val,
677         };
678
679         return iwl3945_send_cmd_sync(priv, &cmd);
680 }
681
682 int iwl3945_send_statistics_request(struct iwl_priv *priv)
683 {
684         return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
685 }
686
687 /**
688  * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
689  * @band: 2.4 or 5 GHz band
690  * @channel: Any channel valid for the requested band
691
692  * In addition to setting the staging RXON, priv->band is also set.
693  *
694  * NOTE:  Does not commit to the hardware; it sets appropriate bit fields
695  * in the staging RXON flag structure based on the band
696  */
697 static int iwl3945_set_rxon_channel(struct iwl_priv *priv,
698                                     enum ieee80211_band band,
699                                     u16 channel)
700 {
701         if (!iwl3945_get_channel_info(priv, band, channel)) {
702                 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
703                                channel, band);
704                 return -EINVAL;
705         }
706
707         if ((le16_to_cpu(priv->staging39_rxon.channel) == channel) &&
708             (priv->band == band))
709                 return 0;
710
711         priv->staging39_rxon.channel = cpu_to_le16(channel);
712         if (band == IEEE80211_BAND_5GHZ)
713                 priv->staging39_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
714         else
715                 priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
716
717         priv->band = band;
718
719         IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
720
721         return 0;
722 }
723
724 /**
725  * iwl3945_check_rxon_cmd - validate RXON structure is valid
726  *
727  * NOTE:  This is really only useful during development and can eventually
728  * be #ifdef'd out once the driver is stable and folks aren't actively
729  * making changes
730  */
731 static int iwl3945_check_rxon_cmd(struct iwl_priv *priv)
732 {
733         int error = 0;
734         int counter = 1;
735         struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
736
737         if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
738                 error |= le32_to_cpu(rxon->flags &
739                                 (RXON_FLG_TGJ_NARROW_BAND_MSK |
740                                  RXON_FLG_RADAR_DETECT_MSK));
741                 if (error)
742                         IWL_WARN(priv, "check 24G fields %d | %d\n",
743                                     counter++, error);
744         } else {
745                 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
746                                 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
747                 if (error)
748                         IWL_WARN(priv, "check 52 fields %d | %d\n",
749                                     counter++, error);
750                 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
751                 if (error)
752                         IWL_WARN(priv, "check 52 CCK %d | %d\n",
753                                     counter++, error);
754         }
755         error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
756         if (error)
757                 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
758
759         /* make sure basic rates 6Mbps and 1Mbps are supported */
760         error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
761                   ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
762         if (error)
763                 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
764
765         error |= (le16_to_cpu(rxon->assoc_id) > 2007);
766         if (error)
767                 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
768
769         error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
770                         == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
771         if (error)
772                 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
773                             counter++, error);
774
775         error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
776                         == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
777         if (error)
778                 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
779                             counter++, error);
780
781         error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
782                         RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
783         if (error)
784                 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
785                             counter++, error);
786
787         if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
788                 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
789                                 RXON_FLG_ANT_A_MSK)) == 0);
790         if (error)
791                 IWL_WARN(priv, "check antenna %d %d\n", counter++, error);
792
793         if (error)
794                 IWL_WARN(priv, "Tuning to channel %d\n",
795                             le16_to_cpu(rxon->channel));
796
797         if (error) {
798                 IWL_ERR(priv, "Not a valid rxon_assoc_cmd field values\n");
799                 return -1;
800         }
801         return 0;
802 }
803
804 /**
805  * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
806  * @priv: staging_rxon is compared to active_rxon
807  *
808  * If the RXON structure is changing enough to require a new tune,
809  * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
810  * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
811  */
812 static int iwl3945_full_rxon_required(struct iwl_priv *priv)
813 {
814
815         /* These items are only settable from the full RXON command */
816         if (!(iwl3945_is_associated(priv)) ||
817             compare_ether_addr(priv->staging39_rxon.bssid_addr,
818                                priv->active39_rxon.bssid_addr) ||
819             compare_ether_addr(priv->staging39_rxon.node_addr,
820                                priv->active39_rxon.node_addr) ||
821             compare_ether_addr(priv->staging39_rxon.wlap_bssid_addr,
822                                priv->active39_rxon.wlap_bssid_addr) ||
823             (priv->staging39_rxon.dev_type != priv->active39_rxon.dev_type) ||
824             (priv->staging39_rxon.channel != priv->active39_rxon.channel) ||
825             (priv->staging39_rxon.air_propagation !=
826              priv->active39_rxon.air_propagation) ||
827             (priv->staging39_rxon.assoc_id != priv->active39_rxon.assoc_id))
828                 return 1;
829
830         /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
831          * be updated with the RXON_ASSOC command -- however only some
832          * flag transitions are allowed using RXON_ASSOC */
833
834         /* Check if we are not switching bands */
835         if ((priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
836             (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK))
837                 return 1;
838
839         /* Check if we are switching association toggle */
840         if ((priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
841                 (priv->active39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
842                 return 1;
843
844         return 0;
845 }
846
847 static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
848 {
849         int rc = 0;
850         struct iwl_rx_packet *res = NULL;
851         struct iwl3945_rxon_assoc_cmd rxon_assoc;
852         struct iwl_host_cmd cmd = {
853                 .id = REPLY_RXON_ASSOC,
854                 .len = sizeof(rxon_assoc),
855                 .meta.flags = CMD_WANT_SKB,
856                 .data = &rxon_assoc,
857         };
858         const struct iwl3945_rxon_cmd *rxon1 = &priv->staging39_rxon;
859         const struct iwl3945_rxon_cmd *rxon2 = &priv->active39_rxon;
860
861         if ((rxon1->flags == rxon2->flags) &&
862             (rxon1->filter_flags == rxon2->filter_flags) &&
863             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
864             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
865                 IWL_DEBUG_INFO("Using current RXON_ASSOC.  Not resending.\n");
866                 return 0;
867         }
868
869         rxon_assoc.flags = priv->staging39_rxon.flags;
870         rxon_assoc.filter_flags = priv->staging39_rxon.filter_flags;
871         rxon_assoc.ofdm_basic_rates = priv->staging39_rxon.ofdm_basic_rates;
872         rxon_assoc.cck_basic_rates = priv->staging39_rxon.cck_basic_rates;
873         rxon_assoc.reserved = 0;
874
875         rc = iwl3945_send_cmd_sync(priv, &cmd);
876         if (rc)
877                 return rc;
878
879         res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
880         if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
881                 IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
882                 rc = -EIO;
883         }
884
885         priv->alloc_rxb_skb--;
886         dev_kfree_skb_any(cmd.meta.u.skb);
887
888         return rc;
889 }
890
891 /**
892  * iwl3945_commit_rxon - commit staging_rxon to hardware
893  *
894  * The RXON command in staging_rxon is committed to the hardware and
895  * the active_rxon structure is updated with the new data.  This
896  * function correctly transitions out of the RXON_ASSOC_MSK state if
897  * a HW tune is required based on the RXON structure changes.
898  */
899 static int iwl3945_commit_rxon(struct iwl_priv *priv)
900 {
901         /* cast away the const for active_rxon in this function */
902         struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active39_rxon;
903         int rc = 0;
904
905         if (!iwl_is_alive(priv))
906                 return -1;
907
908         /* always get timestamp with Rx frame */
909         priv->staging39_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
910
911         /* select antenna */
912         priv->staging39_rxon.flags &=
913             ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
914         priv->staging39_rxon.flags |= iwl3945_get_antenna_flags(priv);
915
916         rc = iwl3945_check_rxon_cmd(priv);
917         if (rc) {
918                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
919                 return -EINVAL;
920         }
921
922         /* If we don't need to send a full RXON, we can use
923          * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
924          * and other flags for the current radio configuration. */
925         if (!iwl3945_full_rxon_required(priv)) {
926                 rc = iwl3945_send_rxon_assoc(priv);
927                 if (rc) {
928                         IWL_ERR(priv, "Error setting RXON_ASSOC "
929                                   "configuration (%d).\n", rc);
930                         return rc;
931                 }
932
933                 memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
934
935                 return 0;
936         }
937
938         /* If we are currently associated and the new config requires
939          * an RXON_ASSOC and the new config wants the associated mask enabled,
940          * we must clear the associated from the active configuration
941          * before we apply the new config */
942         if (iwl3945_is_associated(priv) &&
943             (priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
944                 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
945                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
946
947                 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
948                                       sizeof(struct iwl3945_rxon_cmd),
949                                       &priv->active39_rxon);
950
951                 /* If the mask clearing failed then we set
952                  * active_rxon back to what it was previously */
953                 if (rc) {
954                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
955                         IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
956                                   "configuration (%d).\n", rc);
957                         return rc;
958                 }
959         }
960
961         IWL_DEBUG_INFO("Sending RXON\n"
962                        "* with%s RXON_FILTER_ASSOC_MSK\n"
963                        "* channel = %d\n"
964                        "* bssid = %pM\n",
965                        ((priv->staging39_rxon.filter_flags &
966                          RXON_FILTER_ASSOC_MSK) ? "" : "out"),
967                        le16_to_cpu(priv->staging39_rxon.channel),
968                        priv->staging_rxon.bssid_addr);
969
970         /* Apply the new configuration */
971         rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
972                               sizeof(struct iwl3945_rxon_cmd), &priv->staging39_rxon);
973         if (rc) {
974                 IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
975                 return rc;
976         }
977
978         memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
979
980         iwl3945_clear_stations_table(priv);
981
982         /* If we issue a new RXON command which required a tune then we must
983          * send a new TXPOWER command or we won't be able to Tx any frames */
984         rc = iwl3945_hw_reg_send_txpower(priv);
985         if (rc) {
986                 IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
987                 return rc;
988         }
989
990         /* Add the broadcast address so we can send broadcast frames */
991         if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
992             IWL_INVALID_STATION) {
993                 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
994                 return -EIO;
995         }
996
997         /* If we have set the ASSOC_MSK and we are in BSS mode then
998          * add the IWL_AP_ID to the station rate table */
999         if (iwl3945_is_associated(priv) &&
1000             (priv->iw_mode == NL80211_IFTYPE_STATION))
1001                 if (iwl3945_add_station(priv, priv->active39_rxon.bssid_addr, 1, 0)
1002                     == IWL_INVALID_STATION) {
1003                         IWL_ERR(priv, "Error adding AP address for transmit\n");
1004                         return -EIO;
1005                 }
1006
1007         /* Init the hardware's rate fallback order based on the band */
1008         rc = iwl3945_init_hw_rate_table(priv);
1009         if (rc) {
1010                 IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
1011                 return -EIO;
1012         }
1013
1014         return 0;
1015 }
1016
1017 static int iwl3945_send_bt_config(struct iwl_priv *priv)
1018 {
1019         struct iwl_bt_cmd bt_cmd = {
1020                 .flags = 3,
1021                 .lead_time = 0xAA,
1022                 .max_kill = 1,
1023                 .kill_ack_mask = 0,
1024                 .kill_cts_mask = 0,
1025         };
1026
1027         return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1028                                         sizeof(bt_cmd), &bt_cmd);
1029 }
1030
1031 static int iwl3945_send_scan_abort(struct iwl_priv *priv)
1032 {
1033         int rc = 0;
1034         struct iwl_rx_packet *res;
1035         struct iwl_host_cmd cmd = {
1036                 .id = REPLY_SCAN_ABORT_CMD,
1037                 .meta.flags = CMD_WANT_SKB,
1038         };
1039
1040         /* If there isn't a scan actively going on in the hardware
1041          * then we are in between scan bands and not actually
1042          * actively scanning, so don't send the abort command */
1043         if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1044                 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1045                 return 0;
1046         }
1047
1048         rc = iwl3945_send_cmd_sync(priv, &cmd);
1049         if (rc) {
1050                 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1051                 return rc;
1052         }
1053
1054         res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1055         if (res->u.status != CAN_ABORT_STATUS) {
1056                 /* The scan abort will return 1 for success or
1057                  * 2 for "failure".  A failure condition can be
1058                  * due to simply not being in an active scan which
1059                  * can occur if we send the scan abort before we
1060                  * the microcode has notified us that a scan is
1061                  * completed. */
1062                 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1063                 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1064                 clear_bit(STATUS_SCAN_HW, &priv->status);
1065         }
1066
1067         dev_kfree_skb_any(cmd.meta.u.skb);
1068
1069         return rc;
1070 }
1071
1072 static int iwl3945_add_sta_sync_callback(struct iwl_priv *priv,
1073                                      struct iwl_cmd *cmd, struct sk_buff *skb)
1074 {
1075         struct iwl_rx_packet *res = NULL;
1076
1077         if (!skb) {
1078                 IWL_ERR(priv, "Error: Response NULL in REPLY_ADD_STA.\n");
1079                 return 1;
1080         }
1081
1082         res = (struct iwl_rx_packet *)skb->data;
1083         if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1084                 IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
1085                           res->hdr.flags);
1086                 return 1;
1087         }
1088
1089         switch (res->u.add_sta.status) {
1090         case ADD_STA_SUCCESS_MSK:
1091                 break;
1092         default:
1093                 break;
1094         }
1095
1096         /* We didn't cache the SKB; let the caller free it */
1097         return 1;
1098 }
1099
1100 int iwl3945_send_add_station(struct iwl_priv *priv,
1101                          struct iwl3945_addsta_cmd *sta, u8 flags)
1102 {
1103         struct iwl_rx_packet *res = NULL;
1104         int rc = 0;
1105         struct iwl_host_cmd cmd = {
1106                 .id = REPLY_ADD_STA,
1107                 .len = sizeof(struct iwl3945_addsta_cmd),
1108                 .meta.flags = flags,
1109                 .data = sta,
1110         };
1111
1112         if (flags & CMD_ASYNC)
1113                 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1114         else
1115                 cmd.meta.flags |= CMD_WANT_SKB;
1116
1117         rc = iwl3945_send_cmd(priv, &cmd);
1118
1119         if (rc || (flags & CMD_ASYNC))
1120                 return rc;
1121
1122         res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1123         if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1124                 IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
1125                           res->hdr.flags);
1126                 rc = -EIO;
1127         }
1128
1129         if (rc == 0) {
1130                 switch (res->u.add_sta.status) {
1131                 case ADD_STA_SUCCESS_MSK:
1132                         IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1133                         break;
1134                 default:
1135                         rc = -EIO;
1136                         IWL_WARN(priv, "REPLY_ADD_STA failed\n");
1137                         break;
1138                 }
1139         }
1140
1141         priv->alloc_rxb_skb--;
1142         dev_kfree_skb_any(cmd.meta.u.skb);
1143
1144         return rc;
1145 }
1146
1147 static int iwl3945_update_sta_key_info(struct iwl_priv *priv,
1148                                    struct ieee80211_key_conf *keyconf,
1149                                    u8 sta_id)
1150 {
1151         unsigned long flags;
1152         __le16 key_flags = 0;
1153
1154         switch (keyconf->alg) {
1155         case ALG_CCMP:
1156                 key_flags |= STA_KEY_FLG_CCMP;
1157                 key_flags |= cpu_to_le16(
1158                                 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1159                 key_flags &= ~STA_KEY_FLG_INVALID;
1160                 break;
1161         case ALG_TKIP:
1162         case ALG_WEP:
1163         default:
1164                 return -EINVAL;
1165         }
1166         spin_lock_irqsave(&priv->sta_lock, flags);
1167         priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
1168         priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
1169         memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
1170                keyconf->keylen);
1171
1172         memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
1173                keyconf->keylen);
1174         priv->stations_39[sta_id].sta.key.key_flags = key_flags;
1175         priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1176         priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1177
1178         spin_unlock_irqrestore(&priv->sta_lock, flags);
1179
1180         IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1181         iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
1182         return 0;
1183 }
1184
1185 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
1186 {
1187         unsigned long flags;
1188
1189         spin_lock_irqsave(&priv->sta_lock, flags);
1190         memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1191         memset(&priv->stations_39[sta_id].sta.key, 0,
1192                 sizeof(struct iwl4965_keyinfo));
1193         priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1194         priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1195         priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1196         spin_unlock_irqrestore(&priv->sta_lock, flags);
1197
1198         IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1199         iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
1200         return 0;
1201 }
1202
1203 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
1204 {
1205         struct list_head *element;
1206
1207         IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1208                        priv->frames_count);
1209
1210         while (!list_empty(&priv->free_frames)) {
1211                 element = priv->free_frames.next;
1212                 list_del(element);
1213                 kfree(list_entry(element, struct iwl3945_frame, list));
1214                 priv->frames_count--;
1215         }
1216
1217         if (priv->frames_count) {
1218                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
1219                             priv->frames_count);
1220                 priv->frames_count = 0;
1221         }
1222 }
1223
1224 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
1225 {
1226         struct iwl3945_frame *frame;
1227         struct list_head *element;
1228         if (list_empty(&priv->free_frames)) {
1229                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1230                 if (!frame) {
1231                         IWL_ERR(priv, "Could not allocate frame!\n");
1232                         return NULL;
1233                 }
1234
1235                 priv->frames_count++;
1236                 return frame;
1237         }
1238
1239         element = priv->free_frames.next;
1240         list_del(element);
1241         return list_entry(element, struct iwl3945_frame, list);
1242 }
1243
1244 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
1245 {
1246         memset(frame, 0, sizeof(*frame));
1247         list_add(&frame->list, &priv->free_frames);
1248 }
1249
1250 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
1251                                 struct ieee80211_hdr *hdr,
1252                                 int left)
1253 {
1254
1255         if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1256             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
1257              (priv->iw_mode != NL80211_IFTYPE_AP)))
1258                 return 0;
1259
1260         if (priv->ibss_beacon->len > left)
1261                 return 0;
1262
1263         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1264
1265         return priv->ibss_beacon->len;
1266 }
1267
1268 static u8 iwl3945_rate_get_lowest_plcp(struct iwl_priv *priv)
1269 {
1270         u8 i;
1271         int rate_mask;
1272
1273         /* Set rate mask*/
1274         if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
1275                 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
1276         else
1277                 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
1278
1279         for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1280              i = iwl3945_rates[i].next_ieee) {
1281                 if (rate_mask & (1 << i))
1282                         return iwl3945_rates[i].plcp;
1283         }
1284
1285         /* No valid rate was found. Assign the lowest one */
1286         if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
1287                 return IWL_RATE_1M_PLCP;
1288         else
1289                 return IWL_RATE_6M_PLCP;
1290 }
1291
1292 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
1293 {
1294         struct iwl3945_frame *frame;
1295         unsigned int frame_size;
1296         int rc;
1297         u8 rate;
1298
1299         frame = iwl3945_get_free_frame(priv);
1300
1301         if (!frame) {
1302                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
1303                           "command.\n");
1304                 return -ENOMEM;
1305         }
1306
1307         rate = iwl3945_rate_get_lowest_plcp(priv);
1308
1309         frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1310
1311         rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1312                               &frame->u.cmd[0]);
1313
1314         iwl3945_free_frame(priv, frame);
1315
1316         return rc;
1317 }
1318
1319 /******************************************************************************
1320  *
1321  * EEPROM related functions
1322  *
1323  ******************************************************************************/
1324
1325 static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
1326 {
1327         memcpy(mac, priv->eeprom39.mac_address, 6);
1328 }
1329
1330 /*
1331  * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1332  * embedded controller) as EEPROM reader; each read is a series of pulses
1333  * to/from the EEPROM chip, not a single event, so even reads could conflict
1334  * if they weren't arbitrated by some ownership mechanism.  Here, the driver
1335  * simply claims ownership, which should be safe when this function is called
1336  * (i.e. before loading uCode!).
1337  */
1338 static inline int iwl3945_eeprom_acquire_semaphore(struct iwl_priv *priv)
1339 {
1340         _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1341         return 0;
1342 }
1343
1344 /**
1345  * iwl3945_eeprom_init - read EEPROM contents
1346  *
1347  * Load the EEPROM contents from adapter into priv->eeprom39
1348  *
1349  * NOTE:  This routine uses the non-debug IO access functions.
1350  */
1351 int iwl3945_eeprom_init(struct iwl_priv *priv)
1352 {
1353         u16 *e = (u16 *)&priv->eeprom39;
1354         u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
1355         int sz = sizeof(priv->eeprom39);
1356         int ret;
1357         u16 addr;
1358
1359         /* The EEPROM structure has several padding buffers within it
1360          * and when adding new EEPROM maps is subject to programmer errors
1361          * which may be very difficult to identify without explicitly
1362          * checking the resulting size of the eeprom map. */
1363         BUILD_BUG_ON(sizeof(priv->eeprom39) != IWL_EEPROM_IMAGE_SIZE);
1364
1365         if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1366                 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
1367                 return -ENOENT;
1368         }
1369
1370         /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1371         ret = iwl3945_eeprom_acquire_semaphore(priv);
1372         if (ret < 0) {
1373                 IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
1374                 return -ENOENT;
1375         }
1376
1377         /* eeprom is an array of 16bit values */
1378         for (addr = 0; addr < sz; addr += sizeof(u16)) {
1379                 u32 r;
1380
1381                 _iwl_write32(priv, CSR_EEPROM_REG,
1382                                  CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
1383                 _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1384                 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
1385                                               CSR_EEPROM_REG_READ_VALID_MSK,
1386                                               IWL_EEPROM_ACCESS_TIMEOUT);
1387                 if (ret < 0) {
1388                         IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
1389                         return ret;
1390                 }
1391
1392                 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
1393                 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
1394         }
1395
1396         return 0;
1397 }
1398
1399 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
1400 {
1401         if (priv->shared_virt)
1402                 pci_free_consistent(priv->pci_dev,
1403                                     sizeof(struct iwl3945_shared),
1404                                     priv->shared_virt,
1405                                     priv->shared_phys);
1406 }
1407
1408 /**
1409  * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1410  *
1411  * return : set the bit for each supported rate insert in ie
1412  */
1413 static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1414                                     u16 basic_rate, int *left)
1415 {
1416         u16 ret_rates = 0, bit;
1417         int i;
1418         u8 *cnt = ie;
1419         u8 *rates = ie + 1;
1420
1421         for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1422                 if (bit & supported_rate) {
1423                         ret_rates |= bit;
1424                         rates[*cnt] = iwl3945_rates[i].ieee |
1425                                 ((bit & basic_rate) ? 0x80 : 0x00);
1426                         (*cnt)++;
1427                         (*left)--;
1428                         if ((*left <= 0) ||
1429                             (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1430                                 break;
1431                 }
1432         }
1433
1434         return ret_rates;
1435 }
1436
1437 /**
1438  * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1439  */
1440 static u16 iwl3945_fill_probe_req(struct iwl_priv *priv,
1441                               struct ieee80211_mgmt *frame,
1442                               int left)
1443 {
1444         int len = 0;
1445         u8 *pos = NULL;
1446         u16 active_rates, ret_rates, cck_rates;
1447
1448         /* Make sure there is enough space for the probe request,
1449          * two mandatory IEs and the data */
1450         left -= 24;
1451         if (left < 0)
1452                 return 0;
1453         len += 24;
1454
1455         frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1456         memcpy(frame->da, iwl_bcast_addr, ETH_ALEN);
1457         memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1458         memcpy(frame->bssid, iwl_bcast_addr, ETH_ALEN);
1459         frame->seq_ctrl = 0;
1460
1461         /* fill in our indirect SSID IE */
1462         /* ...next IE... */
1463
1464         left -= 2;
1465         if (left < 0)
1466                 return 0;
1467         len += 2;
1468         pos = &(frame->u.probe_req.variable[0]);
1469         *pos++ = WLAN_EID_SSID;
1470         *pos++ = 0;
1471
1472         /* fill in supported rate */
1473         /* ...next IE... */
1474         left -= 2;
1475         if (left < 0)
1476                 return 0;
1477
1478         /* ... fill it in... */
1479         *pos++ = WLAN_EID_SUPP_RATES;
1480         *pos = 0;
1481
1482         priv->active_rate = priv->rates_mask;
1483         active_rates = priv->active_rate;
1484         priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1485
1486         cck_rates = IWL_CCK_RATES_MASK & active_rates;
1487         ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1488                         priv->active_rate_basic, &left);
1489         active_rates &= ~ret_rates;
1490
1491         ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1492                                  priv->active_rate_basic, &left);
1493         active_rates &= ~ret_rates;
1494
1495         len += 2 + *pos;
1496         pos += (*pos) + 1;
1497         if (active_rates == 0)
1498                 goto fill_end;
1499
1500         /* fill in supported extended rate */
1501         /* ...next IE... */
1502         left -= 2;
1503         if (left < 0)
1504                 return 0;
1505         /* ... fill it in... */
1506         *pos++ = WLAN_EID_EXT_SUPP_RATES;
1507         *pos = 0;
1508         iwl3945_supported_rate_to_ie(pos, active_rates,
1509                                  priv->active_rate_basic, &left);
1510         if (*pos > 0)
1511                 len += 2 + *pos;
1512
1513  fill_end:
1514         return (u16)len;
1515 }
1516
1517 /*
1518  * QoS  support
1519 */
1520 static int iwl3945_send_qos_params_command(struct iwl_priv *priv,
1521                                        struct iwl_qosparam_cmd *qos)
1522 {
1523
1524         return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1525                                 sizeof(struct iwl_qosparam_cmd), qos);
1526 }
1527
1528 static void iwl3945_activate_qos(struct iwl_priv *priv, u8 force)
1529 {
1530         unsigned long flags;
1531
1532         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1533                 return;
1534
1535         spin_lock_irqsave(&priv->lock, flags);
1536         priv->qos_data.def_qos_parm.qos_flags = 0;
1537
1538         if (priv->qos_data.qos_cap.q_AP.queue_request &&
1539             !priv->qos_data.qos_cap.q_AP.txop_request)
1540                 priv->qos_data.def_qos_parm.qos_flags |=
1541                         QOS_PARAM_FLG_TXOP_TYPE_MSK;
1542
1543         if (priv->qos_data.qos_active)
1544                 priv->qos_data.def_qos_parm.qos_flags |=
1545                         QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1546
1547         spin_unlock_irqrestore(&priv->lock, flags);
1548
1549         if (force || iwl3945_is_associated(priv)) {
1550                 IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
1551                               priv->qos_data.qos_active);
1552
1553                 iwl3945_send_qos_params_command(priv,
1554                                 &(priv->qos_data.def_qos_parm));
1555         }
1556 }
1557
1558 /*
1559  * Power management (not Tx power!) functions
1560  */
1561 #define MSEC_TO_USEC 1024
1562
1563
1564 #define NOSLP __constant_cpu_to_le16(0), 0, 0
1565 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
1566 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1567 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1568                                      __constant_cpu_to_le32(X1), \
1569                                      __constant_cpu_to_le32(X2), \
1570                                      __constant_cpu_to_le32(X3), \
1571                                      __constant_cpu_to_le32(X4)}
1572
1573 /* default power management (not Tx power) table values */
1574 /* for TIM  0-10 */
1575 static struct iwl_power_vec_entry range_0[IWL39_POWER_AC] = {
1576         {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1577         {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1578         {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1579         {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1580         {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1581         {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1582 };
1583
1584 /* for TIM > 10 */
1585 static struct iwl_power_vec_entry range_1[IWL39_POWER_AC] = {
1586         {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1587         {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1588                  SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1589         {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1590                  SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1591         {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1592                  SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1593         {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1594         {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1595                  SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1596 };
1597
1598 int iwl3945_power_init_handle(struct iwl_priv *priv)
1599 {
1600         int rc = 0, i;
1601         struct iwl3945_power_mgr *pow_data;
1602         int size = sizeof(struct iwl_power_vec_entry) * IWL39_POWER_AC;
1603         u16 pci_pm;
1604
1605         IWL_DEBUG_POWER("Initialize power \n");
1606
1607         pow_data = &(priv->power_data_39);
1608
1609         memset(pow_data, 0, sizeof(*pow_data));
1610
1611         pow_data->active_index = IWL_POWER_RANGE_0;
1612         pow_data->dtim_val = 0xffff;
1613
1614         memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1615         memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1616
1617         rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1618         if (rc != 0)
1619                 return 0;
1620         else {
1621                 struct iwl_powertable_cmd *cmd;
1622
1623                 IWL_DEBUG_POWER("adjust power command flags\n");
1624
1625                 for (i = 0; i < IWL39_POWER_AC; i++) {
1626                         cmd = &pow_data->pwr_range_0[i].cmd;
1627
1628                         if (pci_pm & 0x1)
1629                                 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1630                         else
1631                                 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1632                 }
1633         }
1634         return rc;
1635 }
1636
1637 static int iwl3945_update_power_cmd(struct iwl_priv *priv,
1638                                 struct iwl_powertable_cmd *cmd, u32 mode)
1639 {
1640         int rc = 0, i;
1641         u8 skip;
1642         u32 max_sleep = 0;
1643         struct iwl_power_vec_entry *range;
1644         u8 period = 0;
1645         struct iwl3945_power_mgr *pow_data;
1646
1647         if (mode > IWL_POWER_INDEX_5) {
1648                 IWL_DEBUG_POWER("Error invalid power mode \n");
1649                 return -1;
1650         }
1651         pow_data = &(priv->power_data_39);
1652
1653         if (pow_data->active_index == IWL_POWER_RANGE_0)
1654                 range = &pow_data->pwr_range_0[0];
1655         else
1656                 range = &pow_data->pwr_range_1[1];
1657
1658         memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
1659
1660 #ifdef IWL_MAC80211_DISABLE
1661         if (priv->assoc_network != NULL) {
1662                 unsigned long flags;
1663
1664                 period = priv->assoc_network->tim.tim_period;
1665         }
1666 #endif  /*IWL_MAC80211_DISABLE */
1667         skip = range[mode].no_dtim;
1668
1669         if (period == 0) {
1670                 period = 1;
1671                 skip = 0;
1672         }
1673
1674         if (skip == 0) {
1675                 max_sleep = period;
1676                 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1677         } else {
1678                 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1679                 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1680                 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1681         }
1682
1683         for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1684                 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1685                         cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1686         }
1687
1688         IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1689         IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1690         IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1691         IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1692                         le32_to_cpu(cmd->sleep_interval[0]),
1693                         le32_to_cpu(cmd->sleep_interval[1]),
1694                         le32_to_cpu(cmd->sleep_interval[2]),
1695                         le32_to_cpu(cmd->sleep_interval[3]),
1696                         le32_to_cpu(cmd->sleep_interval[4]));
1697
1698         return rc;
1699 }
1700
1701 static int iwl3945_send_power_mode(struct iwl_priv *priv, u32 mode)
1702 {
1703         u32 uninitialized_var(final_mode);
1704         int rc;
1705         struct iwl_powertable_cmd cmd;
1706
1707         /* If on battery, set to 3,
1708          * if plugged into AC power, set to CAM ("continuously aware mode"),
1709          * else user level */
1710         switch (mode) {
1711         case IWL39_POWER_BATTERY:
1712                 final_mode = IWL_POWER_INDEX_3;
1713                 break;
1714         case IWL39_POWER_AC:
1715                 final_mode = IWL_POWER_MODE_CAM;
1716                 break;
1717         default:
1718                 final_mode = mode;
1719                 break;
1720         }
1721
1722         iwl3945_update_power_cmd(priv, &cmd, final_mode);
1723
1724         /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */
1725         rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD,
1726                                 sizeof(struct iwl3945_powertable_cmd), &cmd);
1727
1728         if (final_mode == IWL_POWER_MODE_CAM)
1729                 clear_bit(STATUS_POWER_PMI, &priv->status);
1730         else
1731                 set_bit(STATUS_POWER_PMI, &priv->status);
1732
1733         return rc;
1734 }
1735
1736 /**
1737  * iwl3945_scan_cancel - Cancel any currently executing HW scan
1738  *
1739  * NOTE: priv->mutex is not required before calling this function
1740  */
1741 static int iwl3945_scan_cancel(struct iwl_priv *priv)
1742 {
1743         if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1744                 clear_bit(STATUS_SCANNING, &priv->status);
1745                 return 0;
1746         }
1747
1748         if (test_bit(STATUS_SCANNING, &priv->status)) {
1749                 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1750                         IWL_DEBUG_SCAN("Queuing scan abort.\n");
1751                         set_bit(STATUS_SCAN_ABORTING, &priv->status);
1752                         queue_work(priv->workqueue, &priv->abort_scan);
1753
1754                 } else
1755                         IWL_DEBUG_SCAN("Scan abort already in progress.\n");
1756
1757                 return test_bit(STATUS_SCANNING, &priv->status);
1758         }
1759
1760         return 0;
1761 }
1762
1763 /**
1764  * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
1765  * @ms: amount of time to wait (in milliseconds) for scan to abort
1766  *
1767  * NOTE: priv->mutex must be held before calling this function
1768  */
1769 static int iwl3945_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
1770 {
1771         unsigned long now = jiffies;
1772         int ret;
1773
1774         ret = iwl3945_scan_cancel(priv);
1775         if (ret && ms) {
1776                 mutex_unlock(&priv->mutex);
1777                 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
1778                                 test_bit(STATUS_SCANNING, &priv->status))
1779                         msleep(1);
1780                 mutex_lock(&priv->mutex);
1781
1782                 return test_bit(STATUS_SCANNING, &priv->status);
1783         }
1784
1785         return ret;
1786 }
1787
1788 #define MAX_UCODE_BEACON_INTERVAL       1024
1789 #define INTEL_CONN_LISTEN_INTERVAL      __constant_cpu_to_le16(0xA)
1790
1791 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
1792 {
1793         u16 new_val = 0;
1794         u16 beacon_factor = 0;
1795
1796         beacon_factor =
1797             (beacon_val + MAX_UCODE_BEACON_INTERVAL)
1798                 / MAX_UCODE_BEACON_INTERVAL;
1799         new_val = beacon_val / beacon_factor;
1800
1801         return cpu_to_le16(new_val);
1802 }
1803
1804 static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
1805 {
1806         u64 interval_tm_unit;
1807         u64 tsf, result;
1808         unsigned long flags;
1809         struct ieee80211_conf *conf = NULL;
1810         u16 beacon_int = 0;
1811
1812         conf = ieee80211_get_hw_conf(priv->hw);
1813
1814         spin_lock_irqsave(&priv->lock, flags);
1815         priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
1816         priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
1817
1818         tsf = priv->timestamp;
1819
1820         beacon_int = priv->beacon_int;
1821         spin_unlock_irqrestore(&priv->lock, flags);
1822
1823         if (priv->iw_mode == NL80211_IFTYPE_STATION) {
1824                 if (beacon_int == 0) {
1825                         priv->rxon_timing.beacon_interval = cpu_to_le16(100);
1826                         priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
1827                 } else {
1828                         priv->rxon_timing.beacon_interval =
1829                                 cpu_to_le16(beacon_int);
1830                         priv->rxon_timing.beacon_interval =
1831                             iwl3945_adjust_beacon_interval(
1832                                 le16_to_cpu(priv->rxon_timing.beacon_interval));
1833                 }
1834
1835                 priv->rxon_timing.atim_window = 0;
1836         } else {
1837                 priv->rxon_timing.beacon_interval =
1838                         iwl3945_adjust_beacon_interval(conf->beacon_int);
1839                 /* TODO: we need to get atim_window from upper stack
1840                  * for now we set to 0 */
1841                 priv->rxon_timing.atim_window = 0;
1842         }
1843
1844         interval_tm_unit =
1845                 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
1846         result = do_div(tsf, interval_tm_unit);
1847         priv->rxon_timing.beacon_init_val =
1848             cpu_to_le32((u32) ((u64) interval_tm_unit - result));
1849
1850         IWL_DEBUG_ASSOC
1851             ("beacon interval %d beacon timer %d beacon tim %d\n",
1852                 le16_to_cpu(priv->rxon_timing.beacon_interval),
1853                 le32_to_cpu(priv->rxon_timing.beacon_init_val),
1854                 le16_to_cpu(priv->rxon_timing.atim_window));
1855 }
1856
1857 static int iwl3945_scan_initiate(struct iwl_priv *priv)
1858 {
1859         if (!iwl_is_ready_rf(priv)) {
1860                 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
1861                 return -EIO;
1862         }
1863
1864         if (test_bit(STATUS_SCANNING, &priv->status)) {
1865                 IWL_DEBUG_SCAN("Scan already in progress.\n");
1866                 return -EAGAIN;
1867         }
1868
1869         if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1870                 IWL_DEBUG_SCAN("Scan request while abort pending.  "
1871                                "Queuing.\n");
1872                 return -EAGAIN;
1873         }
1874
1875         IWL_DEBUG_INFO("Starting scan...\n");
1876         if (priv->cfg->sku & IWL_SKU_G)
1877                 priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
1878         if (priv->cfg->sku & IWL_SKU_A)
1879                 priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
1880         set_bit(STATUS_SCANNING, &priv->status);
1881         priv->scan_start = jiffies;
1882         priv->scan_pass_start = priv->scan_start;
1883
1884         queue_work(priv->workqueue, &priv->request_scan);
1885
1886         return 0;
1887 }
1888
1889 static int iwl3945_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
1890 {
1891         struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
1892
1893         if (hw_decrypt)
1894                 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
1895         else
1896                 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
1897
1898         return 0;
1899 }
1900
1901 static void iwl3945_set_flags_for_phymode(struct iwl_priv *priv,
1902                                           enum ieee80211_band band)
1903 {
1904         if (band == IEEE80211_BAND_5GHZ) {
1905                 priv->staging39_rxon.flags &=
1906                     ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1907                       | RXON_FLG_CCK_MSK);
1908                 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1909         } else {
1910                 /* Copied from iwl3945_bg_post_associate() */
1911                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1912                         priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1913                 else
1914                         priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1915
1916                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1917                         priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1918
1919                 priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1920                 priv->staging39_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1921                 priv->staging39_rxon.flags &= ~RXON_FLG_CCK_MSK;
1922         }
1923 }
1924
1925 /*
1926  * initialize rxon structure with default values from eeprom
1927  */
1928 static void iwl3945_connection_init_rx_config(struct iwl_priv *priv,
1929                                               int mode)
1930 {
1931         const struct iwl_channel_info *ch_info;
1932
1933         memset(&priv->staging39_rxon, 0, sizeof(priv->staging39_rxon));
1934
1935         switch (mode) {
1936         case NL80211_IFTYPE_AP:
1937                 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_AP;
1938                 break;
1939
1940         case NL80211_IFTYPE_STATION:
1941                 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_ESS;
1942                 priv->staging39_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1943                 break;
1944
1945         case NL80211_IFTYPE_ADHOC:
1946                 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1947                 priv->staging39_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1948                 priv->staging39_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1949                                                   RXON_FILTER_ACCEPT_GRP_MSK;
1950                 break;
1951
1952         case NL80211_IFTYPE_MONITOR:
1953                 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
1954                 priv->staging39_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
1955                     RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
1956                 break;
1957         default:
1958                 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1959                 break;
1960         }
1961
1962 #if 0
1963         /* TODO:  Figure out when short_preamble would be set and cache from
1964          * that */
1965         if (!hw_to_local(priv->hw)->short_preamble)
1966                 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1967         else
1968                 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1969 #endif
1970
1971         ch_info = iwl3945_get_channel_info(priv, priv->band,
1972                                        le16_to_cpu(priv->active39_rxon.channel));
1973
1974         if (!ch_info)
1975                 ch_info = &priv->channel_info[0];
1976
1977         /*
1978          * in some case A channels are all non IBSS
1979          * in this case force B/G channel
1980          */
1981         if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info)))
1982                 ch_info = &priv->channel_info[0];
1983
1984         priv->staging39_rxon.channel = cpu_to_le16(ch_info->channel);
1985         if (is_channel_a_band(ch_info))
1986                 priv->band = IEEE80211_BAND_5GHZ;
1987         else
1988                 priv->band = IEEE80211_BAND_2GHZ;
1989
1990         iwl3945_set_flags_for_phymode(priv, priv->band);
1991
1992         priv->staging39_rxon.ofdm_basic_rates =
1993             (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1994         priv->staging39_rxon.cck_basic_rates =
1995             (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1996 }
1997
1998 static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
1999 {
2000         if (mode == NL80211_IFTYPE_ADHOC) {
2001                 const struct iwl_channel_info *ch_info;
2002
2003                 ch_info = iwl3945_get_channel_info(priv,
2004                         priv->band,
2005                         le16_to_cpu(priv->staging39_rxon.channel));
2006
2007                 if (!ch_info || !is_channel_ibss(ch_info)) {
2008                         IWL_ERR(priv, "channel %d not IBSS channel\n",
2009                                   le16_to_cpu(priv->staging39_rxon.channel));
2010                         return -EINVAL;
2011                 }
2012         }
2013
2014         iwl3945_connection_init_rx_config(priv, mode);
2015         memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2016
2017         iwl3945_clear_stations_table(priv);
2018
2019         /* don't commit rxon if rf-kill is on*/
2020         if (!iwl_is_ready_rf(priv))
2021                 return -EAGAIN;
2022
2023         cancel_delayed_work(&priv->scan_check);
2024         if (iwl3945_scan_cancel_timeout(priv, 100)) {
2025                 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2026                 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2027                 return -EAGAIN;
2028         }
2029
2030         iwl3945_commit_rxon(priv);
2031
2032         return 0;
2033 }
2034
2035 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
2036                                       struct ieee80211_tx_info *info,
2037                                       struct iwl_cmd *cmd,
2038                                       struct sk_buff *skb_frag,
2039                                       int last_frag)
2040 {
2041         struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
2042         struct iwl3945_hw_key *keyinfo =
2043             &priv->stations_39[info->control.hw_key->hw_key_idx].keyinfo;
2044
2045         switch (keyinfo->alg) {
2046         case ALG_CCMP:
2047                 tx->sec_ctl = TX_CMD_SEC_CCM;
2048                 memcpy(tx->key, keyinfo->key, keyinfo->keylen);
2049                 IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
2050                 break;
2051
2052         case ALG_TKIP:
2053 #if 0
2054                 tx->sec_ctl = TX_CMD_SEC_TKIP;
2055
2056                 if (last_frag)
2057                         memcpy(tx->tkip_mic.byte, skb_frag->tail - 8,
2058                                8);
2059                 else
2060                         memset(tx->tkip_mic.byte, 0, 8);
2061 #endif
2062                 break;
2063
2064         case ALG_WEP:
2065                 tx->sec_ctl = TX_CMD_SEC_WEP |
2066                     (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2067
2068                 if (keyinfo->keylen == 13)
2069                         tx->sec_ctl |= TX_CMD_SEC_KEY128;
2070
2071                 memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
2072
2073                 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2074                              "with key %d\n", info->control.hw_key->hw_key_idx);
2075                 break;
2076
2077         default:
2078                 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
2079                 break;
2080         }
2081 }
2082
2083 /*
2084  * handle build REPLY_TX command notification.
2085  */
2086 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
2087                                   struct iwl_cmd *cmd,
2088                                   struct ieee80211_tx_info *info,
2089                                   struct ieee80211_hdr *hdr, u8 std_id)
2090 {
2091         struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
2092         __le32 tx_flags = tx->tx_flags;
2093         __le16 fc = hdr->frame_control;
2094         u8 rc_flags = info->control.rates[0].flags;
2095
2096         tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2097         if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
2098                 tx_flags |= TX_CMD_FLG_ACK_MSK;
2099                 if (ieee80211_is_mgmt(fc))
2100                         tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2101                 if (ieee80211_is_probe_resp(fc) &&
2102                     !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2103                         tx_flags |= TX_CMD_FLG_TSF_MSK;
2104         } else {
2105                 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2106                 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2107         }
2108
2109         tx->sta_id = std_id;
2110         if (ieee80211_has_morefrags(fc))
2111                 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2112
2113         if (ieee80211_is_data_qos(fc)) {
2114                 u8 *qc = ieee80211_get_qos_ctl(hdr);
2115                 tx->tid_tspec = qc[0] & 0xf;
2116                 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2117         } else {
2118                 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2119         }
2120
2121         if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
2122                 tx_flags |= TX_CMD_FLG_RTS_MSK;
2123                 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2124         } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
2125                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2126                 tx_flags |= TX_CMD_FLG_CTS_MSK;
2127         }
2128
2129         if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2130                 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2131
2132         tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2133         if (ieee80211_is_mgmt(fc)) {
2134                 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
2135                         tx->timeout.pm_frame_timeout = cpu_to_le16(3);
2136                 else
2137                         tx->timeout.pm_frame_timeout = cpu_to_le16(2);
2138         } else {
2139                 tx->timeout.pm_frame_timeout = 0;
2140 #ifdef CONFIG_IWL3945_LEDS
2141                 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2142 #endif
2143         }
2144
2145         tx->driver_txop = 0;
2146         tx->tx_flags = tx_flags;
2147         tx->next_frame_len = 0;
2148 }
2149
2150 /**
2151  * iwl3945_get_sta_id - Find station's index within station table
2152  */
2153 static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
2154 {
2155         int sta_id;
2156         u16 fc = le16_to_cpu(hdr->frame_control);
2157
2158         /* If this frame is broadcast or management, use broadcast station id */
2159         if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2160             is_multicast_ether_addr(hdr->addr1))
2161                 return priv->hw_params.bcast_sta_id;
2162
2163         switch (priv->iw_mode) {
2164
2165         /* If we are a client station in a BSS network, use the special
2166          * AP station entry (that's the only station we communicate with) */
2167         case NL80211_IFTYPE_STATION:
2168                 return IWL_AP_ID;
2169
2170         /* If we are an AP, then find the station, or use BCAST */
2171         case NL80211_IFTYPE_AP:
2172                 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2173                 if (sta_id != IWL_INVALID_STATION)
2174                         return sta_id;
2175                 return priv->hw_params.bcast_sta_id;
2176
2177         /* If this frame is going out to an IBSS network, find the station,
2178          * or create a new station table entry */
2179         case NL80211_IFTYPE_ADHOC: {
2180                 /* Create new station table entry */
2181                 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2182                 if (sta_id != IWL_INVALID_STATION)
2183                         return sta_id;
2184
2185                 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2186
2187                 if (sta_id != IWL_INVALID_STATION)
2188                         return sta_id;
2189
2190                 IWL_DEBUG_DROP("Station %pM not in station map. "
2191                                "Defaulting to broadcast...\n",
2192                                hdr->addr1);
2193                 iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2194                 return priv->hw_params.bcast_sta_id;
2195         }
2196         /* If we are in monitor mode, use BCAST. This is required for
2197          * packet injection. */
2198         case NL80211_IFTYPE_MONITOR:
2199                 return priv->hw_params.bcast_sta_id;
2200
2201         default:
2202                 IWL_WARN(priv, "Unknown mode of operation: %d\n",
2203                         priv->iw_mode);
2204                 return priv->hw_params.bcast_sta_id;
2205         }
2206 }
2207
2208 /*
2209  * start REPLY_TX command process
2210  */
2211 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
2212 {
2213         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2214         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
2215         struct iwl3945_tfd *tfd;
2216         struct iwl3945_tx_cmd *tx;
2217         struct iwl_tx_queue *txq = NULL;
2218         struct iwl_queue *q = NULL;
2219         struct iwl_cmd *out_cmd = NULL;
2220         dma_addr_t phys_addr;
2221         dma_addr_t txcmd_phys;
2222         int txq_id = skb_get_queue_mapping(skb);
2223         u16 len, idx, len_org, hdr_len;
2224         u8 id;
2225         u8 unicast;
2226         u8 sta_id;
2227         u8 tid = 0;
2228         u16 seq_number = 0;
2229         __le16 fc;
2230         u8 wait_write_ptr = 0;
2231         u8 *qc = NULL;
2232         unsigned long flags;
2233         int rc;
2234
2235         spin_lock_irqsave(&priv->lock, flags);
2236         if (iwl_is_rfkill(priv)) {
2237                 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2238                 goto drop_unlock;
2239         }
2240
2241         if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
2242                 IWL_ERR(priv, "ERROR: No TX rate available.\n");
2243                 goto drop_unlock;
2244         }
2245
2246         unicast = !is_multicast_ether_addr(hdr->addr1);
2247         id = 0;
2248
2249         fc = hdr->frame_control;
2250
2251 #ifdef CONFIG_IWL3945_DEBUG
2252         if (ieee80211_is_auth(fc))
2253                 IWL_DEBUG_TX("Sending AUTH frame\n");
2254         else if (ieee80211_is_assoc_req(fc))
2255                 IWL_DEBUG_TX("Sending ASSOC frame\n");
2256         else if (ieee80211_is_reassoc_req(fc))
2257                 IWL_DEBUG_TX("Sending REASSOC frame\n");
2258 #endif
2259
2260         /* drop all data frame if we are not associated */
2261         if (ieee80211_is_data(fc) &&
2262             (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
2263             (!iwl3945_is_associated(priv) ||
2264              ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
2265                 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2266                 goto drop_unlock;
2267         }
2268
2269         spin_unlock_irqrestore(&priv->lock, flags);
2270
2271         hdr_len = ieee80211_hdrlen(fc);
2272
2273         /* Find (or create) index into station table for destination station */
2274         sta_id = iwl3945_get_sta_id(priv, hdr);
2275         if (sta_id == IWL_INVALID_STATION) {
2276                 IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
2277                                hdr->addr1);
2278                 goto drop;
2279         }
2280
2281         IWL_DEBUG_RATE("station Id %d\n", sta_id);
2282
2283         if (ieee80211_is_data_qos(fc)) {
2284                 qc = ieee80211_get_qos_ctl(hdr);
2285                 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
2286                 seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
2287                                 IEEE80211_SCTL_SEQ;
2288                 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2289                         (hdr->seq_ctrl &
2290                                 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2291                 seq_number += 0x10;
2292         }
2293
2294         /* Descriptor for chosen Tx queue */
2295         txq = &priv->txq[txq_id];
2296         q = &txq->q;
2297
2298         spin_lock_irqsave(&priv->lock, flags);
2299
2300         /* Set up first empty TFD within this queue's circular TFD buffer */
2301         tfd = &txq->tfds39[q->write_ptr];
2302         memset(tfd, 0, sizeof(*tfd));
2303         idx = get_cmd_index(q, q->write_ptr, 0);
2304
2305         /* Set up driver data for this TFD */
2306         memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
2307         txq->txb[q->write_ptr].skb[0] = skb;
2308
2309         /* Init first empty entry in queue's array of Tx/cmd buffers */
2310         out_cmd = txq->cmd[idx];
2311         tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
2312         memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2313         memset(tx, 0, sizeof(*tx));
2314
2315         /*
2316          * Set up the Tx-command (not MAC!) header.
2317          * Store the chosen Tx queue and TFD index within the sequence field;
2318          * after Tx, uCode's Tx response will return this value so driver can
2319          * locate the frame within the tx queue and do post-tx processing.
2320          */
2321         out_cmd->hdr.cmd = REPLY_TX;
2322         out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2323                                 INDEX_TO_SEQ(q->write_ptr)));
2324
2325         /* Copy MAC header from skb into command buffer */
2326         memcpy(tx->hdr, hdr, hdr_len);
2327
2328         /*
2329          * Use the first empty entry in this queue's command buffer array
2330          * to contain the Tx command and MAC header concatenated together
2331          * (payload data will be in another buffer).
2332          * Size of this varies, due to varying MAC header length.
2333          * If end is not dword aligned, we'll have 2 extra bytes at the end
2334          * of the MAC header (device reads on dword boundaries).
2335          * We'll tell device about this padding later.
2336          */
2337         len = sizeof(struct iwl3945_tx_cmd) +
2338                         sizeof(struct iwl_cmd_header) + hdr_len;
2339
2340         len_org = len;
2341         len = (len + 3) & ~3;
2342
2343         if (len_org != len)
2344                 len_org = 1;
2345         else
2346                 len_org = 0;
2347
2348         /* Physical address of this Tx command's header (not MAC header!),
2349          * within command buffer array. */
2350         txcmd_phys = pci_map_single(priv->pci_dev,
2351                                     out_cmd, sizeof(struct iwl_cmd),
2352                                     PCI_DMA_TODEVICE);
2353         pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
2354         pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
2355         /* Add buffer containing Tx command and MAC(!) header to TFD's
2356          * first entry */
2357         txcmd_phys += offsetof(struct iwl_cmd, hdr);
2358
2359         /* Add buffer containing Tx command and MAC(!) header to TFD's
2360          * first entry */
2361         iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2362
2363         if (info->control.hw_key)
2364                 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
2365
2366         /* Set up TFD's 2nd entry to point directly to remainder of skb,
2367          * if any (802.11 null frames have no payload). */
2368         len = skb->len - hdr_len;
2369         if (len) {
2370                 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2371                                            len, PCI_DMA_TODEVICE);
2372                 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2373         }
2374
2375         if (!len)
2376                 /* If there is no payload, then we use only one Tx buffer */
2377                 tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(1));
2378         else
2379                 /* Else use 2 buffers.
2380                  * Tell 3945 about any padding after MAC header */
2381                 tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(2) |
2382                         TFD_CTL_PAD_SET(U32_PAD(len)));
2383
2384         /* Total # bytes to be transmitted */
2385         len = (u16)skb->len;
2386         tx->len = cpu_to_le16(len);
2387
2388         /* TODO need this for burst mode later on */
2389         iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
2390
2391         /* set is_hcca to 0; it probably will never be implemented */
2392         iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
2393
2394         tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2395         tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2396
2397         if (!ieee80211_has_morefrags(hdr->frame_control)) {
2398                 txq->need_update = 1;
2399                 if (qc)
2400                         priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
2401         } else {
2402                 wait_write_ptr = 1;
2403                 txq->need_update = 0;
2404         }
2405
2406         iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
2407
2408         iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
2409                            ieee80211_hdrlen(fc));
2410
2411         /* Tell device the write index *just past* this latest filled TFD */
2412         q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
2413         rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
2414         spin_unlock_irqrestore(&priv->lock, flags);
2415
2416         if (rc)
2417                 return rc;
2418
2419         if ((iwl_queue_space(q) < q->high_mark)
2420             && priv->mac80211_registered) {
2421                 if (wait_write_ptr) {
2422                         spin_lock_irqsave(&priv->lock, flags);
2423                         txq->need_update = 1;
2424                         iwl3945_tx_queue_update_write_ptr(priv, txq);
2425                         spin_unlock_irqrestore(&priv->lock, flags);
2426                 }
2427
2428                 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
2429         }
2430
2431         return 0;
2432
2433 drop_unlock:
2434         spin_unlock_irqrestore(&priv->lock, flags);
2435 drop:
2436         return -1;
2437 }
2438
2439 static void iwl3945_set_rate(struct iwl_priv *priv)
2440 {
2441         const struct ieee80211_supported_band *sband = NULL;
2442         struct ieee80211_rate *rate;
2443         int i;
2444
2445         sband = iwl_get_hw_mode(priv, priv->band);
2446         if (!sband) {
2447                 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
2448                 return;
2449         }
2450
2451         priv->active_rate = 0;
2452         priv->active_rate_basic = 0;
2453
2454         IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2455                        sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
2456
2457         for (i = 0; i < sband->n_bitrates; i++) {
2458                 rate = &sband->bitrates[i];
2459                 if ((rate->hw_value < IWL_RATE_COUNT) &&
2460                     !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2461                         IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2462                                        rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2463                         priv->active_rate |= (1 << rate->hw_value);
2464                 }
2465         }
2466
2467         IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2468                        priv->active_rate, priv->active_rate_basic);
2469
2470         /*
2471          * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2472          * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2473          * OFDM
2474          */
2475         if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2476                 priv->staging39_rxon.cck_basic_rates =
2477                     ((priv->active_rate_basic &
2478                       IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2479         else
2480                 priv->staging39_rxon.cck_basic_rates =
2481                     (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2482
2483         if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2484                 priv->staging39_rxon.ofdm_basic_rates =
2485                     ((priv->active_rate_basic &
2486                       (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2487                       IWL_FIRST_OFDM_RATE) & 0xFF;
2488         else
2489                 priv->staging39_rxon.ofdm_basic_rates =
2490                    (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2491 }
2492
2493 static void iwl3945_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
2494 {
2495         unsigned long flags;
2496
2497         if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2498                 return;
2499
2500         IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2501                           disable_radio ? "OFF" : "ON");
2502
2503         if (disable_radio) {
2504                 iwl3945_scan_cancel(priv);
2505                 /* FIXME: This is a workaround for AP */
2506                 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2507                         spin_lock_irqsave(&priv->lock, flags);
2508                         iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
2509                                     CSR_UCODE_SW_BIT_RFKILL);
2510                         spin_unlock_irqrestore(&priv->lock, flags);
2511                         iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
2512                         set_bit(STATUS_RF_KILL_SW, &priv->status);
2513                 }
2514                 return;
2515         }
2516
2517         spin_lock_irqsave(&priv->lock, flags);
2518         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2519
2520         clear_bit(STATUS_RF_KILL_SW, &priv->status);
2521         spin_unlock_irqrestore(&priv->lock, flags);
2522
2523         /* wake up ucode */
2524         msleep(10);
2525
2526         spin_lock_irqsave(&priv->lock, flags);
2527         iwl_read32(priv, CSR_UCODE_DRV_GP1);
2528         if (!iwl_grab_nic_access(priv))
2529                 iwl_release_nic_access(priv);
2530         spin_unlock_irqrestore(&priv->lock, flags);
2531
2532         if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2533                 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2534                                   "disabled by HW switch\n");
2535                 return;
2536         }
2537
2538         if (priv->is_open)
2539                 queue_work(priv->workqueue, &priv->restart);
2540         return;
2541 }
2542
2543 void iwl3945_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
2544                             u32 decrypt_res, struct ieee80211_rx_status *stats)
2545 {
2546         u16 fc =
2547             le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2548
2549         if (priv->active39_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2550                 return;
2551
2552         if (!(fc & IEEE80211_FCTL_PROTECTED))
2553                 return;
2554
2555         IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2556         switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2557         case RX_RES_STATUS_SEC_TYPE_TKIP:
2558                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2559                     RX_RES_STATUS_BAD_ICV_MIC)
2560                         stats->flag |= RX_FLAG_MMIC_ERROR;
2561         case RX_RES_STATUS_SEC_TYPE_WEP:
2562         case RX_RES_STATUS_SEC_TYPE_CCMP:
2563                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2564                     RX_RES_STATUS_DECRYPT_OK) {
2565                         IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2566                         stats->flag |= RX_FLAG_DECRYPTED;
2567                 }
2568                 break;
2569
2570         default:
2571                 break;
2572         }
2573 }
2574
2575 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2576
2577 #include "iwl-spectrum.h"
2578
2579 #define BEACON_TIME_MASK_LOW    0x00FFFFFF
2580 #define BEACON_TIME_MASK_HIGH   0xFF000000
2581 #define TIME_UNIT               1024
2582
2583 /*
2584  * extended beacon time format
2585  * time in usec will be changed into a 32-bit value in 8:24 format
2586  * the high 1 byte is the beacon counts
2587  * the lower 3 bytes is the time in usec within one beacon interval
2588  */
2589
2590 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
2591 {
2592         u32 quot;
2593         u32 rem;
2594         u32 interval = beacon_interval * 1024;
2595
2596         if (!interval || !usec)
2597                 return 0;
2598
2599         quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2600         rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2601
2602         return (quot << 24) + rem;
2603 }
2604
2605 /* base is usually what we get from ucode with each received frame,
2606  * the same as HW timer counter counting down
2607  */
2608
2609 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
2610 {
2611         u32 base_low = base & BEACON_TIME_MASK_LOW;
2612         u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2613         u32 interval = beacon_interval * TIME_UNIT;
2614         u32 res = (base & BEACON_TIME_MASK_HIGH) +
2615             (addon & BEACON_TIME_MASK_HIGH);
2616
2617         if (base_low > addon_low)
2618                 res += base_low - addon_low;
2619         else if (base_low < addon_low) {
2620                 res += interval + base_low - addon_low;
2621                 res += (1 << 24);
2622         } else
2623                 res += (1 << 24);
2624
2625         return cpu_to_le32(res);
2626 }
2627
2628 static int iwl3945_get_measurement(struct iwl_priv *priv,
2629                                struct ieee80211_measurement_params *params,
2630                                u8 type)
2631 {
2632         struct iwl_spectrum_cmd spectrum;
2633         struct iwl_rx_packet *res;
2634         struct iwl_host_cmd cmd = {
2635                 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2636                 .data = (void *)&spectrum,
2637                 .meta.flags = CMD_WANT_SKB,
2638         };
2639         u32 add_time = le64_to_cpu(params->start_time);
2640         int rc;
2641         int spectrum_resp_status;
2642         int duration = le16_to_cpu(params->duration);
2643
2644         if (iwl3945_is_associated(priv))
2645                 add_time =
2646                     iwl3945_usecs_to_beacons(
2647                         le64_to_cpu(params->start_time) - priv->last_tsf,
2648                         le16_to_cpu(priv->rxon_timing.beacon_interval));
2649
2650         memset(&spectrum, 0, sizeof(spectrum));
2651
2652         spectrum.channel_count = cpu_to_le16(1);
2653         spectrum.flags =
2654             RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2655         spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2656         cmd.len = sizeof(spectrum);
2657         spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2658
2659         if (iwl3945_is_associated(priv))
2660                 spectrum.start_time =
2661                     iwl3945_add_beacon_time(priv->last_beacon_time,
2662                                 add_time,
2663                                 le16_to_cpu(priv->rxon_timing.beacon_interval));
2664         else
2665                 spectrum.start_time = 0;
2666
2667         spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2668         spectrum.channels[0].channel = params->channel;
2669         spectrum.channels[0].type = type;
2670         if (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK)
2671                 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2672                     RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2673
2674         rc = iwl3945_send_cmd_sync(priv, &cmd);
2675         if (rc)
2676                 return rc;
2677
2678         res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
2679         if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2680                 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
2681                 rc = -EIO;
2682         }
2683
2684         spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2685         switch (spectrum_resp_status) {
2686         case 0:         /* Command will be handled */
2687                 if (res->u.spectrum.id != 0xff) {
2688                         IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
2689                                                 res->u.spectrum.id);
2690                         priv->measurement_status &= ~MEASUREMENT_READY;
2691                 }
2692                 priv->measurement_status |= MEASUREMENT_ACTIVE;
2693                 rc = 0;
2694                 break;
2695
2696         case 1:         /* Command will not be handled */
2697                 rc = -EAGAIN;
2698                 break;
2699         }
2700
2701         dev_kfree_skb_any(cmd.meta.u.skb);
2702
2703         return rc;
2704 }
2705 #endif
2706
2707 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
2708                                struct iwl_rx_mem_buffer *rxb)
2709 {
2710         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2711         struct iwl_alive_resp *palive;
2712         struct delayed_work *pwork;
2713
2714         palive = &pkt->u.alive_frame;
2715
2716         IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
2717                        "0x%01X 0x%01X\n",
2718                        palive->is_valid, palive->ver_type,
2719                        palive->ver_subtype);
2720
2721         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
2722                 IWL_DEBUG_INFO("Initialization Alive received.\n");
2723                 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
2724                        sizeof(struct iwl_alive_resp));
2725                 pwork = &priv->init_alive_start;
2726         } else {
2727                 IWL_DEBUG_INFO("Runtime Alive received.\n");
2728                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
2729                        sizeof(struct iwl_alive_resp));
2730                 pwork = &priv->alive_start;
2731                 iwl3945_disable_events(priv);
2732         }
2733
2734         /* We delay the ALIVE response by 5ms to
2735          * give the HW RF Kill time to activate... */
2736         if (palive->is_valid == UCODE_VALID_OK)
2737                 queue_delayed_work(priv->workqueue, pwork,
2738                                    msecs_to_jiffies(5));
2739         else
2740                 IWL_WARN(priv, "uCode did not respond OK.\n");
2741 }
2742
2743 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
2744                                  struct iwl_rx_mem_buffer *rxb)
2745 {
2746         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2747
2748         IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
2749         return;
2750 }
2751
2752 static void iwl3945_rx_reply_error(struct iwl_priv *priv,
2753                                struct iwl_rx_mem_buffer *rxb)
2754 {
2755         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2756
2757         IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2758                 "seq 0x%04X ser 0x%08X\n",
2759                 le32_to_cpu(pkt->u.err_resp.error_type),
2760                 get_cmd_string(pkt->u.err_resp.cmd_id),
2761                 pkt->u.err_resp.cmd_id,
2762                 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2763                 le32_to_cpu(pkt->u.err_resp.error_info));
2764 }
2765
2766 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2767
2768 static void iwl3945_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
2769 {
2770         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2771         struct iwl3945_rxon_cmd *rxon = (void *)&priv->active39_rxon;
2772         struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
2773         IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
2774                       le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
2775         rxon->channel = csa->channel;
2776         priv->staging39_rxon.channel = csa->channel;
2777 }
2778
2779 static void iwl3945_rx_spectrum_measure_notif(struct iwl_priv *priv,
2780                                           struct iwl_rx_mem_buffer *rxb)
2781 {
2782 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2783         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2784         struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
2785
2786         if (!report->state) {
2787                 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
2788                           "Spectrum Measure Notification: Start\n");
2789                 return;
2790         }
2791
2792         memcpy(&priv->measure_report, report, sizeof(*report));
2793         priv->measurement_status |= MEASUREMENT_READY;
2794 #endif
2795 }
2796
2797 static void iwl3945_rx_pm_sleep_notif(struct iwl_priv *priv,
2798                                   struct iwl_rx_mem_buffer *rxb)
2799 {
2800 #ifdef CONFIG_IWL3945_DEBUG
2801         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2802         struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2803         IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
2804                      sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2805 #endif
2806 }
2807
2808 static void iwl3945_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2809                                              struct iwl_rx_mem_buffer *rxb)
2810 {
2811         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2812         IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
2813                         "notification for %s:\n",
2814                         le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
2815         iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
2816                            le32_to_cpu(pkt->len));
2817 }
2818
2819 static void iwl3945_bg_beacon_update(struct work_struct *work)
2820 {
2821         struct iwl_priv *priv =
2822                 container_of(work, struct iwl_priv, beacon_update);
2823         struct sk_buff *beacon;
2824
2825         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
2826         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
2827
2828         if (!beacon) {
2829                 IWL_ERR(priv, "update beacon failed\n");
2830                 return;
2831         }
2832
2833         mutex_lock(&priv->mutex);
2834         /* new beacon skb is allocated every time; dispose previous.*/
2835         if (priv->ibss_beacon)
2836                 dev_kfree_skb(priv->ibss_beacon);
2837
2838         priv->ibss_beacon = beacon;
2839         mutex_unlock(&priv->mutex);
2840
2841         iwl3945_send_beacon_cmd(priv);
2842 }
2843
2844 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
2845                                 struct iwl_rx_mem_buffer *rxb)
2846 {
2847 #ifdef CONFIG_IWL3945_DEBUG
2848         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2849         struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
2850         u8 rate = beacon->beacon_notify_hdr.rate;
2851
2852         IWL_DEBUG_RX("beacon status %x retries %d iss %d "
2853                 "tsf %d %d rate %d\n",
2854                 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
2855                 beacon->beacon_notify_hdr.failure_frame,
2856                 le32_to_cpu(beacon->ibss_mgr_status),
2857                 le32_to_cpu(beacon->high_tsf),
2858                 le32_to_cpu(beacon->low_tsf), rate);
2859 #endif
2860
2861         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
2862             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
2863                 queue_work(priv->workqueue, &priv->beacon_update);
2864 }
2865
2866 /* Service response to REPLY_SCAN_CMD (0x80) */
2867 static void iwl3945_rx_reply_scan(struct iwl_priv *priv,
2868                               struct iwl_rx_mem_buffer *rxb)
2869 {
2870 #ifdef CONFIG_IWL3945_DEBUG
2871         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2872         struct iwl_scanreq_notification *notif =
2873             (struct iwl_scanreq_notification *)pkt->u.raw;
2874
2875         IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
2876 #endif
2877 }
2878
2879 /* Service SCAN_START_NOTIFICATION (0x82) */
2880 static void iwl3945_rx_scan_start_notif(struct iwl_priv *priv,
2881                                     struct iwl_rx_mem_buffer *rxb)
2882 {
2883         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2884         struct iwl_scanstart_notification *notif =
2885             (struct iwl_scanstart_notification *)pkt->u.raw;
2886         priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
2887         IWL_DEBUG_SCAN("Scan start: "
2888                        "%d [802.11%s] "
2889                        "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
2890                        notif->channel,
2891                        notif->band ? "bg" : "a",
2892                        notif->tsf_high,
2893                        notif->tsf_low, notif->status, notif->beacon_timer);
2894 }
2895
2896 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
2897 static void iwl3945_rx_scan_results_notif(struct iwl_priv *priv,
2898                                       struct iwl_rx_mem_buffer *rxb)
2899 {
2900         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2901         struct iwl_scanresults_notification *notif =
2902             (struct iwl_scanresults_notification *)pkt->u.raw;
2903
2904         IWL_DEBUG_SCAN("Scan ch.res: "
2905                        "%d [802.11%s] "
2906                        "(TSF: 0x%08X:%08X) - %d "
2907                        "elapsed=%lu usec (%dms since last)\n",
2908                        notif->channel,
2909                        notif->band ? "bg" : "a",
2910                        le32_to_cpu(notif->tsf_high),
2911                        le32_to_cpu(notif->tsf_low),
2912                        le32_to_cpu(notif->statistics[0]),
2913                        le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
2914                        jiffies_to_msecs(elapsed_jiffies
2915                                         (priv->last_scan_jiffies, jiffies)));
2916
2917         priv->last_scan_jiffies = jiffies;
2918         priv->next_scan_jiffies = 0;
2919 }
2920
2921 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
2922 static void iwl3945_rx_scan_complete_notif(struct iwl_priv *priv,
2923                                        struct iwl_rx_mem_buffer *rxb)
2924 {
2925         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2926         struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
2927
2928         IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
2929                        scan_notif->scanned_channels,
2930                        scan_notif->tsf_low,
2931                        scan_notif->tsf_high, scan_notif->status);
2932
2933         /* The HW is no longer scanning */
2934         clear_bit(STATUS_SCAN_HW, &priv->status);
2935
2936         /* The scan completion notification came in, so kill that timer... */
2937         cancel_delayed_work(&priv->scan_check);
2938
2939         IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
2940                        (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
2941                                                         "2.4" : "5.2",
2942                        jiffies_to_msecs(elapsed_jiffies
2943                                         (priv->scan_pass_start, jiffies)));
2944
2945         /* Remove this scanned band from the list of pending
2946          * bands to scan, band G precedes A in order of scanning
2947          * as seen in iwl3945_bg_request_scan */
2948         if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
2949                 priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
2950         else if (priv->scan_bands &  BIT(IEEE80211_BAND_5GHZ))
2951                 priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
2952
2953         /* If a request to abort was given, or the scan did not succeed
2954          * then we reset the scan state machine and terminate,
2955          * re-queuing another scan if one has been requested */
2956         if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2957                 IWL_DEBUG_INFO("Aborted scan completed.\n");
2958                 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
2959         } else {
2960                 /* If there are more bands on this scan pass reschedule */
2961                 if (priv->scan_bands > 0)
2962                         goto reschedule;
2963         }
2964
2965         priv->last_scan_jiffies = jiffies;
2966         priv->next_scan_jiffies = 0;
2967         IWL_DEBUG_INFO("Setting scan to off\n");
2968
2969         clear_bit(STATUS_SCANNING, &priv->status);
2970
2971         IWL_DEBUG_INFO("Scan took %dms\n",
2972                 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
2973
2974         queue_work(priv->workqueue, &priv->scan_completed);
2975
2976         return;
2977
2978 reschedule:
2979         priv->scan_pass_start = jiffies;
2980         queue_work(priv->workqueue, &priv->request_scan);
2981 }
2982
2983 /* Handle notification from uCode that card's power state is changing
2984  * due to software, hardware, or critical temperature RFKILL */
2985 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
2986                                     struct iwl_rx_mem_buffer *rxb)
2987 {
2988         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2989         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
2990         unsigned long status = priv->status;
2991
2992         IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
2993                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
2994                           (flags & SW_CARD_DISABLED) ? "Kill" : "On");
2995
2996         iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
2997                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2998
2999         if (flags & HW_CARD_DISABLED)
3000                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3001         else
3002                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3003
3004
3005         if (flags & SW_CARD_DISABLED)
3006                 set_bit(STATUS_RF_KILL_SW, &priv->status);
3007         else
3008                 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3009
3010         iwl3945_scan_cancel(priv);
3011
3012         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3013              test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3014             (test_bit(STATUS_RF_KILL_SW, &status) !=
3015              test_bit(STATUS_RF_KILL_SW, &priv->status)))
3016                 queue_work(priv->workqueue, &priv->rf_kill);
3017         else
3018                 wake_up_interruptible(&priv->wait_command_queue);
3019 }
3020
3021 /**
3022  * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3023  *
3024  * Setup the RX handlers for each of the reply types sent from the uCode
3025  * to the host.
3026  *
3027  * This function chains into the hardware specific files for them to setup
3028  * any hardware specific handlers as well.
3029  */
3030 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
3031 {
3032         priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3033         priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3034         priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3035         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3036         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3037             iwl3945_rx_spectrum_measure_notif;
3038         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3039         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3040             iwl3945_rx_pm_debug_statistics_notif;
3041         priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3042
3043         /*
3044          * The same handler is used for both the REPLY to a discrete
3045          * statistics request from the host as well as for the periodic
3046          * statistics notifications (after received beacons) from the uCode.
3047          */
3048         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3049         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3050
3051         priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3052         priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3053         priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3054             iwl3945_rx_scan_results_notif;
3055         priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3056             iwl3945_rx_scan_complete_notif;
3057         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3058
3059         /* Set up hardware specific Rx handlers */
3060         iwl3945_hw_rx_handler_setup(priv);
3061 }
3062
3063 /**
3064  * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
3065  * When FW advances 'R' index, all entries between old and new 'R' index
3066  * need to be reclaimed.
3067  */
3068 static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv,
3069                                       int txq_id, int index)
3070 {
3071         struct iwl_tx_queue *txq = &priv->txq[txq_id];
3072         struct iwl_queue *q = &txq->q;
3073         int nfreed = 0;
3074
3075         if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
3076                 IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
3077                           "is out of range [0-%d] %d %d.\n", txq_id,
3078                           index, q->n_bd, q->write_ptr, q->read_ptr);
3079                 return;
3080         }
3081
3082         for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
3083                 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3084                 if (nfreed > 1) {
3085                         IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", index,
3086                                         q->write_ptr, q->read_ptr);
3087                         queue_work(priv->workqueue, &priv->restart);
3088                         break;
3089                 }
3090                 nfreed++;
3091         }
3092 }
3093
3094
3095 /**
3096  * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3097  * @rxb: Rx buffer to reclaim
3098  *
3099  * If an Rx buffer has an async callback associated with it the callback
3100  * will be executed.  The attached skb (if present) will only be freed
3101  * if the callback returns 1
3102  */
3103 static void iwl3945_tx_cmd_complete(struct iwl_priv *priv,
3104                                 struct iwl_rx_mem_buffer *rxb)
3105 {
3106         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3107         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3108         int txq_id = SEQ_TO_QUEUE(sequence);
3109         int index = SEQ_TO_INDEX(sequence);
3110         int huge =  !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
3111         int cmd_index;
3112         struct iwl_cmd *cmd;
3113
3114         BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3115
3116         cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3117         cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3118
3119         /* Input error checking is done when commands are added to queue. */
3120         if (cmd->meta.flags & CMD_WANT_SKB) {
3121                 cmd->meta.source->u.skb = rxb->skb;
3122                 rxb->skb = NULL;
3123         } else if (cmd->meta.u.callback &&
3124                    !cmd->meta.u.callback(priv, cmd, rxb->skb))
3125                 rxb->skb = NULL;
3126
3127         iwl3945_cmd_queue_reclaim(priv, txq_id, index);
3128
3129         if (!(cmd->meta.flags & CMD_ASYNC)) {
3130                 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3131                 wake_up_interruptible(&priv->wait_command_queue);
3132         }
3133 }
3134
3135 /************************** RX-FUNCTIONS ****************************/
3136 /*
3137  * Rx theory of operation
3138  *
3139  * The host allocates 32 DMA target addresses and passes the host address
3140  * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3141  * 0 to 31
3142  *
3143  * Rx Queue Indexes
3144  * The host/firmware share two index registers for managing the Rx buffers.
3145  *
3146  * The READ index maps to the first position that the firmware may be writing
3147  * to -- the driver can read up to (but not including) this position and get
3148  * good data.
3149  * The READ index is managed by the firmware once the card is enabled.
3150  *
3151  * The WRITE index maps to the last position the driver has read from -- the
3152  * position preceding WRITE is the last slot the firmware can place a packet.
3153  *
3154  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3155  * WRITE = READ.
3156  *
3157  * During initialization, the host sets up the READ queue position to the first
3158  * INDEX position, and WRITE to the last (READ - 1 wrapped)
3159  *
3160  * When the firmware places a packet in a buffer, it will advance the READ index
3161  * and fire the RX interrupt.  The driver can then query the READ index and
3162  * process as many packets as possible, moving the WRITE index forward as it
3163  * resets the Rx queue buffers with new memory.
3164  *
3165  * The management in the driver is as follows:
3166  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
3167  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3168  *   to replenish the iwl->rxq->rx_free.
3169  * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3170  *   iwl->rxq is replenished and the READ INDEX is updated (updating the
3171  *   'processed' and 'read' driver indexes as well)
3172  * + A received packet is processed and handed to the kernel network stack,
3173  *   detached from the iwl->rxq.  The driver 'processed' index is updated.
3174  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3175  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3176  *   INDEX is not incremented and iwl->status(RX_STALLED) is set.  If there
3177  *   were enough free buffers and RX_STALLED is set it is cleared.
3178  *
3179  *
3180  * Driver sequence:
3181  *
3182  * iwl3945_rx_replenish()     Replenishes rx_free list from rx_used, and calls
3183  *                            iwl3945_rx_queue_restock
3184  * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
3185  *                            queue, updates firmware pointers, and updates
3186  *                            the WRITE index.  If insufficient rx_free buffers
3187  *                            are available, schedules iwl3945_rx_replenish
3188  *
3189  * -- enable interrupts --
3190  * ISR - iwl3945_rx()         Detach iwl_rx_mem_buffers from pool up to the
3191  *                            READ INDEX, detaching the SKB from the pool.
3192  *                            Moves the packet buffer from queue to rx_used.
3193  *                            Calls iwl3945_rx_queue_restock to refill any empty
3194  *                            slots.
3195  * ...
3196  *
3197  */
3198
3199 /**
3200  * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
3201  */
3202 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
3203                                           dma_addr_t dma_addr)
3204 {
3205         return cpu_to_le32((u32)dma_addr);
3206 }
3207
3208 /**
3209  * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
3210  *
3211  * If there are slots in the RX queue that need to be restocked,
3212  * and we have free pre-allocated buffers, fill the ranks as much
3213  * as we can, pulling from rx_free.
3214  *
3215  * This moves the 'write' index forward to catch up with 'processed', and
3216  * also updates the memory address in the firmware to reference the new
3217  * target buffer.
3218  */
3219 static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
3220 {
3221         struct iwl_rx_queue *rxq = &priv->rxq;
3222         struct list_head *element;
3223         struct iwl_rx_mem_buffer *rxb;
3224         unsigned long flags;
3225         int write, rc;
3226
3227         spin_lock_irqsave(&rxq->lock, flags);
3228         write = rxq->write & ~0x7;
3229         while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
3230                 /* Get next free Rx buffer, remove from free list */
3231                 element = rxq->rx_free.next;
3232                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
3233                 list_del(element);
3234
3235                 /* Point to Rx buffer via next RBD in circular buffer */
3236                 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
3237                 rxq->queue[rxq->write] = rxb;
3238                 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3239                 rxq->free_count--;
3240         }
3241         spin_unlock_irqrestore(&rxq->lock, flags);
3242         /* If the pre-allocated buffer pool is dropping low, schedule to
3243          * refill it */
3244         if (rxq->free_count <= RX_LOW_WATERMARK)
3245                 queue_work(priv->workqueue, &priv->rx_replenish);
3246
3247
3248         /* If we've added more space for the firmware to place data, tell it.
3249          * Increment device's write pointer in multiples of 8. */
3250         if ((write != (rxq->write & ~0x7))
3251             || (abs(rxq->write - rxq->read) > 7)) {
3252                 spin_lock_irqsave(&rxq->lock, flags);
3253                 rxq->need_update = 1;
3254                 spin_unlock_irqrestore(&rxq->lock, flags);
3255                 rc = iwl_rx_queue_update_write_ptr(priv, rxq);
3256                 if (rc)
3257                         return rc;
3258         }
3259
3260         return 0;
3261 }
3262
3263 /**
3264  * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
3265  *
3266  * When moving to rx_free an SKB is allocated for the slot.
3267  *
3268  * Also restock the Rx queue via iwl3945_rx_queue_restock.
3269  * This is called as a scheduled work item (except for during initialization)
3270  */
3271 static void iwl3945_rx_allocate(struct iwl_priv *priv)
3272 {
3273         struct iwl_rx_queue *rxq = &priv->rxq;
3274         struct list_head *element;
3275         struct iwl_rx_mem_buffer *rxb;
3276         unsigned long flags;
3277         spin_lock_irqsave(&rxq->lock, flags);
3278         while (!list_empty(&rxq->rx_used)) {
3279                 element = rxq->rx_used.next;
3280                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
3281
3282                 /* Alloc a new receive buffer */
3283                 rxb->skb =
3284                     alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
3285                 if (!rxb->skb) {
3286                         if (net_ratelimit())
3287                                 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
3288                         /* We don't reschedule replenish work here -- we will
3289                          * call the restock method and if it still needs
3290                          * more buffers it will schedule replenish */
3291                         break;
3292                 }
3293
3294                 /* If radiotap head is required, reserve some headroom here.
3295                  * The physical head count is a variable rx_stats->phy_count.
3296                  * We reserve 4 bytes here. Plus these extra bytes, the
3297                  * headroom of the physical head should be enough for the
3298                  * radiotap head that iwl3945 supported. See iwl3945_rt.
3299                  */
3300                 skb_reserve(rxb->skb, 4);
3301
3302                 priv->alloc_rxb_skb++;
3303                 list_del(element);
3304
3305                 /* Get physical address of RB/SKB */
3306                 rxb->real_dma_addr =
3307                     pci_map_single(priv->pci_dev, rxb->skb->data,
3308                                    IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3309                 list_add_tail(&rxb->list, &rxq->rx_free);
3310                 rxq->free_count++;
3311         }
3312         spin_unlock_irqrestore(&rxq->lock, flags);
3313 }
3314
3315 /*
3316  * this should be called while priv->lock is locked
3317  */
3318 static void __iwl3945_rx_replenish(void *data)
3319 {
3320         struct iwl_priv *priv = data;
3321
3322         iwl3945_rx_allocate(priv);
3323         iwl3945_rx_queue_restock(priv);
3324 }
3325
3326
3327 void iwl3945_rx_replenish(void *data)
3328 {
3329         struct iwl_priv *priv = data;
3330         unsigned long flags;
3331
3332         iwl3945_rx_allocate(priv);
3333
3334         spin_lock_irqsave(&priv->lock, flags);
3335         iwl3945_rx_queue_restock(priv);
3336         spin_unlock_irqrestore(&priv->lock, flags);
3337 }
3338
3339 /* Convert linear signal-to-noise ratio into dB */
3340 static u8 ratio2dB[100] = {
3341 /*       0   1   2   3   4   5   6   7   8   9 */
3342          0,  0,  6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3343         20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3344         26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3345         29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3346         32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3347         34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3348         36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3349         37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3350         38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3351         39, 39, 39, 39, 39, 40, 40, 40, 40, 40  /* 90 - 99 */
3352 };
3353
3354 /* Calculates a relative dB value from a ratio of linear
3355  *   (i.e. not dB) signal levels.
3356  * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
3357 int iwl3945_calc_db_from_ratio(int sig_ratio)
3358 {
3359         /* 1000:1 or higher just report as 60 dB */
3360         if (sig_ratio >= 1000)
3361                 return 60;
3362
3363         /* 100:1 or higher, divide by 10 and use table,
3364          *   add 20 dB to make up for divide by 10 */
3365         if (sig_ratio >= 100)
3366                 return 20 + (int)ratio2dB[sig_ratio/10];
3367
3368         /* We shouldn't see this */
3369         if (sig_ratio < 1)
3370                 return 0;
3371
3372         /* Use table for ratios 1:1 - 99:1 */
3373         return (int)ratio2dB[sig_ratio];
3374 }
3375
3376 #define PERFECT_RSSI (-20) /* dBm */
3377 #define WORST_RSSI (-95)   /* dBm */
3378 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3379
3380 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
3381  * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3382  *   about formulas used below. */
3383 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
3384 {
3385         int sig_qual;
3386         int degradation = PERFECT_RSSI - rssi_dbm;
3387
3388         /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3389          * as indicator; formula is (signal dbm - noise dbm).
3390          * SNR at or above 40 is a great signal (100%).
3391          * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3392          * Weakest usable signal is usually 10 - 15 dB SNR. */
3393         if (noise_dbm) {
3394                 if (rssi_dbm - noise_dbm >= 40)
3395                         return 100;
3396                 else if (rssi_dbm < noise_dbm)
3397                         return 0;
3398                 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3399
3400         /* Else use just the signal level.
3401          * This formula is a least squares fit of data points collected and
3402          *   compared with a reference system that had a percentage (%) display
3403          *   for signal quality. */
3404         } else
3405                 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3406                             (15 * RSSI_RANGE + 62 * degradation)) /
3407                            (RSSI_RANGE * RSSI_RANGE);
3408
3409         if (sig_qual > 100)
3410                 sig_qual = 100;
3411         else if (sig_qual < 1)
3412                 sig_qual = 0;
3413
3414         return sig_qual;
3415 }
3416
3417 /**
3418  * iwl3945_rx_handle - Main entry function for receiving responses from uCode
3419  *
3420  * Uses the priv->rx_handlers callback function array to invoke
3421  * the appropriate handlers, including command responses,
3422  * frame-received notifications, and other notifications.
3423  */
3424 static void iwl3945_rx_handle(struct iwl_priv *priv)
3425 {
3426         struct iwl_rx_mem_buffer *rxb;
3427         struct iwl_rx_packet *pkt;
3428         struct iwl_rx_queue *rxq = &priv->rxq;
3429         u32 r, i;
3430         int reclaim;
3431         unsigned long flags;
3432         u8 fill_rx = 0;
3433         u32 count = 8;
3434
3435         /* uCode's read index (stored in shared DRAM) indicates the last Rx
3436          * buffer that the driver may process (last buffer filled by ucode). */
3437         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
3438         i = rxq->read;
3439
3440         if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3441                 fill_rx = 1;
3442         /* Rx interrupt, but nothing sent from uCode */
3443         if (i == r)
3444                 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3445
3446         while (i != r) {
3447                 rxb = rxq->queue[i];
3448
3449                 /* If an RXB doesn't have a Rx queue slot associated with it,
3450                  * then a bug has been introduced in the queue refilling
3451                  * routines -- catch it here */
3452                 BUG_ON(rxb == NULL);
3453
3454                 rxq->queue[i] = NULL;
3455
3456                 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
3457                                             IWL_RX_BUF_SIZE,
3458                                             PCI_DMA_FROMDEVICE);
3459                 pkt = (struct iwl_rx_packet *)rxb->skb->data;
3460
3461                 /* Reclaim a command buffer only if this packet is a response
3462                  *   to a (driver-originated) command.
3463                  * If the packet (e.g. Rx frame) originated from uCode,
3464                  *   there is no command buffer to reclaim.
3465                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
3466                  *   but apparently a few don't get set; catch them here. */
3467                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
3468                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
3469                         (pkt->hdr.cmd != REPLY_TX);
3470
3471                 /* Based on type of command response or notification,
3472                  *   handle those that need handling via function in
3473                  *   rx_handlers table.  See iwl3945_setup_rx_handlers() */
3474                 if (priv->rx_handlers[pkt->hdr.cmd]) {
3475                         IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3476                                 "r = %d, i = %d, %s, 0x%02x\n", r, i,
3477                                 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
3478                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
3479                 } else {
3480                         /* No handling needed */
3481                         IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3482                                 "r %d i %d No handler needed for %s, 0x%02x\n",
3483                                 r, i, get_cmd_string(pkt->hdr.cmd),
3484                                 pkt->hdr.cmd);
3485                 }
3486
3487                 if (reclaim) {
3488                         /* Invoke any callbacks, transfer the skb to caller, and
3489                          * fire off the (possibly) blocking iwl3945_send_cmd()
3490                          * as we reclaim the driver command queue */
3491                         if (rxb && rxb->skb)
3492                                 iwl3945_tx_cmd_complete(priv, rxb);
3493                         else
3494                                 IWL_WARN(priv, "Claim null rxb?\n");
3495                 }
3496
3497                 /* For now we just don't re-use anything.  We can tweak this
3498                  * later to try and re-use notification packets and SKBs that
3499                  * fail to Rx correctly */
3500                 if (rxb->skb != NULL) {
3501                         priv->alloc_rxb_skb--;
3502                         dev_kfree_skb_any(rxb->skb);
3503                         rxb->skb = NULL;
3504                 }
3505
3506                 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
3507                                  IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3508                 spin_lock_irqsave(&rxq->lock, flags);
3509                 list_add_tail(&rxb->list, &priv->rxq.rx_used);
3510                 spin_unlock_irqrestore(&rxq->lock, flags);
3511                 i = (i + 1) & RX_QUEUE_MASK;
3512                 /* If there are a lot of unused frames,
3513                  * restock the Rx queue so ucode won't assert. */
3514                 if (fill_rx) {
3515                         count++;
3516                         if (count >= 8) {
3517                                 priv->rxq.read = i;
3518                                 __iwl3945_rx_replenish(priv);
3519                                 count = 0;
3520                         }
3521                 }
3522         }
3523
3524         /* Backtrack one entry */
3525         priv->rxq.read = i;
3526         iwl3945_rx_queue_restock(priv);
3527 }
3528
3529 /**
3530  * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
3531  */
3532 static int iwl3945_tx_queue_update_write_ptr(struct iwl_priv *priv,
3533                                   struct iwl_tx_queue *txq)
3534 {
3535         u32 reg = 0;
3536         int rc = 0;
3537         int txq_id = txq->q.id;
3538
3539         if (txq->need_update == 0)
3540                 return rc;
3541
3542         /* if we're trying to save power */
3543         if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3544                 /* wake up nic if it's powered down ...
3545                  * uCode will wake up, and interrupt us again, so next
3546                  * time we'll skip this part. */
3547                 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
3548
3549                 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3550                         IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
3551                         iwl_set_bit(priv, CSR_GP_CNTRL,
3552                                     CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3553                         return rc;
3554                 }
3555
3556                 /* restore this queue's parameters in nic hardware. */
3557                 rc = iwl_grab_nic_access(priv);
3558                 if (rc)
3559                         return rc;
3560                 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
3561                                      txq->q.write_ptr | (txq_id << 8));
3562                 iwl_release_nic_access(priv);
3563
3564         /* else not in power-save mode, uCode will never sleep when we're
3565          * trying to tx (during RFKILL, we're not trying to tx). */
3566         } else
3567                 iwl_write32(priv, HBUS_TARG_WRPTR,
3568                             txq->q.write_ptr | (txq_id << 8));
3569
3570         txq->need_update = 0;
3571
3572         return rc;
3573 }
3574
3575 #ifdef CONFIG_IWL3945_DEBUG
3576 static void iwl3945_print_rx_config_cmd(struct iwl_priv *priv,
3577                                         struct iwl3945_rxon_cmd *rxon)
3578 {
3579         IWL_DEBUG_RADIO("RX CONFIG:\n");
3580         iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
3581         IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
3582         IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
3583         IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
3584                         le32_to_cpu(rxon->filter_flags));
3585         IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
3586         IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
3587                         rxon->ofdm_basic_rates);
3588         IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
3589         IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
3590         IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
3591         IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
3592 }
3593 #endif
3594
3595 static void iwl3945_enable_interrupts(struct iwl_priv *priv)
3596 {
3597         IWL_DEBUG_ISR("Enabling interrupts\n");
3598         set_bit(STATUS_INT_ENABLED, &priv->status);
3599         iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
3600 }
3601
3602
3603 /* call this function to flush any scheduled tasklet */
3604 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
3605 {
3606         /* wait to make sure we flush pending tasklet*/
3607         synchronize_irq(priv->pci_dev->irq);
3608         tasklet_kill(&priv->irq_tasklet);
3609 }
3610
3611
3612 static inline void iwl3945_disable_interrupts(struct iwl_priv *priv)
3613 {
3614         clear_bit(STATUS_INT_ENABLED, &priv->status);
3615
3616         /* disable interrupts from uCode/NIC to host */
3617         iwl_write32(priv, CSR_INT_MASK, 0x00000000);
3618
3619         /* acknowledge/clear/reset any interrupts still pending
3620          * from uCode or flow handler (Rx/Tx DMA) */
3621         iwl_write32(priv, CSR_INT, 0xffffffff);
3622         iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
3623         IWL_DEBUG_ISR("Disabled interrupts\n");
3624 }
3625
3626 static const char *desc_lookup(int i)
3627 {
3628         switch (i) {
3629         case 1:
3630                 return "FAIL";
3631         case 2:
3632                 return "BAD_PARAM";
3633         case 3:
3634                 return "BAD_CHECKSUM";
3635         case 4:
3636                 return "NMI_INTERRUPT";
3637         case 5:
3638                 return "SYSASSERT";
3639         case 6:
3640                 return "FATAL_ERROR";
3641         }
3642
3643         return "UNKNOWN";
3644 }
3645
3646 #define ERROR_START_OFFSET  (1 * sizeof(u32))
3647 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
3648
3649 static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
3650 {
3651         u32 i;
3652         u32 desc, time, count, base, data1;
3653         u32 blink1, blink2, ilink1, ilink2;
3654         int rc;
3655
3656         base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
3657
3658         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
3659                 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
3660                 return;
3661         }
3662
3663         rc = iwl_grab_nic_access(priv);
3664         if (rc) {
3665                 IWL_WARN(priv, "Can not read from adapter at this time.\n");
3666                 return;
3667         }
3668
3669         count = iwl_read_targ_mem(priv, base);
3670
3671         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
3672                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
3673                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
3674                         priv->status, count);
3675         }
3676
3677         IWL_ERR(priv, "Desc       Time       asrtPC  blink2 "
3678                   "ilink1  nmiPC   Line\n");
3679         for (i = ERROR_START_OFFSET;
3680              i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
3681              i += ERROR_ELEM_SIZE) {
3682                 desc = iwl_read_targ_mem(priv, base + i);
3683                 time =
3684                     iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
3685                 blink1 =
3686                     iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
3687                 blink2 =
3688                     iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
3689                 ilink1 =
3690                     iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
3691                 ilink2 =
3692                     iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
3693                 data1 =
3694                     iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
3695
3696                 IWL_ERR(priv,
3697                         "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
3698                         desc_lookup(desc), desc, time, blink1, blink2,
3699                         ilink1, ilink2, data1);
3700         }
3701
3702         iwl_release_nic_access(priv);
3703
3704 }
3705
3706 #define EVENT_START_OFFSET  (6 * sizeof(u32))
3707
3708 /**
3709  * iwl3945_print_event_log - Dump error event log to syslog
3710  *
3711  * NOTE: Must be called with iwl_grab_nic_access() already obtained!
3712  */
3713 static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
3714                                 u32 num_events, u32 mode)
3715 {
3716         u32 i;
3717         u32 base;       /* SRAM byte address of event log header */
3718         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
3719         u32 ptr;        /* SRAM byte address of log data */
3720         u32 ev, time, data; /* event log data */
3721
3722         if (num_events == 0)
3723                 return;
3724
3725         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
3726
3727         if (mode == 0)
3728                 event_size = 2 * sizeof(u32);
3729         else
3730                 event_size = 3 * sizeof(u32);
3731
3732         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
3733
3734         /* "time" is actually "data" for mode 0 (no timestamp).
3735          * place event id # at far right for easier visual parsing. */
3736         for (i = 0; i < num_events; i++) {
3737                 ev = iwl_read_targ_mem(priv, ptr);
3738                 ptr += sizeof(u32);
3739                 time = iwl_read_targ_mem(priv, ptr);
3740                 ptr += sizeof(u32);
3741                 if (mode == 0) {
3742                         /* data, ev */
3743                         IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
3744                 } else {
3745                         data = iwl_read_targ_mem(priv, ptr);
3746                         ptr += sizeof(u32);
3747                         IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
3748                 }
3749         }
3750 }
3751
3752 static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
3753 {
3754         int rc;
3755         u32 base;       /* SRAM byte address of event log header */
3756         u32 capacity;   /* event log capacity in # entries */
3757         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
3758         u32 num_wraps;  /* # times uCode wrapped to top of log */
3759         u32 next_entry; /* index of next entry to be written by uCode */
3760         u32 size;       /* # entries that we'll print */
3761
3762         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
3763         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
3764                 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
3765                 return;
3766         }
3767
3768         rc = iwl_grab_nic_access(priv);
3769         if (rc) {
3770                 IWL_WARN(priv, "Can not read from adapter at this time.\n");
3771                 return;
3772         }
3773
3774         /* event log header */
3775         capacity = iwl_read_targ_mem(priv, base);
3776         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
3777         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
3778         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
3779
3780         size = num_wraps ? capacity : next_entry;
3781
3782         /* bail out if nothing in log */
3783         if (size == 0) {
3784                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
3785                 iwl_release_nic_access(priv);
3786                 return;
3787         }
3788
3789         IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
3790                   size, num_wraps);
3791
3792         /* if uCode has wrapped back to top of log, start at the oldest entry,
3793          * i.e the next one that uCode would fill. */
3794         if (num_wraps)
3795                 iwl3945_print_event_log(priv, next_entry,
3796                                     capacity - next_entry, mode);
3797
3798         /* (then/else) start at top of log */
3799         iwl3945_print_event_log(priv, 0, next_entry, mode);
3800
3801         iwl_release_nic_access(priv);
3802 }
3803
3804 /**
3805  * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
3806  */
3807 static void iwl3945_irq_handle_error(struct iwl_priv *priv)
3808 {
3809         /* Set the FW error flag -- cleared on iwl3945_down */
3810         set_bit(STATUS_FW_ERROR, &priv->status);
3811
3812         /* Cancel currently queued command. */
3813         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3814
3815 #ifdef CONFIG_IWL3945_DEBUG
3816         if (priv->debug_level & IWL_DL_FW_ERRORS) {
3817                 iwl3945_dump_nic_error_log(priv);
3818                 iwl3945_dump_nic_event_log(priv);
3819                 iwl3945_print_rx_config_cmd(priv, &priv->staging39_rxon);
3820         }
3821 #endif
3822
3823         wake_up_interruptible(&priv->wait_command_queue);
3824
3825         /* Keep the restart process from trying to send host
3826          * commands by clearing the INIT status bit */
3827         clear_bit(STATUS_READY, &priv->status);
3828
3829         if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3830                 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
3831                           "Restarting adapter due to uCode error.\n");
3832
3833                 if (iwl3945_is_associated(priv)) {
3834                         memcpy(&priv->recovery39_rxon, &priv->active39_rxon,
3835                                sizeof(priv->recovery39_rxon));
3836                         priv->error_recovering = 1;
3837                 }
3838                 queue_work(priv->workqueue, &priv->restart);
3839         }
3840 }
3841
3842 static void iwl3945_error_recovery(struct iwl_priv *priv)
3843 {
3844         unsigned long flags;
3845
3846         memcpy(&priv->staging39_rxon, &priv->recovery39_rxon,
3847                sizeof(priv->staging39_rxon));
3848         priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3849         iwl3945_commit_rxon(priv);
3850
3851         iwl3945_add_station(priv, priv->bssid, 1, 0);
3852
3853         spin_lock_irqsave(&priv->lock, flags);
3854         priv->assoc_id = le16_to_cpu(priv->staging39_rxon.assoc_id);
3855         priv->error_recovering = 0;
3856         spin_unlock_irqrestore(&priv->lock, flags);
3857 }
3858
3859 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
3860 {
3861         u32 inta, handled = 0;
3862         u32 inta_fh;
3863         unsigned long flags;
3864 #ifdef CONFIG_IWL3945_DEBUG
3865         u32 inta_mask;
3866 #endif
3867
3868         spin_lock_irqsave(&priv->lock, flags);
3869
3870         /* Ack/clear/reset pending uCode interrupts.
3871          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
3872          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
3873         inta = iwl_read32(priv, CSR_INT);
3874         iwl_write32(priv, CSR_INT, inta);
3875
3876         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
3877          * Any new interrupts that happen after this, either while we're
3878          * in this tasklet, or later, will show up in next ISR/tasklet. */
3879         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
3880         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
3881
3882 #ifdef CONFIG_IWL3945_DEBUG
3883         if (priv->debug_level & IWL_DL_ISR) {
3884                 /* just for debug */
3885                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
3886                 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
3887                               inta, inta_mask, inta_fh);
3888         }
3889 #endif
3890
3891         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
3892          * atomic, make sure that inta covers all the interrupts that
3893          * we've discovered, even if FH interrupt came in just after
3894          * reading CSR_INT. */
3895         if (inta_fh & CSR39_FH_INT_RX_MASK)
3896                 inta |= CSR_INT_BIT_FH_RX;
3897         if (inta_fh & CSR39_FH_INT_TX_MASK)
3898                 inta |= CSR_INT_BIT_FH_TX;
3899
3900         /* Now service all interrupt bits discovered above. */
3901         if (inta & CSR_INT_BIT_HW_ERR) {
3902                 IWL_ERR(priv, "Microcode HW error detected.  Restarting.\n");
3903
3904                 /* Tell the device to stop sending interrupts */
3905                 iwl3945_disable_interrupts(priv);
3906
3907                 iwl3945_irq_handle_error(priv);
3908
3909                 handled |= CSR_INT_BIT_HW_ERR;
3910
3911                 spin_unlock_irqrestore(&priv->lock, flags);
3912
3913                 return;
3914         }
3915
3916 #ifdef CONFIG_IWL3945_DEBUG
3917         if (priv->debug_level & (IWL_DL_ISR)) {
3918                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
3919                 if (inta & CSR_INT_BIT_SCD)
3920                         IWL_DEBUG_ISR("Scheduler finished to transmit "
3921                                       "the frame/frames.\n");
3922
3923                 /* Alive notification via Rx interrupt will do the real work */
3924                 if (inta & CSR_INT_BIT_ALIVE)
3925                         IWL_DEBUG_ISR("Alive interrupt\n");
3926         }
3927 #endif
3928         /* Safely ignore these bits for debug checks below */
3929         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
3930
3931         /* Error detected by uCode */
3932         if (inta & CSR_INT_BIT_SW_ERR) {
3933                 IWL_ERR(priv, "Microcode SW error detected. "
3934                         "Restarting 0x%X.\n", inta);
3935                 iwl3945_irq_handle_error(priv);
3936                 handled |= CSR_INT_BIT_SW_ERR;
3937         }
3938
3939         /* uCode wakes up after power-down sleep */
3940         if (inta & CSR_INT_BIT_WAKEUP) {
3941                 IWL_DEBUG_ISR("Wakeup interrupt\n");
3942                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
3943                 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
3944                 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
3945                 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
3946                 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
3947                 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
3948                 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
3949
3950                 handled |= CSR_INT_BIT_WAKEUP;
3951         }
3952
3953         /* All uCode command responses, including Tx command responses,
3954          * Rx "responses" (frame-received notification), and other
3955          * notifications from uCode come through here*/
3956         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
3957                 iwl3945_rx_handle(priv);
3958                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
3959         }
3960
3961         if (inta & CSR_INT_BIT_FH_TX) {
3962                 IWL_DEBUG_ISR("Tx interrupt\n");
3963
3964                 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
3965                 if (!iwl_grab_nic_access(priv)) {
3966                         iwl_write_direct32(priv, FH39_TCSR_CREDIT
3967                                              (FH39_SRVC_CHNL), 0x0);
3968                         iwl_release_nic_access(priv);
3969                 }
3970                 handled |= CSR_INT_BIT_FH_TX;
3971         }
3972
3973         if (inta & ~handled)
3974                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
3975
3976         if (inta & ~CSR_INI_SET_MASK) {
3977                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
3978                          inta & ~CSR_INI_SET_MASK);
3979                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
3980         }
3981
3982         /* Re-enable all interrupts */
3983         /* only Re-enable if disabled by irq */
3984         if (test_bit(STATUS_INT_ENABLED, &priv->status))
3985                 iwl3945_enable_interrupts(priv);
3986
3987 #ifdef CONFIG_IWL3945_DEBUG
3988         if (priv->debug_level & (IWL_DL_ISR)) {
3989                 inta = iwl_read32(priv, CSR_INT);
3990                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
3991                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
3992                 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
3993                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
3994         }
3995 #endif
3996         spin_unlock_irqrestore(&priv->lock, flags);
3997 }
3998
3999 static irqreturn_t iwl3945_isr(int irq, void *data)
4000 {
4001         struct iwl_priv *priv = data;
4002         u32 inta, inta_mask;
4003         u32 inta_fh;
4004         if (!priv)
4005                 return IRQ_NONE;
4006
4007         spin_lock(&priv->lock);
4008
4009         /* Disable (but don't clear!) interrupts here to avoid
4010          *    back-to-back ISRs and sporadic interrupts from our NIC.
4011          * If we have something to service, the tasklet will re-enable ints.
4012          * If we *don't* have something, we'll re-enable before leaving here. */
4013         inta_mask = iwl_read32(priv, CSR_INT_MASK);  /* just for debug */
4014         iwl_write32(priv, CSR_INT_MASK, 0x00000000);
4015
4016         /* Discover which interrupts are active/pending */
4017         inta = iwl_read32(priv, CSR_INT);
4018         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4019
4020         /* Ignore interrupt if there's nothing in NIC to service.
4021          * This may be due to IRQ shared with another device,
4022          * or due to sporadic interrupts thrown from our NIC. */
4023         if (!inta && !inta_fh) {
4024                 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4025                 goto none;
4026         }
4027
4028         if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4029                 /* Hardware disappeared */
4030                 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
4031                 goto unplugged;
4032         }
4033
4034         IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4035                       inta, inta_mask, inta_fh);
4036
4037         inta &= ~CSR_INT_BIT_SCD;
4038
4039         /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
4040         if (likely(inta || inta_fh))
4041                 tasklet_schedule(&priv->irq_tasklet);
4042 unplugged:
4043         spin_unlock(&priv->lock);
4044
4045         return IRQ_HANDLED;
4046
4047  none:
4048         /* re-enable interrupts here since we don't have anything to service. */
4049         /* only Re-enable if disabled by irq */
4050         if (test_bit(STATUS_INT_ENABLED, &priv->status))
4051                 iwl3945_enable_interrupts(priv);
4052         spin_unlock(&priv->lock);
4053         return IRQ_NONE;
4054 }
4055
4056 /************************** EEPROM BANDS ****************************
4057  *
4058  * The iwl3945_eeprom_band definitions below provide the mapping from the
4059  * EEPROM contents to the specific channel number supported for each
4060  * band.
4061  *
4062  * For example, iwl3945_priv->eeprom39.band_3_channels[4] from the band_3
4063  * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4064  * The specific geography and calibration information for that channel
4065  * is contained in the eeprom map itself.
4066  *
4067  * During init, we copy the eeprom information and channel map
4068  * information into priv->channel_info_24/52 and priv->channel_map_24/52
4069  *
4070  * channel_map_24/52 provides the index in the channel_info array for a
4071  * given channel.  We have to have two separate maps as there is channel
4072  * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4073  * band_2
4074  *
4075  * A value of 0xff stored in the channel_map indicates that the channel
4076  * is not supported by the hardware at all.
4077  *
4078  * A value of 0xfe in the channel_map indicates that the channel is not
4079  * valid for Tx with the current hardware.  This means that
4080  * while the system can tune and receive on a given channel, it may not
4081  * be able to associate or transmit any frames on that
4082  * channel.  There is no corresponding channel information for that
4083  * entry.
4084  *
4085  *********************************************************************/
4086
4087 /* 2.4 GHz */
4088 static const u8 iwl3945_eeprom_band_1[14] = {
4089         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4090 };
4091
4092 /* 5.2 GHz bands */
4093 static const u8 iwl3945_eeprom_band_2[] = {     /* 4915-5080MHz */
4094         183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4095 };
4096
4097 static const u8 iwl3945_eeprom_band_3[] = {     /* 5170-5320MHz */
4098         34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4099 };
4100
4101 static const u8 iwl3945_eeprom_band_4[] = {     /* 5500-5700MHz */
4102         100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4103 };
4104
4105 static const u8 iwl3945_eeprom_band_5[] = {     /* 5725-5825MHz */
4106         145, 149, 153, 157, 161, 165
4107 };
4108
4109 static void iwl3945_init_band_reference(const struct iwl_priv *priv, int band,
4110                                     int *eeprom_ch_count,
4111                                     const struct iwl_eeprom_channel
4112                                     **eeprom_ch_info,
4113                                     const u8 **eeprom_ch_index)
4114 {
4115         switch (band) {
4116         case 1:         /* 2.4GHz band */
4117                 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
4118                 *eeprom_ch_info = priv->eeprom39.band_1_channels;
4119                 *eeprom_ch_index = iwl3945_eeprom_band_1;
4120                 break;
4121         case 2:         /* 4.9GHz band */
4122                 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
4123                 *eeprom_ch_info = priv->eeprom39.band_2_channels;
4124                 *eeprom_ch_index = iwl3945_eeprom_band_2;
4125                 break;
4126         case 3:         /* 5.2GHz band */
4127                 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
4128                 *eeprom_ch_info = priv->eeprom39.band_3_channels;
4129                 *eeprom_ch_index = iwl3945_eeprom_band_3;
4130                 break;
4131         case 4:         /* 5.5GHz band */
4132                 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
4133                 *eeprom_ch_info = priv->eeprom39.band_4_channels;
4134                 *eeprom_ch_index = iwl3945_eeprom_band_4;
4135                 break;
4136         case 5:         /* 5.7GHz band */
4137                 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
4138                 *eeprom_ch_info = priv->eeprom39.band_5_channels;
4139                 *eeprom_ch_index = iwl3945_eeprom_band_5;
4140                 break;
4141         default:
4142                 BUG();
4143                 return;
4144         }
4145 }
4146
4147 /**
4148  * iwl3945_get_channel_info - Find driver's private channel info
4149  *
4150  * Based on band and channel number.
4151  */
4152 const struct iwl_channel_info *
4153 iwl3945_get_channel_info(const struct iwl_priv *priv,
4154                          enum ieee80211_band band, u16 channel)
4155 {
4156         int i;
4157
4158         switch (band) {
4159         case IEEE80211_BAND_5GHZ:
4160                 for (i = 14; i < priv->channel_count; i++) {
4161                         if (priv->channel_info[i].channel == channel)
4162                                 return &priv->channel_info[i];
4163                 }
4164                 break;
4165
4166         case IEEE80211_BAND_2GHZ:
4167                 if (channel >= 1 && channel <= 14)
4168                         return &priv->channel_info[channel - 1];
4169                 break;
4170         case IEEE80211_NUM_BANDS:
4171                 WARN_ON(1);
4172         }
4173
4174         return NULL;
4175 }
4176
4177 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4178                             ? # x " " : "")
4179
4180 /**
4181  * iwl3945_init_channel_map - Set up driver's info for all possible channels
4182  */
4183 static int iwl3945_init_channel_map(struct iwl_priv *priv)
4184 {
4185         int eeprom_ch_count = 0;
4186         const u8 *eeprom_ch_index = NULL;
4187         const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
4188         int band, ch;
4189         struct iwl_channel_info *ch_info;
4190
4191         if (priv->channel_count) {
4192                 IWL_DEBUG_INFO("Channel map already initialized.\n");
4193                 return 0;
4194         }
4195
4196         if (priv->eeprom39.version < 0x2f) {
4197                 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
4198                             priv->eeprom39.version);
4199                 return -EINVAL;
4200         }
4201
4202         IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4203
4204         priv->channel_count =
4205             ARRAY_SIZE(iwl3945_eeprom_band_1) +
4206             ARRAY_SIZE(iwl3945_eeprom_band_2) +
4207             ARRAY_SIZE(iwl3945_eeprom_band_3) +
4208             ARRAY_SIZE(iwl3945_eeprom_band_4) +
4209             ARRAY_SIZE(iwl3945_eeprom_band_5);
4210
4211         IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4212
4213         priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
4214                                      priv->channel_count, GFP_KERNEL);
4215         if (!priv->channel_info) {
4216                 IWL_ERR(priv, "Could not allocate channel_info\n");
4217                 priv->channel_count = 0;
4218                 return -ENOMEM;
4219         }
4220
4221         ch_info = priv->channel_info;
4222
4223         /* Loop through the 5 EEPROM bands adding them in order to the
4224          * channel map we maintain (that contains additional information than
4225          * what just in the EEPROM) */
4226         for (band = 1; band <= 5; band++) {
4227
4228                 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
4229                                         &eeprom_ch_info, &eeprom_ch_index);
4230
4231                 /* Loop through each band adding each of the channels */
4232                 for (ch = 0; ch < eeprom_ch_count; ch++) {
4233                         ch_info->channel = eeprom_ch_index[ch];
4234                         ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4235                             IEEE80211_BAND_5GHZ;
4236
4237                         /* permanently store EEPROM's channel regulatory flags
4238                          *   and max power in channel info database. */
4239                         ch_info->eeprom = eeprom_ch_info[ch];
4240
4241                         /* Copy the run-time flags so they are there even on
4242                          * invalid channels */
4243                         ch_info->flags = eeprom_ch_info[ch].flags;
4244
4245                         if (!(is_channel_valid(ch_info))) {
4246                                 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4247                                                "No traffic\n",
4248                                                ch_info->channel,
4249                                                ch_info->flags,
4250                                                is_channel_a_band(ch_info) ?
4251                                                "5.2" : "2.4");
4252                                 ch_info++;
4253                                 continue;
4254                         }
4255
4256                         /* Initialize regulatory-based run-time data */
4257                         ch_info->max_power_avg = ch_info->curr_txpow =
4258                             eeprom_ch_info[ch].max_power_avg;
4259                         ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4260                         ch_info->min_power = 0;
4261
4262                         IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
4263                                        " %ddBm): Ad-Hoc %ssupported\n",
4264                                        ch_info->channel,
4265                                        is_channel_a_band(ch_info) ?
4266                                        "5.2" : "2.4",
4267                                        CHECK_AND_PRINT(VALID),
4268                                        CHECK_AND_PRINT(IBSS),
4269                                        CHECK_AND_PRINT(ACTIVE),
4270                                        CHECK_AND_PRINT(RADAR),
4271                                        CHECK_AND_PRINT(WIDE),
4272                                        CHECK_AND_PRINT(DFS),
4273                                        eeprom_ch_info[ch].flags,
4274                                        eeprom_ch_info[ch].max_power_avg,
4275                                        ((eeprom_ch_info[ch].
4276                                          flags & EEPROM_CHANNEL_IBSS)
4277                                         && !(eeprom_ch_info[ch].
4278                                              flags & EEPROM_CHANNEL_RADAR))
4279                                        ? "" : "not ");
4280
4281                         /* Set the user_txpower_limit to the highest power
4282                          * supported by any channel */
4283                         if (eeprom_ch_info[ch].max_power_avg >
4284                             priv->user_txpower_limit)
4285                                 priv->user_txpower_limit =
4286                                     eeprom_ch_info[ch].max_power_avg;
4287
4288                         ch_info++;
4289                 }
4290         }
4291
4292         /* Set up txpower settings in driver for all channels */
4293         if (iwl3945_txpower_set_from_eeprom(priv))
4294                 return -EIO;
4295
4296         return 0;
4297 }
4298
4299 /*
4300  * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4301  */
4302 static void iwl3945_free_channel_map(struct iwl_priv *priv)
4303 {
4304         kfree(priv->channel_info);
4305         priv->channel_count = 0;
4306 }
4307
4308 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4309  * sending probe req.  This should be set long enough to hear probe responses
4310  * from more than one AP.  */
4311 #define IWL_ACTIVE_DWELL_TIME_24    (30)        /* all times in msec */
4312 #define IWL_ACTIVE_DWELL_TIME_52    (20)
4313
4314 #define IWL_ACTIVE_DWELL_FACTOR_24GHZ (3)
4315 #define IWL_ACTIVE_DWELL_FACTOR_52GHZ (2)
4316
4317 /* For faster active scanning, scan will move to the next channel if fewer than
4318  * PLCP_QUIET_THRESH packets are heard on this channel within
4319  * ACTIVE_QUIET_TIME after sending probe request.  This shortens the dwell
4320  * time if it's a quiet channel (nothing responded to our probe, and there's
4321  * no other traffic).
4322  * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4323 #define IWL_PLCP_QUIET_THRESH       __constant_cpu_to_le16(1)   /* packets */
4324 #define IWL_ACTIVE_QUIET_TIME       __constant_cpu_to_le16(10)  /* msec */
4325
4326 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4327  * Must be set longer than active dwell time.
4328  * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4329 #define IWL_PASSIVE_DWELL_TIME_24   (20)        /* all times in msec */
4330 #define IWL_PASSIVE_DWELL_TIME_52   (10)
4331 #define IWL_PASSIVE_DWELL_BASE      (100)
4332 #define IWL_CHANNEL_TUNE_TIME       5
4333
4334 #define IWL_SCAN_PROBE_MASK(n)   (BIT(n) | (BIT(n) - BIT(1)))
4335
4336 static inline u16 iwl3945_get_active_dwell_time(struct iwl_priv *priv,
4337                                                 enum ieee80211_band band,
4338                                                 u8 n_probes)
4339 {
4340         if (band == IEEE80211_BAND_5GHZ)
4341                 return IWL_ACTIVE_DWELL_TIME_52 +
4342                         IWL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
4343         else
4344                 return IWL_ACTIVE_DWELL_TIME_24 +
4345                         IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
4346 }
4347
4348 static u16 iwl3945_get_passive_dwell_time(struct iwl_priv *priv,
4349                                           enum ieee80211_band band)
4350 {
4351         u16 passive = (band == IEEE80211_BAND_2GHZ) ?
4352             IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4353             IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4354
4355         if (iwl3945_is_associated(priv)) {
4356                 /* If we're associated, we clamp the maximum passive
4357                  * dwell time to be 98% of the beacon interval (minus
4358                  * 2 * channel tune time) */
4359                 passive = priv->beacon_int;
4360                 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4361                         passive = IWL_PASSIVE_DWELL_BASE;
4362                 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4363         }
4364
4365         return passive;
4366 }
4367
4368 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
4369                                          enum ieee80211_band band,
4370                                      u8 is_active, u8 n_probes,
4371                                      struct iwl3945_scan_channel *scan_ch)
4372 {
4373         const struct ieee80211_channel *channels = NULL;
4374         const struct ieee80211_supported_band *sband;
4375         const struct iwl_channel_info *ch_info;
4376         u16 passive_dwell = 0;
4377         u16 active_dwell = 0;
4378         int added, i;
4379
4380         sband = iwl_get_hw_mode(priv, band);
4381         if (!sband)
4382                 return 0;
4383
4384         channels = sband->channels;
4385
4386         active_dwell = iwl3945_get_active_dwell_time(priv, band, n_probes);
4387         passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
4388
4389         if (passive_dwell <= active_dwell)
4390                 passive_dwell = active_dwell + 1;
4391
4392         for (i = 0, added = 0; i < sband->n_channels; i++) {
4393                 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4394                         continue;
4395
4396                 scan_ch->channel = channels[i].hw_value;
4397
4398                 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
4399                 if (!is_channel_valid(ch_info)) {
4400                         IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
4401                                        scan_ch->channel);
4402                         continue;
4403                 }
4404
4405                 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4406                 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4407                 /* If passive , set up for auto-switch
4408                  *  and use long active_dwell time.
4409                  */
4410                 if (!is_active || is_channel_passive(ch_info) ||
4411                     (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
4412                         scan_ch->type = 0;      /* passive */
4413                         if (IWL_UCODE_API(priv->ucode_ver) == 1)
4414                                 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
4415                 } else {
4416                         scan_ch->type = 1;      /* active */
4417                 }
4418
4419                 /* Set direct probe bits. These may be used both for active
4420                  * scan channels (probes gets sent right away),
4421                  * or for passive channels (probes get se sent only after
4422                  * hearing clear Rx packet).*/
4423                 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
4424                         if (n_probes)
4425                                 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4426                 } else {
4427                         /* uCode v1 does not allow setting direct probe bits on
4428                          * passive channel. */
4429                         if ((scan_ch->type & 1) && n_probes)
4430                                 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4431                 }
4432
4433                 /* Set txpower levels to defaults */
4434                 scan_ch->tpc.dsp_atten = 110;
4435                 /* scan_pwr_info->tpc.dsp_atten; */
4436
4437                 /*scan_pwr_info->tpc.tx_gain; */
4438                 if (band == IEEE80211_BAND_5GHZ)
4439                         scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4440                 else {
4441                         scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4442                         /* NOTE: if we were doing 6Mb OFDM for scans we'd use
4443                          * power level:
4444                          * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
4445                          */
4446                 }
4447
4448                 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4449                                scan_ch->channel,
4450                                (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4451                                (scan_ch->type & 1) ?
4452                                active_dwell : passive_dwell);
4453
4454                 scan_ch++;
4455                 added++;
4456         }
4457
4458         IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4459         return added;
4460 }
4461
4462 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
4463                               struct ieee80211_rate *rates)
4464 {
4465         int i;
4466
4467         for (i = 0; i < IWL_RATE_COUNT; i++) {
4468                 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
4469                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4470                 rates[i].hw_value_short = i;
4471                 rates[i].flags = 0;
4472                 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
4473                         /*
4474                          * If CCK != 1M then set short preamble rate flag.
4475                          */
4476                         rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
4477                                 0 : IEEE80211_RATE_SHORT_PREAMBLE;
4478                 }
4479         }
4480 }
4481
4482 /**
4483  * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
4484  */
4485 static int iwl3945_init_geos(struct iwl_priv *priv)
4486 {
4487         struct iwl_channel_info *ch;
4488         struct ieee80211_supported_band *sband;
4489         struct ieee80211_channel *channels;
4490         struct ieee80211_channel *geo_ch;
4491         struct ieee80211_rate *rates;
4492         int i = 0;
4493
4494         if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
4495             priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
4496                 IWL_DEBUG_INFO("Geography modes already initialized.\n");
4497                 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4498                 return 0;
4499         }
4500
4501         channels = kzalloc(sizeof(struct ieee80211_channel) *
4502                            priv->channel_count, GFP_KERNEL);
4503         if (!channels)
4504                 return -ENOMEM;
4505
4506         rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
4507                         GFP_KERNEL);
4508         if (!rates) {
4509                 kfree(channels);
4510                 return -ENOMEM;
4511         }
4512
4513         /* 5.2GHz channels start after the 2.4GHz channels */
4514         sband = &priv->bands[IEEE80211_BAND_5GHZ];
4515         sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
4516         /* just OFDM */
4517         sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
4518         sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
4519
4520         sband = &priv->bands[IEEE80211_BAND_2GHZ];
4521         sband->channels = channels;
4522         /* OFDM & CCK */
4523         sband->bitrates = rates;
4524         sband->n_bitrates = IWL_RATE_COUNT;
4525
4526         priv->ieee_channels = channels;
4527         priv->ieee_rates = rates;
4528
4529         iwl3945_init_hw_rates(priv, rates);
4530
4531         for (i = 0;  i < priv->channel_count; i++) {
4532                 ch = &priv->channel_info[i];
4533
4534                 /* FIXME: might be removed if scan is OK*/
4535                 if (!is_channel_valid(ch))
4536                         continue;
4537
4538                 if (is_channel_a_band(ch))
4539                         sband =  &priv->bands[IEEE80211_BAND_5GHZ];
4540                 else
4541                         sband =  &priv->bands[IEEE80211_BAND_2GHZ];
4542
4543                 geo_ch = &sband->channels[sband->n_channels++];
4544
4545                 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
4546                 geo_ch->max_power = ch->max_power_avg;
4547                 geo_ch->max_antenna_gain = 0xff;
4548                 geo_ch->hw_value = ch->channel;
4549
4550                 if (is_channel_valid(ch)) {
4551                         if (!(ch->flags & EEPROM_CHANNEL_IBSS))
4552                                 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
4553
4554                         if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
4555                                 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
4556
4557                         if (ch->flags & EEPROM_CHANNEL_RADAR)
4558                                 geo_ch->flags |= IEEE80211_CHAN_RADAR;
4559
4560                         if (ch->max_power_avg > priv->max_channel_txpower_limit)
4561                                 priv->max_channel_txpower_limit =
4562                                     ch->max_power_avg;
4563                 } else {
4564                         geo_ch->flags |= IEEE80211_CHAN_DISABLED;
4565                 }
4566
4567                 /* Save flags for reg domain usage */
4568                 geo_ch->orig_flags = geo_ch->flags;
4569
4570                 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
4571                                 ch->channel, geo_ch->center_freq,
4572                                 is_channel_a_band(ch) ?  "5.2" : "2.4",
4573                                 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
4574                                 "restricted" : "valid",
4575                                  geo_ch->flags);
4576         }
4577
4578         if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
4579              priv->cfg->sku & IWL_SKU_A) {
4580                 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
4581                         "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
4582                         priv->pci_dev->device, priv->pci_dev->subsystem_device);
4583                  priv->cfg->sku &= ~IWL_SKU_A;
4584         }
4585
4586         IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
4587                priv->bands[IEEE80211_BAND_2GHZ].n_channels,
4588                priv->bands[IEEE80211_BAND_5GHZ].n_channels);
4589
4590         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4591                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4592                         &priv->bands[IEEE80211_BAND_2GHZ];
4593         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
4594                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
4595                         &priv->bands[IEEE80211_BAND_5GHZ];
4596
4597         set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4598
4599         return 0;
4600 }
4601
4602 /*
4603  * iwl3945_free_geos - undo allocations in iwl3945_init_geos
4604  */
4605 static void iwl3945_free_geos(struct iwl_priv *priv)
4606 {
4607         kfree(priv->ieee_channels);
4608         kfree(priv->ieee_rates);
4609         clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
4610 }
4611
4612 /******************************************************************************
4613  *
4614  * uCode download functions
4615  *
4616  ******************************************************************************/
4617
4618 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
4619 {
4620         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
4621         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
4622         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
4623         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
4624         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
4625         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
4626 }
4627
4628 /**
4629  * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
4630  *     looking at all data.
4631  */
4632 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
4633 {
4634         u32 val;
4635         u32 save_len = len;
4636         int rc = 0;
4637         u32 errcnt;
4638
4639         IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4640
4641         rc = iwl_grab_nic_access(priv);
4642         if (rc)
4643                 return rc;
4644
4645         iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
4646                                IWL39_RTC_INST_LOWER_BOUND);
4647
4648         errcnt = 0;
4649         for (; len > 0; len -= sizeof(u32), image++) {
4650                 /* read data comes through single port, auto-incr addr */
4651                 /* NOTE: Use the debugless read so we don't flood kernel log
4652                  * if IWL_DL_IO is set */
4653                 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
4654                 if (val != le32_to_cpu(*image)) {
4655                         IWL_ERR(priv, "uCode INST section is invalid at "
4656                                   "offset 0x%x, is 0x%x, s/b 0x%x\n",
4657                                   save_len - len, val, le32_to_cpu(*image));
4658                         rc = -EIO;
4659                         errcnt++;
4660                         if (errcnt >= 20)
4661                                 break;
4662                 }
4663         }
4664
4665         iwl_release_nic_access(priv);
4666
4667         if (!errcnt)
4668                 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
4669
4670         return rc;
4671 }
4672
4673
4674 /**
4675  * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
4676  *   using sample data 100 bytes apart.  If these sample points are good,
4677  *   it's a pretty good bet that everything between them is good, too.
4678  */
4679 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
4680 {
4681         u32 val;
4682         int rc = 0;
4683         u32 errcnt = 0;
4684         u32 i;
4685
4686         IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4687
4688         rc = iwl_grab_nic_access(priv);
4689         if (rc)
4690                 return rc;
4691
4692         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
4693                 /* read data comes through single port, auto-incr addr */
4694                 /* NOTE: Use the debugless read so we don't flood kernel log
4695                  * if IWL_DL_IO is set */
4696                 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
4697                         i + IWL39_RTC_INST_LOWER_BOUND);
4698                 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
4699                 if (val != le32_to_cpu(*image)) {
4700 #if 0 /* Enable this if you want to see details */
4701                         IWL_ERR(priv, "uCode INST section is invalid at "
4702                                   "offset 0x%x, is 0x%x, s/b 0x%x\n",
4703                                   i, val, *image);
4704 #endif
4705                         rc = -EIO;
4706                         errcnt++;
4707                         if (errcnt >= 3)
4708                                 break;
4709                 }
4710         }
4711
4712         iwl_release_nic_access(priv);
4713
4714         return rc;
4715 }
4716
4717
4718 /**
4719  * iwl3945_verify_ucode - determine which instruction image is in SRAM,
4720  *    and verify its contents
4721  */
4722 static int iwl3945_verify_ucode(struct iwl_priv *priv)
4723 {
4724         __le32 *image;
4725         u32 len;
4726         int rc = 0;
4727
4728         /* Try bootstrap */
4729         image = (__le32 *)priv->ucode_boot.v_addr;
4730         len = priv->ucode_boot.len;
4731         rc = iwl3945_verify_inst_sparse(priv, image, len);
4732         if (rc == 0) {
4733                 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
4734                 return 0;
4735         }
4736
4737         /* Try initialize */
4738         image = (__le32 *)priv->ucode_init.v_addr;
4739         len = priv->ucode_init.len;
4740         rc = iwl3945_verify_inst_sparse(priv, image, len);
4741         if (rc == 0) {
4742                 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
4743                 return 0;
4744         }
4745
4746         /* Try runtime/protocol */
4747         image = (__le32 *)priv->ucode_code.v_addr;
4748         len = priv->ucode_code.len;
4749         rc = iwl3945_verify_inst_sparse(priv, image, len);
4750         if (rc == 0) {
4751                 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
4752                 return 0;
4753         }
4754
4755         IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
4756
4757         /* Since nothing seems to match, show first several data entries in
4758          * instruction SRAM, so maybe visual inspection will give a clue.
4759          * Selection of bootstrap image (vs. other images) is arbitrary. */
4760         image = (__le32 *)priv->ucode_boot.v_addr;
4761         len = priv->ucode_boot.len;
4762         rc = iwl3945_verify_inst_full(priv, image, len);
4763
4764         return rc;
4765 }
4766
4767 static void iwl3945_nic_start(struct iwl_priv *priv)
4768 {
4769         /* Remove all resets to allow NIC to operate */
4770         iwl_write32(priv, CSR_RESET, 0);
4771 }
4772
4773 /**
4774  * iwl3945_read_ucode - Read uCode images from disk file.
4775  *
4776  * Copy into buffers for card to fetch via bus-mastering
4777  */
4778 static int iwl3945_read_ucode(struct iwl_priv *priv)
4779 {
4780         struct iwl_ucode *ucode;
4781         int ret = -EINVAL, index;
4782         const struct firmware *ucode_raw;
4783         /* firmware file name contains uCode/driver compatibility version */
4784         const char *name_pre = priv->cfg->fw_name_pre;
4785         const unsigned int api_max = priv->cfg->ucode_api_max;
4786         const unsigned int api_min = priv->cfg->ucode_api_min;
4787         char buf[25];
4788         u8 *src;
4789         size_t len;
4790         u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
4791
4792         /* Ask kernel firmware_class module to get the boot firmware off disk.
4793          * request_firmware() is synchronous, file is in memory on return. */
4794         for (index = api_max; index >= api_min; index--) {
4795                 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
4796                 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
4797                 if (ret < 0) {
4798                         IWL_ERR(priv, "%s firmware file req failed: %d\n",
4799                                   buf, ret);
4800                         if (ret == -ENOENT)
4801                                 continue;
4802                         else
4803                                 goto error;
4804                 } else {
4805                         if (index < api_max)
4806                                 IWL_ERR(priv, "Loaded firmware %s, "
4807                                         "which is deprecated. "
4808                                         " Please use API v%u instead.\n",
4809                                           buf, api_max);
4810                         IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
4811                                        buf, ucode_raw->size);
4812                         break;
4813                 }
4814         }
4815
4816         if (ret < 0)
4817                 goto error;
4818
4819         /* Make sure that we got at least our header! */
4820         if (ucode_raw->size < sizeof(*ucode)) {
4821                 IWL_ERR(priv, "File size way too small!\n");
4822                 ret = -EINVAL;
4823                 goto err_release;
4824         }
4825
4826         /* Data from ucode file:  header followed by uCode images */
4827         ucode = (void *)ucode_raw->data;
4828
4829         priv->ucode_ver = le32_to_cpu(ucode->ver);
4830         api_ver = IWL_UCODE_API(priv->ucode_ver);
4831         inst_size = le32_to_cpu(ucode->inst_size);
4832         data_size = le32_to_cpu(ucode->data_size);
4833         init_size = le32_to_cpu(ucode->init_size);
4834         init_data_size = le32_to_cpu(ucode->init_data_size);
4835         boot_size = le32_to_cpu(ucode->boot_size);
4836
4837         /* api_ver should match the api version forming part of the
4838          * firmware filename ... but we don't check for that and only rely
4839          * on the API version read from firware header from here on forward */
4840
4841         if (api_ver < api_min || api_ver > api_max) {
4842                 IWL_ERR(priv, "Driver unable to support your firmware API. "
4843                           "Driver supports v%u, firmware is v%u.\n",
4844                           api_max, api_ver);
4845                 priv->ucode_ver = 0;
4846                 ret = -EINVAL;
4847                 goto err_release;
4848         }
4849         if (api_ver != api_max)
4850                 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
4851                           "got %u. New firmware can be obtained "
4852                           "from http://www.intellinuxwireless.org.\n",
4853                           api_max, api_ver);
4854
4855         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
4856                 IWL_UCODE_MAJOR(priv->ucode_ver),
4857                 IWL_UCODE_MINOR(priv->ucode_ver),
4858                 IWL_UCODE_API(priv->ucode_ver),
4859                 IWL_UCODE_SERIAL(priv->ucode_ver));
4860
4861         IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
4862                        priv->ucode_ver);
4863         IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
4864         IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
4865         IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
4866         IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
4867         IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
4868
4869
4870         /* Verify size of file vs. image size info in file's header */
4871         if (ucode_raw->size < sizeof(*ucode) +
4872                 inst_size + data_size + init_size +
4873                 init_data_size + boot_size) {
4874
4875                 IWL_DEBUG_INFO("uCode file size %d too small\n",
4876                                (int)ucode_raw->size);
4877                 ret = -EINVAL;
4878                 goto err_release;
4879         }
4880
4881         /* Verify that uCode images will fit in card's SRAM */
4882         if (inst_size > IWL39_MAX_INST_SIZE) {
4883                 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
4884                                inst_size);
4885                 ret = -EINVAL;
4886                 goto err_release;
4887         }
4888
4889         if (data_size > IWL39_MAX_DATA_SIZE) {
4890                 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
4891                                data_size);
4892                 ret = -EINVAL;
4893                 goto err_release;
4894         }
4895         if (init_size > IWL39_MAX_INST_SIZE) {
4896                 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
4897                                 init_size);
4898                 ret = -EINVAL;
4899                 goto err_release;
4900         }
4901         if (init_data_size > IWL39_MAX_DATA_SIZE) {
4902                 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
4903                                 init_data_size);
4904                 ret = -EINVAL;
4905                 goto err_release;
4906         }
4907         if (boot_size > IWL39_MAX_BSM_SIZE) {
4908                 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
4909                                 boot_size);
4910                 ret = -EINVAL;
4911                 goto err_release;
4912         }
4913
4914         /* Allocate ucode buffers for card's bus-master loading ... */
4915
4916         /* Runtime instructions and 2 copies of data:
4917          * 1) unmodified from disk
4918          * 2) backup cache for save/restore during power-downs */
4919         priv->ucode_code.len = inst_size;
4920         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
4921
4922         priv->ucode_data.len = data_size;
4923         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
4924
4925         priv->ucode_data_backup.len = data_size;
4926         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
4927
4928         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
4929             !priv->ucode_data_backup.v_addr)
4930                 goto err_pci_alloc;
4931
4932         /* Initialization instructions and data */
4933         if (init_size && init_data_size) {
4934                 priv->ucode_init.len = init_size;
4935                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
4936
4937                 priv->ucode_init_data.len = init_data_size;
4938                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
4939
4940                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
4941                         goto err_pci_alloc;
4942         }
4943
4944         /* Bootstrap (instructions only, no data) */
4945         if (boot_size) {
4946                 priv->ucode_boot.len = boot_size;
4947                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
4948
4949                 if (!priv->ucode_boot.v_addr)
4950                         goto err_pci_alloc;
4951         }
4952
4953         /* Copy images into buffers for card's bus-master reads ... */
4954
4955         /* Runtime instructions (first block of data in file) */
4956         src = &ucode->data[0];
4957         len = priv->ucode_code.len;
4958         IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
4959         memcpy(priv->ucode_code.v_addr, src, len);
4960         IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
4961                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
4962
4963         /* Runtime data (2nd block)
4964          * NOTE:  Copy into backup buffer will be done in iwl3945_up()  */
4965         src = &ucode->data[inst_size];
4966         len = priv->ucode_data.len;
4967         IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
4968         memcpy(priv->ucode_data.v_addr, src, len);
4969         memcpy(priv->ucode_data_backup.v_addr, src, len);
4970
4971         /* Initialization instructions (3rd block) */
4972         if (init_size) {
4973                 src = &ucode->data[inst_size + data_size];
4974                 len = priv->ucode_init.len;
4975                 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
4976                                len);
4977                 memcpy(priv->ucode_init.v_addr, src, len);
4978         }
4979
4980         /* Initialization data (4th block) */
4981         if (init_data_size) {
4982                 src = &ucode->data[inst_size + data_size + init_size];
4983                 len = priv->ucode_init_data.len;
4984                 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
4985                                (int)len);
4986                 memcpy(priv->ucode_init_data.v_addr, src, len);
4987         }
4988
4989         /* Bootstrap instructions (5th block) */
4990         src = &ucode->data[inst_size + data_size + init_size + init_data_size];
4991         len = priv->ucode_boot.len;
4992         IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
4993                        (int)len);
4994         memcpy(priv->ucode_boot.v_addr, src, len);
4995
4996         /* We have our copies now, allow OS release its copies */
4997         release_firmware(ucode_raw);
4998         return 0;
4999
5000  err_pci_alloc:
5001         IWL_ERR(priv, "failed to allocate pci memory\n");
5002         ret = -ENOMEM;
5003         iwl3945_dealloc_ucode_pci(priv);
5004
5005  err_release:
5006         release_firmware(ucode_raw);
5007
5008  error:
5009         return ret;
5010 }
5011
5012
5013 /**
5014  * iwl3945_set_ucode_ptrs - Set uCode address location
5015  *
5016  * Tell initialization uCode where to find runtime uCode.
5017  *
5018  * BSM registers initially contain pointers to initialization uCode.
5019  * We need to replace them to load runtime uCode inst and data,
5020  * and to save runtime data when powering down.
5021  */
5022 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
5023 {
5024         dma_addr_t pinst;
5025         dma_addr_t pdata;
5026         int rc = 0;
5027         unsigned long flags;
5028
5029         /* bits 31:0 for 3945 */
5030         pinst = priv->ucode_code.p_addr;
5031         pdata = priv->ucode_data_backup.p_addr;
5032
5033         spin_lock_irqsave(&priv->lock, flags);
5034         rc = iwl_grab_nic_access(priv);
5035         if (rc) {
5036                 spin_unlock_irqrestore(&priv->lock, flags);
5037                 return rc;
5038         }
5039
5040         /* Tell bootstrap uCode where to find image to load */
5041         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5042         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5043         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
5044                                  priv->ucode_data.len);
5045
5046         /* Inst byte count must be last to set up, bit 31 signals uCode
5047          *   that all new ptr/size info is in place */
5048         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
5049                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5050
5051         iwl_release_nic_access(priv);
5052
5053         spin_unlock_irqrestore(&priv->lock, flags);
5054
5055         IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5056
5057         return rc;
5058 }
5059
5060 /**
5061  * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
5062  *
5063  * Called after REPLY_ALIVE notification received from "initialize" uCode.
5064  *
5065  * Tell "initialize" uCode to go ahead and load the runtime uCode.
5066  */
5067 static void iwl3945_init_alive_start(struct iwl_priv *priv)
5068 {
5069         /* Check alive response for "valid" sign from uCode */
5070         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5071                 /* We had an error bringing up the hardware, so take it
5072                  * all the way back down so we can try again */
5073                 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5074                 goto restart;
5075         }
5076
5077         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5078          * This is a paranoid check, because we would not have gotten the
5079          * "initialize" alive if code weren't properly loaded.  */
5080         if (iwl3945_verify_ucode(priv)) {
5081                 /* Runtime instruction load was bad;
5082                  * take it all the way back down so we can try again */
5083                 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5084                 goto restart;
5085         }
5086
5087         /* Send pointers to protocol/runtime uCode image ... init code will
5088          * load and launch runtime uCode, which will send us another "Alive"
5089          * notification. */
5090         IWL_DEBUG_INFO("Initialization Alive received.\n");
5091         if (iwl3945_set_ucode_ptrs(priv)) {
5092                 /* Runtime instruction load won't happen;
5093                  * take it all the way back down so we can try again */
5094                 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5095                 goto restart;
5096         }
5097         return;
5098
5099  restart:
5100         queue_work(priv->workqueue, &priv->restart);
5101 }
5102
5103
5104 /* temporary */
5105 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
5106                                      struct sk_buff *skb);
5107
5108 /**
5109  * iwl3945_alive_start - called after REPLY_ALIVE notification received
5110  *                   from protocol/runtime uCode (initialization uCode's
5111  *                   Alive gets handled by iwl3945_init_alive_start()).
5112  */
5113 static void iwl3945_alive_start(struct iwl_priv *priv)
5114 {
5115         int rc = 0;
5116         int thermal_spin = 0;
5117         u32 rfkill;
5118
5119         IWL_DEBUG_INFO("Runtime Alive received.\n");
5120
5121         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5122                 /* We had an error bringing up the hardware, so take it
5123                  * all the way back down so we can try again */
5124                 IWL_DEBUG_INFO("Alive failed.\n");
5125                 goto restart;
5126         }
5127
5128         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5129          * This is a paranoid check, because we would not have gotten the
5130          * "runtime" alive if code weren't properly loaded.  */
5131         if (iwl3945_verify_ucode(priv)) {
5132                 /* Runtime instruction load was bad;
5133                  * take it all the way back down so we can try again */
5134                 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5135                 goto restart;
5136         }
5137
5138         iwl3945_clear_stations_table(priv);
5139
5140         rc = iwl_grab_nic_access(priv);
5141         if (rc) {
5142                 IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
5143                 return;
5144         }
5145
5146         rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
5147         IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
5148         iwl_release_nic_access(priv);
5149
5150         if (rfkill & 0x1) {
5151                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5152                 /* if RFKILL is not on, then wait for thermal
5153                  * sensor in adapter to kick in */
5154                 while (iwl3945_hw_get_temperature(priv) == 0) {
5155                         thermal_spin++;
5156                         udelay(10);
5157                 }
5158
5159                 if (thermal_spin)
5160                         IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5161                                        thermal_spin * 10);
5162         } else
5163                 set_bit(STATUS_RF_KILL_HW, &priv->status);
5164
5165         /* After the ALIVE response, we can send commands to 3945 uCode */
5166         set_bit(STATUS_ALIVE, &priv->status);
5167
5168         /* Clear out the uCode error bit if it is set */
5169         clear_bit(STATUS_FW_ERROR, &priv->status);
5170
5171         if (iwl_is_rfkill(priv))
5172                 return;
5173
5174         ieee80211_wake_queues(priv->hw);
5175
5176         priv->active_rate = priv->rates_mask;
5177         priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5178
5179         iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
5180
5181         if (iwl3945_is_associated(priv)) {
5182                 struct iwl3945_rxon_cmd *active_rxon =
5183                                 (struct iwl3945_rxon_cmd *)(&priv->active39_rxon);
5184
5185                 memcpy(&priv->staging39_rxon, &priv->active39_rxon,
5186                        sizeof(priv->staging39_rxon));
5187                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5188         } else {
5189                 /* Initialize our rx_config data */
5190                 iwl3945_connection_init_rx_config(priv, priv->iw_mode);
5191                 memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5192         }
5193
5194         /* Configure Bluetooth device coexistence support */
5195         iwl3945_send_bt_config(priv);
5196
5197         /* Configure the adapter for unassociated operation */
5198         iwl3945_commit_rxon(priv);
5199
5200         iwl3945_reg_txpower_periodic(priv);
5201
5202         iwl3945_led_register(priv);
5203
5204         IWL_DEBUG_INFO("ALIVE processing complete.\n");
5205         set_bit(STATUS_READY, &priv->status);
5206         wake_up_interruptible(&priv->wait_command_queue);
5207
5208         if (priv->error_recovering)
5209                 iwl3945_error_recovery(priv);
5210
5211         /* reassociate for ADHOC mode */
5212         if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
5213                 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
5214                                                                 priv->vif);
5215                 if (beacon)
5216                         iwl3945_mac_beacon_update(priv->hw, beacon);
5217         }
5218
5219         return;
5220
5221  restart:
5222         queue_work(priv->workqueue, &priv->restart);
5223 }
5224
5225 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
5226
5227 static void __iwl3945_down(struct iwl_priv *priv)
5228 {
5229         unsigned long flags;
5230         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5231         struct ieee80211_conf *conf = NULL;
5232
5233         IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5234
5235         conf = ieee80211_get_hw_conf(priv->hw);
5236
5237         if (!exit_pending)
5238                 set_bit(STATUS_EXIT_PENDING, &priv->status);
5239
5240         iwl3945_led_unregister(priv);
5241         iwl3945_clear_stations_table(priv);
5242
5243         /* Unblock any waiting calls */
5244         wake_up_interruptible_all(&priv->wait_command_queue);
5245
5246         /* Wipe out the EXIT_PENDING status bit if we are not actually
5247          * exiting the module */
5248         if (!exit_pending)
5249                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5250
5251         /* stop and reset the on-board processor */
5252         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
5253
5254         /* tell the device to stop sending interrupts */
5255         spin_lock_irqsave(&priv->lock, flags);
5256         iwl3945_disable_interrupts(priv);
5257         spin_unlock_irqrestore(&priv->lock, flags);
5258         iwl_synchronize_irq(priv);
5259
5260         if (priv->mac80211_registered)
5261                 ieee80211_stop_queues(priv->hw);
5262
5263         /* If we have not previously called iwl3945_init() then
5264          * clear all bits but the RF Kill and SUSPEND bits and return */
5265         if (!iwl_is_init(priv)) {
5266                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5267                                         STATUS_RF_KILL_HW |
5268                                test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5269                                         STATUS_RF_KILL_SW |
5270                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5271                                         STATUS_GEO_CONFIGURED |
5272                                test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5273                                         STATUS_IN_SUSPEND |
5274                                 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5275                                         STATUS_EXIT_PENDING;
5276                 goto exit;
5277         }
5278
5279         /* ...otherwise clear out all the status bits but the RF Kill and
5280          * SUSPEND bits and continue taking the NIC down. */
5281         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5282                                 STATUS_RF_KILL_HW |
5283                         test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5284                                 STATUS_RF_KILL_SW |
5285                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5286                                 STATUS_GEO_CONFIGURED |
5287                         test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5288                                 STATUS_IN_SUSPEND |
5289                         test_bit(STATUS_FW_ERROR, &priv->status) <<
5290                                 STATUS_FW_ERROR |
5291                         test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5292                                 STATUS_EXIT_PENDING;
5293
5294         spin_lock_irqsave(&priv->lock, flags);
5295         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5296         spin_unlock_irqrestore(&priv->lock, flags);
5297
5298         iwl3945_hw_txq_ctx_stop(priv);
5299         iwl3945_hw_rxq_stop(priv);
5300
5301         spin_lock_irqsave(&priv->lock, flags);
5302         if (!iwl_grab_nic_access(priv)) {
5303                 iwl_write_prph(priv, APMG_CLK_DIS_REG,
5304                                          APMG_CLK_VAL_DMA_CLK_RQT);
5305                 iwl_release_nic_access(priv);
5306         }
5307         spin_unlock_irqrestore(&priv->lock, flags);
5308
5309         udelay(5);
5310
5311         priv->cfg->ops->lib->apm_ops.reset(priv);
5312  exit:
5313         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
5314
5315         if (priv->ibss_beacon)
5316                 dev_kfree_skb(priv->ibss_beacon);
5317         priv->ibss_beacon = NULL;
5318
5319         /* clear out any free frames */
5320         iwl3945_clear_free_frames(priv);
5321 }
5322
5323 static void iwl3945_down(struct iwl_priv *priv)
5324 {
5325         mutex_lock(&priv->mutex);
5326         __iwl3945_down(priv);
5327         mutex_unlock(&priv->mutex);
5328
5329         iwl3945_cancel_deferred_work(priv);
5330 }
5331
5332 #define MAX_HW_RESTARTS 5
5333
5334 static int __iwl3945_up(struct iwl_priv *priv)
5335 {
5336         int rc, i;
5337
5338         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5339                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
5340                 return -EIO;
5341         }
5342
5343         if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5344                 IWL_WARN(priv, "Radio disabled by SW RF kill (module "
5345                             "parameter)\n");
5346                 return -ENODEV;
5347         }
5348
5349         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5350                 IWL_ERR(priv, "ucode not available for device bring up\n");
5351                 return -EIO;
5352         }
5353
5354         /* If platform's RF_KILL switch is NOT set to KILL */
5355         if (iwl_read32(priv, CSR_GP_CNTRL) &
5356                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5357                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5358         else {
5359                 set_bit(STATUS_RF_KILL_HW, &priv->status);
5360                 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
5361                         IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
5362                         return -ENODEV;
5363                 }
5364         }
5365
5366         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5367
5368         rc = iwl3945_hw_nic_init(priv);
5369         if (rc) {
5370                 IWL_ERR(priv, "Unable to int nic\n");
5371                 return rc;
5372         }
5373
5374         /* make sure rfkill handshake bits are cleared */
5375         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5376         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
5377                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5378
5379         /* clear (again), then enable host interrupts */
5380         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5381         iwl3945_enable_interrupts(priv);
5382
5383         /* really make sure rfkill handshake bits are cleared */
5384         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5385         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5386
5387         /* Copy original ucode data image from disk into backup cache.
5388          * This will be used to initialize the on-board processor's
5389          * data SRAM for a clean start when the runtime program first loads. */
5390         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5391                priv->ucode_data.len);
5392
5393         /* We return success when we resume from suspend and rf_kill is on. */
5394         if (test_bit(STATUS_RF_KILL_HW, &priv->status))
5395                 return 0;
5396
5397         for (i = 0; i < MAX_HW_RESTARTS; i++) {
5398
5399                 iwl3945_clear_stations_table(priv);
5400
5401                 /* load bootstrap state machine,
5402                  * load bootstrap program into processor's memory,
5403                  * prepare to load the "initialize" uCode */
5404                 priv->cfg->ops->lib->load_ucode(priv);
5405
5406                 if (rc) {
5407                         IWL_ERR(priv,
5408                                 "Unable to set up bootstrap uCode: %d\n", rc);
5409                         continue;
5410                 }
5411
5412                 /* start card; "initialize" will load runtime ucode */
5413                 iwl3945_nic_start(priv);
5414
5415                 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5416
5417                 return 0;
5418         }
5419
5420         set_bit(STATUS_EXIT_PENDING, &priv->status);
5421         __iwl3945_down(priv);
5422         clear_bit(STATUS_EXIT_PENDING, &priv->status);
5423
5424         /* tried to restart and config the device for as long as our
5425          * patience could withstand */
5426         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
5427         return -EIO;
5428 }
5429
5430
5431 /*****************************************************************************
5432  *
5433  * Workqueue callbacks
5434  *
5435  *****************************************************************************/
5436
5437 static void iwl3945_bg_init_alive_start(struct work_struct *data)
5438 {
5439         struct iwl_priv *priv =
5440             container_of(data, struct iwl_priv, init_alive_start.work);
5441
5442         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5443                 return;
5444
5445         mutex_lock(&priv->mutex);
5446         iwl3945_init_alive_start(priv);
5447         mutex_unlock(&priv->mutex);
5448 }
5449
5450 static void iwl3945_bg_alive_start(struct work_struct *data)
5451 {
5452         struct iwl_priv *priv =
5453             container_of(data, struct iwl_priv, alive_start.work);
5454
5455         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5456                 return;
5457
5458         mutex_lock(&priv->mutex);
5459         iwl3945_alive_start(priv);
5460         mutex_unlock(&priv->mutex);
5461 }
5462
5463 static void iwl3945_bg_rf_kill(struct work_struct *work)
5464 {
5465         struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
5466
5467         wake_up_interruptible(&priv->wait_command_queue);
5468
5469         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5470                 return;
5471
5472         mutex_lock(&priv->mutex);
5473
5474         if (!iwl_is_rfkill(priv)) {
5475                 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
5476                           "HW and/or SW RF Kill no longer active, restarting "
5477                           "device\n");
5478                 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5479                         queue_work(priv->workqueue, &priv->restart);
5480         } else {
5481
5482                 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
5483                         IWL_DEBUG_RF_KILL("Can not turn radio back on - "
5484                                           "disabled by SW switch\n");
5485                 else
5486                         IWL_WARN(priv, "Radio Frequency Kill Switch is On:\n"
5487                                     "Kill switch must be turned off for "
5488                                     "wireless networking to work.\n");
5489         }
5490
5491         mutex_unlock(&priv->mutex);
5492         iwl3945_rfkill_set_hw_state(priv);
5493 }
5494
5495 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
5496
5497 static void iwl3945_bg_scan_check(struct work_struct *data)
5498 {
5499         struct iwl_priv *priv =
5500             container_of(data, struct iwl_priv, scan_check.work);
5501
5502         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5503                 return;
5504
5505         mutex_lock(&priv->mutex);
5506         if (test_bit(STATUS_SCANNING, &priv->status) ||
5507             test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5508                 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
5509                           "Scan completion watchdog resetting adapter (%dms)\n",
5510                           jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
5511
5512                 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5513                         iwl3945_send_scan_abort(priv);
5514         }
5515         mutex_unlock(&priv->mutex);
5516 }
5517
5518 static void iwl3945_bg_request_scan(struct work_struct *data)
5519 {
5520         struct iwl_priv *priv =
5521             container_of(data, struct iwl_priv, request_scan);
5522         struct iwl_host_cmd cmd = {
5523                 .id = REPLY_SCAN_CMD,
5524                 .len = sizeof(struct iwl3945_scan_cmd),
5525                 .meta.flags = CMD_SIZE_HUGE,
5526         };
5527         int rc = 0;
5528         struct iwl3945_scan_cmd *scan;
5529         struct ieee80211_conf *conf = NULL;
5530         u8 n_probes = 2;
5531         enum ieee80211_band band;
5532         DECLARE_SSID_BUF(ssid);
5533
5534         conf = ieee80211_get_hw_conf(priv->hw);
5535
5536         mutex_lock(&priv->mutex);
5537
5538         if (!iwl_is_ready(priv)) {
5539                 IWL_WARN(priv, "request scan called when driver not ready.\n");
5540                 goto done;
5541         }
5542
5543         /* Make sure the scan wasn't canceled before this queued work
5544          * was given the chance to run... */
5545         if (!test_bit(STATUS_SCANNING, &priv->status))
5546                 goto done;
5547
5548         /* This should never be called or scheduled if there is currently
5549          * a scan active in the hardware. */
5550         if (test_bit(STATUS_SCAN_HW, &priv->status)) {
5551                 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
5552                                "Ignoring second request.\n");
5553                 rc = -EIO;
5554                 goto done;
5555         }
5556
5557         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5558                 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
5559                 goto done;
5560         }
5561
5562         if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5563                 IWL_DEBUG_HC("Scan request while abort pending.  Queuing.\n");
5564                 goto done;
5565         }
5566
5567         if (iwl_is_rfkill(priv)) {
5568                 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
5569                 goto done;
5570         }
5571
5572         if (!test_bit(STATUS_READY, &priv->status)) {
5573                 IWL_DEBUG_HC("Scan request while uninitialized.  Queuing.\n");
5574                 goto done;
5575         }
5576
5577         if (!priv->scan_bands) {
5578                 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
5579                 goto done;
5580         }
5581
5582         if (!priv->scan39) {
5583                 priv->scan39 = kmalloc(sizeof(struct iwl3945_scan_cmd) +
5584                                      IWL_MAX_SCAN_SIZE, GFP_KERNEL);
5585                 if (!priv->scan39) {
5586                         rc = -ENOMEM;
5587                         goto done;
5588                 }
5589         }
5590         scan = priv->scan39;
5591         memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
5592
5593         scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
5594         scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
5595
5596         if (iwl3945_is_associated(priv)) {
5597                 u16 interval = 0;
5598                 u32 extra;
5599                 u32 suspend_time = 100;
5600                 u32 scan_suspend_time = 100;
5601                 unsigned long flags;
5602
5603                 IWL_DEBUG_INFO("Scanning while associated...\n");
5604
5605                 spin_lock_irqsave(&priv->lock, flags);
5606                 interval = priv->beacon_int;
5607                 spin_unlock_irqrestore(&priv->lock, flags);
5608
5609                 scan->suspend_time = 0;
5610                 scan->max_out_time = cpu_to_le32(200 * 1024);
5611                 if (!interval)
5612                         interval = suspend_time;
5613                 /*
5614                  * suspend time format:
5615                  *  0-19: beacon interval in usec (time before exec.)
5616                  * 20-23: 0
5617                  * 24-31: number of beacons (suspend between channels)
5618                  */
5619
5620                 extra = (suspend_time / interval) << 24;
5621                 scan_suspend_time = 0xFF0FFFFF &
5622                     (extra | ((suspend_time % interval) * 1024));
5623
5624                 scan->suspend_time = cpu_to_le32(scan_suspend_time);
5625                 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
5626                                scan_suspend_time, interval);
5627         }
5628
5629         /* We should add the ability for user to lock to PASSIVE ONLY */
5630         if (priv->one_direct_scan) {
5631                 IWL_DEBUG_SCAN
5632                     ("Kicking off one direct scan for '%s'\n",
5633                      print_ssid(ssid, priv->direct_ssid,
5634                                 priv->direct_ssid_len));
5635                 scan->direct_scan[0].id = WLAN_EID_SSID;
5636                 scan->direct_scan[0].len = priv->direct_ssid_len;
5637                 memcpy(scan->direct_scan[0].ssid,
5638                        priv->direct_ssid, priv->direct_ssid_len);
5639                 n_probes++;
5640         } else
5641                 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
5642
5643         /* We don't build a direct scan probe request; the uCode will do
5644          * that based on the direct_mask added to each channel entry */
5645         scan->tx_cmd.len = cpu_to_le16(
5646                 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
5647                         IWL_MAX_SCAN_SIZE - sizeof(*scan)));
5648         scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
5649         scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
5650         scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
5651
5652         /* flags + rate selection */
5653
5654         if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
5655                 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
5656                 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
5657                 scan->good_CRC_th = 0;
5658                 band = IEEE80211_BAND_2GHZ;
5659         } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
5660                 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
5661                 scan->good_CRC_th = IWL_GOOD_CRC_TH;
5662                 band = IEEE80211_BAND_5GHZ;
5663         } else {
5664                 IWL_WARN(priv, "Invalid scan band count\n");
5665                 goto done;
5666         }
5667
5668         /* select Rx antennas */
5669         scan->flags |= iwl3945_get_antenna_flags(priv);
5670
5671         if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
5672                 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
5673
5674         scan->channel_count =
5675                 iwl3945_get_channels_for_scan(priv, band, 1, /* active */
5676                                               n_probes,
5677                         (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
5678
5679         if (scan->channel_count == 0) {
5680                 IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
5681                 goto done;
5682         }
5683
5684         cmd.len += le16_to_cpu(scan->tx_cmd.len) +
5685             scan->channel_count * sizeof(struct iwl3945_scan_channel);
5686         cmd.data = scan;
5687         scan->len = cpu_to_le16(cmd.len);
5688
5689         set_bit(STATUS_SCAN_HW, &priv->status);
5690         rc = iwl3945_send_cmd_sync(priv, &cmd);
5691         if (rc)
5692                 goto done;
5693
5694         queue_delayed_work(priv->workqueue, &priv->scan_check,
5695                            IWL_SCAN_CHECK_WATCHDOG);
5696
5697         mutex_unlock(&priv->mutex);
5698         return;
5699
5700  done:
5701         /* can not perform scan make sure we clear scanning
5702          * bits from status so next scan request can be performed.
5703          * if we dont clear scanning status bit here all next scan
5704          * will fail
5705         */
5706         clear_bit(STATUS_SCAN_HW, &priv->status);
5707         clear_bit(STATUS_SCANNING, &priv->status);
5708
5709         /* inform mac80211 scan aborted */
5710         queue_work(priv->workqueue, &priv->scan_completed);
5711         mutex_unlock(&priv->mutex);
5712 }
5713
5714 static void iwl3945_bg_up(struct work_struct *data)
5715 {
5716         struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
5717
5718         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5719                 return;
5720
5721         mutex_lock(&priv->mutex);
5722         __iwl3945_up(priv);
5723         mutex_unlock(&priv->mutex);
5724         iwl3945_rfkill_set_hw_state(priv);
5725 }
5726
5727 static void iwl3945_bg_restart(struct work_struct *data)
5728 {
5729         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
5730
5731         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5732                 return;
5733
5734         iwl3945_down(priv);
5735         queue_work(priv->workqueue, &priv->up);
5736 }
5737
5738 static void iwl3945_bg_rx_replenish(struct work_struct *data)
5739 {
5740         struct iwl_priv *priv =
5741             container_of(data, struct iwl_priv, rx_replenish);
5742
5743         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5744                 return;
5745
5746         mutex_lock(&priv->mutex);
5747         iwl3945_rx_replenish(priv);
5748         mutex_unlock(&priv->mutex);
5749 }
5750
5751 #define IWL_DELAY_NEXT_SCAN (HZ*2)
5752
5753 static void iwl3945_post_associate(struct iwl_priv *priv)
5754 {
5755         int rc = 0;
5756         struct ieee80211_conf *conf = NULL;
5757
5758         if (priv->iw_mode == NL80211_IFTYPE_AP) {
5759                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
5760                 return;
5761         }
5762
5763
5764         IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
5765                         priv->assoc_id, priv->active39_rxon.bssid_addr);
5766
5767         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5768                 return;
5769
5770         if (!priv->vif || !priv->is_open)
5771                 return;
5772
5773         iwl3945_scan_cancel_timeout(priv, 200);
5774
5775         conf = ieee80211_get_hw_conf(priv->hw);
5776
5777         priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5778         iwl3945_commit_rxon(priv);
5779
5780         memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
5781         iwl3945_setup_rxon_timing(priv);
5782         rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
5783                               sizeof(priv->rxon_timing), &priv->rxon_timing);
5784         if (rc)
5785                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
5786                             "Attempting to continue.\n");
5787
5788         priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
5789
5790         priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
5791
5792         IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
5793                         priv->assoc_id, priv->beacon_int);
5794
5795         if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
5796                 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
5797         else
5798                 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
5799
5800         if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
5801                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
5802                         priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
5803                 else
5804                         priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
5805
5806                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
5807                         priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
5808
5809         }
5810
5811         iwl3945_commit_rxon(priv);
5812
5813         switch (priv->iw_mode) {
5814         case NL80211_IFTYPE_STATION:
5815                 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
5816                 break;
5817
5818         case NL80211_IFTYPE_ADHOC:
5819
5820                 priv->assoc_id = 1;
5821                 iwl3945_add_station(priv, priv->bssid, 0, 0);
5822                 iwl3945_sync_sta(priv, IWL_STA_ID,
5823                                  (priv->band == IEEE80211_BAND_5GHZ) ?
5824                                  IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
5825                                  CMD_ASYNC);
5826                 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
5827                 iwl3945_send_beacon_cmd(priv);
5828
5829                 break;
5830
5831         default:
5832                  IWL_ERR(priv, "%s Should not be called in %d mode\n",
5833                            __func__, priv->iw_mode);
5834                 break;
5835         }
5836
5837         iwl3945_activate_qos(priv, 0);
5838
5839         /* we have just associated, don't start scan too early */
5840         priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
5841 }
5842
5843 static void iwl3945_bg_abort_scan(struct work_struct *work)
5844 {
5845         struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
5846
5847         if (!iwl_is_ready(priv))
5848                 return;
5849
5850         mutex_lock(&priv->mutex);
5851
5852         set_bit(STATUS_SCAN_ABORTING, &priv->status);
5853         iwl3945_send_scan_abort(priv);
5854
5855         mutex_unlock(&priv->mutex);
5856 }
5857
5858 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
5859
5860 static void iwl3945_bg_scan_completed(struct work_struct *work)
5861 {
5862         struct iwl_priv *priv =
5863             container_of(work, struct iwl_priv, scan_completed);
5864
5865         IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
5866
5867         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5868                 return;
5869
5870         if (test_bit(STATUS_CONF_PENDING, &priv->status))
5871                 iwl3945_mac_config(priv->hw, 0);
5872
5873         ieee80211_scan_completed(priv->hw);
5874
5875         /* Since setting the TXPOWER may have been deferred while
5876          * performing the scan, fire one off */
5877         mutex_lock(&priv->mutex);
5878         iwl3945_hw_reg_send_txpower(priv);
5879         mutex_unlock(&priv->mutex);
5880 }
5881
5882 /*****************************************************************************
5883  *
5884  * mac80211 entry point functions
5885  *
5886  *****************************************************************************/
5887
5888 #define UCODE_READY_TIMEOUT     (2 * HZ)
5889
5890 static int iwl3945_mac_start(struct ieee80211_hw *hw)
5891 {
5892         struct iwl_priv *priv = hw->priv;
5893         int ret;
5894
5895         IWL_DEBUG_MAC80211("enter\n");
5896
5897         if (pci_enable_device(priv->pci_dev)) {
5898                 IWL_ERR(priv, "Fail to pci_enable_device\n");
5899                 return -ENODEV;
5900         }
5901         pci_restore_state(priv->pci_dev);
5902         pci_enable_msi(priv->pci_dev);
5903
5904         ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
5905                           DRV_NAME, priv);
5906         if (ret) {
5907                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
5908                 goto out_disable_msi;
5909         }
5910
5911         /* we should be verifying the device is ready to be opened */
5912         mutex_lock(&priv->mutex);
5913
5914         memset(&priv->staging39_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
5915         /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
5916          * ucode filename and max sizes are card-specific. */
5917
5918         if (!priv->ucode_code.len) {
5919                 ret = iwl3945_read_ucode(priv);
5920                 if (ret) {
5921                         IWL_ERR(priv, "Could not read microcode: %d\n", ret);
5922                         mutex_unlock(&priv->mutex);
5923                         goto out_release_irq;
5924                 }
5925         }
5926
5927         ret = __iwl3945_up(priv);
5928
5929         mutex_unlock(&priv->mutex);
5930
5931         iwl3945_rfkill_set_hw_state(priv);
5932
5933         if (ret)
5934                 goto out_release_irq;
5935
5936         IWL_DEBUG_INFO("Start UP work.\n");
5937
5938         if (test_bit(STATUS_IN_SUSPEND, &priv->status))
5939                 return 0;
5940
5941         /* Wait for START_ALIVE from ucode. Otherwise callbacks from
5942          * mac80211 will not be run successfully. */
5943         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
5944                         test_bit(STATUS_READY, &priv->status),
5945                         UCODE_READY_TIMEOUT);
5946         if (!ret) {
5947                 if (!test_bit(STATUS_READY, &priv->status)) {
5948                         IWL_ERR(priv,
5949                                 "Wait for START_ALIVE timeout after %dms.\n",
5950                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
5951                         ret = -ETIMEDOUT;
5952                         goto out_release_irq;
5953                 }
5954         }
5955
5956         priv->is_open = 1;
5957         IWL_DEBUG_MAC80211("leave\n");
5958         return 0;
5959
5960 out_release_irq:
5961         free_irq(priv->pci_dev->irq, priv);
5962 out_disable_msi:
5963         pci_disable_msi(priv->pci_dev);
5964         pci_disable_device(priv->pci_dev);
5965         priv->is_open = 0;
5966         IWL_DEBUG_MAC80211("leave - failed\n");
5967         return ret;
5968 }
5969
5970 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
5971 {
5972         struct iwl_priv *priv = hw->priv;
5973
5974         IWL_DEBUG_MAC80211("enter\n");
5975
5976         if (!priv->is_open) {
5977                 IWL_DEBUG_MAC80211("leave - skip\n");
5978                 return;
5979         }
5980
5981         priv->is_open = 0;
5982
5983         if (iwl_is_ready_rf(priv)) {
5984                 /* stop mac, cancel any scan request and clear
5985                  * RXON_FILTER_ASSOC_MSK BIT
5986                  */
5987                 mutex_lock(&priv->mutex);
5988                 iwl3945_scan_cancel_timeout(priv, 100);
5989                 mutex_unlock(&priv->mutex);
5990         }
5991
5992         iwl3945_down(priv);
5993
5994         flush_workqueue(priv->workqueue);
5995         free_irq(priv->pci_dev->irq, priv);
5996         pci_disable_msi(priv->pci_dev);
5997         pci_save_state(priv->pci_dev);
5998         pci_disable_device(priv->pci_dev);
5999
6000         IWL_DEBUG_MAC80211("leave\n");
6001 }
6002
6003 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
6004 {
6005         struct iwl_priv *priv = hw->priv;
6006
6007         IWL_DEBUG_MAC80211("enter\n");
6008
6009         IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
6010                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
6011
6012         if (iwl3945_tx_skb(priv, skb))
6013                 dev_kfree_skb_any(skb);
6014
6015         IWL_DEBUG_MAC80211("leave\n");
6016         return NETDEV_TX_OK;
6017 }
6018
6019 static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
6020                                  struct ieee80211_if_init_conf *conf)
6021 {
6022         struct iwl_priv *priv = hw->priv;
6023         unsigned long flags;
6024
6025         IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
6026
6027         if (priv->vif) {
6028                 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
6029                 return -EOPNOTSUPP;
6030         }
6031
6032         spin_lock_irqsave(&priv->lock, flags);
6033         priv->vif = conf->vif;
6034         priv->iw_mode = conf->type;
6035
6036         spin_unlock_irqrestore(&priv->lock, flags);
6037
6038         mutex_lock(&priv->mutex);
6039
6040         if (conf->mac_addr) {
6041                 IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
6042                 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6043         }
6044
6045         if (iwl_is_ready(priv))
6046                 iwl3945_set_mode(priv, conf->type);
6047
6048         mutex_unlock(&priv->mutex);
6049
6050         IWL_DEBUG_MAC80211("leave\n");
6051         return 0;
6052 }
6053
6054 /**
6055  * iwl3945_mac_config - mac80211 config callback
6056  *
6057  * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6058  * be set inappropriately and the driver currently sets the hardware up to
6059  * use it whenever needed.
6060  */
6061 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
6062 {
6063         struct iwl_priv *priv = hw->priv;
6064         const struct iwl_channel_info *ch_info;
6065         struct ieee80211_conf *conf = &hw->conf;
6066         unsigned long flags;
6067         int ret = 0;
6068
6069         mutex_lock(&priv->mutex);
6070         IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
6071
6072         if (!iwl_is_ready(priv)) {
6073                 IWL_DEBUG_MAC80211("leave - not ready\n");
6074    &