7ad327ef9cb53bd5af46f765f680830a7c71a821
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl-rx.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #include <linux/etherdevice.h>
31 #include <net/mac80211.h>
32 #include <asm/unaligned.h>
33 #include "iwl-eeprom.h"
34 #include "iwl-dev.h"
35 #include "iwl-core.h"
36 #include "iwl-sta.h"
37 #include "iwl-io.h"
38 #include "iwl-calib.h"
39 #include "iwl-helpers.h"
40 /************************** RX-FUNCTIONS ****************************/
41 /*
42  * Rx theory of operation
43  *
44  * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
45  * each of which point to Receive Buffers to be filled by the NIC.  These get
46  * used not only for Rx frames, but for any command response or notification
47  * from the NIC.  The driver and NIC manage the Rx buffers by means
48  * of indexes into the circular buffer.
49  *
50  * Rx Queue Indexes
51  * The host/firmware share two index registers for managing the Rx buffers.
52  *
53  * The READ index maps to the first position that the firmware may be writing
54  * to -- the driver can read up to (but not including) this position and get
55  * good data.
56  * The READ index is managed by the firmware once the card is enabled.
57  *
58  * The WRITE index maps to the last position the driver has read from -- the
59  * position preceding WRITE is the last slot the firmware can place a packet.
60  *
61  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
62  * WRITE = READ.
63  *
64  * During initialization, the host sets up the READ queue position to the first
65  * INDEX position, and WRITE to the last (READ - 1 wrapped)
66  *
67  * When the firmware places a packet in a buffer, it will advance the READ index
68  * and fire the RX interrupt.  The driver can then query the READ index and
69  * process as many packets as possible, moving the WRITE index forward as it
70  * resets the Rx queue buffers with new memory.
71  *
72  * The management in the driver is as follows:
73  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
74  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
75  *   to replenish the iwl->rxq->rx_free.
76  * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
77  *   iwl->rxq is replenished and the READ INDEX is updated (updating the
78  *   'processed' and 'read' driver indexes as well)
79  * + A received packet is processed and handed to the kernel network stack,
80  *   detached from the iwl->rxq.  The driver 'processed' index is updated.
81  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
82  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
83  *   INDEX is not incremented and iwl->status(RX_STALLED) is set.  If there
84  *   were enough free buffers and RX_STALLED is set it is cleared.
85  *
86  *
87  * Driver sequence:
88  *
89  * iwl_rx_queue_alloc()   Allocates rx_free
90  * iwl_rx_replenish()     Replenishes rx_free list from rx_used, and calls
91  *                            iwl_rx_queue_restock
92  * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
93  *                            queue, updates firmware pointers, and updates
94  *                            the WRITE index.  If insufficient rx_free buffers
95  *                            are available, schedules iwl_rx_replenish
96  *
97  * -- enable interrupts --
98  * ISR - iwl_rx()         Detach iwl_rx_mem_buffers from pool up to the
99  *                            READ INDEX, detaching the SKB from the pool.
100  *                            Moves the packet buffer from queue to rx_used.
101  *                            Calls iwl_rx_queue_restock to refill any empty
102  *                            slots.
103  * ...
104  *
105  */
106
107 /**
108  * iwl_rx_queue_space - Return number of free slots available in queue.
109  */
110 int iwl_rx_queue_space(const struct iwl_rx_queue *q)
111 {
112         int s = q->read - q->write;
113         if (s <= 0)
114                 s += RX_QUEUE_SIZE;
115         /* keep some buffer to not confuse full and empty queue */
116         s -= 2;
117         if (s < 0)
118                 s = 0;
119         return s;
120 }
121 EXPORT_SYMBOL(iwl_rx_queue_space);
122
123 /**
124  * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
125  */
126 int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
127 {
128         unsigned long flags;
129         u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
130         u32 reg;
131         int ret = 0;
132
133         spin_lock_irqsave(&q->lock, flags);
134
135         if (q->need_update == 0)
136                 goto exit_unlock;
137
138         /* If power-saving is in use, make sure device is awake */
139         if (test_bit(STATUS_POWER_PMI, &priv->status)) {
140                 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
141
142                 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
143                         iwl_set_bit(priv, CSR_GP_CNTRL,
144                                     CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
145                         goto exit_unlock;
146                 }
147
148                 q->write_actual = (q->write & ~0x7);
149                 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
150
151         /* Else device is assumed to be awake */
152         } else {
153                 /* Device expects a multiple of 8 */
154                 q->write_actual = (q->write & ~0x7);
155                 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
156         }
157
158         q->need_update = 0;
159
160  exit_unlock:
161         spin_unlock_irqrestore(&q->lock, flags);
162         return ret;
163 }
164 EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
165 /**
166  * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
167  */
168 static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
169                                           dma_addr_t dma_addr)
170 {
171         return cpu_to_le32((u32)(dma_addr >> 8));
172 }
173
174 /**
175  * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
176  *
177  * If there are slots in the RX queue that need to be restocked,
178  * and we have free pre-allocated buffers, fill the ranks as much
179  * as we can, pulling from rx_free.
180  *
181  * This moves the 'write' index forward to catch up with 'processed', and
182  * also updates the memory address in the firmware to reference the new
183  * target buffer.
184  */
185 int iwl_rx_queue_restock(struct iwl_priv *priv)
186 {
187         struct iwl_rx_queue *rxq = &priv->rxq;
188         struct list_head *element;
189         struct iwl_rx_mem_buffer *rxb;
190         unsigned long flags;
191         int write;
192         int ret = 0;
193
194         spin_lock_irqsave(&rxq->lock, flags);
195         write = rxq->write & ~0x7;
196         while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
197                 /* Get next free Rx buffer, remove from free list */
198                 element = rxq->rx_free.next;
199                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
200                 list_del(element);
201
202                 /* Point to Rx buffer via next RBD in circular buffer */
203                 rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->aligned_dma_addr);
204                 rxq->queue[rxq->write] = rxb;
205                 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
206                 rxq->free_count--;
207         }
208         spin_unlock_irqrestore(&rxq->lock, flags);
209         /* If the pre-allocated buffer pool is dropping low, schedule to
210          * refill it */
211         if (rxq->free_count <= RX_LOW_WATERMARK)
212                 queue_work(priv->workqueue, &priv->rx_replenish);
213
214
215         /* If we've added more space for the firmware to place data, tell it.
216          * Increment device's write pointer in multiples of 8. */
217         if (rxq->write_actual != (rxq->write & ~0x7)) {
218                 spin_lock_irqsave(&rxq->lock, flags);
219                 rxq->need_update = 1;
220                 spin_unlock_irqrestore(&rxq->lock, flags);
221                 ret = iwl_rx_queue_update_write_ptr(priv, rxq);
222         }
223
224         return ret;
225 }
226 EXPORT_SYMBOL(iwl_rx_queue_restock);
227
228
229 /**
230  * iwl_rx_replenish - Move all used packet from rx_used to rx_free
231  *
232  * When moving to rx_free an SKB is allocated for the slot.
233  *
234  * Also restock the Rx queue via iwl_rx_queue_restock.
235  * This is called as a scheduled work item (except for during initialization)
236  */
237 void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority)
238 {
239         struct iwl_rx_queue *rxq = &priv->rxq;
240         struct list_head *element;
241         struct iwl_rx_mem_buffer *rxb;
242         struct sk_buff *skb;
243         unsigned long flags;
244
245         while (1) {
246                 spin_lock_irqsave(&rxq->lock, flags);
247                 if (list_empty(&rxq->rx_used)) {
248                         spin_unlock_irqrestore(&rxq->lock, flags);
249                         return;
250                 }
251                 spin_unlock_irqrestore(&rxq->lock, flags);
252
253                 if (rxq->free_count > RX_LOW_WATERMARK)
254                         priority |= __GFP_NOWARN;
255                 /* Alloc a new receive buffer */
256                 skb = alloc_skb(priv->hw_params.rx_buf_size + 256,
257                                                 priority);
258
259                 if (!skb) {
260                         if (net_ratelimit())
261                                 IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
262                         if ((rxq->free_count <= RX_LOW_WATERMARK) &&
263                             net_ratelimit())
264                                 IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
265                                          priority == GFP_ATOMIC ?  "GFP_ATOMIC" : "GFP_KERNEL",
266                                          rxq->free_count);
267                         /* We don't reschedule replenish work here -- we will
268                          * call the restock method and if it still needs
269                          * more buffers it will schedule replenish */
270                         break;
271                 }
272
273                 spin_lock_irqsave(&rxq->lock, flags);
274
275                 if (list_empty(&rxq->rx_used)) {
276                         spin_unlock_irqrestore(&rxq->lock, flags);
277                         dev_kfree_skb_any(skb);
278                         return;
279                 }
280                 element = rxq->rx_used.next;
281                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
282                 list_del(element);
283
284                 spin_unlock_irqrestore(&rxq->lock, flags);
285
286                 rxb->skb = skb;
287                 /* Get physical address of RB/SKB */
288                 rxb->real_dma_addr = pci_map_single(
289                                         priv->pci_dev,
290                                         rxb->skb->data,
291                                         priv->hw_params.rx_buf_size + 256,
292                                         PCI_DMA_FROMDEVICE);
293                 /* dma address must be no more than 36 bits */
294                 BUG_ON(rxb->real_dma_addr & ~DMA_BIT_MASK(36));
295                 /* and also 256 byte aligned! */
296                 rxb->aligned_dma_addr = ALIGN(rxb->real_dma_addr, 256);
297                 skb_reserve(rxb->skb, rxb->aligned_dma_addr - rxb->real_dma_addr);
298
299                 spin_lock_irqsave(&rxq->lock, flags);
300
301                 list_add_tail(&rxb->list, &rxq->rx_free);
302                 rxq->free_count++;
303                 priv->alloc_rxb_skb++;
304
305                 spin_unlock_irqrestore(&rxq->lock, flags);
306         }
307 }
308
309 void iwl_rx_replenish(struct iwl_priv *priv)
310 {
311         unsigned long flags;
312
313         iwl_rx_allocate(priv, GFP_KERNEL);
314
315         spin_lock_irqsave(&priv->lock, flags);
316         iwl_rx_queue_restock(priv);
317         spin_unlock_irqrestore(&priv->lock, flags);
318 }
319 EXPORT_SYMBOL(iwl_rx_replenish);
320
321 void iwl_rx_replenish_now(struct iwl_priv *priv)
322 {
323         iwl_rx_allocate(priv, GFP_ATOMIC);
324
325         iwl_rx_queue_restock(priv);
326 }
327 EXPORT_SYMBOL(iwl_rx_replenish_now);
328
329
330 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
331  * If an SKB has been detached, the POOL needs to have its SKB set to NULL
332  * This free routine walks the list of POOL entries and if SKB is set to
333  * non NULL it is unmapped and freed
334  */
335 void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
336 {
337         int i;
338         for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
339                 if (rxq->pool[i].skb != NULL) {
340                         pci_unmap_single(priv->pci_dev,
341                                          rxq->pool[i].real_dma_addr,
342                                          priv->hw_params.rx_buf_size + 256,
343                                          PCI_DMA_FROMDEVICE);
344                         dev_kfree_skb(rxq->pool[i].skb);
345                 }
346         }
347
348         pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
349                             rxq->dma_addr);
350         pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
351                             rxq->rb_stts, rxq->rb_stts_dma);
352         rxq->bd = NULL;
353         rxq->rb_stts  = NULL;
354 }
355 EXPORT_SYMBOL(iwl_rx_queue_free);
356
357 int iwl_rx_queue_alloc(struct iwl_priv *priv)
358 {
359         struct iwl_rx_queue *rxq = &priv->rxq;
360         struct pci_dev *dev = priv->pci_dev;
361         int i;
362
363         spin_lock_init(&rxq->lock);
364         INIT_LIST_HEAD(&rxq->rx_free);
365         INIT_LIST_HEAD(&rxq->rx_used);
366
367         /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
368         rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
369         if (!rxq->bd)
370                 goto err_bd;
371
372         rxq->rb_stts = pci_alloc_consistent(dev, sizeof(struct iwl_rb_status),
373                                         &rxq->rb_stts_dma);
374         if (!rxq->rb_stts)
375                 goto err_rb;
376
377         /* Fill the rx_used queue with _all_ of the Rx buffers */
378         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
379                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
380
381         /* Set us so that we have processed and used all buffers, but have
382          * not restocked the Rx queue with fresh buffers */
383         rxq->read = rxq->write = 0;
384         rxq->write_actual = 0;
385         rxq->free_count = 0;
386         rxq->need_update = 0;
387         return 0;
388
389 err_rb:
390         pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
391                             rxq->dma_addr);
392 err_bd:
393         return -ENOMEM;
394 }
395 EXPORT_SYMBOL(iwl_rx_queue_alloc);
396
397 void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
398 {
399         unsigned long flags;
400         int i;
401         spin_lock_irqsave(&rxq->lock, flags);
402         INIT_LIST_HEAD(&rxq->rx_free);
403         INIT_LIST_HEAD(&rxq->rx_used);
404         /* Fill the rx_used queue with _all_ of the Rx buffers */
405         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
406                 /* In the reset function, these buffers may have been allocated
407                  * to an SKB, so we need to unmap and free potential storage */
408                 if (rxq->pool[i].skb != NULL) {
409                         pci_unmap_single(priv->pci_dev,
410                                          rxq->pool[i].real_dma_addr,
411                                          priv->hw_params.rx_buf_size + 256,
412                                          PCI_DMA_FROMDEVICE);
413                         priv->alloc_rxb_skb--;
414                         dev_kfree_skb(rxq->pool[i].skb);
415                         rxq->pool[i].skb = NULL;
416                 }
417                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
418         }
419
420         /* Set us so that we have processed and used all buffers, but have
421          * not restocked the Rx queue with fresh buffers */
422         rxq->read = rxq->write = 0;
423         rxq->write_actual = 0;
424         rxq->free_count = 0;
425         spin_unlock_irqrestore(&rxq->lock, flags);
426 }
427
428 int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
429 {
430         u32 rb_size;
431         const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
432         u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT for all devices? */
433
434         if (!priv->cfg->use_isr_legacy)
435                 rb_timeout = RX_RB_TIMEOUT;
436
437         if (priv->cfg->mod_params->amsdu_size_8K)
438                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
439         else
440                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
441
442         /* Stop Rx DMA */
443         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
444
445         /* Reset driver's Rx queue write index */
446         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
447
448         /* Tell device where to find RBD circular buffer in DRAM */
449         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
450                            (u32)(rxq->dma_addr >> 8));
451
452         /* Tell device where in DRAM to update its Rx status */
453         iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
454                            rxq->rb_stts_dma >> 4);
455
456         /* Enable Rx DMA
457          * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
458          *      the credit mechanism in 5000 HW RX FIFO
459          * Direct rx interrupts to hosts
460          * Rx buffer size 4 or 8k
461          * RB timeout 0x10
462          * 256 RBDs
463          */
464         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
465                            FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
466                            FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
467                            FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
468                            FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
469                            rb_size|
470                            (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
471                            (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
472
473         iwl_write32(priv, CSR_INT_COALESCING, 0x40);
474
475         return 0;
476 }
477
478 int iwl_rxq_stop(struct iwl_priv *priv)
479 {
480
481         /* stop Rx DMA */
482         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
483         iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
484                             FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
485
486         return 0;
487 }
488 EXPORT_SYMBOL(iwl_rxq_stop);
489
490 void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
491                                 struct iwl_rx_mem_buffer *rxb)
492
493 {
494         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
495         struct iwl_missed_beacon_notif *missed_beacon;
496
497         missed_beacon = &pkt->u.missed_beacon;
498         if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
499                 IWL_DEBUG_CALIB(priv, "missed bcn cnsq %d totl %d rcd %d expctd %d\n",
500                     le32_to_cpu(missed_beacon->consequtive_missed_beacons),
501                     le32_to_cpu(missed_beacon->total_missed_becons),
502                     le32_to_cpu(missed_beacon->num_recvd_beacons),
503                     le32_to_cpu(missed_beacon->num_expected_beacons));
504                 if (!test_bit(STATUS_SCANNING, &priv->status))
505                         iwl_init_sensitivity(priv);
506         }
507 }
508 EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
509
510
511 /* Calculate noise level, based on measurements during network silence just
512  *   before arriving beacon.  This measurement can be done only if we know
513  *   exactly when to expect beacons, therefore only when we're associated. */
514 static void iwl_rx_calc_noise(struct iwl_priv *priv)
515 {
516         struct statistics_rx_non_phy *rx_info
517                                 = &(priv->statistics.rx.general);
518         int num_active_rx = 0;
519         int total_silence = 0;
520         int bcn_silence_a =
521                 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
522         int bcn_silence_b =
523                 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
524         int bcn_silence_c =
525                 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
526
527         if (bcn_silence_a) {
528                 total_silence += bcn_silence_a;
529                 num_active_rx++;
530         }
531         if (bcn_silence_b) {
532                 total_silence += bcn_silence_b;
533                 num_active_rx++;
534         }
535         if (bcn_silence_c) {
536                 total_silence += bcn_silence_c;
537                 num_active_rx++;
538         }
539
540         /* Average among active antennas */
541         if (num_active_rx)
542                 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
543         else
544                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
545
546         IWL_DEBUG_CALIB(priv, "inband silence a %u, b %u, c %u, dBm %d\n",
547                         bcn_silence_a, bcn_silence_b, bcn_silence_c,
548                         priv->last_rx_noise);
549 }
550
551 #ifdef CONFIG_IWLWIFI_DEBUG
552 /*
553  *  based on the assumption of all statistics counter are in DWORD
554  *  FIXME: This function is for debugging, do not deal with
555  *  the case of counters roll-over.
556  */
557 static void iwl_accumulative_statistics(struct iwl_priv *priv,
558                                         __le32 *stats)
559 {
560         int i;
561         __le32 *prev_stats;
562         u32 *accum_stats;
563
564         prev_stats = (__le32 *)&priv->statistics;
565         accum_stats = (u32 *)&priv->accum_statistics;
566
567         for (i = sizeof(__le32); i < sizeof(struct iwl_notif_statistics);
568              i += sizeof(__le32), stats++, prev_stats++, accum_stats++)
569                 if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats))
570                         *accum_stats += (le32_to_cpu(*stats) -
571                                 le32_to_cpu(*prev_stats));
572
573         /* reset accumulative statistics for "no-counter" type statistics */
574         priv->accum_statistics.general.temperature =
575                 priv->statistics.general.temperature;
576         priv->accum_statistics.general.temperature_m =
577                 priv->statistics.general.temperature_m;
578         priv->accum_statistics.general.ttl_timestamp =
579                 priv->statistics.general.ttl_timestamp;
580         priv->accum_statistics.tx.tx_power.ant_a =
581                 priv->statistics.tx.tx_power.ant_a;
582         priv->accum_statistics.tx.tx_power.ant_b =
583                 priv->statistics.tx.tx_power.ant_b;
584         priv->accum_statistics.tx.tx_power.ant_c =
585                 priv->statistics.tx.tx_power.ant_c;
586 }
587 #endif
588
589 #define REG_RECALIB_PERIOD (60)
590
591 void iwl_rx_statistics(struct iwl_priv *priv,
592                               struct iwl_rx_mem_buffer *rxb)
593 {
594         int change;
595         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
596
597         IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n",
598                      (int)sizeof(priv->statistics),
599                      le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
600
601         change = ((priv->statistics.general.temperature !=
602                    pkt->u.stats.general.temperature) ||
603                   ((priv->statistics.flag &
604                     STATISTICS_REPLY_FLG_HT40_MODE_MSK) !=
605                    (pkt->u.stats.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)));
606
607 #ifdef CONFIG_IWLWIFI_DEBUG
608         iwl_accumulative_statistics(priv, (__le32 *)&pkt->u.stats);
609 #endif
610         memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
611
612         set_bit(STATUS_STATISTICS, &priv->status);
613
614         /* Reschedule the statistics timer to occur in
615          * REG_RECALIB_PERIOD seconds to ensure we get a
616          * thermal update even if the uCode doesn't give
617          * us one */
618         mod_timer(&priv->statistics_periodic, jiffies +
619                   msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
620
621         if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
622             (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
623                 iwl_rx_calc_noise(priv);
624                 queue_work(priv->workqueue, &priv->run_time_calib_work);
625         }
626
627         iwl_leds_background(priv);
628
629         if (priv->cfg->ops->lib->temp_ops.temperature && change)
630                 priv->cfg->ops->lib->temp_ops.temperature(priv);
631 }
632 EXPORT_SYMBOL(iwl_rx_statistics);
633
634 #define PERFECT_RSSI (-20) /* dBm */
635 #define WORST_RSSI (-95)   /* dBm */
636 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
637
638 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
639  * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
640  *   about formulas used below. */
641 static int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
642 {
643         int sig_qual;
644         int degradation = PERFECT_RSSI - rssi_dbm;
645
646         /* If we get a noise measurement, use signal-to-noise ratio (SNR)
647          * as indicator; formula is (signal dbm - noise dbm).
648          * SNR at or above 40 is a great signal (100%).
649          * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
650          * Weakest usable signal is usually 10 - 15 dB SNR. */
651         if (noise_dbm) {
652                 if (rssi_dbm - noise_dbm >= 40)
653                         return 100;
654                 else if (rssi_dbm < noise_dbm)
655                         return 0;
656                 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
657
658         /* Else use just the signal level.
659          * This formula is a least squares fit of data points collected and
660          *   compared with a reference system that had a percentage (%) display
661          *   for signal quality. */
662         } else
663                 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
664                             (15 * RSSI_RANGE + 62 * degradation)) /
665                            (RSSI_RANGE * RSSI_RANGE);
666
667         if (sig_qual > 100)
668                 sig_qual = 100;
669         else if (sig_qual < 1)
670                 sig_qual = 0;
671
672         return sig_qual;
673 }
674
675 /* Calc max signal level (dBm) among 3 possible receivers */
676 static inline int iwl_calc_rssi(struct iwl_priv *priv,
677                                 struct iwl_rx_phy_res *rx_resp)
678 {
679         return priv->cfg->ops->utils->calc_rssi(priv, rx_resp);
680 }
681
682 #ifdef CONFIG_IWLWIFI_DEBUG
683 /**
684  * iwl_dbg_report_frame - dump frame to syslog during debug sessions
685  *
686  * You may hack this function to show different aspects of received frames,
687  * including selective frame dumps.
688  * group100 parameter selects whether to show 1 out of 100 good data frames.
689  *    All beacon and probe response frames are printed.
690  */
691 static void iwl_dbg_report_frame(struct iwl_priv *priv,
692                       struct iwl_rx_phy_res *phy_res, u16 length,
693                       struct ieee80211_hdr *header, int group100)
694 {
695         u32 to_us;
696         u32 print_summary = 0;
697         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
698         u32 hundred = 0;
699         u32 dataframe = 0;
700         __le16 fc;
701         u16 seq_ctl;
702         u16 channel;
703         u16 phy_flags;
704         u32 rate_n_flags;
705         u32 tsf_low;
706         int rssi;
707
708         if (likely(!(iwl_get_debug_level(priv) & IWL_DL_RX)))
709                 return;
710
711         /* MAC header */
712         fc = header->frame_control;
713         seq_ctl = le16_to_cpu(header->seq_ctrl);
714
715         /* metadata */
716         channel = le16_to_cpu(phy_res->channel);
717         phy_flags = le16_to_cpu(phy_res->phy_flags);
718         rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
719
720         /* signal statistics */
721         rssi = iwl_calc_rssi(priv, phy_res);
722         tsf_low = le64_to_cpu(phy_res->timestamp) & 0x0ffffffff;
723
724         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
725
726         /* if data frame is to us and all is good,
727          *   (optionally) print summary for only 1 out of every 100 */
728         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
729             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
730                 dataframe = 1;
731                 if (!group100)
732                         print_summary = 1;      /* print each frame */
733                 else if (priv->framecnt_to_us < 100) {
734                         priv->framecnt_to_us++;
735                         print_summary = 0;
736                 } else {
737                         priv->framecnt_to_us = 0;
738                         print_summary = 1;
739                         hundred = 1;
740                 }
741         } else {
742                 /* print summary for all other frames */
743                 print_summary = 1;
744         }
745
746         if (print_summary) {
747                 char *title;
748                 int rate_idx;
749                 u32 bitrate;
750
751                 if (hundred)
752                         title = "100Frames";
753                 else if (ieee80211_has_retry(fc))
754                         title = "Retry";
755                 else if (ieee80211_is_assoc_resp(fc))
756                         title = "AscRsp";
757                 else if (ieee80211_is_reassoc_resp(fc))
758                         title = "RasRsp";
759                 else if (ieee80211_is_probe_resp(fc)) {
760                         title = "PrbRsp";
761                         print_dump = 1; /* dump frame contents */
762                 } else if (ieee80211_is_beacon(fc)) {
763                         title = "Beacon";
764                         print_dump = 1; /* dump frame contents */
765                 } else if (ieee80211_is_atim(fc))
766                         title = "ATIM";
767                 else if (ieee80211_is_auth(fc))
768                         title = "Auth";
769                 else if (ieee80211_is_deauth(fc))
770                         title = "DeAuth";
771                 else if (ieee80211_is_disassoc(fc))
772                         title = "DisAssoc";
773                 else
774                         title = "Frame";
775
776                 rate_idx = iwl_hwrate_to_plcp_idx(rate_n_flags);
777                 if (unlikely((rate_idx < 0) || (rate_idx >= IWL_RATE_COUNT))) {
778                         bitrate = 0;
779                         WARN_ON_ONCE(1);
780                 } else {
781                         bitrate = iwl_rates[rate_idx].ieee / 2;
782                 }
783
784                 /* print frame summary.
785                  * MAC addresses show just the last byte (for brevity),
786                  *    but you can hack it to show more, if you'd like to. */
787                 if (dataframe)
788                         IWL_DEBUG_RX(priv, "%s: mhd=0x%04x, dst=0x%02x, "
789                                      "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
790                                      title, le16_to_cpu(fc), header->addr1[5],
791                                      length, rssi, channel, bitrate);
792                 else {
793                         /* src/dst addresses assume managed mode */
794                         IWL_DEBUG_RX(priv, "%s: 0x%04x, dst=0x%02x, src=0x%02x, "
795                                      "len=%u, rssi=%d, tim=%lu usec, "
796                                      "phy=0x%02x, chnl=%d\n",
797                                      title, le16_to_cpu(fc), header->addr1[5],
798                                      header->addr3[5], length, rssi,
799                                      tsf_low - priv->scan_start_tsf,
800                                      phy_flags, channel);
801                 }
802         }
803         if (print_dump)
804                 iwl_print_hex_dump(priv, IWL_DL_RX, header, length);
805 }
806 #endif
807
808 /*
809  * returns non-zero if packet should be dropped
810  */
811 int iwl_set_decrypted_flag(struct iwl_priv *priv,
812                            struct ieee80211_hdr *hdr,
813                            u32 decrypt_res,
814                            struct ieee80211_rx_status *stats)
815 {
816         u16 fc = le16_to_cpu(hdr->frame_control);
817
818         if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
819                 return 0;
820
821         if (!(fc & IEEE80211_FCTL_PROTECTED))
822                 return 0;
823
824         IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res);
825         switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
826         case RX_RES_STATUS_SEC_TYPE_TKIP:
827                 /* The uCode has got a bad phase 1 Key, pushes the packet.
828                  * Decryption will be done in SW. */
829                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
830                     RX_RES_STATUS_BAD_KEY_TTAK)
831                         break;
832
833         case RX_RES_STATUS_SEC_TYPE_WEP:
834                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
835                     RX_RES_STATUS_BAD_ICV_MIC) {
836                         /* bad ICV, the packet is destroyed since the
837                          * decryption is inplace, drop it */
838                         IWL_DEBUG_RX(priv, "Packet destroyed\n");
839                         return -1;
840                 }
841         case RX_RES_STATUS_SEC_TYPE_CCMP:
842                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
843                     RX_RES_STATUS_DECRYPT_OK) {
844                         IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n");
845                         stats->flag |= RX_FLAG_DECRYPTED;
846                 }
847                 break;
848
849         default:
850                 break;
851         }
852         return 0;
853 }
854 EXPORT_SYMBOL(iwl_set_decrypted_flag);
855
856 static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
857 {
858         u32 decrypt_out = 0;
859
860         if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
861                                         RX_RES_STATUS_STATION_FOUND)
862                 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
863                                 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
864
865         decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
866
867         /* packet was not encrypted */
868         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
869                                         RX_RES_STATUS_SEC_TYPE_NONE)
870                 return decrypt_out;
871
872         /* packet was encrypted with unknown alg */
873         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
874                                         RX_RES_STATUS_SEC_TYPE_ERR)
875                 return decrypt_out;
876
877         /* decryption was not done in HW */
878         if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
879                                         RX_MPDU_RES_STATUS_DEC_DONE_MSK)
880                 return decrypt_out;
881
882         switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
883
884         case RX_RES_STATUS_SEC_TYPE_CCMP:
885                 /* alg is CCM: check MIC only */
886                 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
887                         /* Bad MIC */
888                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
889                 else
890                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
891
892                 break;
893
894         case RX_RES_STATUS_SEC_TYPE_TKIP:
895                 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
896                         /* Bad TTAK */
897                         decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
898                         break;
899                 }
900                 /* fall through if TTAK OK */
901         default:
902                 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
903                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
904                 else
905                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
906                 break;
907         };
908
909         IWL_DEBUG_RX(priv, "decrypt_in:0x%x  decrypt_out = 0x%x\n",
910                                         decrypt_in, decrypt_out);
911
912         return decrypt_out;
913 }
914
915 static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
916                                         struct ieee80211_hdr *hdr,
917                                         u16 len,
918                                         u32 ampdu_status,
919                                         struct iwl_rx_mem_buffer *rxb,
920                                         struct ieee80211_rx_status *stats)
921 {
922         /* We only process data packets if the interface is open */
923         if (unlikely(!priv->is_open)) {
924                 IWL_DEBUG_DROP_LIMIT(priv,
925                     "Dropping packet while interface is not open.\n");
926                 return;
927         }
928
929         /* In case of HW accelerated crypto and bad decryption, drop */
930         if (!priv->cfg->mod_params->sw_crypto &&
931             iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
932                 return;
933
934         /* Resize SKB from mac header to end of packet */
935         skb_reserve(rxb->skb, (void *)hdr - (void *)rxb->skb->data);
936         skb_put(rxb->skb, len);
937
938         iwl_update_stats(priv, false, hdr->frame_control, len);
939         memcpy(IEEE80211_SKB_RXCB(rxb->skb), stats, sizeof(*stats));
940         ieee80211_rx_irqsafe(priv->hw, rxb->skb);
941         priv->alloc_rxb_skb--;
942         rxb->skb = NULL;
943 }
944
945 /* This is necessary only for a number of statistics, see the caller. */
946 static int iwl_is_network_packet(struct iwl_priv *priv,
947                 struct ieee80211_hdr *header)
948 {
949         /* Filter incoming packets to determine if they are targeted toward
950          * this network, discarding packets coming from ourselves */
951         switch (priv->iw_mode) {
952         case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source    | BSSID */
953                 /* packets to our IBSS update information */
954                 return !compare_ether_addr(header->addr3, priv->bssid);
955         case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
956                 /* packets to our IBSS update information */
957                 return !compare_ether_addr(header->addr2, priv->bssid);
958         default:
959                 return 1;
960         }
961 }
962
963 /* Called for REPLY_RX (legacy ABG frames), or
964  * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
965 void iwl_rx_reply_rx(struct iwl_priv *priv,
966                                 struct iwl_rx_mem_buffer *rxb)
967 {
968         struct ieee80211_hdr *header;
969         struct ieee80211_rx_status rx_status;
970         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
971         struct iwl_rx_phy_res *phy_res;
972         __le32 rx_pkt_status;
973         struct iwl4965_rx_mpdu_res_start *amsdu;
974         u32 len;
975         u32 ampdu_status;
976         u16 fc;
977         u32 rate_n_flags;
978
979         /**
980          * REPLY_RX and REPLY_RX_MPDU_CMD are handled differently.
981          *      REPLY_RX: physical layer info is in this buffer
982          *      REPLY_RX_MPDU_CMD: physical layer info was sent in separate
983          *              command and cached in priv->last_phy_res
984          *
985          * Here we set up local variables depending on which command is
986          * received.
987          */
988         if (pkt->hdr.cmd == REPLY_RX) {
989                 phy_res = (struct iwl_rx_phy_res *)pkt->u.raw;
990                 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res)
991                                 + phy_res->cfg_phy_cnt);
992
993                 len = le16_to_cpu(phy_res->byte_count);
994                 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*phy_res) +
995                                 phy_res->cfg_phy_cnt + len);
996                 ampdu_status = le32_to_cpu(rx_pkt_status);
997         } else {
998                 if (!priv->last_phy_res[0]) {
999                         IWL_ERR(priv, "MPDU frame without cached PHY data\n");
1000                         return;
1001                 }
1002                 phy_res = (struct iwl_rx_phy_res *)&priv->last_phy_res[1];
1003                 amsdu = (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
1004                 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
1005                 len = le16_to_cpu(amsdu->byte_count);
1006                 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*amsdu) + len);
1007                 ampdu_status = iwl_translate_rx_status(priv,
1008                                 le32_to_cpu(rx_pkt_status));
1009         }
1010
1011         if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
1012                 IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
1013                                 phy_res->cfg_phy_cnt);
1014                 return;
1015         }
1016
1017         if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
1018             !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
1019                 IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n",
1020                                 le32_to_cpu(rx_pkt_status));
1021                 return;
1022         }
1023
1024         /* This will be used in several places later */
1025         rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
1026
1027         /* rx_status carries information about the packet to mac80211 */
1028         rx_status.mactime = le64_to_cpu(phy_res->timestamp);
1029         rx_status.freq =
1030                 ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel));
1031         rx_status.band = (phy_res->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
1032                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1033         rx_status.rate_idx =
1034                 iwl_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band);
1035         rx_status.flag = 0;
1036
1037         /* TSF isn't reliable. In order to allow smooth user experience,
1038          * this W/A doesn't propagate it to the mac80211 */
1039         /*rx_status.flag |= RX_FLAG_TSFT;*/
1040
1041         priv->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
1042
1043         /* Find max signal strength (dBm) among 3 antenna/receiver chains */
1044         rx_status.signal = iwl_calc_rssi(priv, phy_res);
1045
1046         /* Meaningful noise values are available only from beacon statistics,
1047          *   which are gathered only when associated, and indicate noise
1048          *   only for the associated network channel ...
1049          * Ignore these noise values while scanning (other channels) */
1050         if (iwl_is_associated(priv) &&
1051             !test_bit(STATUS_SCANNING, &priv->status)) {
1052                 rx_status.noise = priv->last_rx_noise;
1053                 rx_status.qual = iwl_calc_sig_qual(rx_status.signal,
1054                                                          rx_status.noise);
1055         } else {
1056                 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1057                 rx_status.qual = iwl_calc_sig_qual(rx_status.signal, 0);
1058         }
1059
1060         /* Reset beacon noise level if not associated. */
1061         if (!iwl_is_associated(priv))
1062                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1063
1064 #ifdef CONFIG_IWLWIFI_DEBUG
1065         /* Set "1" to report good data frames in groups of 100 */
1066         if (unlikely(iwl_get_debug_level(priv) & IWL_DL_RX))
1067                 iwl_dbg_report_frame(priv, phy_res, len, header, 1);
1068 #endif
1069         iwl_dbg_log_rx_data_frame(priv, len, header);
1070         IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, noise %d, qual %d, TSF %llu\n",
1071                 rx_status.signal, rx_status.noise, rx_status.qual,
1072                 (unsigned long long)rx_status.mactime);
1073
1074         /*
1075          * "antenna number"
1076          *
1077          * It seems that the antenna field in the phy flags value
1078          * is actually a bit field. This is undefined by radiotap,
1079          * it wants an actual antenna number but I always get "7"
1080          * for most legacy frames I receive indicating that the
1081          * same frame was received on all three RX chains.
1082          *
1083          * I think this field should be removed in favor of a
1084          * new 802.11n radiotap field "RX chains" that is defined
1085          * as a bitmask.
1086          */
1087         rx_status.antenna =
1088                 (le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK)
1089                 >> RX_RES_PHY_FLAGS_ANTENNA_POS;
1090
1091         /* set the preamble flag if appropriate */
1092         if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
1093                 rx_status.flag |= RX_FLAG_SHORTPRE;
1094
1095         /* Set up the HT phy flags */
1096         if (rate_n_flags & RATE_MCS_HT_MSK)
1097                 rx_status.flag |= RX_FLAG_HT;
1098         if (rate_n_flags & RATE_MCS_HT40_MSK)
1099                 rx_status.flag |= RX_FLAG_40MHZ;
1100         if (rate_n_flags & RATE_MCS_SGI_MSK)
1101                 rx_status.flag |= RX_FLAG_SHORT_GI;
1102
1103         if (iwl_is_network_packet(priv, header)) {
1104                 priv->last_rx_rssi = rx_status.signal;
1105                 priv->last_beacon_time =  priv->ucode_beacon_time;
1106                 priv->last_tsf = le64_to_cpu(phy_res->timestamp);
1107         }
1108
1109         fc = le16_to_cpu(header->frame_control);
1110         switch (fc & IEEE80211_FCTL_FTYPE) {
1111         case IEEE80211_FTYPE_MGMT:
1112         case IEEE80211_FTYPE_DATA:
1113                 if (priv->iw_mode == NL80211_IFTYPE_AP)
1114                         iwl_update_ps_mode(priv, fc  & IEEE80211_FCTL_PM,
1115                                                 header->addr2);
1116                 /* fall through */
1117         default:
1118                 iwl_pass_packet_to_mac80211(priv, header, len, ampdu_status,
1119                                 rxb, &rx_status);
1120                 break;
1121
1122         }
1123 }
1124 EXPORT_SYMBOL(iwl_rx_reply_rx);
1125
1126 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
1127  * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
1128 void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
1129                                     struct iwl_rx_mem_buffer *rxb)
1130 {
1131         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1132         priv->last_phy_res[0] = 1;
1133         memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
1134                sizeof(struct iwl_rx_phy_res));
1135 }
1136 EXPORT_SYMBOL(iwl_rx_reply_rx_phy);