iwl3945: kill iwl3945_rx_queue_restock
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl-rx.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #include <linux/etherdevice.h>
31 #include <net/mac80211.h>
32 #include <asm/unaligned.h>
33 #include "iwl-eeprom.h"
34 #include "iwl-dev.h"
35 #include "iwl-core.h"
36 #include "iwl-sta.h"
37 #include "iwl-io.h"
38 #include "iwl-calib.h"
39 #include "iwl-helpers.h"
40 /************************** RX-FUNCTIONS ****************************/
41 /*
42  * Rx theory of operation
43  *
44  * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
45  * each of which point to Receive Buffers to be filled by the NIC.  These get
46  * used not only for Rx frames, but for any command response or notification
47  * from the NIC.  The driver and NIC manage the Rx buffers by means
48  * of indexes into the circular buffer.
49  *
50  * Rx Queue Indexes
51  * The host/firmware share two index registers for managing the Rx buffers.
52  *
53  * The READ index maps to the first position that the firmware may be writing
54  * to -- the driver can read up to (but not including) this position and get
55  * good data.
56  * The READ index is managed by the firmware once the card is enabled.
57  *
58  * The WRITE index maps to the last position the driver has read from -- the
59  * position preceding WRITE is the last slot the firmware can place a packet.
60  *
61  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
62  * WRITE = READ.
63  *
64  * During initialization, the host sets up the READ queue position to the first
65  * INDEX position, and WRITE to the last (READ - 1 wrapped)
66  *
67  * When the firmware places a packet in a buffer, it will advance the READ index
68  * and fire the RX interrupt.  The driver can then query the READ index and
69  * process as many packets as possible, moving the WRITE index forward as it
70  * resets the Rx queue buffers with new memory.
71  *
72  * The management in the driver is as follows:
73  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
74  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
75  *   to replenish the iwl->rxq->rx_free.
76  * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
77  *   iwl->rxq is replenished and the READ INDEX is updated (updating the
78  *   'processed' and 'read' driver indexes as well)
79  * + A received packet is processed and handed to the kernel network stack,
80  *   detached from the iwl->rxq.  The driver 'processed' index is updated.
81  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
82  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
83  *   INDEX is not incremented and iwl->status(RX_STALLED) is set.  If there
84  *   were enough free buffers and RX_STALLED is set it is cleared.
85  *
86  *
87  * Driver sequence:
88  *
89  * iwl_rx_queue_alloc()   Allocates rx_free
90  * iwl_rx_replenish()     Replenishes rx_free list from rx_used, and calls
91  *                            iwl_rx_queue_restock
92  * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
93  *                            queue, updates firmware pointers, and updates
94  *                            the WRITE index.  If insufficient rx_free buffers
95  *                            are available, schedules iwl_rx_replenish
96  *
97  * -- enable interrupts --
98  * ISR - iwl_rx()         Detach iwl_rx_mem_buffers from pool up to the
99  *                            READ INDEX, detaching the SKB from the pool.
100  *                            Moves the packet buffer from queue to rx_used.
101  *                            Calls iwl_rx_queue_restock to refill any empty
102  *                            slots.
103  * ...
104  *
105  */
106
107 /**
108  * iwl_rx_queue_space - Return number of free slots available in queue.
109  */
110 int iwl_rx_queue_space(const struct iwl_rx_queue *q)
111 {
112         int s = q->read - q->write;
113         if (s <= 0)
114                 s += RX_QUEUE_SIZE;
115         /* keep some buffer to not confuse full and empty queue */
116         s -= 2;
117         if (s < 0)
118                 s = 0;
119         return s;
120 }
121 EXPORT_SYMBOL(iwl_rx_queue_space);
122
123 /**
124  * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
125  */
126 int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
127 {
128         unsigned long flags;
129         u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
130         u32 reg;
131         int ret = 0;
132
133         spin_lock_irqsave(&q->lock, flags);
134
135         if (q->need_update == 0)
136                 goto exit_unlock;
137
138         /* If power-saving is in use, make sure device is awake */
139         if (test_bit(STATUS_POWER_PMI, &priv->status)) {
140                 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
141
142                 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
143                         iwl_set_bit(priv, CSR_GP_CNTRL,
144                                     CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
145                         goto exit_unlock;
146                 }
147
148                 ret = iwl_grab_nic_access(priv);
149                 if (ret)
150                         goto exit_unlock;
151
152                 /* Device expects a multiple of 8 */
153                 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write & ~0x7);
154                 iwl_release_nic_access(priv);
155
156         /* Else device is assumed to be awake */
157         } else {
158                 /* Device expects a multiple of 8 */
159                 iwl_write32(priv, rx_wrt_ptr_reg, q->write & ~0x7);
160         }
161
162         q->need_update = 0;
163
164  exit_unlock:
165         spin_unlock_irqrestore(&q->lock, flags);
166         return ret;
167 }
168 EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
169 /**
170  * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
171  */
172 static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
173                                           dma_addr_t dma_addr)
174 {
175         return cpu_to_le32((u32)(dma_addr >> 8));
176 }
177
178 /**
179  * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
180  *
181  * If there are slots in the RX queue that need to be restocked,
182  * and we have free pre-allocated buffers, fill the ranks as much
183  * as we can, pulling from rx_free.
184  *
185  * This moves the 'write' index forward to catch up with 'processed', and
186  * also updates the memory address in the firmware to reference the new
187  * target buffer.
188  */
189 int iwl_rx_queue_restock(struct iwl_priv *priv)
190 {
191         struct iwl_rx_queue *rxq = &priv->rxq;
192         struct list_head *element;
193         struct iwl_rx_mem_buffer *rxb;
194         unsigned long flags;
195         int write;
196         int ret = 0;
197
198         spin_lock_irqsave(&rxq->lock, flags);
199         write = rxq->write & ~0x7;
200         while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
201                 /* Get next free Rx buffer, remove from free list */
202                 element = rxq->rx_free.next;
203                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
204                 list_del(element);
205
206                 /* Point to Rx buffer via next RBD in circular buffer */
207                 rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->aligned_dma_addr);
208                 rxq->queue[rxq->write] = rxb;
209                 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
210                 rxq->free_count--;
211         }
212         spin_unlock_irqrestore(&rxq->lock, flags);
213         /* If the pre-allocated buffer pool is dropping low, schedule to
214          * refill it */
215         if (rxq->free_count <= RX_LOW_WATERMARK)
216                 queue_work(priv->workqueue, &priv->rx_replenish);
217
218
219         /* If we've added more space for the firmware to place data, tell it.
220          * Increment device's write pointer in multiples of 8. */
221         if (write != (rxq->write & ~0x7)) {
222                 spin_lock_irqsave(&rxq->lock, flags);
223                 rxq->need_update = 1;
224                 spin_unlock_irqrestore(&rxq->lock, flags);
225                 ret = iwl_rx_queue_update_write_ptr(priv, rxq);
226         }
227
228         return ret;
229 }
230 EXPORT_SYMBOL(iwl_rx_queue_restock);
231
232
233 /**
234  * iwl_rx_replenish - Move all used packet from rx_used to rx_free
235  *
236  * When moving to rx_free an SKB is allocated for the slot.
237  *
238  * Also restock the Rx queue via iwl_rx_queue_restock.
239  * This is called as a scheduled work item (except for during initialization)
240  */
241 void iwl_rx_allocate(struct iwl_priv *priv)
242 {
243         struct iwl_rx_queue *rxq = &priv->rxq;
244         struct list_head *element;
245         struct iwl_rx_mem_buffer *rxb;
246         unsigned long flags;
247
248         while (1) {
249                 spin_lock_irqsave(&rxq->lock, flags);
250
251                 if (list_empty(&rxq->rx_used)) {
252                         spin_unlock_irqrestore(&rxq->lock, flags);
253                         return;
254                 }
255                 element = rxq->rx_used.next;
256                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
257                 list_del(element);
258
259                 spin_unlock_irqrestore(&rxq->lock, flags);
260
261                 /* Alloc a new receive buffer */
262                 rxb->skb = alloc_skb(priv->hw_params.rx_buf_size + 256,
263                                      GFP_KERNEL);
264                 if (!rxb->skb) {
265                         IWL_CRIT(priv, "Can not allocate SKB buffers\n");
266                         /* We don't reschedule replenish work here -- we will
267                          * call the restock method and if it still needs
268                          * more buffers it will schedule replenish */
269                         break;
270                 }
271
272                 /* Get physical address of RB/SKB */
273                 rxb->real_dma_addr = pci_map_single(
274                                         priv->pci_dev,
275                                         rxb->skb->data,
276                                         priv->hw_params.rx_buf_size + 256,
277                                         PCI_DMA_FROMDEVICE);
278                 /* dma address must be no more than 36 bits */
279                 BUG_ON(rxb->real_dma_addr & ~DMA_BIT_MASK(36));
280                 /* and also 256 byte aligned! */
281                 rxb->aligned_dma_addr = ALIGN(rxb->real_dma_addr, 256);
282                 skb_reserve(rxb->skb, rxb->aligned_dma_addr - rxb->real_dma_addr);
283
284                 spin_lock_irqsave(&rxq->lock, flags);
285
286                 list_add_tail(&rxb->list, &rxq->rx_free);
287                 rxq->free_count++;
288                 priv->alloc_rxb_skb++;
289
290                 spin_unlock_irqrestore(&rxq->lock, flags);
291         }
292 }
293
294 void iwl_rx_replenish(struct iwl_priv *priv)
295 {
296         unsigned long flags;
297
298         iwl_rx_allocate(priv);
299
300         spin_lock_irqsave(&priv->lock, flags);
301         iwl_rx_queue_restock(priv);
302         spin_unlock_irqrestore(&priv->lock, flags);
303 }
304 EXPORT_SYMBOL(iwl_rx_replenish);
305
306
307 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
308  * If an SKB has been detached, the POOL needs to have its SKB set to NULL
309  * This free routine walks the list of POOL entries and if SKB is set to
310  * non NULL it is unmapped and freed
311  */
312 void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
313 {
314         int i;
315         for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
316                 if (rxq->pool[i].skb != NULL) {
317                         pci_unmap_single(priv->pci_dev,
318                                          rxq->pool[i].real_dma_addr,
319                                          priv->hw_params.rx_buf_size + 256,
320                                          PCI_DMA_FROMDEVICE);
321                         dev_kfree_skb(rxq->pool[i].skb);
322                 }
323         }
324
325         pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
326                             rxq->dma_addr);
327         pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
328                             rxq->rb_stts, rxq->rb_stts_dma);
329         rxq->bd = NULL;
330         rxq->rb_stts  = NULL;
331 }
332 EXPORT_SYMBOL(iwl_rx_queue_free);
333
334 int iwl_rx_queue_alloc(struct iwl_priv *priv)
335 {
336         struct iwl_rx_queue *rxq = &priv->rxq;
337         struct pci_dev *dev = priv->pci_dev;
338         int i;
339
340         spin_lock_init(&rxq->lock);
341         INIT_LIST_HEAD(&rxq->rx_free);
342         INIT_LIST_HEAD(&rxq->rx_used);
343
344         /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
345         rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
346         if (!rxq->bd)
347                 goto err_bd;
348
349         rxq->rb_stts = pci_alloc_consistent(dev, sizeof(struct iwl_rb_status),
350                                         &rxq->rb_stts_dma);
351         if (!rxq->rb_stts)
352                 goto err_rb;
353
354         /* Fill the rx_used queue with _all_ of the Rx buffers */
355         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
356                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
357
358         /* Set us so that we have processed and used all buffers, but have
359          * not restocked the Rx queue with fresh buffers */
360         rxq->read = rxq->write = 0;
361         rxq->free_count = 0;
362         rxq->need_update = 0;
363         return 0;
364
365 err_rb:
366         pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
367                             rxq->dma_addr);
368 err_bd:
369         return -ENOMEM;
370 }
371 EXPORT_SYMBOL(iwl_rx_queue_alloc);
372
373 void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
374 {
375         unsigned long flags;
376         int i;
377         spin_lock_irqsave(&rxq->lock, flags);
378         INIT_LIST_HEAD(&rxq->rx_free);
379         INIT_LIST_HEAD(&rxq->rx_used);
380         /* Fill the rx_used queue with _all_ of the Rx buffers */
381         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
382                 /* In the reset function, these buffers may have been allocated
383                  * to an SKB, so we need to unmap and free potential storage */
384                 if (rxq->pool[i].skb != NULL) {
385                         pci_unmap_single(priv->pci_dev,
386                                          rxq->pool[i].real_dma_addr,
387                                          priv->hw_params.rx_buf_size + 256,
388                                          PCI_DMA_FROMDEVICE);
389                         priv->alloc_rxb_skb--;
390                         dev_kfree_skb(rxq->pool[i].skb);
391                         rxq->pool[i].skb = NULL;
392                 }
393                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
394         }
395
396         /* Set us so that we have processed and used all buffers, but have
397          * not restocked the Rx queue with fresh buffers */
398         rxq->read = rxq->write = 0;
399         rxq->free_count = 0;
400         spin_unlock_irqrestore(&rxq->lock, flags);
401 }
402 EXPORT_SYMBOL(iwl_rx_queue_reset);
403
404 int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
405 {
406         int ret;
407         unsigned long flags;
408         u32 rb_size;
409         const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
410         const u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT why this stalls RX */
411
412         spin_lock_irqsave(&priv->lock, flags);
413         ret = iwl_grab_nic_access(priv);
414         if (ret) {
415                 spin_unlock_irqrestore(&priv->lock, flags);
416                 return ret;
417         }
418
419         if (priv->cfg->mod_params->amsdu_size_8K)
420                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
421         else
422                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
423
424         /* Stop Rx DMA */
425         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
426
427         /* Reset driver's Rx queue write index */
428         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
429
430         /* Tell device where to find RBD circular buffer in DRAM */
431         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
432                            (u32)(rxq->dma_addr >> 8));
433
434         /* Tell device where in DRAM to update its Rx status */
435         iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
436                            rxq->rb_stts_dma >> 4);
437
438         /* Enable Rx DMA
439          * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
440          *      the credit mechanism in 5000 HW RX FIFO
441          * Direct rx interrupts to hosts
442          * Rx buffer size 4 or 8k
443          * RB timeout 0x10
444          * 256 RBDs
445          */
446         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
447                            FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
448                            FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
449                            FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
450                            FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
451                            rb_size|
452                            (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
453                            (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
454
455         iwl_release_nic_access(priv);
456
457         iwl_write32(priv, CSR_INT_COALESCING, 0x40);
458
459         spin_unlock_irqrestore(&priv->lock, flags);
460
461         return 0;
462 }
463
464 int iwl_rxq_stop(struct iwl_priv *priv)
465 {
466         int ret;
467         unsigned long flags;
468
469         spin_lock_irqsave(&priv->lock, flags);
470         ret = iwl_grab_nic_access(priv);
471         if (unlikely(ret)) {
472                 spin_unlock_irqrestore(&priv->lock, flags);
473                 return ret;
474         }
475
476         /* stop Rx DMA */
477         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
478         iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
479                             FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
480
481         iwl_release_nic_access(priv);
482         spin_unlock_irqrestore(&priv->lock, flags);
483
484         return 0;
485 }
486 EXPORT_SYMBOL(iwl_rxq_stop);
487
488 void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
489                                 struct iwl_rx_mem_buffer *rxb)
490
491 {
492         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
493         struct iwl_missed_beacon_notif *missed_beacon;
494
495         missed_beacon = &pkt->u.missed_beacon;
496         if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
497                 IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
498                     le32_to_cpu(missed_beacon->consequtive_missed_beacons),
499                     le32_to_cpu(missed_beacon->total_missed_becons),
500                     le32_to_cpu(missed_beacon->num_recvd_beacons),
501                     le32_to_cpu(missed_beacon->num_expected_beacons));
502                 if (!test_bit(STATUS_SCANNING, &priv->status))
503                         iwl_init_sensitivity(priv);
504         }
505 }
506 EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
507
508
509 /* Calculate noise level, based on measurements during network silence just
510  *   before arriving beacon.  This measurement can be done only if we know
511  *   exactly when to expect beacons, therefore only when we're associated. */
512 static void iwl_rx_calc_noise(struct iwl_priv *priv)
513 {
514         struct statistics_rx_non_phy *rx_info
515                                 = &(priv->statistics.rx.general);
516         int num_active_rx = 0;
517         int total_silence = 0;
518         int bcn_silence_a =
519                 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
520         int bcn_silence_b =
521                 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
522         int bcn_silence_c =
523                 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
524
525         if (bcn_silence_a) {
526                 total_silence += bcn_silence_a;
527                 num_active_rx++;
528         }
529         if (bcn_silence_b) {
530                 total_silence += bcn_silence_b;
531                 num_active_rx++;
532         }
533         if (bcn_silence_c) {
534                 total_silence += bcn_silence_c;
535                 num_active_rx++;
536         }
537
538         /* Average among active antennas */
539         if (num_active_rx)
540                 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
541         else
542                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
543
544         IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
545                         bcn_silence_a, bcn_silence_b, bcn_silence_c,
546                         priv->last_rx_noise);
547 }
548
549 #define REG_RECALIB_PERIOD (60)
550
551 void iwl_rx_statistics(struct iwl_priv *priv,
552                               struct iwl_rx_mem_buffer *rxb)
553 {
554         int change;
555         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
556
557         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
558                      (int)sizeof(priv->statistics), pkt->len);
559
560         change = ((priv->statistics.general.temperature !=
561                    pkt->u.stats.general.temperature) ||
562                   ((priv->statistics.flag &
563                     STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
564                    (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
565
566         memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
567
568         set_bit(STATUS_STATISTICS, &priv->status);
569
570         /* Reschedule the statistics timer to occur in
571          * REG_RECALIB_PERIOD seconds to ensure we get a
572          * thermal update even if the uCode doesn't give
573          * us one */
574         mod_timer(&priv->statistics_periodic, jiffies +
575                   msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
576
577         if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
578             (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
579                 iwl_rx_calc_noise(priv);
580                 queue_work(priv->workqueue, &priv->run_time_calib_work);
581         }
582
583         iwl_leds_background(priv);
584
585         if (priv->cfg->ops->lib->temperature && change)
586                 priv->cfg->ops->lib->temperature(priv);
587 }
588 EXPORT_SYMBOL(iwl_rx_statistics);
589
590 #define PERFECT_RSSI (-20) /* dBm */
591 #define WORST_RSSI (-95)   /* dBm */
592 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
593
594 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
595  * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
596  *   about formulas used below. */
597 static int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
598 {
599         int sig_qual;
600         int degradation = PERFECT_RSSI - rssi_dbm;
601
602         /* If we get a noise measurement, use signal-to-noise ratio (SNR)
603          * as indicator; formula is (signal dbm - noise dbm).
604          * SNR at or above 40 is a great signal (100%).
605          * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
606          * Weakest usable signal is usually 10 - 15 dB SNR. */
607         if (noise_dbm) {
608                 if (rssi_dbm - noise_dbm >= 40)
609                         return 100;
610                 else if (rssi_dbm < noise_dbm)
611                         return 0;
612                 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
613
614         /* Else use just the signal level.
615          * This formula is a least squares fit of data points collected and
616          *   compared with a reference system that had a percentage (%) display
617          *   for signal quality. */
618         } else
619                 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
620                             (15 * RSSI_RANGE + 62 * degradation)) /
621                            (RSSI_RANGE * RSSI_RANGE);
622
623         if (sig_qual > 100)
624                 sig_qual = 100;
625         else if (sig_qual < 1)
626                 sig_qual = 0;
627
628         return sig_qual;
629 }
630
631 /* Calc max signal level (dBm) among 3 possible receivers */
632 static inline int iwl_calc_rssi(struct iwl_priv *priv,
633                                 struct iwl_rx_phy_res *rx_resp)
634 {
635         return priv->cfg->ops->utils->calc_rssi(priv, rx_resp);
636 }
637
638 #ifdef CONFIG_IWLWIFI_DEBUG
639 /**
640  * iwl_dbg_report_frame - dump frame to syslog during debug sessions
641  *
642  * You may hack this function to show different aspects of received frames,
643  * including selective frame dumps.
644  * group100 parameter selects whether to show 1 out of 100 good data frames.
645  *    All beacon and probe response frames are printed.
646  */
647 static void iwl_dbg_report_frame(struct iwl_priv *priv,
648                       struct iwl_rx_phy_res *phy_res, u16 length,
649                       struct ieee80211_hdr *header, int group100)
650 {
651         u32 to_us;
652         u32 print_summary = 0;
653         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
654         u32 hundred = 0;
655         u32 dataframe = 0;
656         __le16 fc;
657         u16 seq_ctl;
658         u16 channel;
659         u16 phy_flags;
660         u32 rate_n_flags;
661         u32 tsf_low;
662         int rssi;
663
664         if (likely(!(priv->debug_level & IWL_DL_RX)))
665                 return;
666
667         /* MAC header */
668         fc = header->frame_control;
669         seq_ctl = le16_to_cpu(header->seq_ctrl);
670
671         /* metadata */
672         channel = le16_to_cpu(phy_res->channel);
673         phy_flags = le16_to_cpu(phy_res->phy_flags);
674         rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
675
676         /* signal statistics */
677         rssi = iwl_calc_rssi(priv, phy_res);
678         tsf_low = le64_to_cpu(phy_res->timestamp) & 0x0ffffffff;
679
680         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
681
682         /* if data frame is to us and all is good,
683          *   (optionally) print summary for only 1 out of every 100 */
684         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
685             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
686                 dataframe = 1;
687                 if (!group100)
688                         print_summary = 1;      /* print each frame */
689                 else if (priv->framecnt_to_us < 100) {
690                         priv->framecnt_to_us++;
691                         print_summary = 0;
692                 } else {
693                         priv->framecnt_to_us = 0;
694                         print_summary = 1;
695                         hundred = 1;
696                 }
697         } else {
698                 /* print summary for all other frames */
699                 print_summary = 1;
700         }
701
702         if (print_summary) {
703                 char *title;
704                 int rate_idx;
705                 u32 bitrate;
706
707                 if (hundred)
708                         title = "100Frames";
709                 else if (ieee80211_has_retry(fc))
710                         title = "Retry";
711                 else if (ieee80211_is_assoc_resp(fc))
712                         title = "AscRsp";
713                 else if (ieee80211_is_reassoc_resp(fc))
714                         title = "RasRsp";
715                 else if (ieee80211_is_probe_resp(fc)) {
716                         title = "PrbRsp";
717                         print_dump = 1; /* dump frame contents */
718                 } else if (ieee80211_is_beacon(fc)) {
719                         title = "Beacon";
720                         print_dump = 1; /* dump frame contents */
721                 } else if (ieee80211_is_atim(fc))
722                         title = "ATIM";
723                 else if (ieee80211_is_auth(fc))
724                         title = "Auth";
725                 else if (ieee80211_is_deauth(fc))
726                         title = "DeAuth";
727                 else if (ieee80211_is_disassoc(fc))
728                         title = "DisAssoc";
729                 else
730                         title = "Frame";
731
732                 rate_idx = iwl_hwrate_to_plcp_idx(rate_n_flags);
733                 if (unlikely((rate_idx < 0) || (rate_idx >= IWL_RATE_COUNT))) {
734                         bitrate = 0;
735                         WARN_ON_ONCE(1);
736                 } else {
737                         bitrate = iwl_rates[rate_idx].ieee / 2;
738                 }
739
740                 /* print frame summary.
741                  * MAC addresses show just the last byte (for brevity),
742                  *    but you can hack it to show more, if you'd like to. */
743                 if (dataframe)
744                         IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
745                                      "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
746                                      title, le16_to_cpu(fc), header->addr1[5],
747                                      length, rssi, channel, bitrate);
748                 else {
749                         /* src/dst addresses assume managed mode */
750                         IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, src=0x%02x, "
751                                      "len=%u, rssi=%d, tim=%lu usec, "
752                                      "phy=0x%02x, chnl=%d\n",
753                                      title, le16_to_cpu(fc), header->addr1[5],
754                                      header->addr3[5], length, rssi,
755                                      tsf_low - priv->scan_start_tsf,
756                                      phy_flags, channel);
757                 }
758         }
759         if (print_dump)
760                 iwl_print_hex_dump(priv, IWL_DL_RX, header, length);
761 }
762 #endif
763
764 static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
765 {
766         /* 0 - mgmt, 1 - cnt, 2 - data */
767         int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
768         priv->rx_stats[idx].cnt++;
769         priv->rx_stats[idx].bytes += len;
770 }
771
772 /*
773  * returns non-zero if packet should be dropped
774  */
775 static int iwl_set_decrypted_flag(struct iwl_priv *priv,
776                                       struct ieee80211_hdr *hdr,
777                                       u32 decrypt_res,
778                                       struct ieee80211_rx_status *stats)
779 {
780         u16 fc = le16_to_cpu(hdr->frame_control);
781
782         if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
783                 return 0;
784
785         if (!(fc & IEEE80211_FCTL_PROTECTED))
786                 return 0;
787
788         IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
789         switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
790         case RX_RES_STATUS_SEC_TYPE_TKIP:
791                 /* The uCode has got a bad phase 1 Key, pushes the packet.
792                  * Decryption will be done in SW. */
793                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
794                     RX_RES_STATUS_BAD_KEY_TTAK)
795                         break;
796
797         case RX_RES_STATUS_SEC_TYPE_WEP:
798                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
799                     RX_RES_STATUS_BAD_ICV_MIC) {
800                         /* bad ICV, the packet is destroyed since the
801                          * decryption is inplace, drop it */
802                         IWL_DEBUG_RX("Packet destroyed\n");
803                         return -1;
804                 }
805         case RX_RES_STATUS_SEC_TYPE_CCMP:
806                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
807                     RX_RES_STATUS_DECRYPT_OK) {
808                         IWL_DEBUG_RX("hw decrypt successfully!!!\n");
809                         stats->flag |= RX_FLAG_DECRYPTED;
810                 }
811                 break;
812
813         default:
814                 break;
815         }
816         return 0;
817 }
818
819 static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
820 {
821         u32 decrypt_out = 0;
822
823         if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
824                                         RX_RES_STATUS_STATION_FOUND)
825                 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
826                                 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
827
828         decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
829
830         /* packet was not encrypted */
831         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
832                                         RX_RES_STATUS_SEC_TYPE_NONE)
833                 return decrypt_out;
834
835         /* packet was encrypted with unknown alg */
836         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
837                                         RX_RES_STATUS_SEC_TYPE_ERR)
838                 return decrypt_out;
839
840         /* decryption was not done in HW */
841         if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
842                                         RX_MPDU_RES_STATUS_DEC_DONE_MSK)
843                 return decrypt_out;
844
845         switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
846
847         case RX_RES_STATUS_SEC_TYPE_CCMP:
848                 /* alg is CCM: check MIC only */
849                 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
850                         /* Bad MIC */
851                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
852                 else
853                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
854
855                 break;
856
857         case RX_RES_STATUS_SEC_TYPE_TKIP:
858                 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
859                         /* Bad TTAK */
860                         decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
861                         break;
862                 }
863                 /* fall through if TTAK OK */
864         default:
865                 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
866                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
867                 else
868                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
869                 break;
870         };
871
872         IWL_DEBUG_RX("decrypt_in:0x%x  decrypt_out = 0x%x\n",
873                                         decrypt_in, decrypt_out);
874
875         return decrypt_out;
876 }
877
878 static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
879                                        int include_phy,
880                                        struct iwl_rx_mem_buffer *rxb,
881                                        struct ieee80211_rx_status *stats)
882 {
883         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
884         struct iwl_rx_phy_res *rx_start = (include_phy) ?
885             (struct iwl_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
886         struct ieee80211_hdr *hdr;
887         u16 len;
888         __le32 *rx_end;
889         unsigned int skblen;
890         u32 ampdu_status;
891         u32 ampdu_status_legacy;
892
893         if (!include_phy && priv->last_phy_res[0])
894                 rx_start = (struct iwl_rx_phy_res *)&priv->last_phy_res[1];
895
896         if (!rx_start) {
897                 IWL_ERR(priv, "MPDU frame without a PHY data\n");
898                 return;
899         }
900         if (include_phy) {
901                 hdr = (struct ieee80211_hdr *)((u8 *) &rx_start[1] +
902                                                rx_start->cfg_phy_cnt);
903
904                 len = le16_to_cpu(rx_start->byte_count);
905
906                 rx_end = (__le32 *)((u8 *) &pkt->u.raw[0] +
907                                   sizeof(struct iwl_rx_phy_res) +
908                                   rx_start->cfg_phy_cnt + len);
909
910         } else {
911                 struct iwl4965_rx_mpdu_res_start *amsdu =
912                     (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
913
914                 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
915                                sizeof(struct iwl4965_rx_mpdu_res_start));
916                 len =  le16_to_cpu(amsdu->byte_count);
917                 rx_start->byte_count = amsdu->byte_count;
918                 rx_end = (__le32 *) (((u8 *) hdr) + len);
919         }
920
921         ampdu_status = le32_to_cpu(*rx_end);
922         skblen = ((u8 *) rx_end - (u8 *) &pkt->u.raw[0]) + sizeof(u32);
923
924         if (!include_phy) {
925                 /* New status scheme, need to translate */
926                 ampdu_status_legacy = ampdu_status;
927                 ampdu_status = iwl_translate_rx_status(priv, ampdu_status);
928         }
929
930         /* start from MAC */
931         skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
932         skb_put(rxb->skb, len); /* end where data ends */
933
934         /* We only process data packets if the interface is open */
935         if (unlikely(!priv->is_open)) {
936                 IWL_DEBUG_DROP_LIMIT
937                     ("Dropping packet while interface is not open.\n");
938                 return;
939         }
940
941         hdr = (struct ieee80211_hdr *)rxb->skb->data;
942
943         /*  in case of HW accelerated crypto and bad decryption, drop */
944         if (!priv->hw_params.sw_crypto &&
945             iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
946                 return;
947
948         iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
949         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
950         priv->alloc_rxb_skb--;
951         rxb->skb = NULL;
952 }
953
954 /* This is necessary only for a number of statistics, see the caller. */
955 static int iwl_is_network_packet(struct iwl_priv *priv,
956                 struct ieee80211_hdr *header)
957 {
958         /* Filter incoming packets to determine if they are targeted toward
959          * this network, discarding packets coming from ourselves */
960         switch (priv->iw_mode) {
961         case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source    | BSSID */
962                 /* packets to our IBSS update information */
963                 return !compare_ether_addr(header->addr3, priv->bssid);
964         case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
965                 /* packets to our IBSS update information */
966                 return !compare_ether_addr(header->addr2, priv->bssid);
967         default:
968                 return 1;
969         }
970 }
971
972 /* Called for REPLY_RX (legacy ABG frames), or
973  * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
974 void iwl_rx_reply_rx(struct iwl_priv *priv,
975                                 struct iwl_rx_mem_buffer *rxb)
976 {
977         struct ieee80211_hdr *header;
978         struct ieee80211_rx_status rx_status;
979         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
980         /* Use phy data (Rx signal strength, etc.) contained within
981          *   this rx packet for legacy frames,
982          *   or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
983         int include_phy = (pkt->hdr.cmd == REPLY_RX);
984         struct iwl_rx_phy_res *rx_start = (include_phy) ?
985                 (struct iwl_rx_phy_res *)&(pkt->u.raw[0]) :
986                 (struct iwl_rx_phy_res *)&priv->last_phy_res[1];
987         __le32 *rx_end;
988         unsigned int len = 0;
989         u16 fc;
990         u8 network_packet;
991
992         rx_status.mactime = le64_to_cpu(rx_start->timestamp);
993         rx_status.freq =
994                 ieee80211_channel_to_frequency(le16_to_cpu(rx_start->channel));
995         rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
996                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
997         rx_status.rate_idx =
998                 iwl_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
999         if (rx_status.band == IEEE80211_BAND_5GHZ)
1000                 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
1001
1002         rx_status.flag = 0;
1003
1004         /* TSF isn't reliable. In order to allow smooth user experience,
1005          * this W/A doesn't propagate it to the mac80211 */
1006         /*rx_status.flag |= RX_FLAG_TSFT;*/
1007
1008         if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
1009                 IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
1010                                 rx_start->cfg_phy_cnt);
1011                 return;
1012         }
1013
1014         if (!include_phy) {
1015                 if (priv->last_phy_res[0])
1016                         rx_start = (struct iwl_rx_phy_res *)
1017                                 &priv->last_phy_res[1];
1018                 else
1019                         rx_start = NULL;
1020         }
1021
1022         if (!rx_start) {
1023                 IWL_ERR(priv, "MPDU frame without a PHY data\n");
1024                 return;
1025         }
1026
1027         if (include_phy) {
1028                 header = (struct ieee80211_hdr *)((u8 *) &rx_start[1]
1029                                                   + rx_start->cfg_phy_cnt);
1030
1031                 len = le16_to_cpu(rx_start->byte_count);
1032                 rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
1033                                   sizeof(struct iwl_rx_phy_res) + len);
1034         } else {
1035                 struct iwl4965_rx_mpdu_res_start *amsdu =
1036                         (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
1037
1038                 header = (void *)(pkt->u.raw +
1039                         sizeof(struct iwl4965_rx_mpdu_res_start));
1040                 len = le16_to_cpu(amsdu->byte_count);
1041                 rx_end = (__le32 *) (pkt->u.raw +
1042                         sizeof(struct iwl4965_rx_mpdu_res_start) + len);
1043         }
1044
1045         if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
1046             !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
1047                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
1048                                 le32_to_cpu(*rx_end));
1049                 return;
1050         }
1051
1052         priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
1053
1054         /* Find max signal strength (dBm) among 3 antenna/receiver chains */
1055         rx_status.signal = iwl_calc_rssi(priv, rx_start);
1056
1057         /* Meaningful noise values are available only from beacon statistics,
1058          *   which are gathered only when associated, and indicate noise
1059          *   only for the associated network channel ...
1060          * Ignore these noise values while scanning (other channels) */
1061         if (iwl_is_associated(priv) &&
1062             !test_bit(STATUS_SCANNING, &priv->status)) {
1063                 rx_status.noise = priv->last_rx_noise;
1064                 rx_status.qual = iwl_calc_sig_qual(rx_status.signal,
1065                                                          rx_status.noise);
1066         } else {
1067                 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1068                 rx_status.qual = iwl_calc_sig_qual(rx_status.signal, 0);
1069         }
1070
1071         /* Reset beacon noise level if not associated. */
1072         if (!iwl_is_associated(priv))
1073                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1074
1075         /* Set "1" to report good data frames in groups of 100 */
1076 #ifdef CONFIG_IWLWIFI_DEBUG
1077         if (unlikely(priv->debug_level & IWL_DL_RX))
1078                 iwl_dbg_report_frame(priv, rx_start, len, header, 1);
1079 #endif
1080         IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
1081                 rx_status.signal, rx_status.noise, rx_status.signal,
1082                 (unsigned long long)rx_status.mactime);
1083
1084         /*
1085          * "antenna number"
1086          *
1087          * It seems that the antenna field in the phy flags value
1088          * is actually a bit field. This is undefined by radiotap,
1089          * it wants an actual antenna number but I always get "7"
1090          * for most legacy frames I receive indicating that the
1091          * same frame was received on all three RX chains.
1092          *
1093          * I think this field should be removed in favor of a
1094          * new 802.11n radiotap field "RX chains" that is defined
1095          * as a bitmask.
1096          */
1097         rx_status.antenna = le16_to_cpu(rx_start->phy_flags &
1098                                         RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
1099
1100         /* set the preamble flag if appropriate */
1101         if (rx_start->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
1102                 rx_status.flag |= RX_FLAG_SHORTPRE;
1103
1104         /* Take shortcut when only in monitor mode */
1105         if (priv->iw_mode == NL80211_IFTYPE_MONITOR) {
1106                 iwl_pass_packet_to_mac80211(priv, include_phy,
1107                                                  rxb, &rx_status);
1108                 return;
1109         }
1110
1111         network_packet = iwl_is_network_packet(priv, header);
1112         if (network_packet) {
1113                 priv->last_rx_rssi = rx_status.signal;
1114                 priv->last_beacon_time =  priv->ucode_beacon_time;
1115                 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
1116         }
1117
1118         fc = le16_to_cpu(header->frame_control);
1119         switch (fc & IEEE80211_FCTL_FTYPE) {
1120         case IEEE80211_FTYPE_MGMT:
1121         case IEEE80211_FTYPE_DATA:
1122                 if (priv->iw_mode == NL80211_IFTYPE_AP)
1123                         iwl_update_ps_mode(priv, fc  & IEEE80211_FCTL_PM,
1124                                                 header->addr2);
1125                 /* fall through */
1126         default:
1127                         iwl_pass_packet_to_mac80211(priv, include_phy, rxb,
1128                                    &rx_status);
1129                 break;
1130
1131         }
1132 }
1133 EXPORT_SYMBOL(iwl_rx_reply_rx);
1134
1135 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
1136  * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
1137 void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
1138                                     struct iwl_rx_mem_buffer *rxb)
1139 {
1140         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1141         priv->last_phy_res[0] = 1;
1142         memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
1143                sizeof(struct iwl_rx_phy_res));
1144 }
1145 EXPORT_SYMBOL(iwl_rx_reply_rx_phy);