iwlwifi: sanity check before counting number of tfds can be free
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl-rx.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #include <linux/etherdevice.h>
31 #include <net/mac80211.h>
32 #include <asm/unaligned.h>
33 #include "iwl-eeprom.h"
34 #include "iwl-dev.h"
35 #include "iwl-core.h"
36 #include "iwl-sta.h"
37 #include "iwl-io.h"
38 #include "iwl-calib.h"
39 #include "iwl-helpers.h"
40 /************************** RX-FUNCTIONS ****************************/
41 /*
42  * Rx theory of operation
43  *
44  * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
45  * each of which point to Receive Buffers to be filled by the NIC.  These get
46  * used not only for Rx frames, but for any command response or notification
47  * from the NIC.  The driver and NIC manage the Rx buffers by means
48  * of indexes into the circular buffer.
49  *
50  * Rx Queue Indexes
51  * The host/firmware share two index registers for managing the Rx buffers.
52  *
53  * The READ index maps to the first position that the firmware may be writing
54  * to -- the driver can read up to (but not including) this position and get
55  * good data.
56  * The READ index is managed by the firmware once the card is enabled.
57  *
58  * The WRITE index maps to the last position the driver has read from -- the
59  * position preceding WRITE is the last slot the firmware can place a packet.
60  *
61  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
62  * WRITE = READ.
63  *
64  * During initialization, the host sets up the READ queue position to the first
65  * INDEX position, and WRITE to the last (READ - 1 wrapped)
66  *
67  * When the firmware places a packet in a buffer, it will advance the READ index
68  * and fire the RX interrupt.  The driver can then query the READ index and
69  * process as many packets as possible, moving the WRITE index forward as it
70  * resets the Rx queue buffers with new memory.
71  *
72  * The management in the driver is as follows:
73  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
74  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
75  *   to replenish the iwl->rxq->rx_free.
76  * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
77  *   iwl->rxq is replenished and the READ INDEX is updated (updating the
78  *   'processed' and 'read' driver indexes as well)
79  * + A received packet is processed and handed to the kernel network stack,
80  *   detached from the iwl->rxq.  The driver 'processed' index is updated.
81  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
82  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
83  *   INDEX is not incremented and iwl->status(RX_STALLED) is set.  If there
84  *   were enough free buffers and RX_STALLED is set it is cleared.
85  *
86  *
87  * Driver sequence:
88  *
89  * iwl_rx_queue_alloc()   Allocates rx_free
90  * iwl_rx_replenish()     Replenishes rx_free list from rx_used, and calls
91  *                            iwl_rx_queue_restock
92  * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
93  *                            queue, updates firmware pointers, and updates
94  *                            the WRITE index.  If insufficient rx_free buffers
95  *                            are available, schedules iwl_rx_replenish
96  *
97  * -- enable interrupts --
98  * ISR - iwl_rx()         Detach iwl_rx_mem_buffers from pool up to the
99  *                            READ INDEX, detaching the SKB from the pool.
100  *                            Moves the packet buffer from queue to rx_used.
101  *                            Calls iwl_rx_queue_restock to refill any empty
102  *                            slots.
103  * ...
104  *
105  */
106
107 /**
108  * iwl_rx_queue_space - Return number of free slots available in queue.
109  */
110 int iwl_rx_queue_space(const struct iwl_rx_queue *q)
111 {
112         int s = q->read - q->write;
113         if (s <= 0)
114                 s += RX_QUEUE_SIZE;
115         /* keep some buffer to not confuse full and empty queue */
116         s -= 2;
117         if (s < 0)
118                 s = 0;
119         return s;
120 }
121 EXPORT_SYMBOL(iwl_rx_queue_space);
122
123 /**
124  * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
125  */
126 int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
127 {
128         unsigned long flags;
129         u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
130         u32 reg;
131         int ret = 0;
132
133         spin_lock_irqsave(&q->lock, flags);
134
135         if (q->need_update == 0)
136                 goto exit_unlock;
137
138         /* If power-saving is in use, make sure device is awake */
139         if (test_bit(STATUS_POWER_PMI, &priv->status)) {
140                 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
141
142                 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
143                         IWL_DEBUG_INFO(priv, "Rx queue requesting wakeup, GP1 = 0x%x\n",
144                                       reg);
145                         iwl_set_bit(priv, CSR_GP_CNTRL,
146                                     CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
147                         goto exit_unlock;
148                 }
149
150                 q->write_actual = (q->write & ~0x7);
151                 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
152
153         /* Else device is assumed to be awake */
154         } else {
155                 /* Device expects a multiple of 8 */
156                 q->write_actual = (q->write & ~0x7);
157                 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
158         }
159
160         q->need_update = 0;
161
162  exit_unlock:
163         spin_unlock_irqrestore(&q->lock, flags);
164         return ret;
165 }
166 EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
167 /**
168  * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
169  */
170 static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
171                                           dma_addr_t dma_addr)
172 {
173         return cpu_to_le32((u32)(dma_addr >> 8));
174 }
175
176 /**
177  * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
178  *
179  * If there are slots in the RX queue that need to be restocked,
180  * and we have free pre-allocated buffers, fill the ranks as much
181  * as we can, pulling from rx_free.
182  *
183  * This moves the 'write' index forward to catch up with 'processed', and
184  * also updates the memory address in the firmware to reference the new
185  * target buffer.
186  */
187 int iwl_rx_queue_restock(struct iwl_priv *priv)
188 {
189         struct iwl_rx_queue *rxq = &priv->rxq;
190         struct list_head *element;
191         struct iwl_rx_mem_buffer *rxb;
192         unsigned long flags;
193         int write;
194         int ret = 0;
195
196         spin_lock_irqsave(&rxq->lock, flags);
197         write = rxq->write & ~0x7;
198         while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
199                 /* Get next free Rx buffer, remove from free list */
200                 element = rxq->rx_free.next;
201                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
202                 list_del(element);
203
204                 /* Point to Rx buffer via next RBD in circular buffer */
205                 rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->page_dma);
206                 rxq->queue[rxq->write] = rxb;
207                 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
208                 rxq->free_count--;
209         }
210         spin_unlock_irqrestore(&rxq->lock, flags);
211         /* If the pre-allocated buffer pool is dropping low, schedule to
212          * refill it */
213         if (rxq->free_count <= RX_LOW_WATERMARK)
214                 queue_work(priv->workqueue, &priv->rx_replenish);
215
216
217         /* If we've added more space for the firmware to place data, tell it.
218          * Increment device's write pointer in multiples of 8. */
219         if (rxq->write_actual != (rxq->write & ~0x7)) {
220                 spin_lock_irqsave(&rxq->lock, flags);
221                 rxq->need_update = 1;
222                 spin_unlock_irqrestore(&rxq->lock, flags);
223                 ret = iwl_rx_queue_update_write_ptr(priv, rxq);
224         }
225
226         return ret;
227 }
228 EXPORT_SYMBOL(iwl_rx_queue_restock);
229
230
231 /**
232  * iwl_rx_replenish - Move all used packet from rx_used to rx_free
233  *
234  * When moving to rx_free an SKB is allocated for the slot.
235  *
236  * Also restock the Rx queue via iwl_rx_queue_restock.
237  * This is called as a scheduled work item (except for during initialization)
238  */
239 void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority)
240 {
241         struct iwl_rx_queue *rxq = &priv->rxq;
242         struct list_head *element;
243         struct iwl_rx_mem_buffer *rxb;
244         struct page *page;
245         unsigned long flags;
246         gfp_t gfp_mask = priority;
247
248         while (1) {
249                 spin_lock_irqsave(&rxq->lock, flags);
250                 if (list_empty(&rxq->rx_used)) {
251                         spin_unlock_irqrestore(&rxq->lock, flags);
252                         return;
253                 }
254                 spin_unlock_irqrestore(&rxq->lock, flags);
255
256                 if (rxq->free_count > RX_LOW_WATERMARK)
257                         gfp_mask |= __GFP_NOWARN;
258
259                 if (priv->hw_params.rx_page_order > 0)
260                         gfp_mask |= __GFP_COMP;
261
262                 /* Alloc a new receive buffer */
263                 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
264                 if (!page) {
265                         if (net_ratelimit())
266                                 IWL_DEBUG_INFO(priv, "alloc_pages failed, "
267                                                "order: %d\n",
268                                                priv->hw_params.rx_page_order);
269
270                         if ((rxq->free_count <= RX_LOW_WATERMARK) &&
271                             net_ratelimit())
272                                 IWL_CRIT(priv, "Failed to alloc_pages with %s. Only %u free buffers remaining.\n",
273                                          priority == GFP_ATOMIC ?  "GFP_ATOMIC" : "GFP_KERNEL",
274                                          rxq->free_count);
275                         /* We don't reschedule replenish work here -- we will
276                          * call the restock method and if it still needs
277                          * more buffers it will schedule replenish */
278                         return;
279                 }
280
281                 spin_lock_irqsave(&rxq->lock, flags);
282
283                 if (list_empty(&rxq->rx_used)) {
284                         spin_unlock_irqrestore(&rxq->lock, flags);
285                         __free_pages(page, priv->hw_params.rx_page_order);
286                         return;
287                 }
288                 element = rxq->rx_used.next;
289                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
290                 list_del(element);
291
292                 spin_unlock_irqrestore(&rxq->lock, flags);
293
294                 rxb->page = page;
295                 /* Get physical address of the RB */
296                 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
297                                 PAGE_SIZE << priv->hw_params.rx_page_order,
298                                 PCI_DMA_FROMDEVICE);
299                 /* dma address must be no more than 36 bits */
300                 BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36));
301                 /* and also 256 byte aligned! */
302                 BUG_ON(rxb->page_dma & DMA_BIT_MASK(8));
303
304                 spin_lock_irqsave(&rxq->lock, flags);
305
306                 list_add_tail(&rxb->list, &rxq->rx_free);
307                 rxq->free_count++;
308                 priv->alloc_rxb_page++;
309
310                 spin_unlock_irqrestore(&rxq->lock, flags);
311         }
312 }
313
314 void iwl_rx_replenish(struct iwl_priv *priv)
315 {
316         unsigned long flags;
317
318         iwl_rx_allocate(priv, GFP_KERNEL);
319
320         spin_lock_irqsave(&priv->lock, flags);
321         iwl_rx_queue_restock(priv);
322         spin_unlock_irqrestore(&priv->lock, flags);
323 }
324 EXPORT_SYMBOL(iwl_rx_replenish);
325
326 void iwl_rx_replenish_now(struct iwl_priv *priv)
327 {
328         iwl_rx_allocate(priv, GFP_ATOMIC);
329
330         iwl_rx_queue_restock(priv);
331 }
332 EXPORT_SYMBOL(iwl_rx_replenish_now);
333
334
335 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
336  * If an SKB has been detached, the POOL needs to have its SKB set to NULL
337  * This free routine walks the list of POOL entries and if SKB is set to
338  * non NULL it is unmapped and freed
339  */
340 void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
341 {
342         int i;
343         for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
344                 if (rxq->pool[i].page != NULL) {
345                         pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
346                                 PAGE_SIZE << priv->hw_params.rx_page_order,
347                                 PCI_DMA_FROMDEVICE);
348                         __iwl_free_pages(priv, rxq->pool[i].page);
349                         rxq->pool[i].page = NULL;
350                 }
351         }
352
353         pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
354                             rxq->dma_addr);
355         pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
356                             rxq->rb_stts, rxq->rb_stts_dma);
357         rxq->bd = NULL;
358         rxq->rb_stts  = NULL;
359 }
360 EXPORT_SYMBOL(iwl_rx_queue_free);
361
362 int iwl_rx_queue_alloc(struct iwl_priv *priv)
363 {
364         struct iwl_rx_queue *rxq = &priv->rxq;
365         struct pci_dev *dev = priv->pci_dev;
366         int i;
367
368         spin_lock_init(&rxq->lock);
369         INIT_LIST_HEAD(&rxq->rx_free);
370         INIT_LIST_HEAD(&rxq->rx_used);
371
372         /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
373         rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
374         if (!rxq->bd)
375                 goto err_bd;
376
377         rxq->rb_stts = pci_alloc_consistent(dev, sizeof(struct iwl_rb_status),
378                                         &rxq->rb_stts_dma);
379         if (!rxq->rb_stts)
380                 goto err_rb;
381
382         /* Fill the rx_used queue with _all_ of the Rx buffers */
383         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
384                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
385
386         /* Set us so that we have processed and used all buffers, but have
387          * not restocked the Rx queue with fresh buffers */
388         rxq->read = rxq->write = 0;
389         rxq->write_actual = 0;
390         rxq->free_count = 0;
391         rxq->need_update = 0;
392         return 0;
393
394 err_rb:
395         pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
396                             rxq->dma_addr);
397 err_bd:
398         return -ENOMEM;
399 }
400 EXPORT_SYMBOL(iwl_rx_queue_alloc);
401
402 void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
403 {
404         unsigned long flags;
405         int i;
406         spin_lock_irqsave(&rxq->lock, flags);
407         INIT_LIST_HEAD(&rxq->rx_free);
408         INIT_LIST_HEAD(&rxq->rx_used);
409         /* Fill the rx_used queue with _all_ of the Rx buffers */
410         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
411                 /* In the reset function, these buffers may have been allocated
412                  * to an SKB, so we need to unmap and free potential storage */
413                 if (rxq->pool[i].page != NULL) {
414                         pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
415                                 PAGE_SIZE << priv->hw_params.rx_page_order,
416                                 PCI_DMA_FROMDEVICE);
417                         __iwl_free_pages(priv, rxq->pool[i].page);
418                         rxq->pool[i].page = NULL;
419                 }
420                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
421         }
422
423         /* Set us so that we have processed and used all buffers, but have
424          * not restocked the Rx queue with fresh buffers */
425         rxq->read = rxq->write = 0;
426         rxq->write_actual = 0;
427         rxq->free_count = 0;
428         spin_unlock_irqrestore(&rxq->lock, flags);
429 }
430
431 int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
432 {
433         u32 rb_size;
434         const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
435         u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT for all devices? */
436
437         if (!priv->cfg->use_isr_legacy)
438                 rb_timeout = RX_RB_TIMEOUT;
439
440         if (priv->cfg->mod_params->amsdu_size_8K)
441                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
442         else
443                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
444
445         /* Stop Rx DMA */
446         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
447
448         /* Reset driver's Rx queue write index */
449         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
450
451         /* Tell device where to find RBD circular buffer in DRAM */
452         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
453                            (u32)(rxq->dma_addr >> 8));
454
455         /* Tell device where in DRAM to update its Rx status */
456         iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
457                            rxq->rb_stts_dma >> 4);
458
459         /* Enable Rx DMA
460          * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
461          *      the credit mechanism in 5000 HW RX FIFO
462          * Direct rx interrupts to hosts
463          * Rx buffer size 4 or 8k
464          * RB timeout 0x10
465          * 256 RBDs
466          */
467         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
468                            FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
469                            FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
470                            FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
471                            FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
472                            rb_size|
473                            (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
474                            (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
475
476         /* Set interrupt coalescing timer to 64 x 32 = 2048 usecs */
477         iwl_write8(priv, CSR_INT_COALESCING, 0x40);
478
479         return 0;
480 }
481
482 int iwl_rxq_stop(struct iwl_priv *priv)
483 {
484
485         /* stop Rx DMA */
486         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
487         iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
488                             FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
489
490         return 0;
491 }
492 EXPORT_SYMBOL(iwl_rxq_stop);
493
494 void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
495                                 struct iwl_rx_mem_buffer *rxb)
496
497 {
498         struct iwl_rx_packet *pkt = rxb_addr(rxb);
499         struct iwl_missed_beacon_notif *missed_beacon;
500
501         missed_beacon = &pkt->u.missed_beacon;
502         if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
503                 IWL_DEBUG_CALIB(priv, "missed bcn cnsq %d totl %d rcd %d expctd %d\n",
504                     le32_to_cpu(missed_beacon->consequtive_missed_beacons),
505                     le32_to_cpu(missed_beacon->total_missed_becons),
506                     le32_to_cpu(missed_beacon->num_recvd_beacons),
507                     le32_to_cpu(missed_beacon->num_expected_beacons));
508                 if (!test_bit(STATUS_SCANNING, &priv->status))
509                         iwl_init_sensitivity(priv);
510         }
511 }
512 EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
513
514
515 /* Calculate noise level, based on measurements during network silence just
516  *   before arriving beacon.  This measurement can be done only if we know
517  *   exactly when to expect beacons, therefore only when we're associated. */
518 static void iwl_rx_calc_noise(struct iwl_priv *priv)
519 {
520         struct statistics_rx_non_phy *rx_info
521                                 = &(priv->statistics.rx.general);
522         int num_active_rx = 0;
523         int total_silence = 0;
524         int bcn_silence_a =
525                 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
526         int bcn_silence_b =
527                 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
528         int bcn_silence_c =
529                 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
530
531         if (bcn_silence_a) {
532                 total_silence += bcn_silence_a;
533                 num_active_rx++;
534         }
535         if (bcn_silence_b) {
536                 total_silence += bcn_silence_b;
537                 num_active_rx++;
538         }
539         if (bcn_silence_c) {
540                 total_silence += bcn_silence_c;
541                 num_active_rx++;
542         }
543
544         /* Average among active antennas */
545         if (num_active_rx)
546                 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
547         else
548                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
549
550         IWL_DEBUG_CALIB(priv, "inband silence a %u, b %u, c %u, dBm %d\n",
551                         bcn_silence_a, bcn_silence_b, bcn_silence_c,
552                         priv->last_rx_noise);
553 }
554
555 #ifdef CONFIG_IWLWIFI_DEBUG
556 /*
557  *  based on the assumption of all statistics counter are in DWORD
558  *  FIXME: This function is for debugging, do not deal with
559  *  the case of counters roll-over.
560  */
561 static void iwl_accumulative_statistics(struct iwl_priv *priv,
562                                         __le32 *stats)
563 {
564         int i;
565         __le32 *prev_stats;
566         u32 *accum_stats;
567
568         prev_stats = (__le32 *)&priv->statistics;
569         accum_stats = (u32 *)&priv->accum_statistics;
570
571         for (i = sizeof(__le32); i < sizeof(struct iwl_notif_statistics);
572              i += sizeof(__le32), stats++, prev_stats++, accum_stats++)
573                 if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats))
574                         *accum_stats += (le32_to_cpu(*stats) -
575                                 le32_to_cpu(*prev_stats));
576
577         /* reset accumulative statistics for "no-counter" type statistics */
578         priv->accum_statistics.general.temperature =
579                 priv->statistics.general.temperature;
580         priv->accum_statistics.general.temperature_m =
581                 priv->statistics.general.temperature_m;
582         priv->accum_statistics.general.ttl_timestamp =
583                 priv->statistics.general.ttl_timestamp;
584         priv->accum_statistics.tx.tx_power.ant_a =
585                 priv->statistics.tx.tx_power.ant_a;
586         priv->accum_statistics.tx.tx_power.ant_b =
587                 priv->statistics.tx.tx_power.ant_b;
588         priv->accum_statistics.tx.tx_power.ant_c =
589                 priv->statistics.tx.tx_power.ant_c;
590 }
591 #endif
592
593 #define REG_RECALIB_PERIOD (60)
594
595 void iwl_rx_statistics(struct iwl_priv *priv,
596                               struct iwl_rx_mem_buffer *rxb)
597 {
598         int change;
599         struct iwl_rx_packet *pkt = rxb_addr(rxb);
600
601         IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n",
602                      (int)sizeof(priv->statistics),
603                      le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
604
605         change = ((priv->statistics.general.temperature !=
606                    pkt->u.stats.general.temperature) ||
607                   ((priv->statistics.flag &
608                     STATISTICS_REPLY_FLG_HT40_MODE_MSK) !=
609                    (pkt->u.stats.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)));
610
611 #ifdef CONFIG_IWLWIFI_DEBUG
612         iwl_accumulative_statistics(priv, (__le32 *)&pkt->u.stats);
613 #endif
614         memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
615
616         set_bit(STATUS_STATISTICS, &priv->status);
617
618         /* Reschedule the statistics timer to occur in
619          * REG_RECALIB_PERIOD seconds to ensure we get a
620          * thermal update even if the uCode doesn't give
621          * us one */
622         mod_timer(&priv->statistics_periodic, jiffies +
623                   msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
624
625         if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
626             (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
627                 iwl_rx_calc_noise(priv);
628                 queue_work(priv->workqueue, &priv->run_time_calib_work);
629         }
630         if (priv->cfg->ops->lib->temp_ops.temperature && change)
631                 priv->cfg->ops->lib->temp_ops.temperature(priv);
632 }
633 EXPORT_SYMBOL(iwl_rx_statistics);
634
635 void iwl_reply_statistics(struct iwl_priv *priv,
636                               struct iwl_rx_mem_buffer *rxb)
637 {
638         struct iwl_rx_packet *pkt = rxb_addr(rxb);
639
640         if (le32_to_cpu(pkt->u.stats.flag) & UCODE_STATISTICS_CLEAR_MSK) {
641                 memset(&priv->statistics, 0,
642                         sizeof(struct iwl_notif_statistics));
643 #ifdef CONFIG_IWLWIFI_DEBUG
644                 memset(&priv->accum_statistics, 0,
645                         sizeof(struct iwl_notif_statistics));
646 #endif
647                 IWL_DEBUG_RX(priv, "Statistics have been cleared\n");
648         }
649         iwl_rx_statistics(priv, rxb);
650 }
651 EXPORT_SYMBOL(iwl_reply_statistics);
652
653 /* Calc max signal level (dBm) among 3 possible receivers */
654 static inline int iwl_calc_rssi(struct iwl_priv *priv,
655                                 struct iwl_rx_phy_res *rx_resp)
656 {
657         return priv->cfg->ops->utils->calc_rssi(priv, rx_resp);
658 }
659
660 #ifdef CONFIG_IWLWIFI_DEBUG
661 /**
662  * iwl_dbg_report_frame - dump frame to syslog during debug sessions
663  *
664  * You may hack this function to show different aspects of received frames,
665  * including selective frame dumps.
666  * group100 parameter selects whether to show 1 out of 100 good data frames.
667  *    All beacon and probe response frames are printed.
668  */
669 static void iwl_dbg_report_frame(struct iwl_priv *priv,
670                       struct iwl_rx_phy_res *phy_res, u16 length,
671                       struct ieee80211_hdr *header, int group100)
672 {
673         u32 to_us;
674         u32 print_summary = 0;
675         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
676         u32 hundred = 0;
677         u32 dataframe = 0;
678         __le16 fc;
679         u16 seq_ctl;
680         u16 channel;
681         u16 phy_flags;
682         u32 rate_n_flags;
683         u32 tsf_low;
684         int rssi;
685
686         if (likely(!(iwl_get_debug_level(priv) & IWL_DL_RX)))
687                 return;
688
689         /* MAC header */
690         fc = header->frame_control;
691         seq_ctl = le16_to_cpu(header->seq_ctrl);
692
693         /* metadata */
694         channel = le16_to_cpu(phy_res->channel);
695         phy_flags = le16_to_cpu(phy_res->phy_flags);
696         rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
697
698         /* signal statistics */
699         rssi = iwl_calc_rssi(priv, phy_res);
700         tsf_low = le64_to_cpu(phy_res->timestamp) & 0x0ffffffff;
701
702         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
703
704         /* if data frame is to us and all is good,
705          *   (optionally) print summary for only 1 out of every 100 */
706         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
707             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
708                 dataframe = 1;
709                 if (!group100)
710                         print_summary = 1;      /* print each frame */
711                 else if (priv->framecnt_to_us < 100) {
712                         priv->framecnt_to_us++;
713                         print_summary = 0;
714                 } else {
715                         priv->framecnt_to_us = 0;
716                         print_summary = 1;
717                         hundred = 1;
718                 }
719         } else {
720                 /* print summary for all other frames */
721                 print_summary = 1;
722         }
723
724         if (print_summary) {
725                 char *title;
726                 int rate_idx;
727                 u32 bitrate;
728
729                 if (hundred)
730                         title = "100Frames";
731                 else if (ieee80211_has_retry(fc))
732                         title = "Retry";
733                 else if (ieee80211_is_assoc_resp(fc))
734                         title = "AscRsp";
735                 else if (ieee80211_is_reassoc_resp(fc))
736                         title = "RasRsp";
737                 else if (ieee80211_is_probe_resp(fc)) {
738                         title = "PrbRsp";
739                         print_dump = 1; /* dump frame contents */
740                 } else if (ieee80211_is_beacon(fc)) {
741                         title = "Beacon";
742                         print_dump = 1; /* dump frame contents */
743                 } else if (ieee80211_is_atim(fc))
744                         title = "ATIM";
745                 else if (ieee80211_is_auth(fc))
746                         title = "Auth";
747                 else if (ieee80211_is_deauth(fc))
748                         title = "DeAuth";
749                 else if (ieee80211_is_disassoc(fc))
750                         title = "DisAssoc";
751                 else
752                         title = "Frame";
753
754                 rate_idx = iwl_hwrate_to_plcp_idx(rate_n_flags);
755                 if (unlikely((rate_idx < 0) || (rate_idx >= IWL_RATE_COUNT))) {
756                         bitrate = 0;
757                         WARN_ON_ONCE(1);
758                 } else {
759                         bitrate = iwl_rates[rate_idx].ieee / 2;
760                 }
761
762                 /* print frame summary.
763                  * MAC addresses show just the last byte (for brevity),
764                  *    but you can hack it to show more, if you'd like to. */
765                 if (dataframe)
766                         IWL_DEBUG_RX(priv, "%s: mhd=0x%04x, dst=0x%02x, "
767                                      "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
768                                      title, le16_to_cpu(fc), header->addr1[5],
769                                      length, rssi, channel, bitrate);
770                 else {
771                         /* src/dst addresses assume managed mode */
772                         IWL_DEBUG_RX(priv, "%s: 0x%04x, dst=0x%02x, src=0x%02x, "
773                                      "len=%u, rssi=%d, tim=%lu usec, "
774                                      "phy=0x%02x, chnl=%d\n",
775                                      title, le16_to_cpu(fc), header->addr1[5],
776                                      header->addr3[5], length, rssi,
777                                      tsf_low - priv->scan_start_tsf,
778                                      phy_flags, channel);
779                 }
780         }
781         if (print_dump)
782                 iwl_print_hex_dump(priv, IWL_DL_RX, header, length);
783 }
784 #endif
785
786 /*
787  * returns non-zero if packet should be dropped
788  */
789 int iwl_set_decrypted_flag(struct iwl_priv *priv,
790                            struct ieee80211_hdr *hdr,
791                            u32 decrypt_res,
792                            struct ieee80211_rx_status *stats)
793 {
794         u16 fc = le16_to_cpu(hdr->frame_control);
795
796         if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
797                 return 0;
798
799         if (!(fc & IEEE80211_FCTL_PROTECTED))
800                 return 0;
801
802         IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res);
803         switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
804         case RX_RES_STATUS_SEC_TYPE_TKIP:
805                 /* The uCode has got a bad phase 1 Key, pushes the packet.
806                  * Decryption will be done in SW. */
807                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
808                     RX_RES_STATUS_BAD_KEY_TTAK)
809                         break;
810
811         case RX_RES_STATUS_SEC_TYPE_WEP:
812                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
813                     RX_RES_STATUS_BAD_ICV_MIC) {
814                         /* bad ICV, the packet is destroyed since the
815                          * decryption is inplace, drop it */
816                         IWL_DEBUG_RX(priv, "Packet destroyed\n");
817                         return -1;
818                 }
819         case RX_RES_STATUS_SEC_TYPE_CCMP:
820                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
821                     RX_RES_STATUS_DECRYPT_OK) {
822                         IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n");
823                         stats->flag |= RX_FLAG_DECRYPTED;
824                 }
825                 break;
826
827         default:
828                 break;
829         }
830         return 0;
831 }
832 EXPORT_SYMBOL(iwl_set_decrypted_flag);
833
834 static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
835 {
836         u32 decrypt_out = 0;
837
838         if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
839                                         RX_RES_STATUS_STATION_FOUND)
840                 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
841                                 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
842
843         decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
844
845         /* packet was not encrypted */
846         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
847                                         RX_RES_STATUS_SEC_TYPE_NONE)
848                 return decrypt_out;
849
850         /* packet was encrypted with unknown alg */
851         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
852                                         RX_RES_STATUS_SEC_TYPE_ERR)
853                 return decrypt_out;
854
855         /* decryption was not done in HW */
856         if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
857                                         RX_MPDU_RES_STATUS_DEC_DONE_MSK)
858                 return decrypt_out;
859
860         switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
861
862         case RX_RES_STATUS_SEC_TYPE_CCMP:
863                 /* alg is CCM: check MIC only */
864                 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
865                         /* Bad MIC */
866                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
867                 else
868                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
869
870                 break;
871
872         case RX_RES_STATUS_SEC_TYPE_TKIP:
873                 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
874                         /* Bad TTAK */
875                         decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
876                         break;
877                 }
878                 /* fall through if TTAK OK */
879         default:
880                 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
881                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
882                 else
883                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
884                 break;
885         };
886
887         IWL_DEBUG_RX(priv, "decrypt_in:0x%x  decrypt_out = 0x%x\n",
888                                         decrypt_in, decrypt_out);
889
890         return decrypt_out;
891 }
892
893 static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
894                                         struct ieee80211_hdr *hdr,
895                                         u16 len,
896                                         u32 ampdu_status,
897                                         struct iwl_rx_mem_buffer *rxb,
898                                         struct ieee80211_rx_status *stats)
899 {
900         struct sk_buff *skb;
901         int ret = 0;
902         __le16 fc = hdr->frame_control;
903
904         /* We only process data packets if the interface is open */
905         if (unlikely(!priv->is_open)) {
906                 IWL_DEBUG_DROP_LIMIT(priv,
907                     "Dropping packet while interface is not open.\n");
908                 return;
909         }
910
911         /* In case of HW accelerated crypto and bad decryption, drop */
912         if (!priv->cfg->mod_params->sw_crypto &&
913             iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
914                 return;
915
916         skb = alloc_skb(IWL_LINK_HDR_MAX * 2, GFP_ATOMIC);
917         if (!skb) {
918                 IWL_ERR(priv, "alloc_skb failed\n");
919                 return;
920         }
921
922         skb_reserve(skb, IWL_LINK_HDR_MAX);
923         skb_add_rx_frag(skb, 0, rxb->page, (void *)hdr - rxb_addr(rxb), len);
924
925         /* mac80211 currently doesn't support paged SKB. Convert it to
926          * linear SKB for management frame and data frame requires
927          * software decryption or software defragementation. */
928         if (ieee80211_is_mgmt(fc) ||
929             ieee80211_has_protected(fc) ||
930             ieee80211_has_morefrags(fc) ||
931             le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG ||
932             (ieee80211_is_data_qos(fc) &&
933              *ieee80211_get_qos_ctl(hdr) &
934              IEEE80211_QOS_CONTROL_A_MSDU_PRESENT))
935                 ret = skb_linearize(skb);
936         else
937                 ret = __pskb_pull_tail(skb, min_t(u16, IWL_LINK_HDR_MAX, len)) ?
938                          0 : -ENOMEM;
939
940         if (ret) {
941                 kfree_skb(skb);
942                 goto out;
943         }
944
945         /*
946          * XXX: We cannot touch the page and its virtual memory (hdr) after
947          * here. It might have already been freed by the above skb change.
948          */
949
950         iwl_update_stats(priv, false, fc, len);
951         memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
952
953         ieee80211_rx(priv->hw, skb);
954  out:
955         priv->alloc_rxb_page--;
956         rxb->page = NULL;
957 }
958
959 /* This is necessary only for a number of statistics, see the caller. */
960 static int iwl_is_network_packet(struct iwl_priv *priv,
961                 struct ieee80211_hdr *header)
962 {
963         /* Filter incoming packets to determine if they are targeted toward
964          * this network, discarding packets coming from ourselves */
965         switch (priv->iw_mode) {
966         case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source    | BSSID */
967                 /* packets to our IBSS update information */
968                 return !compare_ether_addr(header->addr3, priv->bssid);
969         case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
970                 /* packets to our IBSS update information */
971                 return !compare_ether_addr(header->addr2, priv->bssid);
972         default:
973                 return 1;
974         }
975 }
976
977 /* Called for REPLY_RX (legacy ABG frames), or
978  * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
979 void iwl_rx_reply_rx(struct iwl_priv *priv,
980                                 struct iwl_rx_mem_buffer *rxb)
981 {
982         struct ieee80211_hdr *header;
983         struct ieee80211_rx_status rx_status;
984         struct iwl_rx_packet *pkt = rxb_addr(rxb);
985         struct iwl_rx_phy_res *phy_res;
986         __le32 rx_pkt_status;
987         struct iwl4965_rx_mpdu_res_start *amsdu;
988         u32 len;
989         u32 ampdu_status;
990         u32 rate_n_flags;
991
992         /**
993          * REPLY_RX and REPLY_RX_MPDU_CMD are handled differently.
994          *      REPLY_RX: physical layer info is in this buffer
995          *      REPLY_RX_MPDU_CMD: physical layer info was sent in separate
996          *              command and cached in priv->last_phy_res
997          *
998          * Here we set up local variables depending on which command is
999          * received.
1000          */
1001         if (pkt->hdr.cmd == REPLY_RX) {
1002                 phy_res = (struct iwl_rx_phy_res *)pkt->u.raw;
1003                 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res)
1004                                 + phy_res->cfg_phy_cnt);
1005
1006                 len = le16_to_cpu(phy_res->byte_count);
1007                 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*phy_res) +
1008                                 phy_res->cfg_phy_cnt + len);
1009                 ampdu_status = le32_to_cpu(rx_pkt_status);
1010         } else {
1011                 if (!priv->last_phy_res[0]) {
1012                         IWL_ERR(priv, "MPDU frame without cached PHY data\n");
1013                         return;
1014                 }
1015                 phy_res = (struct iwl_rx_phy_res *)&priv->last_phy_res[1];
1016                 amsdu = (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
1017                 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
1018                 len = le16_to_cpu(amsdu->byte_count);
1019                 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*amsdu) + len);
1020                 ampdu_status = iwl_translate_rx_status(priv,
1021                                 le32_to_cpu(rx_pkt_status));
1022         }
1023
1024         if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
1025                 IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
1026                                 phy_res->cfg_phy_cnt);
1027                 return;
1028         }
1029
1030         if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
1031             !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
1032                 IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n",
1033                                 le32_to_cpu(rx_pkt_status));
1034                 return;
1035         }
1036
1037         /* This will be used in several places later */
1038         rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
1039
1040         /* rx_status carries information about the packet to mac80211 */
1041         rx_status.mactime = le64_to_cpu(phy_res->timestamp);
1042         rx_status.freq =
1043                 ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel));
1044         rx_status.band = (phy_res->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
1045                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1046         rx_status.rate_idx =
1047                 iwl_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band);
1048         rx_status.flag = 0;
1049
1050         /* TSF isn't reliable. In order to allow smooth user experience,
1051          * this W/A doesn't propagate it to the mac80211 */
1052         /*rx_status.flag |= RX_FLAG_TSFT;*/
1053
1054         priv->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
1055
1056         /* Find max signal strength (dBm) among 3 antenna/receiver chains */
1057         rx_status.signal = iwl_calc_rssi(priv, phy_res);
1058
1059         /* Meaningful noise values are available only from beacon statistics,
1060          *   which are gathered only when associated, and indicate noise
1061          *   only for the associated network channel ...
1062          * Ignore these noise values while scanning (other channels) */
1063         if (iwl_is_associated(priv) &&
1064             !test_bit(STATUS_SCANNING, &priv->status)) {
1065                 rx_status.noise = priv->last_rx_noise;
1066         } else {
1067                 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1068         }
1069
1070         /* Reset beacon noise level if not associated. */
1071         if (!iwl_is_associated(priv))
1072                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1073
1074 #ifdef CONFIG_IWLWIFI_DEBUG
1075         /* Set "1" to report good data frames in groups of 100 */
1076         if (unlikely(iwl_get_debug_level(priv) & IWL_DL_RX))
1077                 iwl_dbg_report_frame(priv, phy_res, len, header, 1);
1078 #endif
1079         iwl_dbg_log_rx_data_frame(priv, len, header);
1080         IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, noise %d, TSF %llu\n",
1081                 rx_status.signal, rx_status.noise,
1082                 (unsigned long long)rx_status.mactime);
1083
1084         /*
1085          * "antenna number"
1086          *
1087          * It seems that the antenna field in the phy flags value
1088          * is actually a bit field. This is undefined by radiotap,
1089          * it wants an actual antenna number but I always get "7"
1090          * for most legacy frames I receive indicating that the
1091          * same frame was received on all three RX chains.
1092          *
1093          * I think this field should be removed in favor of a
1094          * new 802.11n radiotap field "RX chains" that is defined
1095          * as a bitmask.
1096          */
1097         rx_status.antenna =
1098                 (le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK)
1099                 >> RX_RES_PHY_FLAGS_ANTENNA_POS;
1100
1101         /* set the preamble flag if appropriate */
1102         if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
1103                 rx_status.flag |= RX_FLAG_SHORTPRE;
1104
1105         /* Set up the HT phy flags */
1106         if (rate_n_flags & RATE_MCS_HT_MSK)
1107                 rx_status.flag |= RX_FLAG_HT;
1108         if (rate_n_flags & RATE_MCS_HT40_MSK)
1109                 rx_status.flag |= RX_FLAG_40MHZ;
1110         if (rate_n_flags & RATE_MCS_SGI_MSK)
1111                 rx_status.flag |= RX_FLAG_SHORT_GI;
1112
1113         if (iwl_is_network_packet(priv, header)) {
1114                 priv->last_rx_rssi = rx_status.signal;
1115                 priv->last_beacon_time =  priv->ucode_beacon_time;
1116                 priv->last_tsf = le64_to_cpu(phy_res->timestamp);
1117         }
1118
1119         iwl_pass_packet_to_mac80211(priv, header, len, ampdu_status,
1120                                     rxb, &rx_status);
1121 }
1122 EXPORT_SYMBOL(iwl_rx_reply_rx);
1123
1124 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
1125  * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
1126 void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
1127                                     struct iwl_rx_mem_buffer *rxb)
1128 {
1129         struct iwl_rx_packet *pkt = rxb_addr(rxb);
1130         priv->last_phy_res[0] = 1;
1131         memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
1132                sizeof(struct iwl_rx_phy_res));
1133 }
1134 EXPORT_SYMBOL(iwl_rx_reply_rx_phy);